VirtualBox

source: vbox/trunk/include/VBox/VBoxVideo.h@ 28322

Last change on this file since 28322 was 28322, checked in by vboxsync, 15 years ago

wddm: vbva impl cleanup

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1/** @file
2 * VirtualBox Video interface.
3 */
4
5/*
6 * Copyright (C) 2006 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_VBoxVideo_h
31#define ___VBox_VBoxVideo_h
32
33#include <iprt/cdefs.h>
34#include <iprt/types.h>
35
36#ifdef VBOX_WITH_HGSMI
37#include <VBox/VMMDev.h>
38#endif /* VBOX_WITH_HGSMI */
39
40/*
41 * The last 4096 bytes of the guest VRAM contains the generic info for all
42 * DualView chunks: sizes and offsets of chunks. This is filled by miniport.
43 *
44 * Last 4096 bytes of each chunk contain chunk specific data: framebuffer info,
45 * etc. This is used exclusively by the corresponding instance of a display driver.
46 *
47 * The VRAM layout:
48 * Last 4096 bytes - Adapter information area.
49 * 4096 bytes aligned miniport heap (value specified in the config rouded up).
50 * Slack - what left after dividing the VRAM.
51 * 4096 bytes aligned framebuffers:
52 * last 4096 bytes of each framebuffer is the display information area.
53 *
54 * The Virtual Graphics Adapter information in the guest VRAM is stored by the
55 * guest video driver using structures prepended by VBOXVIDEOINFOHDR.
56 *
57 * When the guest driver writes dword 0 to the VBE_DISPI_INDEX_VBOX_VIDEO
58 * the host starts to process the info. The first element at the start of
59 * the 4096 bytes region should be normally be a LINK that points to
60 * actual information chain. That way the guest driver can have some
61 * fixed layout of the information memory block and just rewrite
62 * the link to point to relevant memory chain.
63 *
64 * The processing stops at the END element.
65 *
66 * The host can access the memory only when the port IO is processed.
67 * All data that will be needed later must be copied from these 4096 bytes.
68 * But other VRAM can be used by host until the mode is disabled.
69 *
70 * The guest driver writes dword 0xffffffff to the VBE_DISPI_INDEX_VBOX_VIDEO
71 * to disable the mode.
72 *
73 * VBE_DISPI_INDEX_VBOX_VIDEO is used to read the configuration information
74 * from the host and issue commands to the host.
75 *
76 * The guest writes the VBE_DISPI_INDEX_VBOX_VIDEO index register, the the
77 * following operations with the VBE data register can be performed:
78 *
79 * Operation Result
80 * write 16 bit value NOP
81 * read 16 bit value count of monitors
82 * write 32 bit value sets the vbox command value and the command processed by the host
83 * read 32 bit value result of the last vbox command is returned
84 */
85
86#define VBOX_VIDEO_PRIMARY_SCREEN 0
87#define VBOX_VIDEO_NO_SCREEN ~0
88
89#define VBOX_VIDEO_MAX_SCREENS 64
90
91/* The size of the information. */
92#ifndef VBOX_WITH_HGSMI
93#define VBOX_VIDEO_ADAPTER_INFORMATION_SIZE 4096
94#define VBOX_VIDEO_DISPLAY_INFORMATION_SIZE 4096
95#else
96/*
97 * The minimum HGSMI heap size is PAGE_SIZE (4096 bytes) and is a restriction of the
98 * runtime heapsimple API. Use minimum 2 pages here, because the info area also may
99 * contain other data (for example HGSMIHOSTFLAGS structure).
100 */
101#ifdef VBOXWDDM
102# define VBVA_ADAPTER_INFORMATION_SIZE (64*_1K)
103#else
104#define VBVA_ADAPTER_INFORMATION_SIZE (16*_1K)
105#define VBVA_DISPLAY_INFORMATION_SIZE (64*_1K)
106#endif
107#define VBVA_MIN_BUFFER_SIZE (64*_1K)
108#endif /* VBOX_WITH_HGSMI */
109
110
111/* The value for port IO to let the adapter to interpret the adapter memory. */
112#define VBOX_VIDEO_DISABLE_ADAPTER_MEMORY 0xFFFFFFFF
113
114/* The value for port IO to let the adapter to interpret the adapter memory. */
115#define VBOX_VIDEO_INTERPRET_ADAPTER_MEMORY 0x00000000
116
117/* The value for port IO to let the adapter to interpret the display memory.
118 * The display number is encoded in low 16 bits.
119 */
120#define VBOX_VIDEO_INTERPRET_DISPLAY_MEMORY_BASE 0x00010000
121
122
123/* The end of the information. */
124#define VBOX_VIDEO_INFO_TYPE_END 0
125/* Instructs the host to fetch the next VBOXVIDEOINFOHDR at the given offset of VRAM. */
126#define VBOX_VIDEO_INFO_TYPE_LINK 1
127/* Information about a display memory position. */
128#define VBOX_VIDEO_INFO_TYPE_DISPLAY 2
129/* Information about a screen. */
130#define VBOX_VIDEO_INFO_TYPE_SCREEN 3
131/* Information about host notifications for the driver. */
132#define VBOX_VIDEO_INFO_TYPE_HOST_EVENTS 4
133/* Information about non-volatile guest VRAM heap. */
134#define VBOX_VIDEO_INFO_TYPE_NV_HEAP 5
135/* VBVA enable/disable. */
136#define VBOX_VIDEO_INFO_TYPE_VBVA_STATUS 6
137/* VBVA flush. */
138#define VBOX_VIDEO_INFO_TYPE_VBVA_FLUSH 7
139/* Query configuration value. */
140#define VBOX_VIDEO_INFO_TYPE_QUERY_CONF32 8
141
142
143#pragma pack(1)
144typedef struct _VBOXVIDEOINFOHDR
145{
146 uint8_t u8Type;
147 uint8_t u8Reserved;
148 uint16_t u16Length;
149} VBOXVIDEOINFOHDR;
150
151
152typedef struct _VBOXVIDEOINFOLINK
153{
154 /* Relative offset in VRAM */
155 int32_t i32Offset;
156} VBOXVIDEOINFOLINK;
157
158
159/* Resides in adapter info memory. Describes a display VRAM chunk. */
160typedef struct _VBOXVIDEOINFODISPLAY
161{
162 /* Index of the framebuffer assigned by guest. */
163 uint32_t u32Index;
164
165 /* Absolute offset in VRAM of the framebuffer to be displayed on the monitor. */
166 uint32_t u32Offset;
167
168 /* The size of the memory that can be used for the screen. */
169 uint32_t u32FramebufferSize;
170
171 /* The size of the memory that is used for the Display information.
172 * The information is at u32Offset + u32FramebufferSize
173 */
174 uint32_t u32InformationSize;
175
176} VBOXVIDEOINFODISPLAY;
177
178
179/* Resides in display info area, describes the current video mode. */
180#define VBOX_VIDEO_INFO_SCREEN_F_NONE 0x00
181#define VBOX_VIDEO_INFO_SCREEN_F_ACTIVE 0x01
182
183typedef struct _VBOXVIDEOINFOSCREEN
184{
185 /* Physical X origin relative to the primary screen. */
186 int32_t xOrigin;
187
188 /* Physical Y origin relative to the primary screen. */
189 int32_t yOrigin;
190
191 /* The scan line size in bytes. */
192 uint32_t u32LineSize;
193
194 /* Width of the screen. */
195 uint16_t u16Width;
196
197 /* Height of the screen. */
198 uint16_t u16Height;
199
200 /* Color depth. */
201 uint8_t bitsPerPixel;
202
203 /* VBOX_VIDEO_INFO_SCREEN_F_* */
204 uint8_t u8Flags;
205} VBOXVIDEOINFOSCREEN;
206
207/* The guest initializes the structure to 0. The positions of the structure in the
208 * display info area must not be changed, host will update the structure. Guest checks
209 * the events and modifies the structure as a response to host.
210 */
211#define VBOX_VIDEO_INFO_HOST_EVENTS_F_NONE 0x00000000
212#define VBOX_VIDEO_INFO_HOST_EVENTS_F_VRDP_RESET 0x00000080
213
214typedef struct _VBOXVIDEOINFOHOSTEVENTS
215{
216 /* Host events. */
217 uint32_t fu32Events;
218} VBOXVIDEOINFOHOSTEVENTS;
219
220/* Resides in adapter info memory. Describes the non-volatile VRAM heap. */
221typedef struct _VBOXVIDEOINFONVHEAP
222{
223 /* Absolute offset in VRAM of the start of the heap. */
224 uint32_t u32HeapOffset;
225
226 /* The size of the heap. */
227 uint32_t u32HeapSize;
228
229} VBOXVIDEOINFONVHEAP;
230
231/* Display information area. */
232typedef struct _VBOXVIDEOINFOVBVASTATUS
233{
234 /* Absolute offset in VRAM of the start of the VBVA QUEUE. 0 to disable VBVA. */
235 uint32_t u32QueueOffset;
236
237 /* The size of the VBVA QUEUE. 0 to disable VBVA. */
238 uint32_t u32QueueSize;
239
240} VBOXVIDEOINFOVBVASTATUS;
241
242typedef struct _VBOXVIDEOINFOVBVAFLUSH
243{
244 uint32_t u32DataStart;
245
246 uint32_t u32DataEnd;
247
248} VBOXVIDEOINFOVBVAFLUSH;
249
250#define VBOX_VIDEO_QCI32_MONITOR_COUNT 0
251#define VBOX_VIDEO_QCI32_OFFSCREEN_HEAP_SIZE 1
252
253typedef struct _VBOXVIDEOINFOQUERYCONF32
254{
255 uint32_t u32Index;
256
257 uint32_t u32Value;
258
259} VBOXVIDEOINFOQUERYCONF32;
260#pragma pack()
261
262# ifdef VBOX_WITH_VIDEOHWACCEL
263#pragma pack(1)
264
265#define VBOXVHWA_VERSION_MAJ 0
266#define VBOXVHWA_VERSION_MIN 0
267#define VBOXVHWA_VERSION_BLD 6
268#define VBOXVHWA_VERSION_RSV 0
269
270typedef enum
271{
272 VBOXVHWACMD_TYPE_SURF_CANCREATE = 1,
273 VBOXVHWACMD_TYPE_SURF_CREATE,
274 VBOXVHWACMD_TYPE_SURF_DESTROY,
275 VBOXVHWACMD_TYPE_SURF_LOCK,
276 VBOXVHWACMD_TYPE_SURF_UNLOCK,
277 VBOXVHWACMD_TYPE_SURF_BLT,
278 VBOXVHWACMD_TYPE_SURF_FLIP,
279 VBOXVHWACMD_TYPE_SURF_OVERLAY_UPDATE,
280 VBOXVHWACMD_TYPE_SURF_OVERLAY_SETPOSITION,
281 VBOXVHWACMD_TYPE_SURF_COLORKEY_SET,
282 VBOXVHWACMD_TYPE_QUERY_INFO1,
283 VBOXVHWACMD_TYPE_QUERY_INFO2,
284 VBOXVHWACMD_TYPE_ENABLE,
285 VBOXVHWACMD_TYPE_DISABLE,
286 VBOXVHWACMD_TYPE_HH_CONSTRUCT,
287 VBOXVHWACMD_TYPE_HH_RESET
288} VBOXVHWACMD_TYPE;
289
290/* the command processing was asynch, set by the host to indicate asynch command completion
291 * must not be cleared once set, the command completion is performed by issuing a host->guest completion command
292 * while keeping this flag unchanged */
293#define VBOXVHWACMD_FLAG_HG_ASYNCH 0x00010000
294/* asynch completion is performed by issuing the event */
295#define VBOXVHWACMD_FLAG_GH_ASYNCH_EVENT 0x00000001
296/* issue interrupt on asynch completion */
297#define VBOXVHWACMD_FLAG_GH_ASYNCH_IRQ 0x00000002
298/* guest does not do any op on completion of this command, the host may copy the command and indicate that it does not need the command anymore
299 * by setting the VBOXVHWACMD_FLAG_HG_ASYNCH_RETURNED flag */
300#define VBOXVHWACMD_FLAG_GH_ASYNCH_NOCOMPLETION 0x00000004
301/* the host has copied the VBOXVHWACMD_FLAG_GH_ASYNCH_NOCOMPLETION command and returned it to the guest */
302#define VBOXVHWACMD_FLAG_HG_ASYNCH_RETURNED 0x00020000
303/* this is the host->host cmd, i.e. a configuration command posted by the host to the framebuffer */
304#define VBOXVHWACMD_FLAG_HH_CMD 0x10000000
305
306typedef struct _VBOXVHWACMD
307{
308 VBOXVHWACMD_TYPE enmCmd; /* command type */
309 volatile int32_t rc; /* command result */
310 int32_t iDisplay; /* display index */
311 volatile int32_t Flags; /* ored VBOXVHWACMD_FLAG_xxx values */
312 uint64_t GuestVBVAReserved1; /* field internally used by the guest VBVA cmd handling, must NOT be modified by clients */
313 uint64_t GuestVBVAReserved2; /* field internally used by the guest VBVA cmd handling, must NOT be modified by clients */
314 volatile uint32_t cRefs;
315 int32_t Reserved;
316 union
317 {
318 struct _VBOXVHWACMD *pNext;
319 uint32_t offNext;
320 uint64_t Data; /* the body is 64-bit aligned */
321 } u;
322 char body[1];
323} VBOXVHWACMD;
324
325#define VBOXVHWACMD_HEADSIZE() (RT_OFFSETOF(VBOXVHWACMD, body))
326#define VBOXVHWACMD_SIZE_FROMBODYSIZE(_s) (VBOXVHWACMD_HEADSIZE() + (_s))
327#define VBOXVHWACMD_SIZE(_tCmd) (VBOXVHWACMD_SIZE_FROMBODYSIZE(sizeof(_tCmd)))
328typedef unsigned int VBOXVHWACMD_LENGTH;
329typedef uint64_t VBOXVHWA_SURFHANDLE;
330#define VBOXVHWA_SURFHANDLE_INVALID 0
331#define VBOXVHWACMD_BODY(_p, _t) ((_t*)(_p)->body)
332#define VBOXVHWACMD_HEAD(_pb) ((VBOXVHWACMD*)((uint8_t *)(_pb) - RT_OFFSETOF(VBOXVHWACMD, body)))
333
334typedef struct _VBOXVHWA_RECTL
335{
336 int32_t left;
337 int32_t top;
338 int32_t right;
339 int32_t bottom;
340} VBOXVHWA_RECTL;
341
342typedef struct _VBOXVHWA_COLORKEY
343{
344 uint32_t low;
345 uint32_t high;
346} VBOXVHWA_COLORKEY;
347
348typedef struct _VBOXVHWA_PIXELFORMAT
349{
350 uint32_t flags;
351 uint32_t fourCC;
352 union
353 {
354 uint32_t rgbBitCount;
355 uint32_t yuvBitCount;
356 } c;
357
358 union
359 {
360 uint32_t rgbRBitMask;
361 uint32_t yuvYBitMask;
362 } m1;
363
364 union
365 {
366 uint32_t rgbGBitMask;
367 uint32_t yuvUBitMask;
368 } m2;
369
370 union
371 {
372 uint32_t rgbBBitMask;
373 uint32_t yuvVBitMask;
374 } m3;
375
376 union
377 {
378 uint32_t rgbABitMask;
379 } m4;
380
381 uint32_t Reserved;
382} VBOXVHWA_PIXELFORMAT;
383
384typedef struct _VBOXVHWA_SURFACEDESC
385{
386 uint32_t flags;
387 uint32_t height;
388 uint32_t width;
389 uint32_t pitch;
390 uint32_t sizeX;
391 uint32_t sizeY;
392 uint32_t cBackBuffers;
393 uint32_t Reserved;
394 VBOXVHWA_COLORKEY DstOverlayCK;
395 VBOXVHWA_COLORKEY DstBltCK;
396 VBOXVHWA_COLORKEY SrcOverlayCK;
397 VBOXVHWA_COLORKEY SrcBltCK;
398 VBOXVHWA_PIXELFORMAT PixelFormat;
399 uint32_t surfCaps;
400 uint32_t Reserved2;
401 VBOXVHWA_SURFHANDLE hSurf;
402 uint64_t offSurface;
403} VBOXVHWA_SURFACEDESC;
404
405typedef struct _VBOXVHWA_BLTFX
406{
407 uint32_t flags;
408 uint32_t rop;
409 uint32_t rotationOp;
410 uint32_t rotation;
411 uint32_t fillColor;
412 uint32_t Reserved;
413 VBOXVHWA_COLORKEY DstCK;
414 VBOXVHWA_COLORKEY SrcCK;
415} VBOXVHWA_BLTFX;
416
417typedef struct _VBOXVHWA_OVERLAYFX
418{
419 uint32_t flags;
420 uint32_t Reserved1;
421 uint32_t fxFlags;
422 uint32_t Reserved2;
423 VBOXVHWA_COLORKEY DstCK;
424 VBOXVHWA_COLORKEY SrcCK;
425} VBOXVHWA_OVERLAYFX;
426
427#define VBOXVHWA_CAPS_BLT 0x00000040
428#define VBOXVHWA_CAPS_BLTCOLORFILL 0x04000000
429#define VBOXVHWA_CAPS_BLTFOURCC 0x00000100
430#define VBOXVHWA_CAPS_BLTSTRETCH 0x00000200
431#define VBOXVHWA_CAPS_BLTQUEUE 0x00000080
432
433#define VBOXVHWA_CAPS_OVERLAY 0x00000800
434#define VBOXVHWA_CAPS_OVERLAYFOURCC 0x00002000
435#define VBOXVHWA_CAPS_OVERLAYSTRETCH 0x00004000
436#define VBOXVHWA_CAPS_OVERLAYCANTCLIP 0x00001000
437
438#define VBOXVHWA_CAPS_COLORKEY 0x00400000
439#define VBOXVHWA_CAPS_COLORKEYHWASSIST 0x01000000
440
441#define VBOXVHWA_SCAPS_BACKBUFFER 0x00000004
442#define VBOXVHWA_SCAPS_COMPLEX 0x00000008
443#define VBOXVHWA_SCAPS_FLIP 0x00000010
444#define VBOXVHWA_SCAPS_FRONTBUFFER 0x00000020
445#define VBOXVHWA_SCAPS_OFFSCREENPLAIN 0x00000040
446#define VBOXVHWA_SCAPS_OVERLAY 0x00000080
447#define VBOXVHWA_SCAPS_PRIMARYSURFACE 0x00000200
448#define VBOXVHWA_SCAPS_SYSTEMMEMORY 0x00000800
449#define VBOXVHWA_SCAPS_VIDEOMEMORY 0x00004000
450#define VBOXVHWA_SCAPS_VISIBLE 0x00008000
451#define VBOXVHWA_SCAPS_LOCALVIDMEM 0x10000000
452
453#define VBOXVHWA_PF_PALETTEINDEXED8 0x00000020
454#define VBOXVHWA_PF_RGB 0x00000040
455#define VBOXVHWA_PF_RGBTOYUV 0x00000100
456#define VBOXVHWA_PF_YUV 0x00000200
457#define VBOXVHWA_PF_FOURCC 0x00000004
458
459#define VBOXVHWA_LOCK_DISCARDCONTENTS 0x00002000
460
461#define VBOXVHWA_CFG_ENABLED 0x00000001
462
463#define VBOXVHWA_SD_BACKBUFFERCOUNT 0x00000020
464#define VBOXVHWA_SD_CAPS 0x00000001
465#define VBOXVHWA_SD_CKDESTBLT 0x00004000
466#define VBOXVHWA_SD_CKDESTOVERLAY 0x00002000
467#define VBOXVHWA_SD_CKSRCBLT 0x00010000
468#define VBOXVHWA_SD_CKSRCOVERLAY 0x00008000
469#define VBOXVHWA_SD_HEIGHT 0x00000002
470#define VBOXVHWA_SD_PITCH 0x00000008
471#define VBOXVHWA_SD_PIXELFORMAT 0x00001000
472//#define VBOXVHWA_SD_REFRESHRATE 0x00040000
473#define VBOXVHWA_SD_WIDTH 0x00000004
474
475#define VBOXVHWA_CKEYCAPS_DESTBLT 0x00000001
476#define VBOXVHWA_CKEYCAPS_DESTBLTCLRSPACE 0x00000002
477#define VBOXVHWA_CKEYCAPS_DESTBLTCLRSPACEYUV 0x00000004
478#define VBOXVHWA_CKEYCAPS_DESTBLTYUV 0x00000008
479#define VBOXVHWA_CKEYCAPS_DESTOVERLAY 0x00000010
480#define VBOXVHWA_CKEYCAPS_DESTOVERLAYCLRSPACE 0x00000020
481#define VBOXVHWA_CKEYCAPS_DESTOVERLAYCLRSPACEYUV 0x00000040
482#define VBOXVHWA_CKEYCAPS_DESTOVERLAYONEACTIVE 0x00000080
483#define VBOXVHWA_CKEYCAPS_DESTOVERLAYYUV 0x00000100
484#define VBOXVHWA_CKEYCAPS_SRCBLT 0x00000200
485#define VBOXVHWA_CKEYCAPS_SRCBLTCLRSPACE 0x00000400
486#define VBOXVHWA_CKEYCAPS_SRCBLTCLRSPACEYUV 0x00000800
487#define VBOXVHWA_CKEYCAPS_SRCBLTYUV 0x00001000
488#define VBOXVHWA_CKEYCAPS_SRCOVERLAY 0x00002000
489#define VBOXVHWA_CKEYCAPS_SRCOVERLAYCLRSPACE 0x00004000
490#define VBOXVHWA_CKEYCAPS_SRCOVERLAYCLRSPACEYUV 0x00008000
491#define VBOXVHWA_CKEYCAPS_SRCOVERLAYONEACTIVE 0x00010000
492#define VBOXVHWA_CKEYCAPS_SRCOVERLAYYUV 0x00020000
493#define VBOXVHWA_CKEYCAPS_NOCOSTOVERLAY 0x00040000
494
495#define VBOXVHWA_BLT_COLORFILL 0x00000400
496#define VBOXVHWA_BLT_DDFX 0x00000800
497#define VBOXVHWA_BLT_EXTENDED_FLAGS 0x40000000
498#define VBOXVHWA_BLT_EXTENDED_LINEAR_CONTENT 0x00000004
499#define VBOXVHWA_BLT_EXTENDED_PRESENTATION_STRETCHFACTOR 0x00000010
500#define VBOXVHWA_BLT_KEYDESTOVERRIDE 0x00004000
501#define VBOXVHWA_BLT_KEYSRCOVERRIDE 0x00010000
502#define VBOXVHWA_BLT_LAST_PRESENTATION 0x20000000
503#define VBOXVHWA_BLT_PRESENTATION 0x10000000
504#define VBOXVHWA_BLT_ROP 0x00020000
505
506
507#define VBOXVHWA_OVER_DDFX 0x00080000
508#define VBOXVHWA_OVER_HIDE 0x00000200
509#define VBOXVHWA_OVER_KEYDEST 0x00000400
510#define VBOXVHWA_OVER_KEYDESTOVERRIDE 0x00000800
511#define VBOXVHWA_OVER_KEYSRC 0x00001000
512#define VBOXVHWA_OVER_KEYSRCOVERRIDE 0x00002000
513#define VBOXVHWA_OVER_SHOW 0x00004000
514
515#define VBOXVHWA_CKEY_COLORSPACE 0x00000001
516#define VBOXVHWA_CKEY_DESTBLT 0x00000002
517#define VBOXVHWA_CKEY_DESTOVERLAY 0x00000004
518#define VBOXVHWA_CKEY_SRCBLT 0x00000008
519#define VBOXVHWA_CKEY_SRCOVERLAY 0x00000010
520
521#define VBOXVHWA_BLT_ARITHSTRETCHY 0x00000001
522#define VBOXVHWA_BLT_MIRRORLEFTRIGHT 0x00000002
523#define VBOXVHWA_BLT_MIRRORUPDOWN 0x00000004
524
525#define VBOXVHWA_OVERFX_ARITHSTRETCHY 0x00000001
526#define VBOXVHWA_OVERFX_MIRRORLEFTRIGHT 0x00000002
527#define VBOXVHWA_OVERFX_MIRRORUPDOWN 0x00000004
528
529#define VBOXVHWA_CAPS2_CANRENDERWINDOWED 0x00080000
530#define VBOXVHWA_CAPS2_WIDESURFACES 0x00001000
531#define VBOXVHWA_CAPS2_COPYFOURCC 0x00008000
532//#define VBOXVHWA_CAPS2_FLIPINTERVAL 0x00200000
533//#define VBOXVHWA_CAPS2_FLIPNOVSYNC 0x00400000
534
535
536#define VBOXVHWA_OFFSET64_VOID (UINT64_MAX)
537
538typedef struct _VBOXVHWA_VERSION
539{
540 uint32_t maj;
541 uint32_t min;
542 uint32_t bld;
543 uint32_t reserved;
544} VBOXVHWA_VERSION;
545
546typedef struct _VBOXVHWACMD_QUERYINFO1
547{
548 union
549 {
550 struct
551 {
552 VBOXVHWA_VERSION guestVersion;
553 } in;
554
555 struct
556 {
557 uint32_t cfgFlags;
558 uint32_t caps;
559
560 uint32_t caps2;
561 uint32_t colorKeyCaps;
562
563 uint32_t stretchCaps;
564 uint32_t surfaceCaps;
565
566 uint32_t numOverlays;
567 uint32_t curOverlays;
568
569 uint32_t numFourCC;
570 uint32_t reserved;
571 } out;
572 } u;
573} VBOXVHWACMD_QUERYINFO1;
574
575typedef struct _VBOXVHWACMD_QUERYINFO2
576{
577 uint32_t numFourCC;
578 uint32_t FourCC[1];
579} VBOXVHWACMD_QUERYINFO2;
580
581#define VBOXVHWAINFO2_SIZE(_cFourCC) RT_OFFSETOF(VBOXVHWACMD_QUERYINFO2, FourCC[_cFourCC])
582
583typedef struct _VBOXVHWACMD_SURF_CANCREATE
584{
585 VBOXVHWA_SURFACEDESC SurfInfo;
586 union
587 {
588 struct
589 {
590 uint32_t bIsDifferentPixelFormat;
591 uint32_t Reserved;
592 } in;
593
594 struct
595 {
596 int32_t ErrInfo;
597 } out;
598 } u;
599} VBOXVHWACMD_SURF_CANCREATE;
600
601typedef struct _VBOXVHWACMD_SURF_CREATE
602{
603 VBOXVHWA_SURFACEDESC SurfInfo;
604} VBOXVHWACMD_SURF_CREATE;
605
606typedef struct _VBOXVHWACMD_SURF_DESTROY
607{
608 union
609 {
610 struct
611 {
612 VBOXVHWA_SURFHANDLE hSurf;
613 } in;
614 } u;
615} VBOXVHWACMD_SURF_DESTROY;
616
617typedef struct _VBOXVHWACMD_SURF_LOCK
618{
619 union
620 {
621 struct
622 {
623 VBOXVHWA_SURFHANDLE hSurf;
624 uint64_t offSurface;
625 uint32_t flags;
626 uint32_t rectValid;
627 VBOXVHWA_RECTL rect;
628 } in;
629 } u;
630} VBOXVHWACMD_SURF_LOCK;
631
632typedef struct _VBOXVHWACMD_SURF_UNLOCK
633{
634 union
635 {
636 struct
637 {
638 VBOXVHWA_SURFHANDLE hSurf;
639 uint32_t xUpdatedMemValid;
640 uint32_t reserved;
641 VBOXVHWA_RECTL xUpdatedMemRect;
642 } in;
643 } u;
644} VBOXVHWACMD_SURF_UNLOCK;
645
646typedef struct _VBOXVHWACMD_SURF_BLT
647{
648 uint64_t DstGuestSurfInfo;
649 uint64_t SrcGuestSurfInfo;
650 union
651 {
652 struct
653 {
654 VBOXVHWA_SURFHANDLE hDstSurf;
655 uint64_t offDstSurface;
656 VBOXVHWA_RECTL dstRect;
657 VBOXVHWA_SURFHANDLE hSrcSurf;
658 uint64_t offSrcSurface;
659 VBOXVHWA_RECTL srcRect;
660 uint32_t flags;
661 uint32_t xUpdatedSrcMemValid;
662 VBOXVHWA_BLTFX desc;
663 VBOXVHWA_RECTL xUpdatedSrcMemRect;
664 } in;
665 } u;
666} VBOXVHWACMD_SURF_BLT;
667
668typedef struct _VBOXVHWACMD_SURF_FLIP
669{
670 uint64_t TargGuestSurfInfo;
671 uint64_t CurrGuestSurfInfo;
672 union
673 {
674 struct
675 {
676 VBOXVHWA_SURFHANDLE hTargSurf;
677 uint64_t offTargSurface;
678 VBOXVHWA_SURFHANDLE hCurrSurf;
679 uint64_t offCurrSurface;
680 uint32_t flags;
681 uint32_t xUpdatedTargMemValid;
682 VBOXVHWA_RECTL xUpdatedTargMemRect;
683 } in;
684 } u;
685} VBOXVHWACMD_SURF_FLIP;
686
687typedef struct _VBOXVHWACMD_SURF_COLORKEY_SET
688{
689 union
690 {
691 struct
692 {
693 VBOXVHWA_SURFHANDLE hSurf;
694 uint64_t offSurface;
695 VBOXVHWA_COLORKEY CKey;
696 uint32_t flags;
697 uint32_t reserved;
698 } in;
699 } u;
700} VBOXVHWACMD_SURF_COLORKEY_SET;
701
702typedef struct _VBOXVHWACMD_SURF_OVERLAY_UPDATE
703{
704 union
705 {
706 struct
707 {
708 VBOXVHWA_SURFHANDLE hDstSurf;
709 uint64_t offDstSurface;
710 VBOXVHWA_RECTL dstRect;
711 VBOXVHWA_SURFHANDLE hSrcSurf;
712 uint64_t offSrcSurface;
713 VBOXVHWA_RECTL srcRect;
714 uint32_t flags;
715 uint32_t xUpdatedSrcMemValid;
716 VBOXVHWA_OVERLAYFX desc;
717 VBOXVHWA_RECTL xUpdatedSrcMemRect;
718 } in;
719 } u;
720}VBOXVHWACMD_SURF_OVERLAY_UPDATE;
721
722typedef struct _VBOXVHWACMD_SURF_OVERLAY_SETPOSITION
723{
724 union
725 {
726 struct
727 {
728 VBOXVHWA_SURFHANDLE hDstSurf;
729 uint64_t offDstSurface;
730 VBOXVHWA_SURFHANDLE hSrcSurf;
731 uint64_t offSrcSurface;
732 uint32_t xPos;
733 uint32_t yPos;
734 uint32_t flags;
735 uint32_t reserved;
736 } in;
737 } u;
738} VBOXVHWACMD_SURF_OVERLAY_SETPOSITION;
739
740typedef struct _VBOXVHWACMD_HH_CONSTRUCT
741{
742 void *pVM;
743 /* VRAM info for the backend to be able to properly translate VRAM offsets */
744 void *pvVRAM;
745 uint32_t cbVRAM;
746} VBOXVHWACMD_HH_CONSTRUCT;
747
748typedef DECLCALLBACK(void) FNVBOXVHWA_HH_CALLBACK(void*);
749typedef FNVBOXVHWA_HH_CALLBACK *PFNVBOXVHWA_HH_CALLBACK;
750
751#define VBOXVHWA_HH_CALLBACK_SET(_pCmd, _pfn, _parg) \
752 do { \
753 (_pCmd)->GuestVBVAReserved1 = (uint64_t)(uintptr_t)(_pfn); \
754 (_pCmd)->GuestVBVAReserved2 = (uint64_t)(uintptr_t)(_parg); \
755 }while(0)
756
757#define VBOXVHWA_HH_CALLBACK_GET(_pCmd) ((PFNVBOXVHWA_HH_CALLBACK)(_pCmd)->GuestVBVAReserved1)
758#define VBOXVHWA_HH_CALLBACK_GET_ARG(_pCmd) ((void*)(_pCmd)->GuestVBVAReserved2)
759
760#pragma pack()
761# endif /* #ifdef VBOX_WITH_VIDEOHWACCEL */
762
763#ifdef VBOX_WITH_HGSMI
764
765/* All structures are without alignment. */
766#pragma pack(1)
767
768typedef struct VBVAHOSTFLAGS
769{
770 uint32_t u32HostEvents;
771 uint32_t u32SupportedOrders;
772} VBVAHOSTFLAGS;
773
774typedef struct _VBVABUFFER
775{
776 VBVAHOSTFLAGS hostFlags;
777
778 /* The offset where the data start in the buffer. */
779 uint32_t off32Data;
780 /* The offset where next data must be placed in the buffer. */
781 uint32_t off32Free;
782
783 /* The queue of record descriptions. */
784 VBVARECORD aRecords[VBVA_MAX_RECORDS];
785 uint32_t indexRecordFirst;
786 uint32_t indexRecordFree;
787
788 /* Space to leave free in the buffer when large partial records are transferred. */
789 uint32_t cbPartialWriteThreshold;
790
791 uint32_t cbData;
792 uint8_t au8Data[1]; /* variable size for the rest of the VBVABUFFER area in VRAM. */
793} VBVABUFFER;
794
795/* guest->host commands */
796#define VBVA_QUERY_CONF32 1
797#define VBVA_SET_CONF32 2
798#define VBVA_INFO_VIEW 3
799#define VBVA_INFO_HEAP 4
800#define VBVA_FLUSH 5
801#define VBVA_INFO_SCREEN 6
802#define VBVA_ENABLE 7
803#define VBVA_MOUSE_POINTER_SHAPE 8
804#ifdef VBOX_WITH_VIDEOHWACCEL
805# define VBVA_VHWA_CMD 9
806#endif /* # ifdef VBOX_WITH_VIDEOHWACCEL */
807#ifdef VBOXVDMA
808# define VBVA_VDMA_CTL 10 /* setup G<->H DMA channel info */
809# define VBVA_VDMA_CMD 11 /* G->H DMA command */
810#endif
811
812/* host->guest commands */
813# define VBVAHG_EVENT 1
814# define VBVAHG_DISPLAY_CUSTOM 2
815#ifdef VBOXVDMA
816# define VBVAHG_SHGSMI_COMPLETION 3
817#endif
818
819# ifdef VBOX_WITH_VIDEOHWACCEL
820#define VBVAHG_DCUSTOM_VHWA_CMDCOMPLETE 1
821#pragma pack(1)
822typedef struct _VBVAHOSTCMDVHWACMDCOMPLETE
823{
824 uint32_t offCmd;
825}VBVAHOSTCMDVHWACMDCOMPLETE;
826#pragma pack()
827# endif /* # ifdef VBOX_WITH_VIDEOHWACCEL */
828
829#pragma pack(1)
830typedef enum
831{
832 VBVAHOSTCMD_OP_EVENT = 1,
833 VBVAHOSTCMD_OP_CUSTOM
834}VBVAHOSTCMD_OP_TYPE;
835
836typedef struct _VBVAHOSTCMDEVENT
837{
838 uint64_t pEvent;
839}VBVAHOSTCMDEVENT;
840
841
842typedef struct _VBVAHOSTCMD
843{
844 /* destination ID if >=0 specifies display index, otherwize the command is directed to the miniport */
845 int32_t iDstID;
846 int32_t customOpCode;
847 union
848 {
849 struct _VBVAHOSTCMD *pNext;
850 uint32_t offNext;
851 uint64_t Data; /* the body is 64-bit aligned */
852 } u;
853 char body[1];
854}VBVAHOSTCMD;
855
856#define VBVAHOSTCMD_SIZE(_size) (sizeof(VBVAHOSTCMD) + (_size))
857#define VBVAHOSTCMD_BODY(_pCmd, _tBody) ((_tBody*)(_pCmd)->body)
858#define VBVAHOSTCMD_HDR(_pBody) ((VBVAHOSTCMD*)(((uint8_t*)_pBody) - RT_OFFSETOF(VBVAHOSTCMD, body)))
859#define VBVAHOSTCMD_HDRSIZE (RT_OFFSETOF(VBVAHOSTCMD, body))
860
861#pragma pack()
862
863/* VBVACONF32::u32Index */
864#define VBOX_VBVA_CONF32_MONITOR_COUNT 0
865#define VBOX_VBVA_CONF32_HOST_HEAP_SIZE 1
866
867typedef struct _VBVACONF32
868{
869 uint32_t u32Index;
870 uint32_t u32Value;
871} VBVACONF32;
872
873typedef struct VBVAINFOVIEW
874{
875 /* Index of the screen, assigned by the guest. */
876 uint32_t u32ViewIndex;
877
878 /* The screen offset in VRAM, the framebuffer starts here. */
879 uint32_t u32ViewOffset;
880
881 /* The size of the VRAM memory that can be used for the view. */
882 uint32_t u32ViewSize;
883
884 /* The recommended maximum size of the VRAM memory for the screen. */
885 uint32_t u32MaxScreenSize;
886} VBVAINFOVIEW;
887
888typedef struct _VBVAINFOHEAP
889{
890 /* Absolute offset in VRAM of the start of the heap. */
891 uint32_t u32HeapOffset;
892
893 /* The size of the heap. */
894 uint32_t u32HeapSize;
895
896} VBVAINFOHEAP;
897
898typedef struct _VBVAFLUSH
899{
900 uint32_t u32Reserved;
901
902} VBVAFLUSH;
903
904/* VBVAINFOSCREEN::u8Flags */
905#define VBVA_SCREEN_F_NONE 0x0000
906#define VBVA_SCREEN_F_ACTIVE 0x0001
907
908typedef struct VBVAINFOSCREEN
909{
910 /* Which view contains the screen. */
911 uint32_t u32ViewIndex;
912
913 /* Physical X origin relative to the primary screen. */
914 int32_t i32OriginX;
915
916 /* Physical Y origin relative to the primary screen. */
917 int32_t i32OriginY;
918
919 /* Offset of visible framebuffer relative to the framebuffer start. */
920 uint32_t u32StartOffset;
921
922 /* The scan line size in bytes. */
923 uint32_t u32LineSize;
924
925 /* Width of the screen. */
926 uint32_t u32Width;
927
928 /* Height of the screen. */
929 uint32_t u32Height;
930
931 /* Color depth. */
932 uint16_t u16BitsPerPixel;
933
934 /* VBVA_SCREEN_F_* */
935 uint16_t u16Flags;
936} VBVAINFOSCREEN;
937
938
939/* VBVAENABLE::u32Flags */
940#define VBVA_F_NONE 0x00000000
941#define VBVA_F_ENABLE 0x00000001
942#define VBVA_F_DISABLE 0x00000002
943#ifdef VBOXWDDM_WITH_VBVA
944/* extended VBVA to be used with WDDM */
945#define VBVA_F_EXTENDED 0x00000004
946#endif
947
948typedef struct _VBVAENABLE
949{
950 uint32_t u32Flags;
951 uint32_t u32Offset;
952 int32_t i32Result;
953} VBVAENABLE;
954
955#ifdef VBOXWDDM_WITH_VBVA
956typedef struct _VBVAENABLE_EX
957{
958 VBVAENABLE Base;
959 uint32_t u32ScreenId;
960} VBVAENABLE_EX;
961#endif
962
963
964typedef struct _VBVAMOUSEPOINTERSHAPE
965{
966 /* The host result. */
967 int32_t i32Result;
968
969 /* VBOX_MOUSE_POINTER_* bit flags. */
970 uint32_t fu32Flags;
971
972 /* X coordinate of the hot spot. */
973 uint32_t u32HotX;
974
975 /* Y coordinate of the hot spot. */
976 uint32_t u32HotY;
977
978 /* Width of the pointer in pixels. */
979 uint32_t u32Width;
980
981 /* Height of the pointer in scanlines. */
982 uint32_t u32Height;
983
984 /* Pointer data.
985 *
986 ****
987 * The data consists of 1 bpp AND mask followed by 32 bpp XOR (color) mask.
988 *
989 * For pointers without alpha channel the XOR mask pixels are 32 bit values: (lsb)BGR0(msb).
990 * For pointers with alpha channel the XOR mask consists of (lsb)BGRA(msb) 32 bit values.
991 *
992 * Guest driver must create the AND mask for pointers with alpha channel, so if host does not
993 * support alpha, the pointer could be displayed as a normal color pointer. The AND mask can
994 * be constructed from alpha values. For example alpha value >= 0xf0 means bit 0 in the AND mask.
995 *
996 * The AND mask is 1 bpp bitmap with byte aligned scanlines. Size of AND mask,
997 * therefore, is cbAnd = (width + 7) / 8 * height. The padding bits at the
998 * end of any scanline are undefined.
999 *
1000 * The XOR mask follows the AND mask on the next 4 bytes aligned offset:
1001 * uint8_t *pXor = pAnd + (cbAnd + 3) & ~3
1002 * Bytes in the gap between the AND and the XOR mask are undefined.
1003 * XOR mask scanlines have no gap between them and size of XOR mask is:
1004 * cXor = width * 4 * height.
1005 ****
1006 *
1007 * Preallocate 4 bytes for accessing actual data as p->au8Data.
1008 */
1009 uint8_t au8Data[4];
1010
1011} VBVAMOUSEPOINTERSHAPE;
1012
1013#pragma pack()
1014
1015#endif /* VBOX_WITH_HGSMI */
1016
1017#ifdef VBOXVDMA
1018# pragma pack(1)
1019
1020/*
1021 * VBOXSHGSMI made on top HGSMI and allows receiving notifications
1022 * about G->H command completion
1023 */
1024/* SHGSMI command header */
1025typedef struct VBOXSHGSMIHEADER
1026{
1027 uint64_t pvNext; /*<- completion processing queue */
1028 uint32_t fFlags; /*<- see VBOXSHGSMI_FLAG_XXX Flags */
1029 uint32_t cRefs; /*<- command referece count */
1030 uint64_t u64Info1; /*<- contents depends on the fFlags value */
1031 uint64_t u64Info2; /*<- contents depends on the fFlags value */
1032} VBOXSHGSMIHEADER, *PVBOXSHGSMIHEADER;
1033
1034/* the command processing was asynch, set by the host to indicate asynch command completion
1035 * must not be cleared once set, the command completion is performed by issuing a host->guest completion command
1036 * while keeping this flag unchanged */
1037#define VBOXSHGSMI_FLAG_HG_ASYNCH 0x00010000
1038///* if set - asynch completion is performed by issuing the event,
1039// * if cleared - asynch completion is performed by calling a callback */
1040//#define VBOXSHGSMI_FLAG_GH_ASYNCH_EVENT 0x00000001
1041/* issue interrupt on asynch completion, used for critical G->H commands,
1042 * i.e. for completion of which guest is waiting. */
1043#define VBOXSHGSMI_FLAG_GH_ASYNCH_IRQ 0x00000002
1044/* guest does not do any op on completion of this command,
1045 * the host may copy the command and indicate that it does not need the command anymore
1046 * by not setting VBOXSHGSMI_FLAG_HG_ASYNCH */
1047#define VBOXSHGSMI_FLAG_GH_ASYNCH_NOCOMPLETION 0x00000004
1048/* guest requires the command to be processed asynchronously,
1049 * not setting VBOXSHGSMI_FLAG_HG_ASYNCH by the host in this case is treated as command failure */
1050#define VBOXSHGSMI_FLAG_GH_ASYNCH_FORCE 0x00000008
1051/* force IRQ on cmd completion */
1052#define VBOXSHGSMI_FLAG_GH_ASYNCH_IRQ_FORCE 0x00000010
1053/* an IRQ-level callback is associated with the command */
1054#define VBOXSHGSMI_FLAG_GH_ASYNCH_CALLBACK_IRQ 0x00000020
1055/* guest expects this command to be completed synchronously */
1056#define VBOXSHGSMI_FLAG_GH_SYNCH 0x00000040
1057
1058DECLINLINE(uint8_t *) VBoxSHGSMIBufferData (const VBOXSHGSMIHEADER* pHeader)
1059{
1060 return (uint8_t *)pHeader + sizeof (VBOXSHGSMIHEADER);
1061}
1062
1063DECLINLINE(PVBOXSHGSMIHEADER) VBoxSHGSMIBufferHeader (const void *pvData)
1064{
1065 return (PVBOXSHGSMIHEADER)((uint8_t *)pvData - sizeof (VBOXSHGSMIHEADER));
1066}
1067
1068/* VDMA - Video DMA */
1069
1070/* VDMA Control API */
1071/* VBOXVDMA_CTL::u32Flags */
1072typedef enum
1073{
1074 VBOXVDMA_CTL_TYPE_NONE = 0,
1075 VBOXVDMA_CTL_TYPE_ENABLE,
1076 VBOXVDMA_CTL_TYPE_DISABLE,
1077 VBOXVDMA_CTL_TYPE_FLUSH
1078} VBOXVDMA_CTL_TYPE;
1079
1080typedef struct VBOXVDMA_CTL
1081{
1082 VBOXVDMA_CTL_TYPE enmCtl;
1083 uint32_t u32Offset;
1084 int32_t i32Result;
1085} VBOXVDMA_CTL, *PVBOXVDMA_CTL;
1086
1087typedef struct VBOXVDMA_RECTL
1088{
1089 int16_t left;
1090 int16_t top;
1091 uint16_t width;
1092 uint16_t height;
1093} VBOXVDMA_RECTL, *PVBOXVDMA_RECTL;
1094
1095typedef enum
1096{
1097 VBOXVDMA_PIXEL_FORMAT_UNKNOWN = 0,
1098 VBOXVDMA_PIXEL_FORMAT_R8G8B8 = 20,
1099 VBOXVDMA_PIXEL_FORMAT_A8R8G8B8 = 21,
1100 VBOXVDMA_PIXEL_FORMAT_X8R8G8B8 = 22,
1101 VBOXVDMA_PIXEL_FORMAT_R5G6B5 = 23,
1102 VBOXVDMA_PIXEL_FORMAT_X1R5G5B5 = 24,
1103 VBOXVDMA_PIXEL_FORMAT_A1R5G5B5 = 25,
1104 VBOXVDMA_PIXEL_FORMAT_A4R4G4B4 = 26,
1105 VBOXVDMA_PIXEL_FORMAT_R3G3B2 = 27,
1106 VBOXVDMA_PIXEL_FORMAT_A8 = 28,
1107 VBOXVDMA_PIXEL_FORMAT_A8R3G3B2 = 29,
1108 VBOXVDMA_PIXEL_FORMAT_X4R4G4B4 = 30,
1109 VBOXVDMA_PIXEL_FORMAT_A2B10G10R10 = 31,
1110 VBOXVDMA_PIXEL_FORMAT_A8B8G8R8 = 32,
1111 VBOXVDMA_PIXEL_FORMAT_X8B8G8R8 = 33,
1112 VBOXVDMA_PIXEL_FORMAT_G16R16 = 34,
1113 VBOXVDMA_PIXEL_FORMAT_A2R10G10B10 = 35,
1114 VBOXVDMA_PIXEL_FORMAT_A16B16G16R16 = 36,
1115 VBOXVDMA_PIXEL_FORMAT_A8P8 = 40,
1116 VBOXVDMA_PIXEL_FORMAT_P8 = 41,
1117 VBOXVDMA_PIXEL_FORMAT_L8 = 50,
1118 VBOXVDMA_PIXEL_FORMAT_A8L8 = 51,
1119 VBOXVDMA_PIXEL_FORMAT_A4L4 = 52,
1120 VBOXVDMA_PIXEL_FORMAT_V8U8 = 60,
1121 VBOXVDMA_PIXEL_FORMAT_L6V5U5 = 61,
1122 VBOXVDMA_PIXEL_FORMAT_X8L8V8U8 = 62,
1123 VBOXVDMA_PIXEL_FORMAT_Q8W8V8U8 = 63,
1124 VBOXVDMA_PIXEL_FORMAT_V16U16 = 64,
1125 VBOXVDMA_PIXEL_FORMAT_W11V11U10 = 65,
1126 VBOXVDMA_PIXEL_FORMAT_A2W10V10U10 = 67
1127} VBOXVDMA_PIXEL_FORMAT;
1128
1129typedef struct VBOXVDMA_SURF_DESC
1130{
1131 uint32_t width;
1132 uint32_t height;
1133 VBOXVDMA_PIXEL_FORMAT format;
1134 uint32_t bpp;
1135 uint32_t pitch;
1136 uint32_t fFlags;
1137} VBOXVDMA_SURF_DESC, *PVBOXVDMA_SURF_DESC;
1138
1139//typedef uint64_t VBOXVDMAPHADDRESS;
1140typedef uint64_t VBOXVDMASURFHANDLE;
1141
1142typedef uint64_t VBOXVIDEOOFFSET;
1143
1144#define VBOXVIDEOOFFSET_VOID ((VBOXVIDEOOFFSET)~0)
1145
1146typedef enum
1147{
1148 VBOXVDMACMD_TYPE_UNDEFINED = 0,
1149 VBOXVDMACMD_TYPE_DMA_PRESENT_BLT = 1,
1150 VBOXVDMACMD_TYPE_DMA_BPB_TRANSFER = 2,
1151 VBOXVDMACMD_TYPE_DMA_BPB_FILL = 3,
1152 VBOXVDMACMD_TYPE_DMA_PRESENT_SHADOW2PRIMARY = 4,
1153} VBOXVDMACMD_TYPE;
1154
1155/* region specified as a rectangle, otherwize it is a size of memory pointed to by phys address */
1156#define VBOXVDMAOPERAND_FLAGS_RECTL 0x1
1157/* Surface handle is valid */
1158#define VBOXVDMAOPERAND_FLAGS_PRIMARY 0x2
1159/* address is offset in VRAM */
1160#define VBOXVDMAOPERAND_FLAGS_VRAMOFFSET 0x4
1161
1162
1163/* VBOXVDMACBUF_DR::phBuf specifies offset in VRAM */
1164#define VBOXVDMACBUF_FLAG_BUF_VRAM_OFFSET 0x00000001
1165/* command buffer follows the VBOXVDMACBUF_DR in VRAM, VBOXVDMACBUF_DR::phBuf is ignored */
1166#define VBOXVDMACBUF_FLAG_BUF_FOLLOWS_DR 0x00000002
1167
1168/*
1169 * We can not submit the DMA command via VRAM since we do not have control over
1170 * DMA command buffer [de]allocation, i.e. we only control the buffer contents.
1171 * In other words the system may call one of our callbacks to fill a command buffer
1172 * with the necessary commands and then discard the buffer w/o any notification.
1173 *
1174 * We have only DMA command buffer physical address at submission time.
1175 *
1176 * so the only way is to */
1177typedef struct VBOXVDMACBUF_DR
1178{
1179 uint32_t fFlags;
1180 uint32_t cbBuf;
1181 uint32_t u32FenceId;
1182 /* RT_SUCCESS() - on success
1183 * VERR_INTERRUPTED - on preemption
1184 * VERR_xxx - on error */
1185 int32_t rc;
1186 uint64_t u64GuestContext;
1187 union
1188 {
1189 uint64_t phBuf;
1190 VBOXVIDEOOFFSET offVramBuf;
1191 } Location;
1192} VBOXVDMACBUF_DR, *PVBOXVDMACBUF_DR;
1193
1194#define VBOXVDMACBUF_DR_TAIL(_pCmd, _t) ( (_t*)(((uint8_t*)(_pCmd)) + sizeof (VBOXVDMACBUF_DR)) )
1195
1196typedef struct VBOXVDMACMD
1197{
1198 VBOXVDMACMD_TYPE enmType;
1199 uint32_t u32CmdSpecific;
1200} VBOXVDMACMD, *PVBOXVDMACMD;
1201
1202#define VBOXVDMACMD_HEADER_SIZE() sizeof (VBOXVDMACMD)
1203#define VBOXVDMACMD_SIZE_FROMBODYSIZE(_s) (VBOXVDMACMD_HEADER_SIZE() + (_s))
1204#define VBOXVDMACMD_SIZE(_t) (VBOXVDMACMD_SIZE_FROMBODYSIZE(sizeof (_t)))
1205#define VBOXVDMACMD_BODY(_pCmd, _t) ( (_t*)(((uint8_t*)(_pCmd)) + VBOXVDMACMD_HEADER_SIZE()) )
1206#define VBOXVDMACMD_BODY_FIELD_OFFSET(_ot, _t, _f) ( (_ot)( VBOXVDMACMD_BODY(0, uint8_t) + RT_OFFSETOF(_t, _f) ) )
1207
1208typedef struct VBOXVDMACMD_DMA_PRESENT_BLT
1209{
1210 VBOXVIDEOOFFSET offSrc;
1211 VBOXVIDEOOFFSET offDst;
1212 VBOXVDMA_SURF_DESC srcDesc;
1213 VBOXVDMA_SURF_DESC dstDesc;
1214 VBOXVDMA_RECTL srcRectl;
1215 VBOXVDMA_RECTL dstRectl;
1216 uint32_t u32Reserved;
1217 uint32_t cDstSubRects;
1218 VBOXVDMA_RECTL aDstSubRects[1];
1219} VBOXVDMACMD_DMA_PRESENT_BLT, *PVBOXVDMACMD_DMA_PRESENT_BLT;
1220
1221typedef struct VBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY
1222{
1223 VBOXVDMA_RECTL Rect;
1224} VBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY, *PVBOXVDMACMD_DMA_PRESENT_SHADOW2PRIMARY;
1225
1226typedef struct VBOXVDMACMD_DMA_BPB_TRANSFER
1227{
1228 uint32_t cbTransferSize;
1229 uint32_t offTransfer; /* <- applicable for offVramBuf, which always points to the surface start*/
1230 uint32_t fFlags;
1231 uint32_t u32Reserved;
1232 union
1233 {
1234 uint64_t phBuf;
1235 VBOXVIDEOOFFSET offVramBuf;
1236 } Src;
1237 union
1238 {
1239 uint64_t phBuf;
1240 VBOXVIDEOOFFSET offVramBuf;
1241 } Dst;
1242} VBOXVDMACMD_DMA_BPB_TRANSFER, *PVBOXVDMACMD_DMA_BPB_TRANSFER;
1243
1244typedef struct VBOXVDMACMD_DMA_BPB_FILL
1245{
1246 VBOXVIDEOOFFSET offSurf;
1247 uint32_t cbFillSize;
1248 uint32_t u32FillPattern;
1249} VBOXVDMACMD_DMA_BPB_FILL, *PVBOXVDMACMD_DMA_BPB_FILL;
1250
1251# pragma pack()
1252#endif /* #ifdef VBOXVDMA */
1253
1254#ifdef VBOXVDMA_WITH_VBVA
1255# pragma pack(1)
1256
1257typedef struct VBOXVDMAVBVACMD
1258{
1259 HGSMIOFFSET offCmd;
1260} VBOXVDMAVBVACMD;
1261
1262#pragma pack()
1263#endif
1264
1265#endif
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