VirtualBox

source: vbox/trunk/include/VBox/dis.h@ 41675

Last change on this file since 41675 was 41675, checked in by vboxsync, 12 years ago

DIS: The start of the scoping exercise... Fixed PREFIX_ADDRSIZE that I just busted in the previous commit.
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File size: 27.1 KB
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1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2006-2012 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_dis_h
27#define ___VBox_dis_h
28
29#include <VBox/cdefs.h>
30#include <VBox/types.h>
31#include <VBox/disopcode.h>
32
33
34RT_C_DECLS_BEGIN
35
36
37/**
38 * CPU mode flags (DISCPUSTATE::mode).
39 */
40typedef enum DISCPUMODE
41{
42 DISCPUMODE_INVALID = 0,
43 DISCPUMODE_16BIT,
44 DISCPUMODE_32BIT,
45 DISCPUMODE_64BIT,
46 /** hack forcing the size of the enum to 32-bits. */
47 DISCPUMODE_MAKE_32BIT_HACK = 0x7fffffff
48} DISCPUMODE;
49
50/** @name Prefix byte flags
51 * @{
52 */
53#define DISPREFIX_NONE UINT8_C(0x00)
54/** non-default address size. */
55#define DISPREFIX_ADDRSIZE UINT8_C(0x01)
56/** non-default operand size. */
57#define DISPREFIX_OPSIZE UINT8_C(0x02)
58/** lock prefix. */
59#define DISPREFIX_LOCK UINT8_C(0x04)
60/** segment prefix. */
61#define DISPREFIX_SEG UINT8_C(0x08)
62/** rep(e) prefix (not a prefix, but we'll treat is as one). */
63#define DISPREFIX_REP UINT8_C(0x10)
64/** rep(e) prefix (not a prefix, but we'll treat is as one). */
65#define DISPREFIX_REPNE UINT8_C(0x20)
66/** REX prefix (64 bits) */
67#define DISPREFIX_REX UINT8_C(0x40)
68/** @} */
69
70/** @name 64 bits prefix byte flags
71 * @{
72 */
73#define PREFIX_REX_OP_2_FLAGS(a) (a - OP_PARM_REX_START)
74#define PREFIX_REX_FLAGS PREFIX_REX_OP_2_FLAGS(OP_PARM_REX)
75#define PREFIX_REX_FLAGS_B PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_B)
76#define PREFIX_REX_FLAGS_X PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_X)
77#define PREFIX_REX_FLAGS_XB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_XB)
78#define PREFIX_REX_FLAGS_R PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_R)
79#define PREFIX_REX_FLAGS_RB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_RB)
80#define PREFIX_REX_FLAGS_RX PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_RX)
81#define PREFIX_REX_FLAGS_RXB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_RXB)
82#define PREFIX_REX_FLAGS_W PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_W)
83#define PREFIX_REX_FLAGS_WB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WB)
84#define PREFIX_REX_FLAGS_WX PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WX)
85#define PREFIX_REX_FLAGS_WXB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WXB)
86#define PREFIX_REX_FLAGS_WR PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WR)
87#define PREFIX_REX_FLAGS_WRB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WRB)
88#define PREFIX_REX_FLAGS_WRX PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WRX)
89#define PREFIX_REX_FLAGS_WRXB PREFIX_REX_OP_2_FLAGS(OP_PARM_REX_WRXB)
90/** @} */
91
92/** @name Operand type.
93 * @{
94 */
95#define OPTYPE_INVALID RT_BIT(0)
96#define OPTYPE_HARMLESS RT_BIT(1)
97#define OPTYPE_CONTROLFLOW RT_BIT(2)
98#define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3)
99#define OPTYPE_DANGEROUS RT_BIT(4)
100#define OPTYPE_PORTIO RT_BIT(5)
101#define OPTYPE_PRIVILEGED RT_BIT(6)
102#define OPTYPE_PRIVILEGED_NOTRAP RT_BIT(7)
103#define OPTYPE_UNCOND_CONTROLFLOW RT_BIT(8)
104#define OPTYPE_RELATIVE_CONTROLFLOW RT_BIT(9)
105#define OPTYPE_COND_CONTROLFLOW RT_BIT(10)
106#define OPTYPE_INTERRUPT RT_BIT(11)
107#define OPTYPE_ILLEGAL RT_BIT(12)
108#define OPTYPE_RRM_DANGEROUS RT_BIT(14) /**< Some additional dangerous ones when recompiling raw r0. */
109#define OPTYPE_RRM_DANGEROUS_16 RT_BIT(15) /**< Some additional dangerous ones when recompiling 16-bit raw r0. */
110#define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
111#define OPTYPE_INHIBIT_IRQS RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
112#define OPTYPE_PORTIO_READ RT_BIT(17)
113#define OPTYPE_PORTIO_WRITE RT_BIT(18)
114#define OPTYPE_INVALID_64 RT_BIT(19) /**< Invalid in 64 bits mode */
115#define OPTYPE_ONLY_64 RT_BIT(20) /**< Only valid in 64 bits mode */
116#define OPTYPE_DEFAULT_64_OP_SIZE RT_BIT(21) /**< Default 64 bits operand size */
117#define OPTYPE_FORCED_64_OP_SIZE RT_BIT(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
118#define OPTYPE_REXB_EXTENDS_OPREG RT_BIT(23) /**< REX.B extends the register field in the opcode byte */
119#define OPTYPE_MOD_FIXED_11 RT_BIT(24) /**< modrm.mod is always 11b */
120#define OPTYPE_FORCED_32_OP_SIZE_X86 RT_BIT(25) /**< Forced 32 bits operand size; regardless of prefix bytes (only in 16 & 32 bits mode!) */
121#define OPTYPE_ALL UINT32_C(0xffffffff)
122/** @} */
123
124/** @name Parameter usage flags.
125 * @{
126 */
127#define USE_BASE RT_BIT_64(0)
128#define USE_INDEX RT_BIT_64(1)
129#define USE_SCALE RT_BIT_64(2)
130#define USE_REG_GEN8 RT_BIT_64(3)
131#define USE_REG_GEN16 RT_BIT_64(4)
132#define USE_REG_GEN32 RT_BIT_64(5)
133#define USE_REG_GEN64 RT_BIT_64(6)
134#define USE_REG_FP RT_BIT_64(7)
135#define USE_REG_MMX RT_BIT_64(8)
136#define USE_REG_XMM RT_BIT_64(9)
137#define USE_REG_CR RT_BIT_64(10)
138#define USE_REG_DBG RT_BIT_64(11)
139#define USE_REG_SEG RT_BIT_64(12)
140#define USE_REG_TEST RT_BIT_64(13)
141#define USE_DISPLACEMENT8 RT_BIT_64(14)
142#define USE_DISPLACEMENT16 RT_BIT_64(15)
143#define USE_DISPLACEMENT32 RT_BIT_64(16)
144#define USE_DISPLACEMENT64 RT_BIT_64(17)
145#define USE_RIPDISPLACEMENT32 RT_BIT_64(18)
146#define USE_IMMEDIATE8 RT_BIT_64(19)
147#define USE_IMMEDIATE8_REL RT_BIT_64(20)
148#define USE_IMMEDIATE16 RT_BIT_64(21)
149#define USE_IMMEDIATE16_REL RT_BIT_64(22)
150#define USE_IMMEDIATE32 RT_BIT_64(23)
151#define USE_IMMEDIATE32_REL RT_BIT_64(24)
152#define USE_IMMEDIATE64 RT_BIT_64(25)
153#define USE_IMMEDIATE64_REL RT_BIT_64(26)
154#define USE_IMMEDIATE_ADDR_0_32 RT_BIT_64(27)
155#define USE_IMMEDIATE_ADDR_16_32 RT_BIT_64(28)
156#define USE_IMMEDIATE_ADDR_0_16 RT_BIT_64(29)
157#define USE_IMMEDIATE_ADDR_16_16 RT_BIT_64(30)
158/** DS:ESI */
159#define USE_POINTER_DS_BASED RT_BIT_64(31)
160/** ES:EDI */
161#define USE_POINTER_ES_BASED RT_BIT_64(32)
162#define USE_IMMEDIATE16_SX8 RT_BIT_64(33)
163#define USE_IMMEDIATE32_SX8 RT_BIT_64(34)
164#define USE_IMMEDIATE64_SX8 RT_BIT_64(36)
165
166#define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE64_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8|USE_IMMEDIATE64_SX8)
167
168#define DIS_IS_EFFECTIVE_ADDR(flags) !!((flags) & (USE_BASE|USE_INDEX|USE_DISPLACEMENT32|USE_DISPLACEMENT64|USE_DISPLACEMENT16|USE_DISPLACEMENT8|USE_RIPDISPLACEMENT32))
169/** @} */
170
171/** index in {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"}
172 * @{
173 */
174#define USE_REG_RAX 0
175#define USE_REG_RCX 1
176#define USE_REG_RDX 2
177#define USE_REG_RBX 3
178#define USE_REG_RSP 4
179#define USE_REG_RBP 5
180#define USE_REG_RSI 6
181#define USE_REG_RDI 7
182#define USE_REG_R8 8
183#define USE_REG_R9 9
184#define USE_REG_R10 10
185#define USE_REG_R11 11
186#define USE_REG_R12 12
187#define USE_REG_R13 13
188#define USE_REG_R14 14
189#define USE_REG_R15 15
190/** @} */
191
192/** index in {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI", "R8D", "R9D", "R10D", "R11D", "R12D", "R13D", "R14D", "R15D"}
193 * @{
194 */
195#define USE_REG_EAX 0
196#define USE_REG_ECX 1
197#define USE_REG_EDX 2
198#define USE_REG_EBX 3
199#define USE_REG_ESP 4
200#define USE_REG_EBP 5
201#define USE_REG_ESI 6
202#define USE_REG_EDI 7
203#define USE_REG_R8D 8
204#define USE_REG_R9D 9
205#define USE_REG_R10D 10
206#define USE_REG_R11D 11
207#define USE_REG_R12D 12
208#define USE_REG_R13D 13
209#define USE_REG_R14D 14
210#define USE_REG_R15D 15
211
212/** @} */
213/** index in {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI", "R8W", "R9W", "R10W", "R11W", "R12W", "R13W", "R14W", "R15W"}
214 * @{
215 */
216#define USE_REG_AX 0
217#define USE_REG_CX 1
218#define USE_REG_DX 2
219#define USE_REG_BX 3
220#define USE_REG_SP 4
221#define USE_REG_BP 5
222#define USE_REG_SI 6
223#define USE_REG_DI 7
224#define USE_REG_R8W 8
225#define USE_REG_R9W 9
226#define USE_REG_R10W 10
227#define USE_REG_R11W 11
228#define USE_REG_R12W 12
229#define USE_REG_R13W 13
230#define USE_REG_R14W 14
231#define USE_REG_R15W 15
232/** @} */
233
234/** index in {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH", "R8B", "R9B", "R10B", "R11B", "R12B", "R13B", "R14B", "R15B", "SPL", "BPL", "SIL", "DIL"}
235 * @{
236 */
237#define USE_REG_AL 0
238#define USE_REG_CL 1
239#define USE_REG_DL 2
240#define USE_REG_BL 3
241#define USE_REG_AH 4
242#define USE_REG_CH 5
243#define USE_REG_DH 6
244#define USE_REG_BH 7
245#define USE_REG_R8B 8
246#define USE_REG_R9B 9
247#define USE_REG_R10B 10
248#define USE_REG_R11B 11
249#define USE_REG_R12B 12
250#define USE_REG_R13B 13
251#define USE_REG_R14B 14
252#define USE_REG_R15B 15
253#define USE_REG_SPL 16
254#define USE_REG_BPL 17
255#define USE_REG_SIL 18
256#define USE_REG_DIL 19
257
258/** @} */
259
260/** index in {ES, CS, SS, DS, FS, GS}
261 * @{
262 */
263typedef enum
264{
265 DIS_SELREG_ES = 0,
266 DIS_SELREG_CS = 1,
267 DIS_SELREG_SS = 2,
268 DIS_SELREG_DS = 3,
269 DIS_SELREG_FS = 4,
270 DIS_SELREG_GS = 5,
271 /** The usual 32-bit paranoia. */
272 DIS_SEGREG_32BIT_HACK = 0x7fffffff
273} DIS_SELREG;
274/** @} */
275
276#define USE_REG_FP0 0
277#define USE_REG_FP1 1
278#define USE_REG_FP2 2
279#define USE_REG_FP3 3
280#define USE_REG_FP4 4
281#define USE_REG_FP5 5
282#define USE_REG_FP6 6
283#define USE_REG_FP7 7
284
285#define USE_REG_CR0 0
286#define USE_REG_CR1 1
287#define USE_REG_CR2 2
288#define USE_REG_CR3 3
289#define USE_REG_CR4 4
290#define USE_REG_CR8 8
291
292#define USE_REG_DR0 0
293#define USE_REG_DR1 1
294#define USE_REG_DR2 2
295#define USE_REG_DR3 3
296#define USE_REG_DR4 4
297#define USE_REG_DR5 5
298#define USE_REG_DR6 6
299#define USE_REG_DR7 7
300
301#define USE_REG_MMX0 0
302#define USE_REG_MMX1 1
303#define USE_REG_MMX2 2
304#define USE_REG_MMX3 3
305#define USE_REG_MMX4 4
306#define USE_REG_MMX5 5
307#define USE_REG_MMX6 6
308#define USE_REG_MMX7 7
309
310#define USE_REG_XMM0 0
311#define USE_REG_XMM1 1
312#define USE_REG_XMM2 2
313#define USE_REG_XMM3 3
314#define USE_REG_XMM4 4
315#define USE_REG_XMM5 5
316#define USE_REG_XMM6 6
317#define USE_REG_XMM7 7
318
319/** Used by DISQueryParamVal & EMIQueryParamVal
320 * @{
321 */
322#define PARAM_VAL8 RT_BIT(0)
323#define PARAM_VAL16 RT_BIT(1)
324#define PARAM_VAL32 RT_BIT(2)
325#define PARAM_VAL64 RT_BIT(3)
326#define PARAM_VALFARPTR16 RT_BIT(4)
327#define PARAM_VALFARPTR32 RT_BIT(5)
328
329#define PARMTYPE_REGISTER 1
330#define PARMTYPE_ADDRESS 2
331#define PARMTYPE_IMMEDIATE 3
332
333typedef struct
334{
335 uint32_t type;
336 uint32_t size;
337 uint64_t flags;
338
339 union
340 {
341 uint8_t val8;
342 uint16_t val16;
343 uint32_t val32;
344 uint64_t val64;
345
346 struct
347 {
348 uint16_t sel;
349 uint32_t offset;
350 } farptr;
351 } val;
352
353} OP_PARAMVAL;
354/** Pointer to opcode parameter value. */
355typedef OP_PARAMVAL *POP_PARAMVAL;
356
357typedef enum
358{
359 PARAM_DEST,
360 PARAM_SOURCE
361} PARAM_TYPE;
362
363/** @} */
364
365/**
366 * Operand Parameter.
367 */
368typedef struct OP_PARAMETER
369{
370 uint64_t parval;
371 uint64_t flags;
372 union
373 {
374 int64_t i64;
375 int32_t i32;
376 int32_t i16;
377 int32_t i8;
378 uint64_t u64;
379 uint32_t u32;
380 uint32_t u16;
381 uint32_t u8;
382 } uDisp;
383 int32_t param;
384
385 union
386 {
387 uint32_t reg_gen;
388 /** ST(0) - ST(7) */
389 uint32_t reg_fp;
390 /** MMX0 - MMX7 */
391 uint32_t reg_mmx;
392 /** XMM0 - XMM7 */
393 uint32_t reg_xmm;
394 /** {ES, CS, SS, DS, FS, GS} */
395 DIS_SELREG reg_seg;
396 /** TR0-TR7 (?) */
397 uint32_t reg_test;
398 /** CR0-CR4 */
399 uint32_t reg_ctrl;
400 /** DR0-DR7 */
401 uint32_t reg_dbg;
402 } base;
403 union
404 {
405 uint32_t reg_gen;
406 } index;
407
408 /** 2, 4 or 8. */
409 uint8_t scale;
410 /** Parameter size. */
411 uint8_t cb;
412} OP_PARAMETER;
413/** Pointer to opcode parameter. */
414typedef OP_PARAMETER *POP_PARAMETER;
415/** Pointer to opcode parameter. */
416typedef const OP_PARAMETER *PCOP_PARAMETER;
417
418
419/** Pointer to opcode. */
420typedef struct OPCODE *POPCODE;
421/** Pointer to const opcode. */
422typedef const struct OPCODE *PCOPCODE;
423
424/**
425 * Callback for reading opcode bytes.
426 *
427 * @param pDisState Pointer to the CPU state. The primary user argument
428 * can be retrived from DISCPUSTATE::apvUserData[0]. If
429 * more is required these can be passed in the
430 * subsequent slots.
431 * @param pbDst Pointer to output buffer.
432 * @param uSrcAddr The address to start reading at.
433 * @param cbToRead The number of bytes to read.
434 */
435typedef DECLCALLBACK(int) FNDISREADBYTES(PDISCPUSTATE pDisState, uint8_t *pbDst, RTUINTPTR uSrcAddr, uint32_t cbToRead);
436/** Pointer to a opcode byte reader. */
437typedef FNDISREADBYTES *PFNDISREADBYTES;
438
439/** Parser callback.
440 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
441typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
442typedef FNDISPARSE *PFNDISPARSE;
443
444typedef struct DISCPUSTATE
445{
446 /** Global setting. */
447 DISCPUMODE mode;
448
449 /** Per instruction prefix settings. */
450 uint32_t prefix; /**< @todo change to uint8_t */
451 /** segment prefix value. */
452 DIS_SELREG enmPrefixSeg;
453 /** rex prefix value (64 bits only */
454 uint32_t prefix_rex; /**< @todo change to uint8_t */
455 /** addressing mode (16 or 32 bits). (CPUMODE_*) */
456 DISCPUMODE addrmode;
457 /** operand mode (16 or 32 bits). (CPUMODE_*) */
458 DISCPUMODE opmode;
459
460 OP_PARAMETER param1;
461 OP_PARAMETER param2;
462 OP_PARAMETER param3;
463
464 /** ModRM fields. */
465 union
466 {
467 /** Bitfield view */
468 struct
469 {
470 unsigned Rm : 4;
471 unsigned Reg : 4;
472 unsigned Mod : 2;
473 } Bits;
474 /** unsigned view */
475 unsigned u;
476 } ModRM;
477
478 /** SIB fields. */
479 union
480 {
481 /** Bitfield view */
482 struct
483 {
484 unsigned Base : 4;
485 unsigned Index : 4;
486 unsigned Scale : 2;
487 } Bits;
488 /** unsigned view */
489 unsigned u;
490 } SIB;
491 int32_t i32SibDisp;
492
493 /** The instruction size. */
494 uint32_t opsize;
495 /** The address of the instruction. */
496 RTUINTPTR uInstrAddr;
497 /** The size of the prefix bytes. */
498 uint8_t cbPrefix;
499
500 /** First opcode byte of instruction. */
501 uint8_t opcode;
502 /** Last prefix byte (for SSE2 extension tables). */
503 uint8_t lastprefix;
504 /** The instruction bytes. */
505 uint8_t abInstr[16];
506
507 /** Internal: pointer to disassembly function table */
508 PFNDISPARSE *pfnDisasmFnTable;
509 /** Internal: instruction filter */
510 uint32_t fFilter;
511 /** Return code set by a worker function like the opcode bytes readers. */
512 int32_t rc;
513
514 /** Pointer to the current instruction. */
515 PCOPCODE pCurInstr;
516#ifndef DIS_CORE_ONLY
517 /** Opcode format string for current instruction. */
518 const char *pszOpcode;
519#endif
520
521 /** Optional read function */
522 PFNDISREADBYTES pfnReadBytes;
523 /** User data slots for the read callback. The first entry is used for the
524 * pvUser argument, the rest are up for grabs.
525 * @remarks This must come last so that we can memset everything before this. */
526 void *apvUserData[3];
527} DISCPUSTATE;
528
529/** The storage padding sufficient to hold the largest DISCPUSTATE in all
530 * contexts (R3, R0 and RC). Used various places in the VMM internals. */
531#define DISCPUSTATE_PADDING_SIZE (HC_ARCH_BITS == 64 ? 0x1a0 : 0x180)
532
533/** Opcode. */
534#pragma pack(4)
535typedef struct OPCODE
536{
537#ifndef DIS_CORE_ONLY
538 const char *pszOpcode;
539#endif
540 uint8_t idxParse1;
541 uint8_t idxParse2;
542 uint8_t idxParse3;
543 uint16_t opcode;
544 uint16_t param1;
545 uint16_t param2;
546 uint16_t param3;
547
548 unsigned optype;
549} OPCODE;
550#pragma pack()
551
552
553DISDECL(int) DISInstrToStr(void const *pvInstr, DISCPUMODE enmCpuMode,
554 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
555DISDECL(int) DISInstrToStrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
556 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
557DISDECL(int) DISInstrToStrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode,
558 PFNDISREADBYTES pfnReadBytes, void *pvUser, uint32_t uFilter,
559 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
560
561DISDECL(int) DISInstr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr);
562DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
563 PDISCPUSTATE pCpu, uint32_t *pcbInstr);
564DISDECL(int) DISInstEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter,
565 PFNDISREADBYTES pfnReadBytes, void *pvUser,
566 PDISCPUSTATE pCpu, uint32_t *pcbInstr);
567
568DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
569DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
570DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
571
572DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
573DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize);
574
575DISDECL(int) DISFetchReg8(PCCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
576DISDECL(int) DISFetchReg16(PCCPUMCTXCORE pCtx, unsigned reg16, uint16_t *pVal);
577DISDECL(int) DISFetchReg32(PCCPUMCTXCORE pCtx, unsigned reg32, uint32_t *pVal);
578DISDECL(int) DISFetchReg64(PCCPUMCTXCORE pCtx, unsigned reg64, uint64_t *pVal);
579DISDECL(int) DISFetchRegSeg(PCCPUMCTXCORE pCtx, DIS_SELREG sel, RTSEL *pVal);
580DISDECL(int) DISFetchRegSegEx(PCCPUMCTXCORE pCtx, DIS_SELREG sel, RTSEL *pVal, PCPUMSELREGHID *ppSelHidReg);
581DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, unsigned reg8, uint8_t val8);
582DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, unsigned reg32, uint16_t val16);
583DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, unsigned reg32, uint32_t val32);
584DISDECL(int) DISWriteReg64(PCPUMCTXCORE pRegFrame, unsigned reg64, uint64_t val64);
585DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, DIS_SELREG sel, RTSEL val);
586DISDECL(int) DISPtrReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t **ppReg);
587DISDECL(int) DISPtrReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t **ppReg);
588DISDECL(int) DISPtrReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t **ppReg);
589DISDECL(int) DISPtrReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t **ppReg);
590
591
592/**
593 * Try resolve an address into a symbol name.
594 *
595 * For use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
596 *
597 * @returns VBox status code.
598 * @retval VINF_SUCCESS on success, pszBuf contains the full symbol name.
599 * @retval VINF_BUFFER_OVERFLOW if pszBuf is too small the symbol name. The
600 * content of pszBuf is truncated and zero terminated.
601 * @retval VERR_SYMBOL_NOT_FOUND if no matching symbol was found for the address.
602 *
603 * @param pCpu Pointer to the disassembler CPU state.
604 * @param u32Sel The selector value. Use DIS_FMT_SEL_IS_REG, DIS_FMT_SEL_GET_VALUE,
605 * DIS_FMT_SEL_GET_REG to access this.
606 * @param uAddress The segment address.
607 * @param pszBuf Where to store the symbol name
608 * @param cchBuf The size of the buffer.
609 * @param poff If not a perfect match, then this is where the offset from the return
610 * symbol to the specified address is returned.
611 * @param pvUser The user argument.
612 */
613typedef DECLCALLBACK(int) FNDISGETSYMBOL(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char *pszBuf, size_t cchBuf, RTINTPTR *poff, void *pvUser);
614/** Pointer to a FNDISGETSYMBOL(). */
615typedef FNDISGETSYMBOL *PFNDISGETSYMBOL;
616
617/**
618 * Checks if the FNDISGETSYMBOL argument u32Sel is a register or not.
619 */
620#define DIS_FMT_SEL_IS_REG(u32Sel) ( !!((u32Sel) & RT_BIT(31)) )
621
622/**
623 * Extracts the selector value from the FNDISGETSYMBOL argument u32Sel.
624 * @returns Selector value.
625 */
626#define DIS_FMT_SEL_GET_VALUE(u32Sel) ( (RTSEL)(u32Sel) )
627
628/**
629 * Extracts the register number from the FNDISGETSYMBOL argument u32Sel.
630 * @returns USE_REG_CS, USE_REG_SS, USE_REG_DS, USE_REG_ES, USE_REG_FS or USE_REG_FS.
631 */
632#define DIS_FMT_SEL_GET_REG(u32Sel) ( ((u32Sel) >> 16) & 0xf )
633
634/** @internal */
635#define DIS_FMT_SEL_FROM_REG(uReg) ( ((uReg) << 16) | RT_BIT(31) | 0xffff )
636/** @internal */
637#define DIS_FMT_SEL_FROM_VALUE(Sel) ( (Sel) & 0xffff )
638
639
640/** @name Flags for use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
641 * @{
642 */
643/** Put the address to the right. */
644#define DIS_FMT_FLAGS_ADDR_RIGHT RT_BIT_32(0)
645/** Put the address to the left. */
646#define DIS_FMT_FLAGS_ADDR_LEFT RT_BIT_32(1)
647/** Put the address in comments.
648 * For some assemblers this implies placing it to the right. */
649#define DIS_FMT_FLAGS_ADDR_COMMENT RT_BIT_32(2)
650/** Put the instruction bytes to the right of the disassembly. */
651#define DIS_FMT_FLAGS_BYTES_RIGHT RT_BIT_32(3)
652/** Put the instruction bytes to the left of the disassembly. */
653#define DIS_FMT_FLAGS_BYTES_LEFT RT_BIT_32(4)
654/** Put the instruction bytes in comments.
655 * For some assemblers this implies placing the bytes to the right. */
656#define DIS_FMT_FLAGS_BYTES_COMMENT RT_BIT_32(5)
657/** Put the bytes in square brackets. */
658#define DIS_FMT_FLAGS_BYTES_BRACKETS RT_BIT_32(6)
659/** Put spaces between the bytes. */
660#define DIS_FMT_FLAGS_BYTES_SPACED RT_BIT_32(7)
661/** Display the relative +/- offset of branch instructions that uses relative addresses,
662 * and put the target address in parenthesis. */
663#define DIS_FMT_FLAGS_RELATIVE_BRANCH RT_BIT_32(8)
664/** Strict assembly. The assembly should, when ever possible, make the
665 * assembler reproduce the exact same binary. (Refers to the yasm
666 * strict keyword.) */
667#define DIS_FMT_FLAGS_STRICT RT_BIT_32(9)
668/** Checks if the given flags are a valid combination. */
669#define DIS_FMT_FLAGS_IS_VALID(fFlags) \
670 ( !((fFlags) & ~UINT32_C(0x000003ff)) \
671 && ((fFlags) & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) != (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT) \
672 && ( !((fFlags) & DIS_FMT_FLAGS_ADDR_COMMENT) \
673 || (fFlags & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) ) \
674 && ((fFlags) & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) != (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT) \
675 && ( !((fFlags) & (DIS_FMT_FLAGS_BYTES_COMMENT | DIS_FMT_FLAGS_BYTES_BRACKETS)) \
676 || (fFlags & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) ) \
677 )
678/** @} */
679
680DISDECL(size_t) DISFormatYasm( PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf);
681DISDECL(size_t) DISFormatYasmEx(PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
682DISDECL(size_t) DISFormatMasm( PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf);
683DISDECL(size_t) DISFormatMasmEx(PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
684DISDECL(size_t) DISFormatGas( PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf);
685DISDECL(size_t) DISFormatGasEx( PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
686
687/** @todo DISAnnotate(PCDISCPUSTATE pCpu, char *pszBuf, size_t cchBuf, register reader, memory reader); */
688
689DISDECL(bool) DISFormatYasmIsOddEncoding(PDISCPUSTATE pCpu);
690
691
692RT_C_DECLS_END
693
694#endif
695
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