VirtualBox

source: vbox/trunk/include/VBox/disopcode-armv8.h@ 106777

Last change on this file since 106777 was 106777, checked in by vboxsync, 5 weeks ago

Disassembler: Decode Load/Store exclusive register instructions, bugref:10394

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1/** @file
2 * Disassembler - Opcodes
3 */
4
5/*
6 * Copyright (C) 2023-2024 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef VBOX_INCLUDED_disopcode_armv8_h
37#define VBOX_INCLUDED_disopcode_armv8_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <iprt/assert.h>
43
44/** @defgroup grp_dis_opcodes_armv8 Opcodes (DISOPCODE::uOpCode)
45 * @ingroup grp_dis
46 * @{
47 */
48enum OPCODESARMV8
49{
50 /** @name Full ARMv8 AArch64 opcode list.
51 * @{ */
52 OP_ARMV8_INVALID = 0,
53 OP_ARMV8_A64_ABS,
54 OP_ARMV8_A64_ADC,
55 OP_ARMV8_A64_ADCS,
56 OP_ARMV8_A64_ADD,
57 OP_ARMV8_A64_ADDG,
58 OP_ARMV8_A64_ADDS,
59 OP_ARMV8_A64_ADR,
60 OP_ARMV8_A64_ADRP,
61 OP_ARMV8_A64_AND,
62 OP_ARMV8_A64_ANDS,
63 OP_ARMV8_A64_ASR,
64 OP_ARMV8_A64_ASRV,
65 OP_ARMV8_A64_AT,
66 OP_ARMV8_A64_AUTDA,
67 OP_ARMV8_A64_AUTDZA,
68 OP_ARMV8_A64_AUTDB,
69 OP_ARMV8_A64_AUTDZB,
70 OP_ARMV8_A64_AUTIA,
71 OP_ARMV8_A64_AUTIA1716,
72 OP_ARMV8_A64_AUTIASP,
73 OP_ARMV8_A64_AUTIAZ,
74 OP_ARMV8_A64_AUTIZA,
75 OP_ARMV8_A64_AUTIB,
76 OP_ARMV8_A64_AUTIB1716,
77 OP_ARMV8_A64_AUTIBSP,
78 OP_ARMV8_A64_AUTIBZ,
79 OP_ARMV8_A64_AUTIZB,
80 OP_ARMV8_A64_AXFLAG,
81 OP_ARMV8_A64_B,
82 OP_ARMV8_A64_BC,
83 OP_ARMV8_A64_BFC,
84 OP_ARMV8_A64_BFI,
85 OP_ARMV8_A64_BFM,
86 OP_ARMV8_A64_BFXIL,
87 OP_ARMV8_A64_BIC,
88 OP_ARMV8_A64_BICS,
89 OP_ARMV8_A64_BL,
90 OP_ARMV8_A64_BLR,
91 OP_ARMV8_A64_BLRAA,
92 OP_ARMV8_A64_BLRAAZ,
93 OP_ARMV8_A64_BLRAB,
94 OP_ARMV8_A64_BLRABZ,
95 OP_ARMV8_A64_BR,
96 OP_ARMV8_A64_BRAA,
97 OP_ARMV8_A64_BRAAZ,
98 OP_ARMV8_A64_BRAB,
99 OP_ARMV8_A64_BRABZ,
100 OP_ARMV8_A64_BRB,
101 OP_ARMV8_A64_BRK,
102 OP_ARMV8_A64_BTI,
103 OP_ARMV8_A64_BTI_C,
104 OP_ARMV8_A64_BTI_J,
105 OP_ARMV8_A64_BTI_JC,
106 OP_ARMV8_A64_CASB,
107 OP_ARMV8_A64_CASAB,
108 OP_ARMV8_A64_CASALB,
109 OP_ARMV8_A64_CASLB,
110 OP_ARMV8_A64_CASH,
111 OP_ARMV8_A64_CASAH,
112 OP_ARMV8_A64_CASALH,
113 OP_ARMV8_A64_CASLH,
114 OP_ARMV8_A64_CASP,
115 OP_ARMV8_A64_CASPA,
116 OP_ARMV8_A64_CASPAL,
117 OP_ARMV8_A64_CASPL,
118 OP_ARMV8_A64_CAS,
119 OP_ARMV8_A64_CASA,
120 OP_ARMV8_A64_CASAL,
121 OP_ARMV8_A64_CASL,
122 OP_ARMV8_A64_CBNZ,
123 OP_ARMV8_A64_CBZ,
124 OP_ARMV8_A64_CCMN,
125 OP_ARMV8_A64_CCMP,
126 OP_ARMV8_A64_CFINV,
127 OP_ARMV8_A64_CFP,
128 OP_ARMV8_A64_CHKFEAT,
129 OP_ARMV8_A64_CINC,
130 OP_ARMV8_A64_CINV,
131 OP_ARMV8_A64_CLRBHB,
132 OP_ARMV8_A64_CLREX,
133 OP_ARMV8_A64_CLS,
134 OP_ARMV8_A64_CLZ,
135 OP_ARMV8_A64_CMN,
136 OP_ARMV8_A64_CMP,
137 OP_ARMV8_A64_CMPP,
138 OP_ARMV8_A64_CNEG,
139 OP_ARMV8_A64_CNT,
140 OP_ARMV8_A64_CPP,
141 /** @todo FEAT_MOPS instructions (CPYFP and friends). */
142 OP_ARMV8_A64_CRC32B,
143 OP_ARMV8_A64_CRC32H,
144 OP_ARMV8_A64_CRC32W,
145 OP_ARMV8_A64_CRC32X,
146 OP_ARMV8_A64_CRC32CB,
147 OP_ARMV8_A64_CRC32CH,
148 OP_ARMV8_A64_CRC32CW,
149 OP_ARMV8_A64_CRC32CX,
150 OP_ARMV8_A64_CSDB,
151 OP_ARMV8_A64_CSEL,
152 OP_ARMV8_A64_CSET,
153 OP_ARMV8_A64_CSETM,
154 OP_ARMV8_A64_CSINC,
155 OP_ARMV8_A64_CSNEG,
156 OP_ARMV8_A64_CTZ,
157 OP_ARMV8_A64_DC,
158 OP_ARMV8_A64_DCPS1,
159 OP_ARMV8_A64_DCPS2,
160 OP_ARMV8_A64_DCPS3,
161 OP_ARMV8_A64_DGH,
162 OP_ARMV8_A64_DMB,
163 OP_ARMV8_A64_DRPS,
164 OP_ARMV8_A64_DSB,
165 OP_ARMV8_A64_DVP,
166 OP_ARMV8_A64_EON,
167 OP_ARMV8_A64_EOR,
168 OP_ARMV8_A64_ERET,
169 OP_ARMV8_A64_ERETAA,
170 OP_ARMV8_A64_ERETAB,
171 OP_ARMV8_A64_ESB,
172 OP_ARMV8_A64_EXTR,
173 OP_ARMV8_A64_FABS,
174 OP_ARMV8_A64_FADD,
175 OP_ARMV8_A64_FCCMP,
176 OP_ARMV8_A64_FCCMPE,
177 OP_ARMV8_A64_FCMP,
178 OP_ARMV8_A64_FCMPE,
179 OP_ARMV8_A64_FCSEL,
180 OP_ARMV8_A64_FCVT,
181 OP_ARMV8_A64_FCVTZS,
182 OP_ARMV8_A64_FCVTZU,
183 OP_ARMV8_A64_FDIV,
184 OP_ARMV8_A64_FMADD,
185 OP_ARMV8_A64_FMAX,
186 OP_ARMV8_A64_FMAXNM,
187 OP_ARMV8_A64_FMIN,
188 OP_ARMV8_A64_FMINNM,
189 OP_ARMV8_A64_FMOV,
190 OP_ARMV8_A64_FMSUB,
191 OP_ARMV8_A64_FMUL,
192 OP_ARMV8_A64_FNEG,
193 OP_ARMV8_A64_FNMADD,
194 OP_ARMV8_A64_FNMSUB,
195 OP_ARMV8_A64_FNMUL,
196 OP_ARMV8_A64_FRINT32X,
197 OP_ARMV8_A64_FRINT32Z,
198 OP_ARMV8_A64_FRINT64X,
199 OP_ARMV8_A64_FRINT64Z,
200 OP_ARMV8_A64_FRINTA,
201 OP_ARMV8_A64_FRINTI,
202 OP_ARMV8_A64_FRINTM,
203 OP_ARMV8_A64_FRINTN,
204 OP_ARMV8_A64_FRINTP,
205 OP_ARMV8_A64_FRINTX,
206 OP_ARMV8_A64_FRINTZ,
207 OP_ARMV8_A64_FSQRT,
208 OP_ARMV8_A64_FSUB,
209 OP_ARMV8_A64_GCSB,
210 OP_ARMV8_A64_GMI,
211 OP_ARMV8_A64_HINT,
212 OP_ARMV8_A64_HLT,
213 OP_ARMV8_A64_HVC,
214 OP_ARMV8_A64_IC,
215 OP_ARMV8_A64_IRG,
216 OP_ARMV8_A64_ISB,
217 OP_ARMV8_A64_LD64B,
218 OP_ARMV8_A64_LDADDB,
219 OP_ARMV8_A64_LDADDAB,
220 OP_ARMV8_A64_LDADDALB,
221 OP_ARMV8_A64_LDADDLB,
222 OP_ARMV8_A64_LDADDH,
223 OP_ARMV8_A64_LDADDAH,
224 OP_ARMV8_A64_LDADDALH,
225 OP_ARMV8_A64_LDADDLH,
226 OP_ARMV8_A64_LDADD,
227 OP_ARMV8_A64_LDADDA,
228 OP_ARMV8_A64_LDADDAL,
229 OP_ARMV8_A64_LDADDL,
230 OP_ARMV8_A64_LDAPR,
231 OP_ARMV8_A64_LDAPRB,
232 OP_ARMV8_A64_LDAPRH,
233 OP_ARMV8_A64_LDAPUR,
234 OP_ARMV8_A64_LDAPURB,
235 OP_ARMV8_A64_LDAPURH,
236 OP_ARMV8_A64_LDAPURSB,
237 OP_ARMV8_A64_LDAPURSH,
238 OP_ARMV8_A64_LDAPURSW,
239 OP_ARMV8_A64_LDAR,
240 OP_ARMV8_A64_LDARB,
241 OP_ARMV8_A64_LDARH,
242 OP_ARMV8_A64_LDAXP,
243 OP_ARMV8_A64_LDAXR,
244 OP_ARMV8_A64_LDAXRB,
245 OP_ARMV8_A64_LDAXRH,
246 OP_ARMV8_A64_LDCLRB,
247 OP_ARMV8_A64_LDCLRAB,
248 OP_ARMV8_A64_LDCLRALB,
249 OP_ARMV8_A64_LDCLRLB,
250 OP_ARMV8_A64_LDCLRH,
251 OP_ARMV8_A64_LDCLRAH,
252 OP_ARMV8_A64_LDCLRALH,
253 OP_ARMV8_A64_LDCLRLH,
254 OP_ARMV8_A64_LDCLR,
255 OP_ARMV8_A64_LDCLRA,
256 OP_ARMV8_A64_LDCLRAL,
257 OP_ARMV8_A64_LDCLRL,
258 OP_ARMV8_A64_LDEORB,
259 OP_ARMV8_A64_LDEORAB,
260 OP_ARMV8_A64_LDEORALB,
261 OP_ARMV8_A64_LDEORLB,
262 OP_ARMV8_A64_LDEORH,
263 OP_ARMV8_A64_LDEORAH,
264 OP_ARMV8_A64_LDEORALH,
265 OP_ARMV8_A64_LDEORLH,
266 OP_ARMV8_A64_LDEOR,
267 OP_ARMV8_A64_LDEORA,
268 OP_ARMV8_A64_LDEORAL,
269 OP_ARMV8_A64_LDEORL,
270 OP_ARMV8_A64_LDG,
271 OP_ARMV8_A64_LDGM,
272 OP_ARMV8_A64_LDLARB,
273 OP_ARMV8_A64_LDLARH,
274 OP_ARMV8_A64_LDLAR,
275 OP_ARMV8_A64_LDNP,
276 OP_ARMV8_A64_LDP,
277 OP_ARMV8_A64_LDPSW,
278 OP_ARMV8_A64_LDR,
279 OP_ARMV8_A64_LDRAA,
280 OP_ARMV8_A64_LDRAB,
281 OP_ARMV8_A64_LDRB,
282 OP_ARMV8_A64_LDRH,
283 OP_ARMV8_A64_LDRSB,
284 OP_ARMV8_A64_LDRSH,
285 OP_ARMV8_A64_LDRSW,
286 OP_ARMV8_A64_LDSETB,
287 OP_ARMV8_A64_LDSETAB,
288 OP_ARMV8_A64_LDSETALB,
289 OP_ARMV8_A64_LDSETLB,
290 OP_ARMV8_A64_LDSETH,
291 OP_ARMV8_A64_LDSETAH,
292 OP_ARMV8_A64_LDSETALH,
293 OP_ARMV8_A64_LDSETLH,
294 OP_ARMV8_A64_LDSET,
295 OP_ARMV8_A64_LDSETA,
296 OP_ARMV8_A64_LDSETAL,
297 OP_ARMV8_A64_LDSETL,
298 OP_ARMV8_A64_LDSMAB,
299 OP_ARMV8_A64_LDSMAXAB,
300 OP_ARMV8_A64_LDSMAXALB,
301 OP_ARMV8_A64_LDSMAXB,
302 OP_ARMV8_A64_LDSMAXLB,
303 OP_ARMV8_A64_LDSMAXH,
304 OP_ARMV8_A64_LDSMAXAH,
305 OP_ARMV8_A64_LDSMAXALH,
306 OP_ARMV8_A64_LDSMAXLH,
307 OP_ARMV8_A64_LDSMAX,
308 OP_ARMV8_A64_LDSMAXA,
309 OP_ARMV8_A64_LDSMAXAL,
310 OP_ARMV8_A64_LDSMAXL,
311 OP_ARMV8_A64_LDSMINB,
312 OP_ARMV8_A64_LDSMINAB,
313 OP_ARMV8_A64_LDSMINALB,
314 OP_ARMV8_A64_LDSMINLB,
315 OP_ARMV8_A64_LDSMINH,
316 OP_ARMV8_A64_LDSMINAH,
317 OP_ARMV8_A64_LDSMINALH,
318 OP_ARMV8_A64_LDSMINLH,
319 OP_ARMV8_A64_LDSMIN,
320 OP_ARMV8_A64_LDSMINA,
321 OP_ARMV8_A64_LDSMINAL,
322 OP_ARMV8_A64_LDSMINL,
323 OP_ARMV8_A64_LDTR,
324 OP_ARMV8_A64_LDTRB,
325 OP_ARMV8_A64_LDTRH,
326 OP_ARMV8_A64_LDTRSB,
327 OP_ARMV8_A64_LDTRSH,
328 OP_ARMV8_A64_LDTRSW,
329 OP_ARMV8_A64_LDUMAXB,
330 OP_ARMV8_A64_LDUMAXAB,
331 OP_ARMV8_A64_LDUMAXALB,
332 OP_ARMV8_A64_LDUMAXLB,
333 OP_ARMV8_A64_LDUMAXH,
334 OP_ARMV8_A64_LDUMAXAH,
335 OP_ARMV8_A64_LDUMAXALH,
336 OP_ARMV8_A64_LDUMAXLH,
337 OP_ARMV8_A64_LDUMAX,
338 OP_ARMV8_A64_LDUMAXA,
339 OP_ARMV8_A64_LDUMAXAL,
340 OP_ARMV8_A64_LDUMAXL,
341 OP_ARMV8_A64_LDUMINB,
342 OP_ARMV8_A64_LDUMINAB,
343 OP_ARMV8_A64_LDUMINALB,
344 OP_ARMV8_A64_LDUMINLB,
345 OP_ARMV8_A64_LDUMINH,
346 OP_ARMV8_A64_LDUMINAH,
347 OP_ARMV8_A64_LDUMINALH,
348 OP_ARMV8_A64_LDUMINLH,
349 OP_ARMV8_A64_LDUMIN,
350 OP_ARMV8_A64_LDUMINA,
351 OP_ARMV8_A64_LDUMINAL,
352 OP_ARMV8_A64_LDUMINL,
353 OP_ARMV8_A64_LDUR,
354 OP_ARMV8_A64_LDURB,
355 OP_ARMV8_A64_LDURH,
356 OP_ARMV8_A64_LDURSB,
357 OP_ARMV8_A64_LDURSH,
358 OP_ARMV8_A64_LDURSW,
359 OP_ARMV8_A64_LDXP,
360 OP_ARMV8_A64_LDXR,
361 OP_ARMV8_A64_LDXRB,
362 OP_ARMV8_A64_LDXRH,
363 OP_ARMV8_A64_LSL,
364 OP_ARMV8_A64_LSLV,
365 OP_ARMV8_A64_LSR,
366 OP_ARMV8_A64_LSRV,
367 OP_ARMV8_A64_MADD,
368 OP_ARMV8_A64_MNEG,
369 OP_ARMV8_A64_MOV,
370 OP_ARMV8_A64_MOVK,
371 OP_ARMV8_A64_MOVN,
372 OP_ARMV8_A64_MOVZ,
373 OP_ARMV8_A64_MRS,
374 OP_ARMV8_A64_MSR,
375 OP_ARMV8_A64_MSUB,
376 OP_ARMV8_A64_MUL,
377 OP_ARMV8_A64_MVN,
378 OP_ARMV8_A64_NEG,
379 OP_ARMV8_A64_NEGS,
380 OP_ARMV8_A64_NGC,
381 OP_ARMV8_A64_NGCS,
382 OP_ARMV8_A64_NOP,
383 OP_ARMV8_A64_ORR,
384 OP_ARMV8_A64_ORN,
385 OP_ARMV8_A64_PACDA,
386 OP_ARMV8_A64_PACDZA,
387 OP_ARMV8_A64_PACDB,
388 OP_ARMV8_A64_PACDZB,
389 OP_ARMV8_A64_PACGA,
390 OP_ARMV8_A64_PACIA,
391 OP_ARMV8_A64_PACIA1716,
392 OP_ARMV8_A64_PACIASP,
393 OP_ARMV8_A64_PACIAZ,
394 OP_ARMV8_A64_PACIZA,
395 OP_ARMV8_A64_PACIB,
396 OP_ARMV8_A64_PACIB1716,
397 OP_ARMV8_A64_PACIBSP,
398 OP_ARMV8_A64_PACIBZ,
399 OP_ARMV8_A64_PACIBZB,
400 OP_ARMV8_A64_PRFM,
401 OP_ARMV8_A64_PRFUM,
402 OP_ARMV8_A64_PSB,
403 OP_ARMV8_A64_PSBSYNC,
404 OP_ARMV8_A64_PSSBB,
405 OP_ARMV8_A64_RBIT,
406 OP_ARMV8_A64_RCWCLR,
407 OP_ARMV8_A64_RCWCLRA,
408 OP_ARMV8_A64_RCWCLRAL,
409 OP_ARMV8_A64_RCWCLRL,
410 OP_ARMV8_A64_RCWSCLR,
411 OP_ARMV8_A64_RCWSCLRA,
412 OP_ARMV8_A64_RCWSCLRAL,
413 OP_ARMV8_A64_RCWSCLRL,
414 OP_ARMV8_A64_RCWSET,
415 OP_ARMV8_A64_RCWSETA,
416 OP_ARMV8_A64_RCWSETAL,
417 OP_ARMV8_A64_RCWSETL,
418 OP_ARMV8_A64_RCWSSET,
419 OP_ARMV8_A64_RCWSSETA,
420 OP_ARMV8_A64_RCWSSETAL,
421 OP_ARMV8_A64_RCWSSETL,
422 OP_ARMV8_A64_RCWSSWP,
423 OP_ARMV8_A64_RCWSSWPA,
424 OP_ARMV8_A64_RCWSSWPAL,
425 OP_ARMV8_A64_RCWSSWPL,
426 OP_ARMV8_A64_RCWSWP,
427 OP_ARMV8_A64_RCWSWPA,
428 OP_ARMV8_A64_RCWSWPAL,
429 OP_ARMV8_A64_RCWSWPL,
430 OP_ARMV8_A64_RET,
431 OP_ARMV8_A64_RETAA,
432 OP_ARMV8_A64_RETAB,
433 OP_ARMV8_A64_REV,
434 OP_ARMV8_A64_REV16,
435 OP_ARMV8_A64_REV32,
436 OP_ARMV8_A64_RMIF,
437 OP_ARMV8_A64_ROR,
438 OP_ARMV8_A64_RORV,
439 OP_ARMV8_A64_SB,
440 OP_ARMV8_A64_SBC,
441 OP_ARMV8_A64_SBCS,
442 OP_ARMV8_A64_SBFIZ,
443 OP_ARMV8_A64_SBFM,
444 OP_ARMV8_A64_SBFX,
445 OP_ARMV8_A64_SCVTF,
446 OP_ARMV8_A64_SDIV,
447 OP_ARMV8_A64_SETF8,
448 OP_ARMV8_A64_SETF16,
449 OP_ARMV8_A64_SETGP,
450 OP_ARMV8_A64_SETGM,
451 OP_ARMV8_A64_SETGE,
452 OP_ARMV8_A64_SETGPN,
453 OP_ARMV8_A64_SETGMN,
454 OP_ARMV8_A64_SETGEN,
455 OP_ARMV8_A64_SETGPT,
456 OP_ARMV8_A64_SETGMT,
457 OP_ARMV8_A64_SETGET,
458 OP_ARMV8_A64_SETGPTN,
459 OP_ARMV8_A64_SETGMTN,
460 OP_ARMV8_A64_SETGETN,
461 OP_ARMV8_A64_SETP,
462 OP_ARMV8_A64_SETM,
463 OP_ARMV8_A64_SETE,
464 OP_ARMV8_A64_SETPN,
465 OP_ARMV8_A64_SETMNM,
466 OP_ARMV8_A64_SETEN,
467 OP_ARMV8_A64_SETPT,
468 OP_ARMV8_A64_SETMT,
469 OP_ARMV8_A64_SETET,
470 OP_ARMV8_A64_SETPTN,
471 OP_ARMV8_A64_SETMTN,
472 OP_ARMV8_A64_SETETN,
473 OP_ARMV8_A64_SEV,
474 OP_ARMV8_A64_SEVL,
475 OP_ARMV8_A64_SHL,
476 OP_ARMV8_A64_SMADDL,
477 OP_ARMV8_A64_SMAX,
478 OP_ARMV8_A64_SMC,
479 OP_ARMV8_A64_SMIN,
480 OP_ARMV8_A64_SMNEGL,
481 OP_ARMV8_A64_SMSTART,
482 OP_ARMV8_A64_SMSTOP,
483 OP_ARMV8_A64_SMSUBL,
484 OP_ARMV8_A64_SMULH,
485 OP_ARMV8_A64_SMULL,
486 OP_ARMV8_A64_SQRSHRN,
487 OP_ARMV8_A64_SQSHL,
488 OP_ARMV8_A64_SQSHRN,
489 OP_ARMV8_A64_SRSHR,
490 OP_ARMV8_A64_SRSRA,
491 OP_ARMV8_A64_SSBB,
492 OP_ARMV8_A64_SSHR,
493 OP_ARMV8_A64_SSRA,
494 OP_ARMV8_A64_ST2G,
495 OP_ARMV8_A64_ST64B,
496 OP_ARMV8_A64_ST64BV0,
497 OP_ARMV8_A64_STADDB,
498 OP_ARMV8_A64_STADDLB,
499 OP_ARMV8_A64_STADDH,
500 OP_ARMV8_A64_STADDLH,
501 OP_ARMV8_A64_STADD,
502 OP_ARMV8_A64_STADDL,
503 OP_ARMV8_A64_STCLRB,
504 OP_ARMV8_A64_STCLRLB,
505 OP_ARMV8_A64_STCLRH,
506 OP_ARMV8_A64_STCLRLH,
507 OP_ARMV8_A64_STCLR,
508 OP_ARMV8_A64_STCLRL,
509 OP_ARMV8_A64_STEORB,
510 OP_ARMV8_A64_STEROLB,
511 OP_ARMV8_A64_STEORH,
512 OP_ARMV8_A64_STEORLH,
513 OP_ARMV8_A64_STEOR,
514 OP_ARMV8_A64_STEORL,
515 OP_ARMV8_A64_STG,
516 OP_ARMV8_A64_STGM,
517 OP_ARMV8_A64_STGP,
518 OP_ARMV8_A64_STLLRB,
519 OP_ARMV8_A64_STLLRH,
520 OP_ARMV8_A64_STLLR,
521 OP_ARMV8_A64_STLR,
522 OP_ARMV8_A64_STLRB,
523 OP_ARMV8_A64_STLRH,
524 OP_ARMV8_A64_STLUR,
525 OP_ARMV8_A64_STLURB,
526 OP_ARMV8_A64_STLURH,
527 OP_ARMV8_A64_STLXP,
528 OP_ARMV8_A64_STLXR,
529 OP_ARMV8_A64_STLXRB,
530 OP_ARMV8_A64_STLXRH,
531 OP_ARMV8_A64_STNP,
532 OP_ARMV8_A64_STP,
533 OP_ARMV8_A64_STR,
534 OP_ARMV8_A64_STRB,
535 OP_ARMV8_A64_STRH,
536 OP_ARMV8_A64_STTR,
537 OP_ARMV8_A64_STTRB,
538 OP_ARMV8_A64_STTRH,
539 OP_ARMV8_A64_STUR,
540 OP_ARMV8_A64_STURB,
541 OP_ARMV8_A64_STURH,
542 OP_ARMV8_A64_STXP,
543 OP_ARMV8_A64_STXR,
544 OP_ARMV8_A64_STXRB,
545 OP_ARMV8_A64_STXRH,
546 OP_ARMV8_A64_STZ2G,
547 OP_ARMV8_A64_STZG,
548 OP_ARMV8_A64_STZGM,
549 OP_ARMV8_A64_SUB,
550 OP_ARMV8_A64_SUBG,
551 OP_ARMV8_A64_SUBPS,
552 OP_ARMV8_A64_SUBS,
553 OP_ARMV8_A64_SUBP,
554 OP_ARMV8_A64_SVC,
555 OP_ARMV8_A64_SWPB,
556 OP_ARMV8_A64_SWPAB,
557 OP_ARMV8_A64_SWPALB,
558 OP_ARMV8_A64_SWPLB,
559 OP_ARMV8_A64_SWPH,
560 OP_ARMV8_A64_SWPAH,
561 OP_ARMV8_A64_SWPALH,
562 OP_ARMV8_A64_SWPLH,
563 OP_ARMV8_A64_SWP,
564 OP_ARMV8_A64_SWPA,
565 OP_ARMV8_A64_SWPAL,
566 OP_ARMV8_A64_SWPL,
567 OP_ARMV8_A64_SXTB,
568 OP_ARMV8_A64_SXTH,
569 OP_ARMV8_A64_SXTW,
570 OP_ARMV8_A64_SYS,
571 OP_ARMV8_A64_SYSL,
572 OP_ARMV8_A64_TBNZ,
573 OP_ARMV8_A64_TBZ,
574 OP_ARMV8_A64_TCANCEL,
575 OP_ARMV8_A64_TCOMMIT,
576 OP_ARMV8_A64_TLBI,
577 OP_ARMV8_A64_TSB,
578 OP_ARMV8_A64_TSBCSYNC,
579 OP_ARMV8_A64_TST,
580 OP_ARMV8_A64_TSTART,
581 OP_ARMV8_A64_TTEST,
582 OP_ARMV8_A64_UBFIZ,
583 OP_ARMV8_A64_UBFM,
584 OP_ARMV8_A64_UBFX,
585 OP_ARMV8_A64_UCVTF,
586 OP_ARMV8_A64_UDF,
587 OP_ARMV8_A64_UDIV,
588 OP_ARMV8_A64_UMADDL,
589 OP_ARMV8_A64_UMAX,
590 OP_ARMV8_A64_UMIN,
591 OP_ARMV8_A64_UMNEGL,
592 OP_ARMV8_A64_UMSUBL,
593 OP_ARMV8_A64_UMULH,
594 OP_ARMV8_A64_UMULL,
595 OP_ARMV8_A64_UXTB,
596 OP_ARMV8_A64_UXTH,
597 OP_ARMV8_A64_WFE,
598 OP_ARMV8_A64_WFET,
599 OP_ARMV8_A64_WFI,
600 OP_ARMV8_A64_WFIT,
601 OP_ARMV8_A64_XAFLAG,
602 OP_ARMV8_A64_XPACD,
603 OP_ARMV8_A64_XPACI,
604 OP_ARMV8_A64_XPACLRI,
605 OP_ARMV8_A64_YIELD,
606 /** @} */
607
608 OP_ARMV8_END_OF_OPCODES
609};
610
611
612/** Armv8 Condition codes. */
613typedef enum DISARMV8INSTRCOND
614{
615 kDisArmv8InstrCond_Eq = 0, /**< 0 - Equal - Zero set. */
616 kDisArmv8InstrCond_Ne, /**< 1 - Not equal - Zero clear. */
617
618 kDisArmv8InstrCond_Cs, /**< 2 - Carry set (also known as 'HS'). */
619 kDisArmv8InstrCond_Hs = kDisArmv8InstrCond_Cs, /**< 2 - Unsigned higher or same. */
620 kDisArmv8InstrCond_Cc, /**< 3 - Carry clear (also known as 'LO'). */
621 kDisArmv8InstrCond_Lo = kDisArmv8InstrCond_Cc, /**< 3 - Unsigned lower. */
622
623 kDisArmv8InstrCond_Mi, /**< 4 - Negative result (minus). */
624 kDisArmv8InstrCond_Pl, /**< 5 - Positive or zero result (plus). */
625
626 kDisArmv8InstrCond_Vs, /**< 6 - Overflow set. */
627 kDisArmv8InstrCond_Vc, /**< 7 - Overflow clear. */
628
629 kDisArmv8InstrCond_Hi, /**< 8 - Unsigned higher. */
630 kDisArmv8InstrCond_Ls, /**< 9 - Unsigned lower or same. */
631
632 kDisArmv8InstrCond_Ge, /**< a - Signed greater or equal. */
633 kDisArmv8InstrCond_Lt, /**< b - Signed less than. */
634
635 kDisArmv8InstrCond_Gt, /**< c - Signed greater than. */
636 kDisArmv8InstrCond_Le, /**< d - Signed less or equal. */
637
638 kDisArmv8InstrCond_Al, /**< e - Condition is always true. */
639 kDisArmv8InstrCond_Al1 /**< f - Condition is always true. */
640} DISARMV8INSTRCOND;
641
642
643/** Armv8 PState fields. */
644typedef enum DISARMV8INSTRPSTATE
645{
646 kDisArmv8InstrPState_SPSel = 0,
647 kDisArmv8InstrPState_DAIFSet,
648 kDisArmv8InstrPState_DAIFClr,
649 kDisArmv8InstrPState_UAO,
650 kDisArmv8InstrPState_PAN,
651 kDisArmv8InstrPState_ALLINT,
652 kDisArmv8InstrPState_PM,
653 kDisArmv8InstrPState_SSBS,
654 kDisArmv8InstrPState_DIT,
655 kDisArmv8InstrPState_SVCRSM,
656 kDisArmv8InstrPState_SVCRZA,
657 kDisArmv8InstrPState_SVCRSMZA,
658 kDisArmv8InstrPState_TCO
659} DISARMV8INSTRPSTATE;
660
661
662/**
663 * Floating point types.
664 */
665typedef enum DISARMV8INSTRFPTYPE
666{
667 kDisArmv8InstrFpType_Invalid = 0,
668 kDisArmv8InstrFpType_Single,
669 kDisArmv8InstrFpType_Double,
670 kDisArmv8InstrFpType_Half
671} DISARMV8INSTRFPTYPE;
672
673
674/** @defgroup grp_dis_opparam_armv8 Opcode parameters (DISOPCODE::fParam1,
675 * DISOPCODE::fParam2, DISOPCODE::fParam3)
676 * @ingroup grp_dis
677 * @{
678 */
679
680/**
681 * Basic parameter type.
682 */
683typedef enum DISARMV8OPPARM
684{
685 /** Parameter is not used. */
686 kDisArmv8OpParmNone = 0,
687 /** Immediate value. */
688 kDisArmv8OpParmImm,
689 /** Relative address immediate. */
690 kDisArmv8OpParmImmRel,
691 /** Register. */
692 kDisArmv8OpParmReg,
693 /** System register. */
694 kDisArmv8OpParmSysReg,
695 /** Accessing memory from address in base register + potential offset. */
696 kDisArmv8OpParmAddrInGpr,
697 /** Conditional as parameter (CCMN/CCMP). */
698 kDisArmv8OpParmCond,
699 /** PSTATE field (specific to MSR). */
700 kDisArmv8OpParmPState
701} DISARMV8OPPARM;
702
703
704/**
705 * Extend types.
706 */
707typedef enum DISARMV8OPPARMEXTEND
708{
709 /** No shift applied. */
710 kDisArmv8OpParmExtendNone = 0,
711 /** Left shift applied. */
712 kDisArmv8OpParmExtendLsl,
713 /** Right shift applied. */
714 kDisArmv8OpParmExtendLsr,
715 /** Arithmetic right shift applied. */
716 kDisArmv8OpParmExtendAsr,
717 /** Rotation applied. */
718 kDisArmv8OpParmExtendRor,
719 /** @todo Document. */
720 kDisArmv8OpParmExtendUxtB,
721 kDisArmv8OpParmExtendUxtH,
722 kDisArmv8OpParmExtendUxtW,
723 kDisArmv8OpParmExtendUxtX,
724 kDisArmv8OpParmExtendSxtB,
725 kDisArmv8OpParmExtendSxtH,
726 kDisArmv8OpParmExtendSxtW,
727 kDisArmv8OpParmExtendSxtX
728} DISARMV8OPPARMEXTEND;
729/** @} */
730
731/** @} */
732
733#endif /* !VBOX_INCLUDED_disopcode_armv8_h */
734
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