| 1 | /** @file
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| 2 | * Disassembler - Opcodes
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| 3 | */
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| 4 |
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| 5 | /*
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| 6 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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| 7 | *
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| 8 | * This file is part of VirtualBox base platform packages, as
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| 9 | * available from https://www.virtualbox.org.
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| 10 | *
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| 11 | * This program is free software; you can redistribute it and/or
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| 12 | * modify it under the terms of the GNU General Public License
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| 13 | * as published by the Free Software Foundation, in version 3 of the
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| 14 | * License.
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| 15 | *
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| 16 | * This program is distributed in the hope that it will be useful, but
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 19 | * General Public License for more details.
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| 20 | *
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| 21 | * You should have received a copy of the GNU General Public License
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| 22 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 23 | *
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| 24 | * The contents of this file may alternatively be used under the terms
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| 25 | * of the Common Development and Distribution License Version 1.0
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| 26 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 27 | * in the VirtualBox distribution, in which case the provisions of the
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| 28 | * CDDL are applicable instead of those of the GPL.
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| 29 | *
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| 30 | * You may elect to license modified versions of this file under the
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| 31 | * terms and conditions of either the GPL or the CDDL or both.
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| 32 | *
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| 33 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 34 | */
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| 35 |
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| 36 | #ifndef VBOX_INCLUDED_disopcode_x86_amd64_h
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| 37 | #define VBOX_INCLUDED_disopcode_x86_amd64_h
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| 38 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 39 | # pragma once
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| 40 | #endif
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| 41 |
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| 42 | #include <iprt/assert.h>
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| 43 |
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| 44 | #define MODRM_MOD(a) (a>>6)
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| 45 | #define MODRM_REG(a) ((a>>3)&0x7)
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| 46 | #define MODRM_RM(a) (a&0x7)
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| 47 | #define MAKE_MODRM(mod, reg, rm) (((mod&3) << 6) | ((reg&7) << 3) | (rm&7))
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| 48 |
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| 49 | #define SIB_SCALE(a) (a>>6)
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| 50 | #define SIB_INDEX(a) ((a>>3)&0x7)
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| 51 | #define SIB_BASE(a) (a&0x7)
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| 52 |
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| 53 |
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| 54 | /** @defgroup grp_dis_opcodes Opcodes (DISOPCODEX86::uOpCode)
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| 55 | * @ingroup grp_dis
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| 56 | * @{
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| 57 | */
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| 58 | enum OPCODESX86
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| 59 | {
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| 60 | /** @name Full Intel X86 opcode list
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| 61 | * @{ */
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| 62 | OP_INVALID = 0,
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| 63 | OP_OPSIZE,
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| 64 | OP_ADDRSIZE,
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| 65 | OP_SEG,
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| 66 | OP_REPNE,
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| 67 | OP_REPE,
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| 68 | OP_REX,
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| 69 | OP_LOCK,
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| 70 | #ifndef IN_SLICKEDIT
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| 71 | OP_LAST_PREFIX = OP_LOCK, /**< Last prefix for disassembler. */
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| 72 | #else
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| 73 | OP_LAST_PREFIX = 7, /**< Last prefix for disassembler. */
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| 74 | #endif
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| 75 | OP_AND,
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| 76 | OP_OR,
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| 77 | OP_DAA,
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| 78 | OP_SUB,
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| 79 | OP_DAS,
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| 80 | OP_XOR,
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| 81 | OP_AAA,
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| 82 | OP_CMP,
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| 83 | OP_IMM_GRP1,
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| 84 | OP_AAS,
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| 85 | OP_INC,
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| 86 | OP_DEC,
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| 87 | OP_PUSHA,
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| 88 | OP_POPA,
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| 89 | OP_BOUND,
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| 90 | OP_ARPL,
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| 91 | OP_PUSH,
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| 92 | OP_POP,
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| 93 | OP_IMUL,
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| 94 | OP_INSB,
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| 95 | OP_INSWD,
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| 96 | OP_OUTSB,
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| 97 | OP_OUTSWD,
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| 98 | OP_JO,
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| 99 | OP_JNO,
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| 100 | OP_JC,
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| 101 | OP_JNC,
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| 102 | OP_JE,
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| 103 | OP_JNE,
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| 104 | OP_JBE,
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| 105 | OP_JNBE,
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| 106 | OP_JS,
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| 107 | OP_JNS,
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| 108 | OP_JP,
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| 109 | OP_JNP,
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| 110 | OP_JL,
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| 111 | OP_JNL,
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| 112 | OP_JLE,
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| 113 | OP_JNLE,
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| 114 | OP_ADD,
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| 115 | OP_TEST,
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| 116 | OP_XCHG,
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| 117 | OP_MOV,
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| 118 | OP_LEA,
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| 119 | OP_NOP,
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| 120 | OP_CBW,
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| 121 | OP_CWD,
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| 122 | OP_CALL,
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| 123 | OP_WAIT,
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| 124 | OP_PUSHF,
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| 125 | OP_POPF,
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| 126 | OP_SAHF,
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| 127 | OP_LAHF,
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| 128 | OP_MOVSB,
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| 129 | OP_MOVSWD,
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| 130 | OP_CMPSB,
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| 131 | OP_CMPWD,
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| 132 | OP_STOSB,
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| 133 | OP_STOSWD,
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| 134 | OP_LODSB,
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| 135 | OP_LODSWD,
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| 136 | OP_SCASB,
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| 137 | OP_SCASWD,
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| 138 | OP_SHIFT_GRP2,
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| 139 | OP_RETN,
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| 140 | OP_LES,
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| 141 | OP_LDS,
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| 142 | OP_ENTER,
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| 143 | OP_LEAVE,
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| 144 | OP_RETF,
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| 145 | OP_INT1,
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| 146 | OP_INT3,
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| 147 | OP_INT,
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| 148 | OP_INTO,
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| 149 | OP_IRET,
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| 150 | OP_AAM,
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| 151 | OP_AAD,
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| 152 | OP_SALC,
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| 153 | OP_XLAT,
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| 154 | OP_ESCF0,
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| 155 | OP_ESCF1,
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| 156 | OP_ESCF2,
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| 157 | OP_ESCF3,
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| 158 | OP_ESCF4,
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| 159 | OP_ESCF5,
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| 160 | OP_ESCF6,
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| 161 | OP_ESCF7,
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| 162 | OP_LOOPNE,
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| 163 | OP_LOOPE,
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| 164 | OP_LOOP,
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| 165 | OP_JECXZ,
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| 166 | OP_IN,
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| 167 | OP_OUT,
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| 168 | OP_JMP,
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| 169 | OP_2B_ESC,
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| 170 | OP_ADC,
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| 171 | OP_SBB,
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| 172 | OP_HLT,
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| 173 | OP_CMC,
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| 174 | OP_UNARY_GRP3,
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| 175 | OP_CLC,
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| 176 | OP_STC,
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| 177 | OP_CLI,
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| 178 | OP_STI,
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| 179 | OP_CLD,
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| 180 | OP_STD,
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| 181 | OP_CLAC,
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| 182 | OP_STAC,
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| 183 | OP_INC_GRP4,
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| 184 | OP_IND_GRP5,
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| 185 | OP_GRP6,
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| 186 | OP_GRP7,
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| 187 | OP_LAR,
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| 188 | OP_LSL,
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| 189 | OP_SYSCALL,
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| 190 | OP_CLTS,
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| 191 | OP_SYSRET,
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| 192 | OP_INVD,
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| 193 | OP_WBINVD,
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| 194 | OP_ILLUD2,
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| 195 | OP_FEMMS,
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| 196 | OP_3DNOW,
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| 197 | OP_MOVUPS,
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| 198 | OP_MOVLPS,
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| 199 | OP_MOVHLPS = OP_MOVLPS, /**< @todo OP_MOVHLPS */
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| 200 | OP_UNPCKLPS,
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| 201 | OP_MOVHPS,
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| 202 | OP_MOVLHPS = OP_MOVHPS, /**< @todo OP_MOVLHPS */
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| 203 | OP_UNPCKHPS,
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| 204 | OP_PREFETCH_GRP16,
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| 205 | OP_MOV_CR,
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| 206 | OP_MOVAPS,
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| 207 | OP_CVTPI2PS,
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| 208 | OP_MOVNTPS,
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| 209 | OP_CVTTPS2PI,
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| 210 | OP_CVTPS2PI,
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| 211 | OP_UCOMISS,
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| 212 | OP_COMISS,
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| 213 | OP_WRMSR,
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| 214 | OP_RDTSC,
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| 215 | OP_RDTSCP,
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| 216 | OP_RDMSR,
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| 217 | OP_RDPMC,
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| 218 | OP_SYSENTER,
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| 219 | OP_SYSEXIT,
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| 220 | OP_GETSEC,
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| 221 | OP_PAUSE,
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| 222 | OP_CMOVO,
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| 223 | OP_CMOVNO,
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| 224 | OP_CMOVC,
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| 225 | OP_CMOVNC,
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| 226 | OP_CMOVZ,
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| 227 | OP_CMOVNZ,
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| 228 | OP_CMOVBE,
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| 229 | OP_CMOVNBE,
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| 230 | OP_CMOVS,
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| 231 | OP_CMOVNS,
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| 232 | OP_CMOVP,
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| 233 | OP_CMOVNP,
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| 234 | OP_CMOVL,
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| 235 | OP_CMOVNL,
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| 236 | OP_CMOVLE,
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| 237 | OP_CMOVNLE,
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| 238 | OP_MOVMSKPS,
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| 239 | OP_SQRTPS,
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| 240 | OP_RSQRTPS,
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| 241 | OP_RCPPS,
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| 242 | OP_ANDPS,
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| 243 | OP_ANDNPS,
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| 244 | OP_ORPS,
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| 245 | OP_XORPS,
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| 246 | OP_ADDPS,
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| 247 | OP_MULPS,
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| 248 | OP_CVTPS2PD,
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| 249 | OP_CVTDQ2PS,
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| 250 | OP_SUBPS,
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| 251 | OP_MINPS,
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| 252 | OP_DIVPS,
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| 253 | OP_MAXPS,
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| 254 | OP_PUNPCKLBW,
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| 255 | OP_PUNPCKLWD,
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| 256 | OP_PUNPCKLDQ,
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| 257 | OP_PACKSSWB,
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| 258 | OP_PCMPGTB,
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| 259 | OP_PCMPGTW,
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| 260 | OP_PCMPGTD,
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| 261 | OP_PCMPGTQ,
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| 262 | OP_PACKUSWB,
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| 263 | OP_PUNPCKHBW,
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| 264 | OP_PUNPCKHWD,
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| 265 | OP_PUNPCKHDQ,
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| 266 | OP_PACKSSDW,
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| 267 | OP_MOVD,
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| 268 | OP_MOVQ,
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| 269 | OP_PSHUFW,
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| 270 | OP_3B_ESC4,
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| 271 | OP_3B_ESC5,
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| 272 | OP_PCMPEQB,
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| 273 | OP_PCMPEQW,
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| 274 | OP_PCMPEQD,
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| 275 | OP_PCMPEQQ,
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| 276 | OP_SETO,
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| 277 | OP_SETNO,
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| 278 | OP_SETC,
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| 279 | OP_SETNC,
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| 280 | OP_SETE,
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| 281 | OP_SETNE,
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| 282 | OP_SETBE,
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| 283 | OP_SETNBE,
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| 284 | OP_SETS,
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| 285 | OP_SETNS,
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| 286 | OP_SETP,
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| 287 | OP_SETNP,
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| 288 | OP_SETL,
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| 289 | OP_SETNL,
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| 290 | OP_SETLE,
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| 291 | OP_SETNLE,
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| 292 | OP_CPUID,
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| 293 | OP_BT,
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| 294 | OP_SHLD,
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| 295 | OP_RSM,
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| 296 | OP_BTS,
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| 297 | OP_SHRD,
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| 298 | OP_GRP15,
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| 299 | OP_CMPXCHG,
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| 300 | OP_LSS,
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| 301 | OP_BTR,
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| 302 | OP_LFS,
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| 303 | OP_LGS,
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| 304 | OP_MOVZX,
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| 305 | OP_GRP10_INV,
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| 306 | OP_GRP8,
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| 307 | OP_BTC,
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| 308 | OP_BSF,
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| 309 | OP_BSR,
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| 310 | OP_MOVSX,
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| 311 | OP_XADD,
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| 312 | OP_CMPPS,
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| 313 | OP_MOVNTI,
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| 314 | OP_PINSRW,
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| 315 | OP_PEXTRW,
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| 316 | OP_SHUFPS,
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| 317 | OP_GRP9,
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| 318 | OP_BSWAP,
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| 319 | OP_ADDSUBPS,
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| 320 | OP_ADDSUBPD,
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| 321 | OP_PSRLW,
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| 322 | OP_PSRLD,
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| 323 | OP_PSRLQ,
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| 324 | OP_PADDQ,
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| 325 | OP_PMULLW,
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| 326 | OP_PMOVMSKB,
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| 327 | OP_PSUBUSB,
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| 328 | OP_PSUBUSW,
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| 329 | OP_PMINUB,
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| 330 | OP_PAND,
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| 331 | OP_PADDUSB,
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| 332 | OP_PADDUSW,
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| 333 | OP_PMAXUB,
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| 334 | OP_PANDN,
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| 335 | OP_PAVGB,
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| 336 | OP_PSRAW,
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| 337 | OP_PSRAD,
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| 338 | OP_PAVGW,
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| 339 | OP_PMULHUW,
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| 340 | OP_PMULHW,
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| 341 | OP_MOVNTQ,
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| 342 | OP_PSUBSB,
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| 343 | OP_PSUBSW,
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| 344 | OP_PMINSW,
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| 345 | OP_POR,
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| 346 | OP_PADDSB,
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| 347 | OP_PADDSW,
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| 348 | OP_PMAXSW,
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| 349 | OP_PXOR,
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| 350 | OP_LDDQU,
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| 351 | OP_PSLLW,
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| 352 | OP_PSLLD,
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| 353 | OP_PSSQ,
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| 354 | OP_PMULUDQ,
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| 355 | OP_PMADDWD,
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| 356 | OP_PSADBW,
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| 357 | OP_MASKMOVQ,
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| 358 | OP_PSUBB,
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| 359 | OP_PSUBW,
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| 360 | OP_PSUBD,
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| 361 | OP_PSUBQ,
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| 362 | OP_PADDB,
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| 363 | OP_PADDW,
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| 364 | OP_PADDD,
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| 365 | OP_MOVUPD,
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| 366 | OP_MOVLPD,
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| 367 | OP_UNPCKLPD,
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| 368 | OP_UNPCKHPD,
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| 369 | OP_MOVHPD,
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| 370 | OP_MOVAPD,
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| 371 | OP_CVTPI2PD,
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| 372 | OP_MOVNTPD,
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| 373 | OP_CVTTPD2PI,
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| 374 | OP_CVTPD2PI,
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| 375 | OP_UCOMISD,
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| 376 | OP_COMISD,
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| 377 | OP_MOVMSKPD,
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| 378 | OP_SQRTPD,
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| 379 | OP_ANDPD,
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| 380 | OP_ANDNPD,
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| 381 | OP_ORPD,
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| 382 | OP_XORPD,
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| 383 | OP_ADDPD,
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| 384 | OP_MULPD,
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| 385 | OP_CVTPD2PS,
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| 386 | OP_CVTPS2DQ,
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| 387 | OP_SUBPD,
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| 388 | OP_MINPD,
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| 389 | OP_DIVPD,
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| 390 | OP_MAXPD,
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| 391 | OP_GRP12,
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| 392 | OP_GRP13,
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| 393 | OP_GRP14,
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| 394 | OP_GRP17,
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| 395 | OP_EMMS,
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| 396 | OP_MMX_UD78,
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| 397 | OP_MMX_UD79,
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| 398 | OP_MMX_UD7A,
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| 399 | OP_MMX_UD7B,
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| 400 | OP_MMX_UD7C,
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| 401 | OP_MMX_UD7D,
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| 402 | OP_PUNPCKLQDQ,
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| 403 | OP_PUNPCKHQDQ,
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| 404 | OP_MOVDQA,
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| 405 | OP_PSHUFD,
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| 406 | OP_CMPPD,
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| 407 | OP_SHUFPD,
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| 408 | OP_CVTTPD2DQ,
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| 409 | OP_MOVNTDQ,
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| 410 | OP_MOVNTDQA,
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| 411 | OP_PACKUSDW,
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| 412 | OP_PSHUFB,
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| 413 | OP_PHADDW,
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| 414 | OP_PHADDD,
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| 415 | OP_PHADDSW,
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| 416 | OP_HADDPS,
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| 417 | OP_HADDPD,
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| 418 | OP_PMADDUBSW,
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| 419 | OP_PHSUBW,
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| 420 | OP_PHSUBD,
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| 421 | OP_PHSUBSW,
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| 422 | OP_HSUBPS,
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| 423 | OP_HSUBPD,
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| 424 | OP_PSIGNB,
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| 425 | OP_PSIGNW,
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| 426 | OP_PSIGND,
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| 427 | OP_PMULHRSW,
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| 428 | OP_PERMILPS,
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| 429 | OP_PERMILPD,
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| 430 | OP_TESTPS,
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| 431 | OP_TESTPD,
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| 432 | OP_PBLENDVB,
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| 433 | OP_CVTPH2PS,
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| 434 | OP_BLENDVPS,
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| 435 | OP_BLENDVPD,
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| 436 | OP_PERMPS,
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| 437 | OP_PERMD,
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| 438 | OP_PTEST,
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| 439 | OP_BROADCASTSS,
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| 440 | OP_BROADCASTSD,
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| 441 | OP_BROADCASTF128,
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| 442 | OP_PABSB,
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| 443 | OP_PABSW,
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|---|
| 444 | OP_PABSD,
|
|---|
| 445 | OP_PMOVSXBW,
|
|---|
| 446 | OP_PMOVSXBD,
|
|---|
| 447 | OP_PMOVSXBQ,
|
|---|
| 448 | OP_PMOVSXWD,
|
|---|
| 449 | OP_PMOVSXWQ,
|
|---|
| 450 | OP_PMOVSXDQ,
|
|---|
| 451 | OP_PMOVZXBW,
|
|---|
| 452 | OP_PMOVZXBD,
|
|---|
| 453 | OP_PMOVZXBQ,
|
|---|
| 454 | OP_PMOVZXWD,
|
|---|
| 455 | OP_PMOVZXWQ,
|
|---|
| 456 | OP_PMOVZXDQ,
|
|---|
| 457 | OP_PMULDQ,
|
|---|
| 458 | OP_PMINSB,
|
|---|
| 459 | OP_PMINSD,
|
|---|
| 460 | OP_PMINUW,
|
|---|
| 461 | OP_PMINUD,
|
|---|
| 462 | OP_PMAXSB,
|
|---|
| 463 | OP_PMAXSD,
|
|---|
| 464 | OP_PMAXUW,
|
|---|
| 465 | OP_PMAXUD,
|
|---|
| 466 | OP_PMULLD,
|
|---|
| 467 | OP_PHMINPOSUW,
|
|---|
| 468 | OP_PSRLVD,
|
|---|
| 469 | OP_PSRAVD,
|
|---|
| 470 | OP_PSLLVD,
|
|---|
| 471 | OP_PBROADCASTD,
|
|---|
| 472 | OP_PBROADCASTQ,
|
|---|
| 473 | OP_PBROADCASTI128,
|
|---|
| 474 | OP_PBROADCASTB,
|
|---|
| 475 | OP_PBROADCASTW,
|
|---|
| 476 | OP_PMASKMOVD,
|
|---|
| 477 | OP_GATHER,
|
|---|
| 478 | OP_FMADDSUB132PS,
|
|---|
| 479 | OP_FMSUBADD132PS,
|
|---|
| 480 | OP_FMADD132PS,
|
|---|
| 481 | OP_FMADD132SS,
|
|---|
| 482 | OP_FMSUB132PS,
|
|---|
| 483 | OP_FMSUB132SS,
|
|---|
| 484 | OP_FNMADD132PS,
|
|---|
| 485 | OP_FNMADD132SS,
|
|---|
| 486 | OP_FNMSUB132PS,
|
|---|
| 487 | OP_FNMSUB132SS,
|
|---|
| 488 | OP_FMADDSUB213PS,
|
|---|
| 489 | OP_FMSUBADD213PS,
|
|---|
| 490 | OP_FMADD213PS,
|
|---|
| 491 | OP_FMADD213SS,
|
|---|
| 492 | OP_FMSUB213PS,
|
|---|
| 493 | OP_FMSUB213SS,
|
|---|
| 494 | OP_FNMADD213PS,
|
|---|
| 495 | OP_FNMADD213SS,
|
|---|
| 496 | OP_FNMSUB213PS,
|
|---|
| 497 | OP_FNMSUB213SS,
|
|---|
| 498 | OP_FMADDSUB231PS,
|
|---|
| 499 | OP_FMSUBADD231PS,
|
|---|
| 500 | OP_FMADD231PS,
|
|---|
| 501 | OP_FMADD231SS,
|
|---|
| 502 | OP_FMSUB231PS,
|
|---|
| 503 | OP_FMSUB231SS,
|
|---|
| 504 | OP_FNMADD231PS,
|
|---|
| 505 | OP_FNMADD231SS,
|
|---|
| 506 | OP_FNMSUB231PS,
|
|---|
| 507 | OP_FNMSUB231SS,
|
|---|
| 508 | OP_AESIMC,
|
|---|
| 509 | OP_AESENC,
|
|---|
| 510 | OP_AESENCLAST,
|
|---|
| 511 | OP_AESDEC,
|
|---|
| 512 | OP_AESDECLAST,
|
|---|
| 513 | OP_MOVBEGM,
|
|---|
| 514 | OP_MOVBEMG,
|
|---|
| 515 | OP_CRC32,
|
|---|
| 516 | OP_POPCNT,
|
|---|
| 517 | OP_TZCNT,
|
|---|
| 518 | OP_LZCNT,
|
|---|
| 519 | OP_ADCX,
|
|---|
| 520 | OP_ADOX,
|
|---|
| 521 | OP_ANDN,
|
|---|
| 522 | OP_BZHI,
|
|---|
| 523 | OP_BEXTR,
|
|---|
| 524 | OP_BLSR,
|
|---|
| 525 | OP_BLSMSK,
|
|---|
| 526 | OP_BLSI,
|
|---|
| 527 | OP_PEXT,
|
|---|
| 528 | OP_PDEP,
|
|---|
| 529 | OP_SHLX,
|
|---|
| 530 | OP_SHRX,
|
|---|
| 531 | OP_SARX,
|
|---|
| 532 | OP_MULX,
|
|---|
| 533 | OP_MASKMOVDQU,
|
|---|
| 534 | OP_MASKMOVPS,
|
|---|
| 535 | OP_MASKMOVPD,
|
|---|
| 536 | OP_MOVSD,
|
|---|
| 537 | OP_CVTSI2SD,
|
|---|
| 538 | OP_CVTTSD2SI,
|
|---|
| 539 | OP_CVTSD2SI,
|
|---|
| 540 | OP_SQRTSD,
|
|---|
| 541 | OP_ADDSD,
|
|---|
| 542 | OP_MULSD,
|
|---|
| 543 | OP_CVTSD2SS,
|
|---|
| 544 | OP_SUBSD,
|
|---|
| 545 | OP_MINSD,
|
|---|
| 546 | OP_DIVSD,
|
|---|
| 547 | OP_MAXSD,
|
|---|
| 548 | OP_PSHUFLW,
|
|---|
| 549 | OP_CMPSD,
|
|---|
| 550 | OP_MOVDQ2Q,
|
|---|
| 551 | OP_CVTPD2DQ,
|
|---|
| 552 | OP_MOVSS,
|
|---|
| 553 | OP_MOVSLDUP,
|
|---|
| 554 | OP_MOVDDUP,
|
|---|
| 555 | OP_MOVSHDUP,
|
|---|
| 556 | OP_CVTSI2SS,
|
|---|
| 557 | OP_CVTTSS2SI,
|
|---|
| 558 | OP_CVTSS2SI,
|
|---|
| 559 | OP_CVTSS2SD,
|
|---|
| 560 | OP_SQRTSS,
|
|---|
| 561 | OP_RSQRTSS,
|
|---|
| 562 | OP_RCPSS,
|
|---|
| 563 | OP_ADDSS,
|
|---|
| 564 | OP_MULSS,
|
|---|
| 565 | OP_CVTTPS2DQ,
|
|---|
| 566 | OP_SUBSS,
|
|---|
| 567 | OP_MINSS,
|
|---|
| 568 | OP_DIVSS,
|
|---|
| 569 | OP_MAXSS,
|
|---|
| 570 | OP_MOVDQU,
|
|---|
| 571 | OP_PSHUFHW,
|
|---|
| 572 | OP_CMPSS,
|
|---|
| 573 | OP_MOVQ2DQ,
|
|---|
| 574 | OP_CVTDQ2PD,
|
|---|
| 575 | OP_PERMQ,
|
|---|
| 576 | OP_PERMPD,
|
|---|
| 577 | OP_PBLENDD,
|
|---|
| 578 | OP_PERM2F128,
|
|---|
| 579 | OP_ROUNDPS,
|
|---|
| 580 | OP_ROUNDPD,
|
|---|
| 581 | OP_ROUNDSS,
|
|---|
| 582 | OP_ROUNDSD,
|
|---|
| 583 | OP_BLENDPS,
|
|---|
| 584 | OP_BLENDPD,
|
|---|
| 585 | OP_PBLENDW,
|
|---|
| 586 | OP_PALIGNR,
|
|---|
| 587 | OP_PEXTRB,
|
|---|
| 588 | OP_PEXTRD,
|
|---|
| 589 | OP_PEXTRQ,
|
|---|
| 590 | OP_EXTRACTPS,
|
|---|
| 591 | OP_INSERTF128,
|
|---|
| 592 | OP_EXTRACTF128,
|
|---|
| 593 | OP_CVTPS2PH,
|
|---|
| 594 | OP_PINSRB,
|
|---|
| 595 | OP_PINSRD,
|
|---|
| 596 | OP_PINSRQ,
|
|---|
| 597 | OP_INSERTPS,
|
|---|
| 598 | OP_INSERTI128,
|
|---|
| 599 | OP_EXTRACTI128,
|
|---|
| 600 | OP_DPPS,
|
|---|
| 601 | OP_DPPD,
|
|---|
| 602 | OP_MPSADBW,
|
|---|
| 603 | OP_PCLMULQDQ,
|
|---|
| 604 | OP_PERM2I128,
|
|---|
| 605 | OP_PCMPESTRM,
|
|---|
| 606 | OP_PCMPESTRI,
|
|---|
| 607 | OP_PCMPISTRM,
|
|---|
| 608 | OP_PCMPISTRI,
|
|---|
| 609 | OP_AESKEYGEN,
|
|---|
| 610 | OP_RORX,
|
|---|
| 611 | OP_RDPID,
|
|---|
| 612 | OP_RDRAND,
|
|---|
| 613 | OP_RDSEED,
|
|---|
| 614 | OP_MOVBE,
|
|---|
| 615 | OP_SHA1NEXTE,
|
|---|
| 616 | OP_SHA1MSG1,
|
|---|
| 617 | OP_SHA1MSG2,
|
|---|
| 618 | OP_SHA256RNDS2,
|
|---|
| 619 | OP_SHA256MSG1,
|
|---|
| 620 | OP_SHA256MSG2,
|
|---|
| 621 | OP_SHA1RNDS4,
|
|---|
| 622 | OP_VEX3B,
|
|---|
| 623 | OP_VEX2B,
|
|---|
| 624 | OP_ENCLS,
|
|---|
| 625 | OP_ENCLU,
|
|---|
| 626 | OP_ENCLV,
|
|---|
| 627 | OP_XEND,
|
|---|
| 628 | OP_XTEST,
|
|---|
| 629 | /** @} */
|
|---|
| 630 |
|
|---|
| 631 | /** @name Floating point ops
|
|---|
| 632 | * @{ */
|
|---|
| 633 | OP_FADD,
|
|---|
| 634 | OP_FMUL,
|
|---|
| 635 | OP_FCOM,
|
|---|
| 636 | OP_FCOMP,
|
|---|
| 637 | OP_FSUB,
|
|---|
| 638 | OP_FSUBR,
|
|---|
| 639 | OP_FDIV,
|
|---|
| 640 | OP_FDIVR,
|
|---|
| 641 | OP_FLD,
|
|---|
| 642 | OP_FST,
|
|---|
| 643 | OP_FSTP,
|
|---|
| 644 | OP_FLDENV,
|
|---|
| 645 | OP_FSTENV,
|
|---|
| 646 | OP_FSTCW,
|
|---|
| 647 | OP_FXCH,
|
|---|
| 648 | OP_FNOP,
|
|---|
| 649 | OP_FCHS,
|
|---|
| 650 | OP_FABS,
|
|---|
| 651 | OP_FLD1,
|
|---|
| 652 | OP_FLDL2T,
|
|---|
| 653 | OP_FLDL2E,
|
|---|
| 654 | OP_FLDPI,
|
|---|
| 655 | OP_FLDLG2,
|
|---|
| 656 | OP_FLDLN2,
|
|---|
| 657 | OP_FLDZ,
|
|---|
| 658 | OP_F2XM1,
|
|---|
| 659 | OP_FYL2X,
|
|---|
| 660 | OP_FPTAN,
|
|---|
| 661 | OP_FPATAN,
|
|---|
| 662 | OP_FXTRACT,
|
|---|
| 663 | OP_FREM1,
|
|---|
| 664 | OP_FDECSTP,
|
|---|
| 665 | OP_FINCSTP,
|
|---|
| 666 | OP_FPREM,
|
|---|
| 667 | OP_FYL2XP1,
|
|---|
| 668 | OP_FSQRT,
|
|---|
| 669 | OP_FSINCOS,
|
|---|
| 670 | OP_FRNDINT,
|
|---|
| 671 | OP_FSCALE,
|
|---|
| 672 | OP_FSIN,
|
|---|
| 673 | OP_FCOS,
|
|---|
| 674 | OP_FIADD,
|
|---|
| 675 | OP_FIMUL,
|
|---|
| 676 | OP_FISUB,
|
|---|
| 677 | OP_FISUBR,
|
|---|
| 678 | OP_FIDIV,
|
|---|
| 679 | OP_FIDIVR,
|
|---|
| 680 | OP_FCMOVB,
|
|---|
| 681 | OP_FCMOVE,
|
|---|
| 682 | OP_FCMOVBE,
|
|---|
| 683 | OP_FCMOVU,
|
|---|
| 684 | OP_FUCOMPP,
|
|---|
| 685 | OP_FILD,
|
|---|
| 686 | OP_FIST,
|
|---|
| 687 | OP_FISTP,
|
|---|
| 688 | OP_FCMOVNB,
|
|---|
| 689 | OP_FCMOVNE,
|
|---|
| 690 | OP_FCMOVNBE,
|
|---|
| 691 | OP_FCMOVNU,
|
|---|
| 692 | OP_FCLEX,
|
|---|
| 693 | OP_FINIT,
|
|---|
| 694 | OP_FUCOMI,
|
|---|
| 695 | OP_FCOMI,
|
|---|
| 696 | OP_FRSTOR,
|
|---|
| 697 | OP_FSAVE,
|
|---|
| 698 | OP_FNSTSW,
|
|---|
| 699 | OP_FFREE,
|
|---|
| 700 | OP_FUCOM,
|
|---|
| 701 | OP_FUCOMP,
|
|---|
| 702 | OP_FICOM,
|
|---|
| 703 | OP_FICOMP,
|
|---|
| 704 | OP_FADDP,
|
|---|
| 705 | OP_FMULP,
|
|---|
| 706 | OP_FCOMPP,
|
|---|
| 707 | OP_FSUBRP,
|
|---|
| 708 | OP_FSUBP,
|
|---|
| 709 | OP_FDIVRP,
|
|---|
| 710 | OP_FDIVP,
|
|---|
| 711 | OP_FBLD,
|
|---|
| 712 | OP_FBSTP,
|
|---|
| 713 | OP_FCOMIP,
|
|---|
| 714 | OP_FUCOMIP,
|
|---|
| 715 | /** @} */
|
|---|
| 716 |
|
|---|
| 717 | /** @name 3DNow!
|
|---|
| 718 | * @{ */
|
|---|
| 719 | OP_PI2FW,
|
|---|
| 720 | OP_PI2FD,
|
|---|
| 721 | OP_PF2IW,
|
|---|
| 722 | OP_PF2ID,
|
|---|
| 723 | OP_PFPNACC,
|
|---|
| 724 | OP_PFCMPGE,
|
|---|
| 725 | OP_PFMIN,
|
|---|
| 726 | OP_PFRCP,
|
|---|
| 727 | OP_PFRSQRT,
|
|---|
| 728 | OP_PFSUB,
|
|---|
| 729 | OP_PFADD,
|
|---|
| 730 | OP_PFCMPGT,
|
|---|
| 731 | OP_PFMAX,
|
|---|
| 732 | OP_PFRCPIT1,
|
|---|
| 733 | OP_PFRSQRTIT1,
|
|---|
| 734 | OP_PFSUBR,
|
|---|
| 735 | OP_PFACC,
|
|---|
| 736 | OP_PFCMPEQ,
|
|---|
| 737 | OP_PFMUL,
|
|---|
| 738 | OP_PFRCPIT2,
|
|---|
| 739 | OP_PFMULHRW,
|
|---|
| 740 | OP_PFSWAPD,
|
|---|
| 741 | OP_PAVGUSB,
|
|---|
| 742 | OP_PFNACC,
|
|---|
| 743 | /** @} */
|
|---|
| 744 | OP_ROL,
|
|---|
| 745 | OP_ROR,
|
|---|
| 746 | OP_RCL,
|
|---|
| 747 | OP_RCR,
|
|---|
| 748 | OP_SHL,
|
|---|
| 749 | OP_SHR,
|
|---|
| 750 | OP_SAR,
|
|---|
| 751 | OP_NOT,
|
|---|
| 752 | OP_NEG,
|
|---|
| 753 | OP_MUL,
|
|---|
| 754 | OP_DIV,
|
|---|
| 755 | OP_IDIV,
|
|---|
| 756 | OP_SLDT,
|
|---|
| 757 | OP_STR,
|
|---|
| 758 | OP_LLDT,
|
|---|
| 759 | OP_LTR,
|
|---|
| 760 | OP_VERR,
|
|---|
| 761 | OP_VERW,
|
|---|
| 762 | OP_SGDT,
|
|---|
| 763 | OP_LGDT,
|
|---|
| 764 | OP_SIDT,
|
|---|
| 765 | OP_LIDT,
|
|---|
| 766 | OP_SMSW,
|
|---|
| 767 | OP_LMSW,
|
|---|
| 768 | OP_INVLPG,
|
|---|
| 769 | OP_CMPXCHG8B,
|
|---|
| 770 | OP_CMPXCHG16B,
|
|---|
| 771 | OP_PSLLQ,
|
|---|
| 772 | OP_PSRLDQ,
|
|---|
| 773 | OP_PSLLDQ,
|
|---|
| 774 | OP_FXSAVE,
|
|---|
| 775 | OP_FXRSTOR,
|
|---|
| 776 | OP_LDMXCSR,
|
|---|
| 777 | OP_STMXCSR,
|
|---|
| 778 | OP_XSAVE,
|
|---|
| 779 | OP_XSAVEOPT,
|
|---|
| 780 | OP_XRSTOR,
|
|---|
| 781 | OP_XGETBV,
|
|---|
| 782 | OP_XSETBV,
|
|---|
| 783 | OP_RDFSBASE,
|
|---|
| 784 | OP_RDGSBASE,
|
|---|
| 785 | OP_WRFSBASE,
|
|---|
| 786 | OP_WRGSBASE,
|
|---|
| 787 | OP_LFENCE,
|
|---|
| 788 | OP_MFENCE,
|
|---|
| 789 | OP_SFENCE,
|
|---|
| 790 | OP_PREFETCH,
|
|---|
| 791 | OP_MONITOR,
|
|---|
| 792 | OP_MWAIT,
|
|---|
| 793 | OP_CLFLUSH,
|
|---|
| 794 | OP_CLFLUSHOPT,
|
|---|
| 795 | OP_MOV_DR,
|
|---|
| 796 | OP_MOV_TR,
|
|---|
| 797 | OP_SWAPGS,
|
|---|
| 798 | OP_UD1,
|
|---|
| 799 | OP_UD2,
|
|---|
| 800 | /** @name VT-x instructions
|
|---|
| 801 | * @{ */
|
|---|
| 802 | OP_VMREAD,
|
|---|
| 803 | OP_VMWRITE,
|
|---|
| 804 | OP_VMCALL,
|
|---|
| 805 | OP_VMXON,
|
|---|
| 806 | OP_VMXOFF,
|
|---|
| 807 | OP_VMCLEAR,
|
|---|
| 808 | OP_VMLAUNCH,
|
|---|
| 809 | OP_VMRESUME,
|
|---|
| 810 | OP_VMPTRLD,
|
|---|
| 811 | OP_VMPTRST,
|
|---|
| 812 | OP_INVEPT,
|
|---|
| 813 | OP_INVVPID,
|
|---|
| 814 | OP_INVPCID,
|
|---|
| 815 | OP_VMFUNC,
|
|---|
| 816 | /** @} */
|
|---|
| 817 | /** @name AMD-V instructions
|
|---|
| 818 | * @{ */
|
|---|
| 819 | OP_VMMCALL,
|
|---|
| 820 | OP_VMRUN,
|
|---|
| 821 | OP_VMLOAD,
|
|---|
| 822 | OP_VMSAVE,
|
|---|
| 823 | OP_CLGI,
|
|---|
| 824 | OP_STGI,
|
|---|
| 825 | OP_INVLPGA,
|
|---|
| 826 | OP_SKINIT,
|
|---|
| 827 | /** @} */
|
|---|
| 828 | /** @name 64 bits instruction
|
|---|
| 829 | * @{ */
|
|---|
| 830 | OP_MOVSXD,
|
|---|
| 831 | /** @} */
|
|---|
| 832 | /** @name AVX instructions
|
|---|
| 833 | * @{ */
|
|---|
| 834 | /* Manual */
|
|---|
| 835 | OP_VSTMXCSR,
|
|---|
| 836 | OP_VLDMXCSR,
|
|---|
| 837 | OP_VPACKUSDW,
|
|---|
| 838 |
|
|---|
| 839 | /* Generated from tables: */
|
|---|
| 840 | OP_VADDPD,
|
|---|
| 841 | OP_VADDPS,
|
|---|
| 842 | OP_VADDSD,
|
|---|
| 843 | OP_VADDSS,
|
|---|
| 844 | OP_VADDSUBPD,
|
|---|
| 845 | OP_VADDSUBPS,
|
|---|
| 846 | OP_VAESDEC,
|
|---|
| 847 | OP_VAESDECLAST,
|
|---|
| 848 | OP_VAESENC,
|
|---|
| 849 | OP_VAESENCLAST,
|
|---|
| 850 | OP_VAESIMC,
|
|---|
| 851 | OP_VAESKEYGEN,
|
|---|
| 852 | OP_VANDNPD,
|
|---|
| 853 | OP_VANDNPS,
|
|---|
| 854 | OP_VANDPD,
|
|---|
| 855 | OP_VANDPS,
|
|---|
| 856 | OP_VBLENDPD,
|
|---|
| 857 | OP_VBLENDPS,
|
|---|
| 858 | OP_VBLENDVPD,
|
|---|
| 859 | OP_VBLENDVPS,
|
|---|
| 860 | OP_VBROADCASTF128,
|
|---|
| 861 | OP_VBROADCASTSD,
|
|---|
| 862 | OP_VBROADCASTSS,
|
|---|
| 863 | OP_VCMPPD,
|
|---|
| 864 | OP_VCMPPS,
|
|---|
| 865 | OP_VCMPSD,
|
|---|
| 866 | OP_VCMPSS,
|
|---|
| 867 | OP_VCOMISD,
|
|---|
| 868 | OP_VCOMISS,
|
|---|
| 869 | OP_VCVTDQ2PD,
|
|---|
| 870 | OP_VCVTDQ2PS,
|
|---|
| 871 | OP_VCVTPD2DQ,
|
|---|
| 872 | OP_VCVTPD2PS,
|
|---|
| 873 | OP_VCVTPH2PS,
|
|---|
| 874 | OP_VCVTPS2DQ,
|
|---|
| 875 | OP_VCVTPS2PD,
|
|---|
| 876 | OP_VCVTPS2PH,
|
|---|
| 877 | OP_VCVTSD2SS,
|
|---|
| 878 | OP_VCVTSI2SS,
|
|---|
| 879 | OP_VCVTSI2SD,
|
|---|
| 880 | OP_VCVTSS2SD,
|
|---|
| 881 | OP_VCVTSS2SI,
|
|---|
| 882 | OP_VCVTTPD2DQ,
|
|---|
| 883 | OP_VCVTTPS2DQ,
|
|---|
| 884 | OP_VCVTTSS2SI,
|
|---|
| 885 | OP_VDIVPD,
|
|---|
| 886 | OP_VDIVPS,
|
|---|
| 887 | OP_VDIVSD,
|
|---|
| 888 | OP_VDIVSS,
|
|---|
| 889 | OP_VDPPD,
|
|---|
| 890 | OP_VDPPS,
|
|---|
| 891 | OP_VEXTRACTF128,
|
|---|
| 892 | OP_VEXTRACTI128,
|
|---|
| 893 | OP_VEXTRACTPS,
|
|---|
| 894 | OP_VFMADD132PS,
|
|---|
| 895 | OP_VFMADD132SS,
|
|---|
| 896 | OP_VFMADD213PS,
|
|---|
| 897 | OP_VFMADD213SS,
|
|---|
| 898 | OP_VFMADD231PS,
|
|---|
| 899 | OP_VFMADD231SS,
|
|---|
| 900 | OP_VFMADDSUB132PS,
|
|---|
| 901 | OP_VFMADDSUB213PS,
|
|---|
| 902 | OP_VFMADDSUB231PS,
|
|---|
| 903 | OP_VFMSUB132PS,
|
|---|
| 904 | OP_VFMSUB132SS,
|
|---|
| 905 | OP_VFMSUB213PS,
|
|---|
| 906 | OP_VFMSUB213SS,
|
|---|
| 907 | OP_VFMSUB231PS,
|
|---|
| 908 | OP_VFMSUB231SS,
|
|---|
| 909 | OP_VFMSUBADD132PS,
|
|---|
| 910 | OP_VFMSUBADD213PS,
|
|---|
| 911 | OP_VFMSUBADD231PS,
|
|---|
| 912 | OP_VFNMADD132PS,
|
|---|
| 913 | OP_VFNMADD132SS,
|
|---|
| 914 | OP_VFNMADD213PS,
|
|---|
| 915 | OP_VFNMADD213SS,
|
|---|
| 916 | OP_VFNMADD231PS,
|
|---|
| 917 | OP_VFNMADD231SS,
|
|---|
| 918 | OP_VFNMSUB132PS,
|
|---|
| 919 | OP_VFNMSUB132SS,
|
|---|
| 920 | OP_VFNMSUB213PS,
|
|---|
| 921 | OP_VFNMSUB213SS,
|
|---|
| 922 | OP_VFNMSUB231PS,
|
|---|
| 923 | OP_VFNMSUB231SS,
|
|---|
| 924 | OP_VGATHER,
|
|---|
| 925 | OP_VHADDPD,
|
|---|
| 926 | OP_VHADDPS,
|
|---|
| 927 | OP_VHSUBPD,
|
|---|
| 928 | OP_VHSUBPS,
|
|---|
| 929 | OP_VINSERTF128,
|
|---|
| 930 | OP_VINSERTI128,
|
|---|
| 931 | OP_VINSERTPS,
|
|---|
| 932 | OP_VLDDQU,
|
|---|
| 933 | OP_VMASKMOVDQU,
|
|---|
| 934 | OP_VMASKMOVPD,
|
|---|
| 935 | OP_VMASKMOVPS,
|
|---|
| 936 | OP_VMAXPD,
|
|---|
| 937 | OP_VMAXPS,
|
|---|
| 938 | OP_VMAXSD,
|
|---|
| 939 | OP_VMAXSS,
|
|---|
| 940 | OP_VMINPD,
|
|---|
| 941 | OP_VMINPS,
|
|---|
| 942 | OP_VMINSD,
|
|---|
| 943 | OP_VMINSS,
|
|---|
| 944 | OP_VMOVAPD,
|
|---|
| 945 | OP_VMOVAPS,
|
|---|
| 946 | OP_VMOVD,
|
|---|
| 947 | OP_VMOVDDUP,
|
|---|
| 948 | OP_VMOVDQA,
|
|---|
| 949 | OP_VMOVDQU,
|
|---|
| 950 | OP_VMOVHPD,
|
|---|
| 951 | OP_VMOVHPS,
|
|---|
| 952 | OP_VMOVLHPS = OP_VMOVHPS, /**< @todo OP_VMOVHPS */
|
|---|
| 953 | OP_VMOVLPD,
|
|---|
| 954 | OP_VMOVLPS,
|
|---|
| 955 | OP_VMOVHLPS = OP_VMOVLPS, /**< @todo OP_VMOVLPS */
|
|---|
| 956 | OP_VMOVMSKPD,
|
|---|
| 957 | OP_VMOVMSKPS,
|
|---|
| 958 | OP_VMOVNTDQ,
|
|---|
| 959 | OP_VMOVNTDQA,
|
|---|
| 960 | OP_VMOVNTPD,
|
|---|
| 961 | OP_VMOVNTPS,
|
|---|
| 962 | OP_VMOVQ,
|
|---|
| 963 | OP_VMOVSD,
|
|---|
| 964 | OP_VMOVSHDUP,
|
|---|
| 965 | OP_VMOVSLDUP,
|
|---|
| 966 | OP_VMOVSS,
|
|---|
| 967 | OP_VMOVUPD,
|
|---|
| 968 | OP_VMOVUPS,
|
|---|
| 969 | OP_VMPSADBW,
|
|---|
| 970 | OP_VMULPD,
|
|---|
| 971 | OP_VMULPS,
|
|---|
| 972 | OP_VMULSD,
|
|---|
| 973 | OP_VMULSS,
|
|---|
| 974 | OP_VORPD,
|
|---|
| 975 | OP_VORPS,
|
|---|
| 976 | OP_VPABSB,
|
|---|
| 977 | OP_VPABSD,
|
|---|
| 978 | OP_VPABSW,
|
|---|
| 979 | OP_VPACKSSDW,
|
|---|
| 980 | OP_VPACKSSWB,
|
|---|
| 981 | OP_VPACKUSWB,
|
|---|
| 982 | OP_VPADDB,
|
|---|
| 983 | OP_VPADDD,
|
|---|
| 984 | OP_VPADDQ,
|
|---|
| 985 | OP_VPADDSB,
|
|---|
| 986 | OP_VPADDSW,
|
|---|
| 987 | OP_VPADDUSB,
|
|---|
| 988 | OP_VPADDUSW,
|
|---|
| 989 | OP_VPADDW,
|
|---|
| 990 | OP_VPALIGNR,
|
|---|
| 991 | OP_VPAND,
|
|---|
| 992 | OP_VPANDN,
|
|---|
| 993 | OP_VPAVGB,
|
|---|
| 994 | OP_VPAVGW,
|
|---|
| 995 | OP_VPBLENDD,
|
|---|
| 996 | OP_VPBLENDVB,
|
|---|
| 997 | OP_VPBLENDW,
|
|---|
| 998 | OP_VPBROADCASTB,
|
|---|
| 999 | OP_VPBROADCASTD,
|
|---|
| 1000 | OP_VBROADCASTI128,
|
|---|
| 1001 | OP_VPBROADCASTQ,
|
|---|
| 1002 | OP_VPBROADCASTW,
|
|---|
| 1003 | OP_VPCLMULQDQ,
|
|---|
| 1004 | OP_VPCMPEQB,
|
|---|
| 1005 | OP_VPCMPEQD,
|
|---|
| 1006 | OP_VPCMPEQQ,
|
|---|
| 1007 | OP_VPCMPEQW,
|
|---|
| 1008 | OP_VPCMPESTRI,
|
|---|
| 1009 | OP_VPCMPESTRM,
|
|---|
| 1010 | OP_VPCMPGTB,
|
|---|
| 1011 | OP_VPCMPGTD,
|
|---|
| 1012 | OP_VPCMPGTQ,
|
|---|
| 1013 | OP_VPCMPGTW,
|
|---|
| 1014 | OP_VPCMPISTRI,
|
|---|
| 1015 | OP_VPCMPISTRM,
|
|---|
| 1016 | OP_VPERM2F128,
|
|---|
| 1017 | OP_VPERM2I128,
|
|---|
| 1018 | OP_VPERMD,
|
|---|
| 1019 | OP_VPERMILPD,
|
|---|
| 1020 | OP_VPERMILPS,
|
|---|
| 1021 | OP_VPERMPD,
|
|---|
| 1022 | OP_VPERMPS,
|
|---|
| 1023 | OP_VPERMQ,
|
|---|
| 1024 | OP_VPEXTRB,
|
|---|
| 1025 | OP_VPEXTRD,
|
|---|
| 1026 | OP_VPEXTRW,
|
|---|
| 1027 | OP_VPEXTRQ,
|
|---|
| 1028 | OP_VPHADDD,
|
|---|
| 1029 | OP_VPHADDSW,
|
|---|
| 1030 | OP_VPHADDW,
|
|---|
| 1031 | OP_VPHMINPOSUW,
|
|---|
| 1032 | OP_VPHSUBD,
|
|---|
| 1033 | OP_VPHSUBSW,
|
|---|
| 1034 | OP_VPHSUBW,
|
|---|
| 1035 | OP_VPINSRB,
|
|---|
| 1036 | OP_VPINSRD,
|
|---|
| 1037 | OP_VPINSRW,
|
|---|
| 1038 | OP_VPINSRQ,
|
|---|
| 1039 | OP_VPMADDUBSW,
|
|---|
| 1040 | OP_VPMADDWD,
|
|---|
| 1041 | OP_VPMASKMOVD,
|
|---|
| 1042 | OP_VPMAXSB,
|
|---|
| 1043 | OP_VPMAXSD,
|
|---|
| 1044 | OP_VPMAXSW,
|
|---|
| 1045 | OP_VPMAXUB,
|
|---|
| 1046 | OP_VPMAXUD,
|
|---|
| 1047 | OP_VPMAXUW,
|
|---|
| 1048 | OP_VPMINSB,
|
|---|
| 1049 | OP_VPMINSD,
|
|---|
| 1050 | OP_VPMINSW,
|
|---|
| 1051 | OP_VPMINUB,
|
|---|
| 1052 | OP_VPMINUD,
|
|---|
| 1053 | OP_VPMINUW,
|
|---|
| 1054 | OP_VPMOVMSKB,
|
|---|
| 1055 | OP_VPMOVSXBW,
|
|---|
| 1056 | OP_VPMOVSXBD,
|
|---|
| 1057 | OP_VPMOVSXBQ,
|
|---|
| 1058 | OP_VPMOVSXWD,
|
|---|
| 1059 | OP_VPMOVSXWQ,
|
|---|
| 1060 | OP_VPMOVSXDQ,
|
|---|
| 1061 | OP_VPMOVZXBW,
|
|---|
| 1062 | OP_VPMOVZXBD,
|
|---|
| 1063 | OP_VPMOVZXBQ,
|
|---|
| 1064 | OP_VPMOVZXWD,
|
|---|
| 1065 | OP_VPMOVZXWQ,
|
|---|
| 1066 | OP_VPMOVZXDQ,
|
|---|
| 1067 | OP_VPMULDQ,
|
|---|
| 1068 | OP_VPMULHRSW,
|
|---|
| 1069 | OP_VPMULHUW,
|
|---|
| 1070 | OP_VPMULHW,
|
|---|
| 1071 | OP_VPMULLD,
|
|---|
| 1072 | OP_VPMULLW,
|
|---|
| 1073 | OP_VPMULUDQ,
|
|---|
| 1074 | OP_VPOR,
|
|---|
| 1075 | OP_VPSADBW,
|
|---|
| 1076 | OP_VPSHUFB,
|
|---|
| 1077 | OP_VPSHUFD,
|
|---|
| 1078 | OP_VPSHUFHW,
|
|---|
| 1079 | OP_VPSHUFLW,
|
|---|
| 1080 | OP_VPSIGNB,
|
|---|
| 1081 | OP_VPSIGND,
|
|---|
| 1082 | OP_VPSIGNW,
|
|---|
| 1083 | OP_VPSLLD,
|
|---|
| 1084 | OP_VPSLLQ,
|
|---|
| 1085 | OP_VPSLLDQ,
|
|---|
| 1086 | OP_VPSLLVD,
|
|---|
| 1087 | OP_VPSLLW,
|
|---|
| 1088 | OP_VPSRAD,
|
|---|
| 1089 | OP_VPSRAVD,
|
|---|
| 1090 | OP_VPSRAW,
|
|---|
| 1091 | OP_VPSRLD,
|
|---|
| 1092 | OP_VPSRLDQ,
|
|---|
| 1093 | OP_VPSRLQ,
|
|---|
| 1094 | OP_VPSRLVD,
|
|---|
| 1095 | OP_VPSRLW,
|
|---|
| 1096 | OP_VPSUBB,
|
|---|
| 1097 | OP_VPSUBD,
|
|---|
| 1098 | OP_VPSUBQ,
|
|---|
| 1099 | OP_VPSUBSB,
|
|---|
| 1100 | OP_VPSUBSW,
|
|---|
| 1101 | OP_VPSUBUSB,
|
|---|
| 1102 | OP_VPSUBUSW,
|
|---|
| 1103 | OP_VPSUBW,
|
|---|
| 1104 | OP_VPTEST,
|
|---|
| 1105 | OP_VPUNPCKHBW,
|
|---|
| 1106 | OP_VPUNPCKHDQ,
|
|---|
| 1107 | OP_VPUNPCKHQDQ,
|
|---|
| 1108 | OP_VPUNPCKHWD,
|
|---|
| 1109 | OP_VPUNPCKLBW,
|
|---|
| 1110 | OP_VPUNPCKLDQ,
|
|---|
| 1111 | OP_VPUNPCKLQDQ,
|
|---|
| 1112 | OP_VPUNPCKLWD,
|
|---|
| 1113 | OP_VPXOR,
|
|---|
| 1114 | OP_VRCPPS,
|
|---|
| 1115 | OP_VRCPSS,
|
|---|
| 1116 | OP_VROUNDPD,
|
|---|
| 1117 | OP_VROUNDPS,
|
|---|
| 1118 | OP_VROUNDSD,
|
|---|
| 1119 | OP_VROUNDSS,
|
|---|
| 1120 | OP_VRSQRTPS,
|
|---|
| 1121 | OP_VRSQRTSS,
|
|---|
| 1122 | OP_VSHUFPD,
|
|---|
| 1123 | OP_VSHUFPS,
|
|---|
| 1124 | OP_VSQRTPD,
|
|---|
| 1125 | OP_VSQRTPS,
|
|---|
| 1126 | OP_VSQRTSD,
|
|---|
| 1127 | OP_VSQRTSS,
|
|---|
| 1128 | OP_VSUBPD,
|
|---|
| 1129 | OP_VSUBPS,
|
|---|
| 1130 | OP_VSUBSD,
|
|---|
| 1131 | OP_VSUBSS,
|
|---|
| 1132 | OP_VTESTPD,
|
|---|
| 1133 | OP_VTESTPS,
|
|---|
| 1134 | OP_VUCOMISD,
|
|---|
| 1135 | OP_VUCOMISS,
|
|---|
| 1136 | OP_VUNPCKHPD,
|
|---|
| 1137 | OP_VUNPCKHPS,
|
|---|
| 1138 | OP_VUNPCKLPD,
|
|---|
| 1139 | OP_VUNPCKLPS,
|
|---|
| 1140 | OP_VVPACKUSDW,
|
|---|
| 1141 | OP_VXORPD,
|
|---|
| 1142 | OP_VXORPS,
|
|---|
| 1143 | OP_VZEROALL,
|
|---|
| 1144 |
|
|---|
| 1145 | /** @} */
|
|---|
| 1146 | OP_END_OF_OPCODES
|
|---|
| 1147 | };
|
|---|
| 1148 | AssertCompile(OP_LOCK == 7);
|
|---|
| 1149 | #if 0
|
|---|
| 1150 | AssertCompile(OP_END_OF_OPCODES < 1024 /* see 15 byte DISOPCODE variant */);
|
|---|
| 1151 | #endif
|
|---|
| 1152 | /** @} */
|
|---|
| 1153 |
|
|---|
| 1154 |
|
|---|
| 1155 | /** @defgroup grp_dis_opparam Opcode parameters (DISOPCODE::fParam1,
|
|---|
| 1156 | * DISOPCODE::fParam2, DISOPCODE::fParam3)
|
|---|
| 1157 | * @ingroup grp_dis
|
|---|
| 1158 | * @{
|
|---|
| 1159 | */
|
|---|
| 1160 |
|
|---|
| 1161 | /**
|
|---|
| 1162 | * @remarks Register order is important for translations!!
|
|---|
| 1163 | */
|
|---|
| 1164 | enum OP_PARM
|
|---|
| 1165 | {
|
|---|
| 1166 | OP_PARM_NONE,
|
|---|
| 1167 |
|
|---|
| 1168 | OP_PARM_REG_EAX,
|
|---|
| 1169 | OP_PARM_REG_GEN32_START = OP_PARM_REG_EAX,
|
|---|
| 1170 | OP_PARM_REG_ECX,
|
|---|
| 1171 | OP_PARM_REG_EDX,
|
|---|
| 1172 | OP_PARM_REG_EBX,
|
|---|
| 1173 | OP_PARM_REG_ESP,
|
|---|
| 1174 | OP_PARM_REG_EBP,
|
|---|
| 1175 | OP_PARM_REG_ESI,
|
|---|
| 1176 | OP_PARM_REG_EDI,
|
|---|
| 1177 | OP_PARM_REG_GEN32_END = OP_PARM_REG_EDI,
|
|---|
| 1178 |
|
|---|
| 1179 | OP_PARM_REG_ES,
|
|---|
| 1180 | OP_PARM_REG_SEG_START = OP_PARM_REG_ES,
|
|---|
| 1181 | OP_PARM_REG_CS,
|
|---|
| 1182 | OP_PARM_REG_SS,
|
|---|
| 1183 | OP_PARM_REG_DS,
|
|---|
| 1184 | OP_PARM_REG_FS,
|
|---|
| 1185 | OP_PARM_REG_GS,
|
|---|
| 1186 | OP_PARM_REG_SEG_END = OP_PARM_REG_GS,
|
|---|
| 1187 |
|
|---|
| 1188 | OP_PARM_REG_AX,
|
|---|
| 1189 | OP_PARM_REG_GEN16_START = OP_PARM_REG_AX,
|
|---|
| 1190 | OP_PARM_REG_CX,
|
|---|
| 1191 | OP_PARM_REG_DX,
|
|---|
| 1192 | OP_PARM_REG_BX,
|
|---|
| 1193 | OP_PARM_REG_SP,
|
|---|
| 1194 | OP_PARM_REG_BP,
|
|---|
| 1195 | OP_PARM_REG_SI,
|
|---|
| 1196 | OP_PARM_REG_DI,
|
|---|
| 1197 | OP_PARM_REG_GEN16_END = OP_PARM_REG_DI,
|
|---|
| 1198 |
|
|---|
| 1199 | OP_PARM_REG_AL,
|
|---|
| 1200 | OP_PARM_REG_GEN8_START = OP_PARM_REG_AL,
|
|---|
| 1201 | OP_PARM_REG_CL,
|
|---|
| 1202 | OP_PARM_REG_DL,
|
|---|
| 1203 | OP_PARM_REG_BL,
|
|---|
| 1204 | OP_PARM_REG_AH,
|
|---|
| 1205 | OP_PARM_REG_CH,
|
|---|
| 1206 | OP_PARM_REG_DH,
|
|---|
| 1207 | OP_PARM_REG_BH,
|
|---|
| 1208 | OP_PARM_REG_GEN8_END = OP_PARM_REG_BH,
|
|---|
| 1209 |
|
|---|
| 1210 | OP_PARM_REGFP_0,
|
|---|
| 1211 | OP_PARM_REG_FP_START = OP_PARM_REGFP_0,
|
|---|
| 1212 | OP_PARM_REGFP_1,
|
|---|
| 1213 | OP_PARM_REGFP_2,
|
|---|
| 1214 | OP_PARM_REGFP_3,
|
|---|
| 1215 | OP_PARM_REGFP_4,
|
|---|
| 1216 | OP_PARM_REGFP_5,
|
|---|
| 1217 | OP_PARM_REGFP_6,
|
|---|
| 1218 | OP_PARM_REGFP_7,
|
|---|
| 1219 | OP_PARM_REG_FP_END = OP_PARM_REGFP_7,
|
|---|
| 1220 |
|
|---|
| 1221 | OP_PARM_NTA,
|
|---|
| 1222 | OP_PARM_T0,
|
|---|
| 1223 | OP_PARM_T1,
|
|---|
| 1224 | OP_PARM_T2,
|
|---|
| 1225 | OP_PARM_1,
|
|---|
| 1226 |
|
|---|
| 1227 | OP_PARM_REX,
|
|---|
| 1228 | OP_PARM_REX_START = OP_PARM_REX,
|
|---|
| 1229 | OP_PARM_REX_B,
|
|---|
| 1230 | OP_PARM_REX_X,
|
|---|
| 1231 | OP_PARM_REX_XB,
|
|---|
| 1232 | OP_PARM_REX_R,
|
|---|
| 1233 | OP_PARM_REX_RB,
|
|---|
| 1234 | OP_PARM_REX_RX,
|
|---|
| 1235 | OP_PARM_REX_RXB,
|
|---|
| 1236 | OP_PARM_REX_W,
|
|---|
| 1237 | OP_PARM_REX_WB,
|
|---|
| 1238 | OP_PARM_REX_WX,
|
|---|
| 1239 | OP_PARM_REX_WXB,
|
|---|
| 1240 | OP_PARM_REX_WR,
|
|---|
| 1241 | OP_PARM_REX_WRB,
|
|---|
| 1242 | OP_PARM_REX_WRX,
|
|---|
| 1243 | OP_PARM_REX_WRXB,
|
|---|
| 1244 |
|
|---|
| 1245 | OP_PARM_REG_RAX,
|
|---|
| 1246 | OP_PARM_REG_GEN64_START = OP_PARM_REG_RAX,
|
|---|
| 1247 | OP_PARM_REG_RCX,
|
|---|
| 1248 | OP_PARM_REG_RDX,
|
|---|
| 1249 | OP_PARM_REG_RBX,
|
|---|
| 1250 | OP_PARM_REG_RSP,
|
|---|
| 1251 | OP_PARM_REG_RBP,
|
|---|
| 1252 | OP_PARM_REG_RSI,
|
|---|
| 1253 | OP_PARM_REG_RDI,
|
|---|
| 1254 | OP_PARM_REG_R8,
|
|---|
| 1255 | OP_PARM_REG_R9,
|
|---|
| 1256 | OP_PARM_REG_R10,
|
|---|
| 1257 | OP_PARM_REG_R11,
|
|---|
| 1258 | OP_PARM_REG_R12,
|
|---|
| 1259 | OP_PARM_REG_R13,
|
|---|
| 1260 | OP_PARM_REG_R14,
|
|---|
| 1261 | OP_PARM_REG_R15,
|
|---|
| 1262 | OP_PARM_REG_GEN64_END = OP_PARM_REG_R15,
|
|---|
| 1263 |
|
|---|
| 1264 | OP_PARM_REG_XMM0,
|
|---|
| 1265 | OP_PARM_REG_SSE_START = OP_PARM_REG_XMM0,
|
|---|
| 1266 | OP_PARM_REG_XMM1,
|
|---|
| 1267 | OP_PARM_REG_XMM2,
|
|---|
| 1268 | OP_PARM_REG_XMM3,
|
|---|
| 1269 | OP_PARM_REG_XMM4,
|
|---|
| 1270 | OP_PARM_REG_XMM5,
|
|---|
| 1271 | OP_PARM_REG_XMM6,
|
|---|
| 1272 | OP_PARM_REG_XMM7,
|
|---|
| 1273 | OP_PARM_REG_XMM8,
|
|---|
| 1274 | OP_PARM_REG_XMM9,
|
|---|
| 1275 | OP_PARM_REG_XMM10,
|
|---|
| 1276 | OP_PARM_REG_XMM11,
|
|---|
| 1277 | OP_PARM_REG_XMM12,
|
|---|
| 1278 | OP_PARM_REG_XMM13,
|
|---|
| 1279 | OP_PARM_REG_XMM14,
|
|---|
| 1280 | OP_PARM_REG_XMM15,
|
|---|
| 1281 | OP_PARM_REG_SSE_END = OP_PARM_REG_XMM15
|
|---|
| 1282 | };
|
|---|
| 1283 |
|
|---|
| 1284 |
|
|---|
| 1285 | /* 8-bit GRP aliases (for IEM). */
|
|---|
| 1286 | #define OP_PARM_AL OP_PARM_REG_AL
|
|---|
| 1287 |
|
|---|
| 1288 | /* GPR aliases for op-size specified register sizes (for IEM). */
|
|---|
| 1289 | #define OP_PARM_rAX OP_PARM_REG_EAX
|
|---|
| 1290 | #define OP_PARM_rCX OP_PARM_REG_ECX
|
|---|
| 1291 | #define OP_PARM_rDX OP_PARM_REG_EDX
|
|---|
| 1292 | #define OP_PARM_rBX OP_PARM_REG_EBX
|
|---|
| 1293 | #define OP_PARM_rSP OP_PARM_REG_ESP
|
|---|
| 1294 | #define OP_PARM_rBP OP_PARM_REG_EBP
|
|---|
| 1295 | #define OP_PARM_rSI OP_PARM_REG_ESI
|
|---|
| 1296 | #define OP_PARM_rDI OP_PARM_REG_EDI
|
|---|
| 1297 |
|
|---|
| 1298 | /* SREG aliases (for IEM). */
|
|---|
| 1299 | #define OP_PARM_ES OP_PARM_REG_ES
|
|---|
| 1300 | #define OP_PARM_CS OP_PARM_REG_CS
|
|---|
| 1301 | #define OP_PARM_SS OP_PARM_REG_SS
|
|---|
| 1302 | #define OP_PARM_DS OP_PARM_REG_DS
|
|---|
| 1303 | #define OP_PARM_FS OP_PARM_REG_FS
|
|---|
| 1304 | #define OP_PARM_GS OP_PARM_REG_GS
|
|---|
| 1305 |
|
|---|
| 1306 | /*
|
|---|
| 1307 | * Note! We don't document anything here if we can help it, because it we love
|
|---|
| 1308 | * wasting other peoples time figuring out crypting crap. The new VEX
|
|---|
| 1309 | * stuff of course uphelds this vexing tradition. Aaaaaaaaaaaaaaaaaaarg!
|
|---|
| 1310 | */
|
|---|
| 1311 |
|
|---|
| 1312 | #define OP_PARM_VTYPE(a) ((unsigned)a & 0xFE0)
|
|---|
| 1313 | #define OP_PARM_VSUBTYPE(a) ((unsigned)a & 0x01F)
|
|---|
| 1314 |
|
|---|
| 1315 | #define OP_PARM_A 0x100
|
|---|
| 1316 | #define OP_PARM_VARIABLE OP_PARM_A
|
|---|
| 1317 | #define OP_PARM_E 0x120
|
|---|
| 1318 | #define OP_PARM_F 0x140
|
|---|
| 1319 | #define OP_PARM_G 0x160
|
|---|
| 1320 | #define OP_PARM_I 0x180
|
|---|
| 1321 | #define OP_PARM_J 0x1A0
|
|---|
| 1322 | #define OP_PARM_M 0x1C0
|
|---|
| 1323 | #define OP_PARM_O 0x1E0
|
|---|
| 1324 | #define OP_PARM_R 0x200
|
|---|
| 1325 | #define OP_PARM_X 0x220
|
|---|
| 1326 | #define OP_PARM_Y 0x240
|
|---|
| 1327 |
|
|---|
| 1328 | /* Grouped rare parameters for optimization purposes */
|
|---|
| 1329 | #define IS_OP_PARM_RARE(a) ((a & 0xF00) >= 0x300)
|
|---|
| 1330 | #define OP_PARM_C 0x300 /* control register */
|
|---|
| 1331 | #define OP_PARM_D 0x320 /* debug register */
|
|---|
| 1332 | #define OP_PARM_S 0x340 /* segment register */
|
|---|
| 1333 | #define OP_PARM_T 0x360 /* test register */
|
|---|
| 1334 | #define OP_PARM_Q 0x380
|
|---|
| 1335 | #define OP_PARM_P 0x3A0 /* mmx register */
|
|---|
| 1336 | #define OP_PARM_W 0x3C0 /* xmm register */
|
|---|
| 1337 | #define OP_PARM_V 0x3E0
|
|---|
| 1338 | #define OP_PARM_U 0x400 /* The R/M field of the ModR/M byte selects XMM/YMM register. */
|
|---|
| 1339 | #define OP_PARM_B 0x420 /* VEX.vvvv field select general purpose register. */
|
|---|
| 1340 | #define OP_PARM_H 0x440
|
|---|
| 1341 | #define OP_PARM_L 0x460
|
|---|
| 1342 |
|
|---|
| 1343 | #define OP_PARM_NONE 0
|
|---|
| 1344 | #define OP_PARM_a 0x1 /**< Operand to bound instruction. */
|
|---|
| 1345 | #define OP_PARM_b 0x2 /**< Byte (always). */
|
|---|
| 1346 | #define OP_PARM_d 0x3 /**< Double word (always). */
|
|---|
| 1347 | #define OP_PARM_dq 0x4 /**< Double quad word (always). */
|
|---|
| 1348 | #define OP_PARM_p 0x5 /**< Far pointer (subject to opsize). */
|
|---|
| 1349 | #define OP_PARM_pd 0x6 /**< 128-bit or 256-bit double precision floating point data. */
|
|---|
| 1350 | #define OP_PARM_pi 0x7 /**< Quad word MMX register. */
|
|---|
| 1351 | #define OP_PARM_ps 0x8 /**< 128-bit or 256-bit single precision floating point data. */
|
|---|
| 1352 | #define OP_PARM_q 0xA /**< Quad word (always). */
|
|---|
| 1353 | #define OP_PARM_s 0xB /**< Descriptor table size (SIDT/LIDT/SGDT/LGDT). */
|
|---|
| 1354 | #define OP_PARM_sd 0xC /**< Scalar element of 128-bit double precision floating point data. */
|
|---|
| 1355 | #define OP_PARM_ss 0xD /**< Scalar element of 128-bit single precision floating point data. */
|
|---|
| 1356 | #define OP_PARM_v 0xE /**< Word, double word, or quad word depending on opsize. */
|
|---|
| 1357 | #define OP_PARM_w 0xF /**< Word (always). */
|
|---|
| 1358 | #define OP_PARM_x 0x10 /**< Double quad word (dq) or quad quad word (qq) depending on opsize. */
|
|---|
| 1359 | #define OP_PARM_y 0x11 /**< Double word or quad word depending on opsize. */
|
|---|
| 1360 | #define OP_PARM_z 0x12 /**< Word (16-bit opsize) or double word (32-bit/64-bit opsize). */
|
|---|
| 1361 | #define OP_PARM_qq 0x13 /**< Quad quad word. */
|
|---|
| 1362 |
|
|---|
| 1363 |
|
|---|
| 1364 | #define OP_PARM_Ap (OP_PARM_A+OP_PARM_p)
|
|---|
| 1365 | #define OP_PARM_By (OP_PARM_B+OP_PARM_y)
|
|---|
| 1366 | #define OP_PARM_Cd (OP_PARM_C+OP_PARM_d)
|
|---|
| 1367 | #define OP_PARM_Dd (OP_PARM_D+OP_PARM_d)
|
|---|
| 1368 | #define OP_PARM_Eb (OP_PARM_E+OP_PARM_b)
|
|---|
| 1369 | #define OP_PARM_Ed (OP_PARM_E+OP_PARM_d)
|
|---|
| 1370 | #define OP_PARM_Ep (OP_PARM_E+OP_PARM_p)
|
|---|
| 1371 | #define OP_PARM_Ev (OP_PARM_E+OP_PARM_v)
|
|---|
| 1372 | #define OP_PARM_Ew (OP_PARM_E+OP_PARM_w)
|
|---|
| 1373 | #define OP_PARM_Ey (OP_PARM_E+OP_PARM_y)
|
|---|
| 1374 | #define OP_PARM_Fv (OP_PARM_F+OP_PARM_v)
|
|---|
| 1375 | #define OP_PARM_Gb (OP_PARM_G+OP_PARM_b)
|
|---|
| 1376 | #define OP_PARM_Gd (OP_PARM_G+OP_PARM_d)
|
|---|
| 1377 | #define OP_PARM_Gv (OP_PARM_G+OP_PARM_v)
|
|---|
| 1378 | #define OP_PARM_Gw (OP_PARM_G+OP_PARM_w)
|
|---|
| 1379 | #define OP_PARM_Gy (OP_PARM_G+OP_PARM_y)
|
|---|
| 1380 | #define OP_PARM_Hq (OP_PARM_H+OP_PARM_q)
|
|---|
| 1381 | #define OP_PARM_Hps (OP_PARM_H+OP_PARM_ps)
|
|---|
| 1382 | #define OP_PARM_Hpd (OP_PARM_H+OP_PARM_pd)
|
|---|
| 1383 | #define OP_PARM_Hdq (OP_PARM_H+OP_PARM_dq)
|
|---|
| 1384 | #define OP_PARM_Hqq (OP_PARM_H+OP_PARM_qq)
|
|---|
| 1385 | #define OP_PARM_Hsd (OP_PARM_H+OP_PARM_sd)
|
|---|
| 1386 | #define OP_PARM_Hss (OP_PARM_H+OP_PARM_ss)
|
|---|
| 1387 | #define OP_PARM_Hx (OP_PARM_H+OP_PARM_x)
|
|---|
| 1388 | #define OP_PARM_Ib (OP_PARM_I+OP_PARM_b)
|
|---|
| 1389 | #define OP_PARM_Id (OP_PARM_I+OP_PARM_d)
|
|---|
| 1390 | #define OP_PARM_Iq (OP_PARM_I+OP_PARM_q)
|
|---|
| 1391 | #define OP_PARM_Iw (OP_PARM_I+OP_PARM_w)
|
|---|
| 1392 | #define OP_PARM_Iv (OP_PARM_I+OP_PARM_v)
|
|---|
| 1393 | #define OP_PARM_Iz (OP_PARM_I+OP_PARM_z)
|
|---|
| 1394 | #define OP_PARM_Jb (OP_PARM_J+OP_PARM_b)
|
|---|
| 1395 | #define OP_PARM_Jv (OP_PARM_J+OP_PARM_v)
|
|---|
| 1396 | #define OP_PARM_Ma (OP_PARM_M+OP_PARM_a)
|
|---|
| 1397 | #define OP_PARM_Mb (OP_PARM_M+OP_PARM_b)
|
|---|
| 1398 | #define OP_PARM_Mw (OP_PARM_M+OP_PARM_w)
|
|---|
| 1399 | #define OP_PARM_Md (OP_PARM_M+OP_PARM_d)
|
|---|
| 1400 | #define OP_PARM_Mp (OP_PARM_M+OP_PARM_p)
|
|---|
| 1401 | #define OP_PARM_Mq (OP_PARM_M+OP_PARM_q)
|
|---|
| 1402 | #define OP_PARM_Mdq (OP_PARM_M+OP_PARM_dq)
|
|---|
| 1403 | #define OP_PARM_Ms (OP_PARM_M+OP_PARM_s)
|
|---|
| 1404 | #define OP_PARM_Mx (OP_PARM_M+OP_PARM_x)
|
|---|
| 1405 | #define OP_PARM_My (OP_PARM_M+OP_PARM_y)
|
|---|
| 1406 | #define OP_PARM_Mps (OP_PARM_M+OP_PARM_ps)
|
|---|
| 1407 | #define OP_PARM_Mpd (OP_PARM_M+OP_PARM_pd)
|
|---|
| 1408 | #define OP_PARM_Ob (OP_PARM_O+OP_PARM_b)
|
|---|
| 1409 | #define OP_PARM_Ov (OP_PARM_O+OP_PARM_v)
|
|---|
| 1410 | #define OP_PARM_Pq (OP_PARM_P+OP_PARM_q)
|
|---|
| 1411 | #define OP_PARM_Pd (OP_PARM_P+OP_PARM_d)
|
|---|
| 1412 | #define OP_PARM_Qd (OP_PARM_Q+OP_PARM_d)
|
|---|
| 1413 | #define OP_PARM_Qq (OP_PARM_Q+OP_PARM_q)
|
|---|
| 1414 | #define OP_PARM_Rd (OP_PARM_R+OP_PARM_d)
|
|---|
| 1415 | #define OP_PARM_Rw (OP_PARM_R+OP_PARM_w)
|
|---|
| 1416 | #define OP_PARM_Ry (OP_PARM_R+OP_PARM_y)
|
|---|
| 1417 | #define OP_PARM_Sw (OP_PARM_S+OP_PARM_w)
|
|---|
| 1418 | #define OP_PARM_Td (OP_PARM_T+OP_PARM_d)
|
|---|
| 1419 | #define OP_PARM_Ux (OP_PARM_U+OP_PARM_x)
|
|---|
| 1420 | #define OP_PARM_Vq (OP_PARM_V+OP_PARM_q)
|
|---|
| 1421 | #define OP_PARM_Vx (OP_PARM_V+OP_PARM_x)
|
|---|
| 1422 | #define OP_PARM_Vy (OP_PARM_V+OP_PARM_y)
|
|---|
| 1423 | #define OP_PARM_Wq (OP_PARM_W+OP_PARM_q)
|
|---|
| 1424 | /*#define OP_PARM_Ws (OP_PARM_W+OP_PARM_s) - wtf? Same as lgdt (OP_PARM_Ms)?*/
|
|---|
| 1425 | #define OP_PARM_Wx (OP_PARM_W+OP_PARM_x)
|
|---|
| 1426 | #define OP_PARM_Xb (OP_PARM_X+OP_PARM_b)
|
|---|
| 1427 | #define OP_PARM_Xv (OP_PARM_X+OP_PARM_v)
|
|---|
| 1428 | #define OP_PARM_Yb (OP_PARM_Y+OP_PARM_b)
|
|---|
| 1429 | #define OP_PARM_Yv (OP_PARM_Y+OP_PARM_v)
|
|---|
| 1430 |
|
|---|
| 1431 | #define OP_PARM_Vps (OP_PARM_V+OP_PARM_ps)
|
|---|
| 1432 | #define OP_PARM_Vss (OP_PARM_V+OP_PARM_ss)
|
|---|
| 1433 | #define OP_PARM_Vpd (OP_PARM_V+OP_PARM_pd)
|
|---|
| 1434 | #define OP_PARM_Vdq (OP_PARM_V+OP_PARM_dq)
|
|---|
| 1435 | #define OP_PARM_Wps (OP_PARM_W+OP_PARM_ps)
|
|---|
| 1436 | #define OP_PARM_Wpd (OP_PARM_W+OP_PARM_pd)
|
|---|
| 1437 | #define OP_PARM_Wss (OP_PARM_W+OP_PARM_ss)
|
|---|
| 1438 | #define OP_PARM_Ww (OP_PARM_W+OP_PARM_w)
|
|---|
| 1439 | #define OP_PARM_Wd (OP_PARM_W+OP_PARM_d)
|
|---|
| 1440 | #define OP_PARM_Wq (OP_PARM_W+OP_PARM_q)
|
|---|
| 1441 | #define OP_PARM_Wdq (OP_PARM_W+OP_PARM_dq)
|
|---|
| 1442 | #define OP_PARM_Wqq (OP_PARM_W+OP_PARM_qq)
|
|---|
| 1443 | #define OP_PARM_Ppi (OP_PARM_P+OP_PARM_pi)
|
|---|
| 1444 | #define OP_PARM_Qpi (OP_PARM_Q+OP_PARM_pi)
|
|---|
| 1445 | #define OP_PARM_Qdq (OP_PARM_Q+OP_PARM_dq)
|
|---|
| 1446 | #define OP_PARM_Vsd (OP_PARM_V+OP_PARM_sd)
|
|---|
| 1447 | #define OP_PARM_Wsd (OP_PARM_W+OP_PARM_sd)
|
|---|
| 1448 | #define OP_PARM_Vqq (OP_PARM_V+OP_PARM_qq)
|
|---|
| 1449 | #define OP_PARM_Pdq (OP_PARM_P+OP_PARM_dq)
|
|---|
| 1450 | #define OP_PARM_Ups (OP_PARM_U+OP_PARM_ps)
|
|---|
| 1451 | #define OP_PARM_Upd (OP_PARM_U+OP_PARM_pd)
|
|---|
| 1452 | #define OP_PARM_Udq (OP_PARM_U+OP_PARM_dq)
|
|---|
| 1453 | #define OP_PARM_Lx (OP_PARM_L+OP_PARM_x)
|
|---|
| 1454 |
|
|---|
| 1455 | /* For making IEM / bs3-cpu-generated-1 happy: */
|
|---|
| 1456 | #define OP_PARM_Ew_WO OP_PARM_Ew /**< Annotates write only operand. */
|
|---|
| 1457 | #define OP_PARM_Ed_WO OP_PARM_Ed /**< Annotates write only operand. */
|
|---|
| 1458 | #define OP_PARM_Eq (OP_PARM_E+OP_PARM_q)
|
|---|
| 1459 | #define OP_PARM_Eq_WO OP_PARM_Eq /**< Annotates write only operand. */
|
|---|
| 1460 | #define OP_PARM_Ey_WO OP_PARM_Ey /**< Annotates write only operand. */
|
|---|
| 1461 | #define OP_PARM_Gv_RO OP_PARM_Gv /**< Annotates read only first operand (default is readwrite). */
|
|---|
| 1462 | #define OP_PARM_HssHi OP_PARM_Hx /**< Register referenced by VEX.vvvv, bits [127:32]. */
|
|---|
| 1463 | #define OP_PARM_HsdHi OP_PARM_Hx /**< Register referenced by VEX.vvvv, bits [127:64]. */
|
|---|
| 1464 | #define OP_PARM_HqHi OP_PARM_Hx /**< Register referenced by VEX.vvvv, bits [127:64]. */
|
|---|
| 1465 | #define OP_PARM_M_RO OP_PARM_M /**< Annotates read only memory of variable operand size (xrstor). */
|
|---|
| 1466 | #define OP_PARM_M_RW OP_PARM_M /**< Annotates read-write memory of variable operand size (xsave). */
|
|---|
| 1467 | #define OP_PARM_Mb_RO OP_PARM_Mb /**< Annotates read only memory byte operand. */
|
|---|
| 1468 | #define OP_PARM_Md_RO OP_PARM_Md /**< Annotates read only memory operand. */
|
|---|
| 1469 | #define OP_PARM_Md_WO OP_PARM_Md /**< Annotates write only memory operand. */
|
|---|
| 1470 | #define OP_PARM_Mdq_WO OP_PARM_Mdq /**< Annotates write only memory operand. */
|
|---|
| 1471 | #define OP_PARM_Mq_WO OP_PARM_Mq /**< Annotates write only memory quad word operand. */
|
|---|
| 1472 | #define OP_PARM_Mps_WO OP_PARM_Mps /**< Annotates write only memory operand. */
|
|---|
| 1473 | #define OP_PARM_Mpd_WO OP_PARM_Mpd /**< Annotates write only memory operand. */
|
|---|
| 1474 | #define OP_PARM_Mx_WO OP_PARM_Mx /**< Annotates write only memory operand. */
|
|---|
| 1475 | #define OP_PARM_PdZx_WO OP_PARM_Pd /**< Annotates write only operand and zero extends to 64-bit. */
|
|---|
| 1476 | #define OP_PARM_Pq_WO OP_PARM_Pq /**< Annotates write only operand. */
|
|---|
| 1477 | #define OP_PARM_Qq_WO OP_PARM_Qq /**< Annotates write only operand. */
|
|---|
| 1478 | #define OP_PARM_Nq OP_PARM_Qq /**< Missing 'N' class (MMX reg selected by modrm.mem) in disasm. */
|
|---|
| 1479 | #define OP_PARM_Uq (OP_PARM_U+OP_PARM_q)
|
|---|
| 1480 | #define OP_PARM_UqHi (OP_PARM_U+OP_PARM_dq)
|
|---|
| 1481 | #define OP_PARM_Uss (OP_PARM_U+OP_PARM_ss)
|
|---|
| 1482 | #define OP_PARM_Uss_WO OP_PARM_Uss /**< Annotates write only operand. */
|
|---|
| 1483 | #define OP_PARM_Usd (OP_PARM_U+OP_PARM_sd)
|
|---|
| 1484 | #define OP_PARM_Usd_WO OP_PARM_Usd /**< Annotates write only operand. */
|
|---|
| 1485 | #define OP_PARM_Vd (OP_PARM_V+OP_PARM_d)
|
|---|
| 1486 | #define OP_PARM_Vd_WO OP_PARM_Vd /**< Annotates write only operand. */
|
|---|
| 1487 | #define OP_PARM_VdZx_WO OP_PARM_Vd /**< Annotates that the registers get their upper bits cleared */
|
|---|
| 1488 | #define OP_PARM_Vdq_WO OP_PARM_Vdq /**< Annotates that only YMM/XMM[127:64] are accessed. */
|
|---|
| 1489 | #define OP_PARM_Vpd_WO OP_PARM_Vpd /**< Annotates write only operand. */
|
|---|
| 1490 | #define OP_PARM_Vps_WO OP_PARM_Vps /**< Annotates write only operand. */
|
|---|
| 1491 | #define OP_PARM_Vq_WO OP_PARM_Vq /**< Annotates write only operand. */
|
|---|
| 1492 | #define OP_PARM_VqHi OP_PARM_Vdq /**< Annotates that only YMM/XMM[127:64] are accessed. */
|
|---|
| 1493 | #define OP_PARM_VqHi_WO OP_PARM_Vdq /**< Annotates that only YMM/XMM[127:64] are written. */
|
|---|
| 1494 | #define OP_PARM_VqZx_WO OP_PARM_Vq /**< Annotates that the registers get their upper bits cleared */
|
|---|
| 1495 | #define OP_PARM_Vqq_WO OP_PARM_Vq /**< Annotates write only operand. */
|
|---|
| 1496 | #define OP_PARM_VsdZx_WO OP_PARM_Vsd /**< Annotates that the registers get their upper bits cleared. */
|
|---|
| 1497 | #define OP_PARM_VssZx_WO OP_PARM_Vss /**< Annotates that the registers get their upper bits cleared. */
|
|---|
| 1498 | #define OP_PARM_Vss_WO OP_PARM_Vss /**< Annotates write only operand. */
|
|---|
| 1499 | #define OP_PARM_Vsd_WO OP_PARM_Vsd /**< Annotates write only operand. */
|
|---|
| 1500 | #define OP_PARM_Vx_WO OP_PARM_Vx /**< Annotates write only operand. */
|
|---|
| 1501 | #define OP_PARM_Wpd_WO OP_PARM_Wpd /**< Annotates write only operand. */
|
|---|
| 1502 | #define OP_PARM_Wps_WO OP_PARM_Wps /**< Annotates write only operand. */
|
|---|
| 1503 | #define OP_PARM_Wq_WO OP_PARM_Wq /**< Annotates write only operand. */
|
|---|
| 1504 | #define OP_PARM_WqZxReg_WO OP_PARM_Wq /**< Annotates that register targets get their upper bits cleared. */
|
|---|
| 1505 | #define OP_PARM_Wss_WO OP_PARM_Wss /**< Annotates write only operand. */
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| 1506 | #define OP_PARM_Wsd_WO OP_PARM_Wsd /**< Annotates write only operand. */
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| 1507 | #define OP_PARM_Wx_WO OP_PARM_Wx /**< Annotates write only operand. */
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| 1508 |
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| 1509 | /** @} */
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| 1510 |
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| 1511 | #endif /* !VBOX_INCLUDED_disopcode_x86_amd64_h */
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| 1512 |
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