VirtualBox

source: vbox/trunk/include/VBox/hwaccm.h@ 26196

Last change on this file since 26196 was 26146, checked in by vboxsync, 15 years ago

Make sure we fall back to the recompiler if the VMM device heap is inactive (VT-x real mode or VT-x+EPT protected mode without paging)

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 6.5 KB
Line 
1/** @file
2 * HWACCM - Intel/AMD VM Hardware Support Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_hwaccm_h
31#define ___VBox_hwaccm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/pgm.h>
36#include <VBox/cpum.h>
37#include <iprt/mp.h>
38
39
40/** @defgroup grp_hwaccm The VM Hardware Manager API
41 * @{
42 */
43
44/**
45 * HWACCM state
46 */
47typedef enum HWACCMSTATE
48{
49 /* Not yet set */
50 HWACCMSTATE_UNINITIALIZED = 0,
51 /* Enabled */
52 HWACCMSTATE_ENABLED,
53 /* Disabled */
54 HWACCMSTATE_DISABLED,
55 /** The usual 32-bit hack. */
56 HWACCMSTATE_32BIT_HACK = 0x7fffffff
57} HWACCMSTATE;
58
59RT_C_DECLS_BEGIN
60
61/**
62 * Query HWACCM state (enabled/disabled)
63 *
64 * @returns 0 - disabled, 1 - enabled
65 * @param pVM The VM to operate on.
66 */
67#define HWACCMIsEnabled(pVM) ((pVM)->fHWACCMEnabled)
68
69 /**
70 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
71 *
72 * @returns boolean
73 * @param pCtx CPU context
74 */
75#define HWACCMCanEmulateIoBlock(pVCpu) (!CPUMIsGuestInPagedProtectedMode(pVCpu))
76#define HWACCMCanEmulateIoBlockEx(pCtx) (!CPUMIsGuestInPagedProtectedModeEx(pCtx))
77
78VMMDECL(int) HWACCMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
79VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM);
80
81#ifndef IN_RC
82VMMDECL(int) HWACCMFlushTLB(PVMCPU pVCpu);
83VMMDECL(int) HWACCMFlushTLBOnAllVCpus(PVM pVM);
84VMMDECL(int) HWACCMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
85VMMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
86VMMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM);
87VMMDECL(PGMMODE) HWACCMGetShwPagingMode(PVM pVM);
88#else
89/* Nop in GC */
90# define HWACCMFlushTLB(pVCpu) do { } while (0)
91# define HWACCMIsNestedPagingActive(pVM) false
92# define HWACCMFlushTLBOnAllVCpus(pVM) do { } while (0)
93#endif
94
95#ifdef IN_RING0
96/** @defgroup grp_hwaccm_r0 The VM Hardware Manager API
97 * @ingroup grp_hwaccm
98 * @{
99 */
100VMMR0DECL(int) HWACCMR0Init(void);
101VMMR0DECL(int) HWACCMR0Term(void);
102VMMR0DECL(int) HWACCMR0InitVM(PVM pVM);
103VMMR0DECL(int) HWACCMR0TermVM(PVM pVM);
104VMMR0DECL(int) HWACCMR0EnableAllCpus(PVM pVM);
105VMMR0DECL(int) HWACCMR0EnterSwitcher(PVM pVM, bool *pfVTxDisabled);
106VMMR0DECL(int) HWACCMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
107
108VMMR0DECL(PVMCPU) HWACCMR0GetVMCPU(PVM pVM);
109VMMR0DECL(VMCPUID) HWACCMR0GetVMCPUId(PVM pVM);
110
111VMMR0DECL(void) HWACCMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
112VMMR0DECL(void) HWACCMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
113
114/** @} */
115#endif /* IN_RING0 */
116
117
118#ifdef IN_RING3
119/** @defgroup grp_hwaccm_r3 The VM Hardware Manager API
120 * @ingroup grp_hwaccm
121 * @{
122 */
123VMMR3DECL(bool) HWACCMR3IsEventPending(PVMCPU pVCpu);
124VMMR3DECL(int) HWACCMR3Init(PVM pVM);
125VMMR3DECL(int) HWACCMR3InitCPU(PVM pVM);
126VMMR3DECL(int) HWACCMR3InitFinalizeR0(PVM pVM);
127VMMR3DECL(void) HWACCMR3Relocate(PVM pVM);
128VMMR3DECL(int) HWACCMR3Term(PVM pVM);
129VMMR3DECL(int) HWACCMR3TermCPU(PVM pVM);
130VMMR3DECL(void) HWACCMR3Reset(PVM pVM);
131VMMR3DECL(void) HWACCMR3ResetCpu(PVMCPU pVCpu);
132VMMR3DECL(void) HWACCMR3CheckError(PVM pVM, int iStatusCode);
133VMMR3DECL(bool) HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
134VMMR3DECL(void) HWACCMR3NotifyScheduled(PVMCPU pVCpu);
135VMMR3DECL(void) HWACCMR3NotifyEmulated(PVMCPU pVCpu);
136VMMR3DECL(bool) HWACCMR3IsActive(PVMCPU pVCpu);
137VMMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM);
138VMMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM);
139VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
140VMMR3DECL(bool) HWACCMR3IsVPIDActive(PVM pVM);
141VMMR3DECL(int) HWACCMR3InjectNMI(PVM pVM);
142VMMR3DECL(int) HWACCMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
143VMMR3DECL(VBOXSTRICTRC) HWACCMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
144VMMR3DECL(int) HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
145VMMR3DECL(int) HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
146VMMR3DECL(int) HWACCMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
147VMMR3DECL(bool) HWACCMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
148
149/** @} */
150#endif /* IN_RING3 */
151
152#ifdef IN_RING0
153/** @addtogroup grp_hwaccm_r0
154 * @{
155 */
156VMMR0DECL(int) HWACCMR0SetupVM(PVM pVM);
157VMMR0DECL(int) HWACCMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
158VMMR0DECL(int) HWACCMR0Enter(PVM pVM, PVMCPU pVCpu);
159VMMR0DECL(int) HWACCMR0Leave(PVM pVM, PVMCPU pVCpu);
160VMMR0DECL(int) HWACCMR0InvalidatePage(PVM pVM, PVMCPU pVCpu);
161VMMR0DECL(int) HWACCMR0FlushTLB(PVM pVM);
162VMMR0DECL(bool) HWACCMR0SuspendPending();
163
164# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
165VMMR0DECL(int) HWACCMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
166VMMR0DECL(int) HWACCMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
167VMMR0DECL(int) HWACCMR0TestSwitcher3264(PVM pVM);
168# endif
169
170/** @} */
171#endif /* IN_RING0 */
172
173
174/** @} */
175RT_C_DECLS_END
176
177
178#endif
179
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette