VirtualBox

source: vbox/trunk/include/VBox/mm.h@ 16857

Last change on this file since 16857 was 14597, checked in by vboxsync, 16 years ago

Added R0 address to MMR3HyperMapHCPhys and made the MMHyperXToR0 use pvR0 for HCPhys and Locked more strickly.
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File size: 14.0 KB
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1/** @file
2 * MM - The Memory Manager.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_mm_h
31#define ___VBox_mm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/x86.h>
36#include <iprt/stdarg.h>
37#include <VBox/sup.h>
38
39
40__BEGIN_DECLS
41
42/** @defgroup grp_mm The Memory Manager API
43 * @{
44 */
45
46/** @name RAM Page Flags
47 * Since internal ranges have a byte granularity it's possible for a
48 * page be flagged for several uses. The access virtualization in PGM
49 * will choose the most restricted one and use EM to emulate access to
50 * the less restricted areas of the page.
51 *
52 * Bits 0-11 only since they are fitted into the offset part of a physical memory address.
53 * @{
54 */
55#if 1
56/** Reserved - Not RAM, ROM nor MMIO2.
57 * If this bit is cleared the memory is assumed to be some kind of RAM.
58 * Normal MMIO may set it but that depends on whether the RAM range was
59 * created specially for the MMIO or not.
60 *
61 * @remarks The current implementation will always reserve backing
62 * memory for reserved ranges to simplify things.
63 */
64#define MM_RAM_FLAGS_RESERVED RT_BIT(0)
65/** ROM - Read Only Memory.
66 * The page have a HC physical address which contains the BIOS code. All write
67 * access is trapped and ignored.
68 *
69 * HACK: Writable shadow ROM is indicated by both ROM and MMIO2 being
70 * set. (We're out of bits.)
71 */
72#define MM_RAM_FLAGS_ROM RT_BIT(1)
73/** MMIO - Memory Mapped I/O.
74 * All access is trapped and emulated. No physical backing is required, but
75 * might for various reasons be present.
76 */
77#define MM_RAM_FLAGS_MMIO RT_BIT(2)
78/** MMIO2 - Memory Mapped I/O, variation 2.
79 * The virtualization is performed using real memory and only catching
80 * a few accesses for like keeping track for dirty pages.
81 * @remark Involved in the shadow ROM hack.
82 */
83#define MM_RAM_FLAGS_MMIO2 RT_BIT(3)
84#endif
85
86#ifndef VBOX_WITH_NEW_PHYS_CODE
87/** Physical backing memory is allocated dynamically. Not set implies a one time static allocation. */
88#define MM_RAM_FLAGS_DYNAMIC_ALLOC RT_BIT(11)
89#endif /* !VBOX_WITH_NEW_PHYS_CODE */
90
91/** The shift used to get the reference count. */
92#define MM_RAM_FLAGS_CREFS_SHIFT 62
93/** The mask applied to the the page pool idx after using MM_RAM_FLAGS_CREFS_SHIFT to shift it down. */
94#define MM_RAM_FLAGS_CREFS_MASK 0x3
95/** The (shifted) cRef value used to indiciate that the idx is the head of a
96 * physical cross reference extent list. */
97#define MM_RAM_FLAGS_CREFS_PHYSEXT MM_RAM_FLAGS_CREFS_MASK
98/** The shift used to get the page pool idx. (Apply MM_RAM_FLAGS_IDX_MASK to the result when shifting down). */
99#define MM_RAM_FLAGS_IDX_SHIFT 48
100/** The mask applied to the the page pool idx after using MM_RAM_FLAGS_IDX_SHIFT to shift it down. */
101#define MM_RAM_FLAGS_IDX_MASK 0x3fff
102/** The idx value when we're out of of extents or there are simply too many mappings of this page. */
103#define MM_RAM_FLAGS_IDX_OVERFLOWED MM_RAM_FLAGS_IDX_MASK
104
105/** Mask for masking off any references to the page. */
106#define MM_RAM_FLAGS_NO_REFS_MASK UINT64_C(0x0000ffffffffffff)
107/** @} */
108
109#ifndef VBOX_WITH_NEW_PHYS_CODE
110/** @name MMR3PhysRegisterEx registration type
111 * @{
112 */
113typedef enum
114{
115 /** Normal physical region (flags specify exact page type) */
116 MM_PHYS_TYPE_NORMAL = 0,
117 /** Allocate part of a dynamically allocated physical region */
118 MM_PHYS_TYPE_DYNALLOC_CHUNK,
119
120 MM_PHYS_TYPE_32BIT_HACK = 0x7fffffff
121} MMPHYSREG;
122/** @} */
123#endif
124
125/**
126 * Memory Allocation Tags.
127 * For use with MMHyperAlloc(), MMR3HeapAlloc(), MMR3HeapAllocEx(),
128 * MMR3HeapAllocZ() and MMR3HeapAllocZEx().
129 *
130 * @remark Don't forget to update the dump command in MMHeap.cpp!
131 */
132typedef enum MMTAG
133{
134 MM_TAG_INVALID = 0,
135
136 MM_TAG_CFGM,
137 MM_TAG_CFGM_BYTES,
138 MM_TAG_CFGM_STRING,
139 MM_TAG_CFGM_USER,
140
141 MM_TAG_CSAM,
142 MM_TAG_CSAM_PATCH,
143
144 MM_TAG_CPUM_CTX,
145
146 MM_TAG_DBGF,
147 MM_TAG_DBGF_INFO,
148 MM_TAG_DBGF_LINE,
149 MM_TAG_DBGF_LINE_DUP,
150 MM_TAG_DBGF_MODULE,
151 MM_TAG_DBGF_OS,
152 MM_TAG_DBGF_STACK,
153 MM_TAG_DBGF_SYMBOL,
154 MM_TAG_DBGF_SYMBOL_DUP,
155
156 MM_TAG_EM,
157
158 MM_TAG_IOM,
159 MM_TAG_IOM_STATS,
160
161 MM_TAG_MM,
162 MM_TAG_MM_LOOKUP_GUEST,
163 MM_TAG_MM_LOOKUP_PHYS,
164 MM_TAG_MM_LOOKUP_VIRT,
165 MM_TAG_MM_PAGE,
166
167 MM_TAG_PARAV,
168
169 MM_TAG_PATM,
170 MM_TAG_PATM_PATCH,
171
172 MM_TAG_PDM,
173 MM_TAG_PDM_ASYNC_COMPLETION,
174 MM_TAG_PDM_DEVICE,
175 MM_TAG_PDM_DEVICE_USER,
176 MM_TAG_PDM_DRIVER,
177 MM_TAG_PDM_DRIVER_USER,
178 MM_TAG_PDM_USB,
179 MM_TAG_PDM_USB_USER,
180 MM_TAG_PDM_LUN,
181 MM_TAG_PDM_QUEUE,
182 MM_TAG_PDM_THREAD,
183
184 MM_TAG_PGM,
185 MM_TAG_PGM_CHUNK_MAPPING,
186 MM_TAG_PGM_HANDLERS,
187 MM_TAG_PGM_PHYS,
188 MM_TAG_PGM_POOL,
189
190 MM_TAG_REM,
191
192 MM_TAG_SELM,
193
194 MM_TAG_SSM,
195
196 MM_TAG_STAM,
197
198 MM_TAG_TM,
199
200 MM_TAG_TRPM,
201
202 MM_TAG_VM,
203 MM_TAG_VM_REQ,
204
205 MM_TAG_VMM,
206
207 MM_TAG_HWACCM,
208
209 MM_TAG_32BIT_HACK = 0x7fffffff
210} MMTAG;
211
212
213
214
215/** @defgroup grp_mm_hyper Hypervisor Memory Management
216 * @ingroup grp_mm
217 * @{ */
218
219VMMDECL(RTR3PTR) MMHyperR0ToR3(PVM pVM, RTR0PTR R0Ptr);
220VMMDECL(RTRCPTR) MMHyperR0ToRC(PVM pVM, RTR0PTR R0Ptr);
221#ifndef IN_RING0
222VMMDECL(void *) MMHyperR0ToCC(PVM pVM, RTR0PTR R0Ptr);
223#endif
224VMMDECL(RTR0PTR) MMHyperR3ToR0(PVM pVM, RTR3PTR R3Ptr);
225VMMDECL(RTRCPTR) MMHyperR3ToRC(PVM pVM, RTR3PTR R3Ptr);
226VMMDECL(RTR3PTR) MMHyperRCToR3(PVM pVM, RTRCPTR RCPtr);
227VMMDECL(RTR0PTR) MMHyperRCToR0(PVM pVM, RTRCPTR RCPtr);
228
229#ifndef IN_RING3
230VMMDECL(void *) MMHyperR3ToCC(PVM pVM, RTR3PTR R3Ptr);
231#else
232DECLINLINE(void *) MMHyperR3ToCC(PVM pVM, RTR3PTR R3Ptr)
233{
234 NOREF(pVM);
235 return R3Ptr;
236}
237#endif
238
239
240#ifndef IN_RC
241VMMDECL(void *) MMHyperRCToCC(PVM pVM, RTRCPTR RCPtr);
242#else
243DECLINLINE(void *) MMHyperRCToCC(PVM pVM, RTRCPTR RCPtr)
244{
245 NOREF(pVM);
246 return (void *)RCPtr;
247}
248#endif
249
250#ifndef IN_RING3
251VMMDECL(RTR3PTR) MMHyperCCToR3(PVM pVM, void *pv);
252#else
253DECLINLINE(RTR3PTR) MMHyperCCToR3(PVM pVM, void *pv)
254{
255 NOREF(pVM);
256 return pv;
257}
258#endif
259
260#ifndef IN_RING0
261VMMDECL(RTR0PTR) MMHyperCCToR0(PVM pVM, void *pv);
262#else
263DECLINLINE(RTR0PTR) MMHyperCCToR0(PVM pVM, void *pv)
264{
265 NOREF(pVM);
266 return pv;
267}
268#endif
269
270#ifndef IN_RC
271VMMDECL(RTRCPTR) MMHyperCCToRC(PVM pVM, void *pv);
272#else
273DECLINLINE(RTRCPTR) MMHyperCCToRC(PVM pVM, void *pv)
274{
275 NOREF(pVM);
276 return (RTRCPTR)pv;
277}
278#endif
279
280
281VMMDECL(int) MMHyperAlloc(PVM pVM, size_t cb, uint32_t uAlignment, MMTAG enmTag, void **ppv);
282VMMDECL(int) MMHyperFree(PVM pVM, void *pv);
283VMMDECL(void) MMHyperHeapCheck(PVM pVM);
284#ifdef DEBUG
285VMMDECL(void) MMHyperHeapDump(PVM pVM);
286#endif
287VMMDECL(size_t) MMHyperHeapGetFreeSize(PVM pVM);
288VMMDECL(size_t) MMHyperHeapGetSize(PVM pVM);
289VMMDECL(RTGCPTR) MMHyperGetArea(PVM pVM, size_t *pcb);
290VMMDECL(bool) MMHyperIsInsideArea(PVM pVM, RTGCPTR GCPtr);
291
292
293VMMDECL(RTHCPHYS) MMPage2Phys(PVM pVM, void *pvPage);
294VMMDECL(void *) MMPagePhys2Page(PVM pVM, RTHCPHYS HCPhysPage);
295VMMDECL(int) MMPagePhys2PageEx(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage);
296VMMDECL(int) MMPagePhys2PageTry(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage);
297
298
299/** @def MMHYPER_RC_ASSERT_RCPTR
300 * Asserts that an address is either NULL or inside the hypervisor memory area.
301 * This assertion only works while IN_RC, it's a NOP everywhere else.
302 * @thread The Emulation Thread.
303 */
304#ifdef IN_RC
305# define MMHYPER_RC_ASSERT_RCPTR(pVM, RCPtr) Assert(MMHyperIsInsideArea((pVM), (RTRCUINTPTR)(RCPtr)) || !(RCPtr))
306#else
307# define MMHYPER_RC_ASSERT_RCPTR(pVM, RCPtr) do { } while (0)
308#endif
309
310/** @} */
311
312
313#ifdef IN_RING3
314/** @defgroup grp_mm_r3 The MM Host Context Ring-3 API
315 * @ingroup grp_mm
316 * @{
317 */
318
319VMMR3DECL(int) MMR3InitUVM(PUVM pUVM);
320VMMR3DECL(int) MMR3Init(PVM pVM);
321VMMR3DECL(int) MMR3InitPaging(PVM pVM);
322VMMR3DECL(int) MMR3HyperInitFinalize(PVM pVM);
323VMMR3DECL(int) MMR3Term(PVM pVM);
324VMMR3DECL(void) MMR3TermUVM(PUVM pUVM);
325VMMR3DECL(void) MMR3Reset(PVM pVM);
326VMMR3DECL(int) MMR3IncreaseBaseReservation(PVM pVM, uint64_t cAddBasePages);
327VMMR3DECL(int) MMR3AdjustFixedReservation(PVM pVM, int32_t cDeltaFixedPages, const char *pszDesc);
328VMMR3DECL(int) MMR3UpdateShadowReservation(PVM pVM, uint32_t cShadowPages);
329
330VMMR3DECL(int) MMR3HCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys, void **ppv);
331VMMR3DECL(int) MMR3ReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb);
332VMMR3DECL(int) MMR3WriteGCVirt(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
333
334
335/** @defgroup grp_mm_r3_hyper Hypervisor Memory Manager (HC R3 Portion)
336 * @ingroup grp_mm_r3
337 * @{ */
338VMMDECL(int) MMR3HyperAllocOnceNoRel(PVM pVM, size_t cb, uint32_t uAlignment, MMTAG enmTag, void **ppv);
339VMMR3DECL(int) MMR3HyperMapHCPhys(PVM pVM, void *pvR3, RTR0PTR pvR0, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
340VMMR3DECL(int) MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
341VMMR3DECL(int) MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr);
342VMMR3DECL(int) MMR3HyperMapPages(PVM pVM, void *pvR3, RTR0PTR pvR0, size_t cPages, PCSUPPAGE paPages, const char *pszDesc, PRTGCPTR pGCPtr);
343VMMR3DECL(int) MMR3HyperReserve(PVM pVM, unsigned cb, const char *pszDesc, PRTGCPTR pGCPtr);
344VMMR3DECL(RTHCPHYS) MMR3HyperHCVirt2HCPhys(PVM pVM, void *pvHC);
345VMMR3DECL(int) MMR3HyperHCVirt2HCPhysEx(PVM pVM, void *pvHC, PRTHCPHYS pHCPhys);
346VMMR3DECL(void *) MMR3HyperHCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys);
347VMMR3DECL(int) MMR3HyperHCPhys2HCVirtEx(PVM pVM, RTHCPHYS HCPhys, void **ppv);
348VMMR3DECL(int) MMR3HyperReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb);
349/** @} */
350
351
352/** @defgroup grp_mm_phys Guest Physical Memory Manager
353 * @ingroup grp_mm_r3
354 * @{ */
355VMMR3DECL(int) MMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, const char *pszDesc);
356#ifndef VBOX_WITH_NEW_PHYS_CODE
357VMMR3DECL(int) MMR3PhysRegisterEx(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, MMPHYSREG enmType, const char *pszDesc);
358#endif
359VMMR3DECL(int) MMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc);
360VMMR3DECL(int) MMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange);
361VMMR3DECL(int) MMR3PhysReserve(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
362VMMR3DECL(uint64_t) MMR3PhysGetRamSize(PVM pVM);
363/** @} */
364
365
366/** @defgroup grp_mm_page Physical Page Pool
367 * @ingroup grp_mm_r3
368 * @{ */
369VMMR3DECL(void *) MMR3PageAlloc(PVM pVM);
370VMMR3DECL(RTHCPHYS) MMR3PageAllocPhys(PVM pVM);
371VMMR3DECL(void) MMR3PageFree(PVM pVM, void *pvPage);
372VMMR3DECL(void *) MMR3PageAllocLow(PVM pVM);
373VMMR3DECL(void) MMR3PageFreeLow(PVM pVM, void *pvPage);
374VMMR3DECL(void) MMR3PageFreeByPhys(PVM pVM, RTHCPHYS HCPhysPage);
375VMMR3DECL(void *) MMR3PageDummyHCPtr(PVM pVM);
376VMMR3DECL(RTHCPHYS) MMR3PageDummyHCPhys(PVM pVM);
377/** @} */
378
379
380/** @defgroup grp_mm_heap Heap Manager
381 * @ingroup grp_mm_r3
382 * @{ */
383VMMR3DECL(void *) MMR3HeapAlloc(PVM pVM, MMTAG enmTag, size_t cbSize);
384VMMR3DECL(void *) MMR3HeapAllocU(PUVM pUVM, MMTAG enmTag, size_t cbSize);
385VMMR3DECL(int) MMR3HeapAllocEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv);
386VMMR3DECL(int) MMR3HeapAllocExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv);
387VMMR3DECL(void *) MMR3HeapAllocZ(PVM pVM, MMTAG enmTag, size_t cbSize);
388VMMR3DECL(void *) MMR3HeapAllocZU(PUVM pUVM, MMTAG enmTag, size_t cbSize);
389VMMR3DECL(int) MMR3HeapAllocZEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv);
390VMMR3DECL(int) MMR3HeapAllocZExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv);
391VMMR3DECL(void *) MMR3HeapRealloc(void *pv, size_t cbNewSize);
392VMMR3DECL(char *) MMR3HeapStrDup(PVM pVM, MMTAG enmTag, const char *psz);
393VMMR3DECL(char *) MMR3HeapStrDupU(PUVM pUVM, MMTAG enmTag, const char *psz);
394VMMR3DECL(char *) MMR3HeapAPrintf(PVM pVM, MMTAG enmTag, const char *pszFormat, ...);
395VMMR3DECL(char *) MMR3HeapAPrintfU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, ...);
396VMMR3DECL(char *) MMR3HeapAPrintfV(PVM pVM, MMTAG enmTag, const char *pszFormat, va_list va);
397VMMR3DECL(char *) MMR3HeapAPrintfVU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, va_list va);
398VMMR3DECL(void) MMR3HeapFree(void *pv);
399/** @} */
400
401/** @} */
402#endif /* IN_RING3 */
403
404
405
406#ifdef IN_RC
407/** @defgroup grp_mm_gc The MM Guest Context API
408 * @ingroup grp_mm
409 * @{
410 */
411
412VMMRCDECL(void) MMGCRamRegisterTrapHandler(PVM pVM);
413VMMRCDECL(void) MMGCRamDeregisterTrapHandler(PVM pVM);
414VMMRCDECL(int) MMGCRamReadNoTrapHandler(void *pDst, void *pSrc, size_t cb);
415VMMRCDECL(int) MMGCRamWriteNoTrapHandler(void *pDst, void *pSrc, size_t cb);
416VMMRCDECL(int) MMGCRamRead(PVM pVM, void *pDst, void *pSrc, size_t cb);
417VMMRCDECL(int) MMGCRamWrite(PVM pVM, void *pDst, void *pSrc, size_t cb);
418
419/** @} */
420#endif /* IN_RC */
421
422/** @} */
423__END_DECLS
424
425
426#endif
427
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