| 1 | /** @file
|
|---|
| 2 | * MSI - Message signalled interrupts support.
|
|---|
| 3 | */
|
|---|
| 4 |
|
|---|
| 5 | /*
|
|---|
| 6 | * Copyright (C) 2010-2020 Oracle Corporation
|
|---|
| 7 | *
|
|---|
| 8 | * This file is part of VirtualBox Open Source Edition (OSE), as
|
|---|
| 9 | * available from http://www.virtualbox.org. This file is free software;
|
|---|
| 10 | * you can redistribute it and/or modify it under the terms of the GNU
|
|---|
| 11 | * General Public License (GPL) as published by the Free Software
|
|---|
| 12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
|
|---|
| 13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
|
|---|
| 14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
|
|---|
| 15 | *
|
|---|
| 16 | * The contents of this file may alternatively be used under the terms
|
|---|
| 17 | * of the Common Development and Distribution License Version 1.0
|
|---|
| 18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
|
|---|
| 19 | * VirtualBox OSE distribution, in which case the provisions of the
|
|---|
| 20 | * CDDL are applicable instead of those of the GPL.
|
|---|
| 21 | *
|
|---|
| 22 | * You may elect to license modified versions of this file under the
|
|---|
| 23 | * terms and conditions of either the GPL or the CDDL or both.
|
|---|
| 24 | */
|
|---|
| 25 |
|
|---|
| 26 | #ifndef VBOX_INCLUDED_msi_h
|
|---|
| 27 | #define VBOX_INCLUDED_msi_h
|
|---|
| 28 | #ifndef RT_WITHOUT_PRAGMA_ONCE
|
|---|
| 29 | # pragma once
|
|---|
| 30 | #endif
|
|---|
| 31 |
|
|---|
| 32 | #include <VBox/cdefs.h>
|
|---|
| 33 | #include <VBox/types.h>
|
|---|
| 34 | #include <iprt/assert.h>
|
|---|
| 35 |
|
|---|
| 36 | #include <VBox/pci.h>
|
|---|
| 37 |
|
|---|
| 38 | /* Constants for Intel APIC MSI messages */
|
|---|
| 39 | #define VBOX_MSI_DATA_VECTOR_SHIFT 0
|
|---|
| 40 | #define VBOX_MSI_DATA_VECTOR_MASK 0x000000ff
|
|---|
| 41 | #define VBOX_MSI_DATA_VECTOR(v) (((v) << VBOX_MSI_DATA_VECTOR_SHIFT) & \
|
|---|
| 42 | VBOX_MSI_DATA_VECTOR_MASK)
|
|---|
| 43 | #define VBOX_MSI_DATA_DELIVERY_MODE_SHIFT 8
|
|---|
| 44 | #define VBOX_MSI_DATA_DELIVERY_FIXED (0 << VBOX_MSI_DATA_DELIVERY_MODE_SHIFT)
|
|---|
| 45 | #define VBOX_MSI_DATA_DELIVERY_LOWPRI (1 << VBOX_MSI_DATA_DELIVERY_MODE_SHIFT)
|
|---|
| 46 |
|
|---|
| 47 | #define VBOX_MSI_DATA_LEVEL_SHIFT 14
|
|---|
| 48 | #define VBOX_MSI_DATA_LEVEL_DEASSERT (0 << VBOX_MSI_DATA_LEVEL_SHIFT)
|
|---|
| 49 | #define VBOX_MSI_DATA_LEVEL_ASSERT (1 << VBOX_MSI_DATA_LEVEL_SHIFT)
|
|---|
| 50 |
|
|---|
| 51 | #define VBOX_MSI_DATA_TRIGGER_SHIFT 15
|
|---|
| 52 | #define VBOX_MSI_DATA_TRIGGER_EDGE (0 << VBOX_MSI_DATA_TRIGGER_SHIFT)
|
|---|
| 53 | #define VBOX_MSI_DATA_TRIGGER_LEVEL (1 << VBOX_MSI_DATA_TRIGGER_SHIFT)
|
|---|
| 54 |
|
|---|
| 55 | /**
|
|---|
| 56 | * MSI region, actually same as LAPIC MMIO region, but listens on bus,
|
|---|
| 57 | * not CPU, accesses.
|
|---|
| 58 | */
|
|---|
| 59 | #define VBOX_MSI_ADDR_BASE 0xfee00000
|
|---|
| 60 | #define VBOX_MSI_ADDR_SIZE 0x100000
|
|---|
| 61 |
|
|---|
| 62 | #define VBOX_MSI_ADDR_DEST_MODE_SHIFT 2
|
|---|
| 63 | #define VBOX_MSI_ADDR_DEST_MODE_PHYSICAL (0 << VBOX_MSI_ADDR_DEST_MODE_SHIFT)
|
|---|
| 64 | #define VBOX_MSI_ADDR_DEST_MODE_LOGICAL (1 << VBOX_MSI_ADDR_DEST_MODE_SHIFT)
|
|---|
| 65 |
|
|---|
| 66 | #define VBOX_MSI_ADDR_REDIRECTION_SHIFT 3
|
|---|
| 67 | #define VBOX_MSI_ADDR_REDIRECTION_CPU (0 << VBOX_MSI_ADDR_REDIRECTION_SHIFT)
|
|---|
| 68 | /* dedicated cpu */
|
|---|
| 69 | #define VBOX_MSI_ADDR_REDIRECTION_LOWPRI (1 << VBOX_MSI_ADDR_REDIRECTION_SHIFT)
|
|---|
| 70 | /* lowest priority */
|
|---|
| 71 |
|
|---|
| 72 | #define VBOX_MSI_ADDR_DEST_ID_SHIFT 12
|
|---|
| 73 | #define VBOX_MSI_ADDR_DEST_ID_MASK 0x00ffff0
|
|---|
| 74 | #define VBOX_MSI_ADDR_DEST_ID(dest) (((dest) << VBOX_MSI_ADDR_DEST_ID_SHIFT) & \
|
|---|
| 75 | VBOX_MSI_ADDR_DEST_ID_MASK)
|
|---|
| 76 | #define VBOX_MSI_ADDR_EXT_DEST_ID(dest) ((dest) & 0xffffff00)
|
|---|
| 77 |
|
|---|
| 78 | #define VBOX_MSI_ADDR_IR_EXT_INT (1 << 4)
|
|---|
| 79 | #define VBOX_MSI_ADDR_IR_SHV (1 << 3)
|
|---|
| 80 | #define VBOX_MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13)
|
|---|
| 81 | #define VBOX_MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5)
|
|---|
| 82 |
|
|---|
| 83 | /* Maximum number of vectors, per device/function */
|
|---|
| 84 | #define VBOX_MSI_MAX_ENTRIES 32
|
|---|
| 85 |
|
|---|
| 86 | /* Offsets in MSI PCI capability structure (VBOX_PCI_CAP_ID_MSI) */
|
|---|
| 87 | #define VBOX_MSI_CAP_MESSAGE_CONTROL 0x02
|
|---|
| 88 | #define VBOX_MSI_CAP_MESSAGE_ADDRESS_32 0x04
|
|---|
| 89 | #define VBOX_MSI_CAP_MESSAGE_ADDRESS_LO 0x04
|
|---|
| 90 | #define VBOX_MSI_CAP_MESSAGE_ADDRESS_HI 0x08
|
|---|
| 91 | #define VBOX_MSI_CAP_MESSAGE_DATA_32 0x08
|
|---|
| 92 | #define VBOX_MSI_CAP_MESSAGE_DATA_64 0x0c
|
|---|
| 93 | #define VBOX_MSI_CAP_MASK_BITS_32 0x0c
|
|---|
| 94 | #define VBOX_MSI_CAP_PENDING_BITS_32 0x10
|
|---|
| 95 | #define VBOX_MSI_CAP_MASK_BITS_64 0x10
|
|---|
| 96 | #define VBOX_MSI_CAP_PENDING_BITS_64 0x14
|
|---|
| 97 |
|
|---|
| 98 | /* We implement MSI with per-vector masking */
|
|---|
| 99 | #define VBOX_MSI_CAP_SIZE_32 0x14
|
|---|
| 100 | #define VBOX_MSI_CAP_SIZE_64 0x18
|
|---|
| 101 |
|
|---|
| 102 | /**
|
|---|
| 103 | * MSI-X differs from MSI by the fact that a dedicated physical page (in device
|
|---|
| 104 | * memory) is assigned for MSI-X table, and Pending Bit Array (PBA), which is
|
|---|
| 105 | * recommended to be separated from the main table by at least 2K.
|
|---|
| 106 | *
|
|---|
| 107 | * @{
|
|---|
| 108 | */
|
|---|
| 109 | /** Size of a MSI-X page */
|
|---|
| 110 | #define VBOX_MSIX_PAGE_SIZE 0x1000
|
|---|
| 111 | /** Pending interrupts (PBA) */
|
|---|
| 112 | #define VBOX_MSIX_PAGE_PENDING (VBOX_MSIX_PAGE_SIZE / 2)
|
|---|
| 113 | /** Maximum number of vectors, per device/function */
|
|---|
| 114 | #define VBOX_MSIX_MAX_ENTRIES 2048
|
|---|
| 115 | /** Size of MSI-X PCI capability */
|
|---|
| 116 | #define VBOX_MSIX_CAP_SIZE 12
|
|---|
| 117 | /** Offsets in MSI-X PCI capability structure (VBOX_PCI_CAP_ID_MSIX) */
|
|---|
| 118 | #define VBOX_MSIX_CAP_MESSAGE_CONTROL 0x02
|
|---|
| 119 | #define VBOX_MSIX_TABLE_BIROFFSET 0x04
|
|---|
| 120 | #define VBOX_MSIX_PBA_BIROFFSET 0x08
|
|---|
| 121 | /** Size of single MSI-X table entry */
|
|---|
| 122 | #define VBOX_MSIX_ENTRY_SIZE 16
|
|---|
| 123 | /** @} */
|
|---|
| 124 |
|
|---|
| 125 |
|
|---|
| 126 | #endif /* !VBOX_INCLUDED_msi_h */
|
|---|
