VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 18585

Last change on this file since 18585 was 18143, checked in by vboxsync, 16 years ago

VMM,Devices: Changed ROM registration and fixed some shadowed ROM issues in the new phys code.

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File size: 145.0 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#ifndef VBOX_WITH_NEW_PHYS_CODE
44# include <VBox/mm.h>
45#endif
46#include <VBox/err.h>
47#include <VBox/pci.h>
48#include <iprt/stdarg.h>
49
50__BEGIN_DECLS
51
52/** @defgroup grp_pdm_device The PDM Devices API
53 * @ingroup grp_pdm
54 * @{
55 */
56
57/**
58 * Construct a device instance for a VM.
59 *
60 * @returns VBox status.
61 * @param pDevIns The device instance data.
62 * If the registration structure is needed, pDevIns->pDevReg points to it.
63 * @param iInstance Instance number. Use this to figure out which registers and such to use.
64 * The instance number is also found in pDevIns->iInstance, but since it's
65 * likely to be freqently used PDM passes it as parameter.
66 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
67 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
68 * primary usage will in this function it's passed as a parameter.
69 */
70typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
71/** Pointer to a FNPDMDEVCONSTRUCT() function. */
72typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
73
74/**
75 * Destruct a device instance.
76 *
77 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
78 * resources can be freed correctly.
79 *
80 * @returns VBox status.
81 * @param pDevIns The device instance data.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * When this callback is called the device instance data, and if the
91 * device have a GC component, is being relocated, or/and the selectors
92 * have been changed. The device must use the chance to perform the
93 * necessary pointer relocations and data updates.
94 *
95 * Before the GC code is executed the first time, this function will be
96 * called with a 0 delta so GC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remark A relocation CANNOT fail.
102 */
103typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
104/** Pointer to a FNPDMDEVRELOCATE() function. */
105typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
106
107
108/**
109 * Device I/O Control interface.
110 *
111 * This is used by external components, such as the COM interface, to
112 * communicate with devices using a class wide interface or a device
113 * specific interface.
114 *
115 * @returns VBox status code.
116 * @param pDevIns Pointer to the device instance.
117 * @param uFunction Function to perform.
118 * @param pvIn Pointer to input data.
119 * @param cbIn Size of input data.
120 * @param pvOut Pointer to output data.
121 * @param cbOut Size of output data.
122 * @param pcbOut Where to store the actual size of the output data.
123 */
124typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
125 void *pvIn, RTUINT cbIn,
126 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
127/** Pointer to a FNPDMDEVIOCTL() function. */
128typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
129
130/**
131 * Power On notification.
132 *
133 * @returns VBox status.
134 * @param pDevIns The device instance data.
135 */
136typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
137/** Pointer to a FNPDMDEVPOWERON() function. */
138typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
139
140/**
141 * Reset notification.
142 *
143 * @returns VBox status.
144 * @param pDevIns The device instance data.
145 */
146typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
147/** Pointer to a FNPDMDEVRESET() function. */
148typedef FNPDMDEVRESET *PFNPDMDEVRESET;
149
150/**
151 * Suspend notification.
152 *
153 * @returns VBox status.
154 * @param pDevIns The device instance data.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVSUSPEND() function. */
158typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
159
160/**
161 * Resume notification.
162 *
163 * @returns VBox status.
164 * @param pDevIns The device instance data.
165 */
166typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
167/** Pointer to a FNPDMDEVRESUME() function. */
168typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
169
170/**
171 * Power Off notification.
172 *
173 * @param pDevIns The device instance data.
174 */
175typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
176/** Pointer to a FNPDMDEVPOWEROFF() function. */
177typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
178
179/**
180 * Attach command.
181 *
182 * This is called to let the device attach to a driver for a specified LUN
183 * at runtime. This is not called during VM construction, the device
184 * constructor have to attach to all the available drivers.
185 *
186 * This is like plugging in the keyboard or mouse after turning on the PC.
187 *
188 * @returns VBox status code.
189 * @param pDevIns The device instance.
190 * @param iLUN The logical unit which is being detached.
191 */
192typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
193/** Pointer to a FNPDMDEVATTACH() function. */
194typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
195
196/**
197 * Detach notification.
198 *
199 * This is called when a driver is detaching itself from a LUN of the device.
200 * The device should adjust it's state to reflect this.
201 *
202 * This is like unplugging the network cable to use it for the laptop or
203 * something while the PC is still running.
204 *
205 * @param pDevIns The device instance.
206 * @param iLUN The logical unit which is being detached.
207 */
208typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
209/** Pointer to a FNPDMDEVDETACH() function. */
210typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
211
212/**
213 * Query the base interface of a logical unit.
214 *
215 * @returns VBOX status code.
216 * @param pDevIns The device instance.
217 * @param iLUN The logicial unit to query.
218 * @param ppBase Where to store the pointer to the base interface of the LUN.
219 */
220typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
221/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
222typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
223
224/**
225 * Init complete notification.
226 * This can be done to do communication with other devices and other
227 * initialization which requires everything to be in place.
228 *
229 * @returns VBOX status code.
230 * @param pDevIns The device instance.
231 */
232typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
233/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
234typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
235
236
237
238/** PDM Device Registration Structure,
239 * This structure is used when registering a device from
240 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
241 * the VM is terminated.
242 */
243typedef struct PDMDEVREG
244{
245 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
246 uint32_t u32Version;
247 /** Device name. */
248 char szDeviceName[32];
249 /** Name of the raw-mode context module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
251 char szRCMod[32];
252 /** Name of the ring-0 module (no path).
253 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
254 char szR0Mod[32];
255 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
256 * remain unchanged from registration till VM destruction. */
257 const char *pszDescription;
258
259 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
260 RTUINT fFlags;
261 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
262 RTUINT fClass;
263 /** Maximum number of instances (per VM). */
264 RTUINT cMaxInstances;
265 /** Size of the instance data. */
266 RTUINT cbInstance;
267
268 /** Construct instance - required. */
269 PFNPDMDEVCONSTRUCT pfnConstruct;
270 /** Destruct instance - optional. */
271 PFNPDMDEVDESTRUCT pfnDestruct;
272 /** Relocation command - optional. */
273 PFNPDMDEVRELOCATE pfnRelocate;
274 /** I/O Control interface - optional. */
275 PFNPDMDEVIOCTL pfnIOCtl;
276 /** Power on notification - optional. */
277 PFNPDMDEVPOWERON pfnPowerOn;
278 /** Reset notification - optional. */
279 PFNPDMDEVRESET pfnReset;
280 /** Suspend notification - optional. */
281 PFNPDMDEVSUSPEND pfnSuspend;
282 /** Resume notification - optional. */
283 PFNPDMDEVRESUME pfnResume;
284 /** Attach command - optional. */
285 PFNPDMDEVATTACH pfnAttach;
286 /** Detach notification - optional. */
287 PFNPDMDEVDETACH pfnDetach;
288 /** Query a LUN base interface - optional. */
289 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
290 /** Init complete notification - optional. */
291 PFNPDMDEVINITCOMPLETE pfnInitComplete;
292 /** Power off notification - optional. */
293 PFNPDMDEVPOWEROFF pfnPowerOff;
294 /** @todo */
295 PFNRT pfnSoftReset;
296 /** Initialization safty marker. */
297 uint32_t u32VersionEnd;
298} PDMDEVREG;
299/** Pointer to a PDM Device Structure. */
300typedef PDMDEVREG *PPDMDEVREG;
301/** Const pointer to a PDM Device Structure. */
302typedef PDMDEVREG const *PCPDMDEVREG;
303
304/** Current DEVREG version number. */
305#define PDM_DEVREG_VERSION 0xc0020000
306
307/** PDM Device Flags.
308 * @{ */
309/** This flag is used to indicate that the device has a RC component. */
310#define PDM_DEVREG_FLAGS_RC 0x00000001
311/** This flag is used to indicate that the device has a R0 component. */
312#define PDM_DEVREG_FLAGS_R0 0x00000002
313
314/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
315 * The bit count for the current host. */
316#if HC_ARCH_BITS == 32
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
318#elif HC_ARCH_BITS == 64
319# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
320#else
321# error Unsupported HC_ARCH_BITS value.
322#endif
323/** The host bit count mask. */
324#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
325
326/** The device support only 32-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
328/** The device support only 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
330/** The device support both 32-bit & 64-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
332/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
333 * The guest bit count for the current compilation. */
334#if GC_ARCH_BITS == 32
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
336#elif GC_ARCH_BITS == 64
337# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
338#else
339# error Unsupported GC_ARCH_BITS value.
340#endif
341/** The guest bit count mask. */
342#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
343
344/** A convenience. */
345#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
346
347/** Indicates that the devices support PAE36 on a 32-bit guest. */
348#define PDM_DEVREG_FLAGS_PAE36 0x00001000
349
350/** Indicates that the device needs to be notified before the drivers when suspending. */
351#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
352
353/** Indicates that the device needs to be notified before the drivers when powering off. */
354#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
355/** @} */
356
357
358/** PDM Device Classes.
359 * The order is important, lower bit earlier instantiation.
360 * @{ */
361/** Architecture device. */
362#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
363/** Architecture BIOS device. */
364#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
365/** PCI bus brigde. */
366#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
367/** ISA bus brigde. */
368#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
369/** Input device (mouse, keyboard, joystick, HID, ...). */
370#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
371/** Interrupt controller (PIC). */
372#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
373/** Interval controoler (PIT). */
374#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
375/** RTC/CMOS. */
376#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
377/** DMA controller. */
378#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
379/** VMM Device. */
380#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
381/** Graphics device, like VGA. */
382#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
383/** Storage controller device. */
384#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
385/** Network interface controller. */
386#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
387/** Audio. */
388#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
389/** USB HIC. */
390#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
391/** ACPI. */
392#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
393/** Serial controller device. */
394#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
395/** Parallel controller device */
396#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
397/** Misc devices (always last). */
398#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
399/** @} */
400
401
402/** @name IRQ Level for use with the *SetIrq APIs.
403 * @{
404 */
405/** Assert the IRQ (can assume value 1). */
406#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
407/** Deassert the IRQ (can assume value 0). */
408#define PDM_IRQ_LEVEL_LOW 0
409/** flip-flop - assert and then deassert it again immediately. */
410#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
411/** @} */
412
413
414/**
415 * PCI Bus registration structure.
416 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
417 */
418typedef struct PDMPCIBUSREG
419{
420 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
421 uint32_t u32Version;
422
423 /**
424 * Registers the device with the default PCI bus.
425 *
426 * @returns VBox status code.
427 * @param pDevIns Device instance of the PCI Bus.
428 * @param pPciDev The PCI device structure.
429 * Any PCI enabled device must keep this in it's instance data!
430 * Fill in the PCI data config before registration, please.
431 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
432 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
433 * If negative, the pci bus device will assign one.
434 */
435 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
436
437 /**
438 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
439 *
440 * @returns VBox status code.
441 * @param pDevIns Device instance of the PCI Bus.
442 * @param pPciDev The PCI device structure.
443 * @param iRegion The region number.
444 * @param cbRegion Size of the region.
445 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
446 * @param pfnCallback Callback for doing the mapping.
447 */
448 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
449
450 /**
451 * Register PCI configuration space read/write callbacks.
452 *
453 * @param pDevIns Device instance of the PCI Bus.
454 * @param pPciDev The PCI device structure.
455 * @param pfnRead Pointer to the user defined PCI config read function.
456 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
457 * PCI config read function. This way, user can decide when (and if)
458 * to call default PCI config read function. Can be NULL.
459 * @param pfnWrite Pointer to the user defined PCI config write function.
460 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
461 * PCI config write function. This way, user can decide when (and if)
462 * to call default PCI config write function. Can be NULL.
463 * @thread EMT
464 */
465 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
466 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
467
468 /**
469 * Set the IRQ for a PCI device.
470 *
471 * @param pDevIns Device instance of the PCI Bus.
472 * @param pPciDev The PCI device structure.
473 * @param iIrq IRQ number to set.
474 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
475 */
476 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
477
478 /**
479 * Saves a state of the PCI device.
480 *
481 * @returns VBox status code.
482 * @param pDevIns Device instance of the PCI Bus.
483 * @param pPciDev Pointer to PCI device.
484 * @param pSSMHandle The handle to save the state to.
485 */
486 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
487
488 /**
489 * Loads a saved PCI device state.
490 *
491 * @returns VBox status code.
492 * @param pDevIns Device instance of the PCI Bus.
493 * @param pPciDev Pointer to PCI device.
494 * @param pSSMHandle The handle to the saved state.
495 */
496 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
497
498 /**
499 * Called to perform the job of the bios.
500 * This is only called for the first PCI Bus - it is expected to
501 * service all the PCI buses.
502 *
503 * @returns VBox status.
504 * @param pDevIns Device instance of the first bus.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
507
508 /** The name of the SetIrq RC entry point. */
509 const char *pszSetIrqRC;
510
511 /** The name of the SetIrq R0 entry point. */
512 const char *pszSetIrqR0;
513
514} PDMPCIBUSREG;
515/** Pointer to a PCI bus registration structure. */
516typedef PDMPCIBUSREG *PPDMPCIBUSREG;
517
518/** Current PDMPCIBUSREG version number. */
519#define PDM_PCIBUSREG_VERSION 0xd0020000
520
521/**
522 * PCI Bus RC helpers.
523 */
524typedef struct PDMPCIHLPRC
525{
526 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
527 uint32_t u32Version;
528
529 /**
530 * Set an ISA IRQ.
531 *
532 * @param pDevIns PCI device instance.
533 * @param iIrq IRQ number to set.
534 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
535 * @thread EMT only.
536 */
537 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
538
539 /**
540 * Set an I/O-APIC IRQ.
541 *
542 * @param pDevIns PCI device instance.
543 * @param iIrq IRQ number to set.
544 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
545 * @thread EMT only.
546 */
547 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
548
549 /**
550 * Acquires the PDM lock.
551 *
552 * @returns VINF_SUCCESS on success.
553 * @returns rc if we failed to acquire the lock.
554 * @param pDevIns The PCI device instance.
555 * @param rc What to return if we fail to acquire the lock.
556 */
557 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
558
559 /**
560 * Releases the PDM lock.
561 *
562 * @param pDevIns The PCI device instance.
563 */
564 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
565
566 /** Just a safety precaution. */
567 uint32_t u32TheEnd;
568} PDMPCIHLPRC;
569/** Pointer to PCI helpers. */
570typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
571/** Pointer to const PCI helpers. */
572typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
573
574/** Current PDMPCIHLPR3 version number. */
575#define PDM_PCIHLPRC_VERSION 0xe1010000
576
577
578/**
579 * PCI Bus R0 helpers.
580 */
581typedef struct PDMPCIHLPR0
582{
583 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
584 uint32_t u32Version;
585
586 /**
587 * Set an ISA IRQ.
588 *
589 * @param pDevIns PCI device instance.
590 * @param iIrq IRQ number to set.
591 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
592 * @thread EMT only.
593 */
594 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
595
596 /**
597 * Set an I/O-APIC IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @thread EMT only.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
605
606 /**
607 * Acquires the PDM lock.
608 *
609 * @returns VINF_SUCCESS on success.
610 * @returns rc if we failed to acquire the lock.
611 * @param pDevIns The PCI device instance.
612 * @param rc What to return if we fail to acquire the lock.
613 */
614 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
615
616 /**
617 * Releases the PDM lock.
618 *
619 * @param pDevIns The PCI device instance.
620 */
621 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
622
623 /** Just a safety precaution. */
624 uint32_t u32TheEnd;
625} PDMPCIHLPR0;
626/** Pointer to PCI helpers. */
627typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
628/** Pointer to const PCI helpers. */
629typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
630
631/** Current PDMPCIHLPR0 version number. */
632#define PDM_PCIHLPR0_VERSION 0xe1010000
633
634/**
635 * PCI device helpers.
636 */
637typedef struct PDMPCIHLPR3
638{
639 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
640 uint32_t u32Version;
641
642 /**
643 * Set an ISA IRQ.
644 *
645 * @param pDevIns The PCI device instance.
646 * @param iIrq IRQ number to set.
647 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
648 * @thread EMT only.
649 */
650 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
651
652 /**
653 * Set an I/O-APIC IRQ.
654 *
655 * @param pDevIns The PCI device instance.
656 * @param iIrq IRQ number to set.
657 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
658 * @thread EMT only.
659 */
660 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
661
662 /**
663 * Checks if the given address is an MMIO2 base address or not.
664 *
665 * @returns true/false accordingly.
666 * @param pDevIns The PCI device instance.
667 * @param pOwner The owner of the memory, optional.
668 * @param GCPhys The address to check.
669 */
670 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
671
672 /**
673 * Gets the address of the RC PCI Bus helpers.
674 *
675 * This should be called at both construction and relocation time
676 * to obtain the correct address of the RC helpers.
677 *
678 * @returns RC pointer to the PCI Bus helpers.
679 * @param pDevIns Device instance of the PCI Bus.
680 * @thread EMT only.
681 */
682 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
683
684 /**
685 * Gets the address of the R0 PCI Bus helpers.
686 *
687 * This should be called at both construction and relocation time
688 * to obtain the correct address of the R0 helpers.
689 *
690 * @returns R0 pointer to the PCI Bus helpers.
691 * @param pDevIns Device instance of the PCI Bus.
692 * @thread EMT only.
693 */
694 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
695
696 /**
697 * Acquires the PDM lock.
698 *
699 * @returns VINF_SUCCESS on success.
700 * @returns Fatal error on failure.
701 * @param pDevIns The PCI device instance.
702 * @param rc Dummy for making the interface identical to the RC and R0 versions.
703 */
704 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
705
706 /**
707 * Releases the PDM lock.
708 *
709 * @param pDevIns The PCI device instance.
710 */
711 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
712
713 /** Just a safety precaution. */
714 uint32_t u32TheEnd;
715} PDMPCIHLPR3;
716/** Pointer to PCI helpers. */
717typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
718/** Pointer to const PCI helpers. */
719typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
720
721/** Current PDMPCIHLPR3 version number. */
722#define PDM_PCIHLPR3_VERSION 0xf1020000
723
724
725/**
726 * Programmable Interrupt Controller registration structure.
727 */
728typedef struct PDMPICREG
729{
730 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
731 uint32_t u32Version;
732
733 /**
734 * Set the an IRQ.
735 *
736 * @param pDevIns Device instance of the PIC.
737 * @param iIrq IRQ number to set.
738 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
739 */
740 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
741
742 /**
743 * Get a pending interrupt.
744 *
745 * @returns Pending interrupt number.
746 * @param pDevIns Device instance of the PIC.
747 */
748 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
749
750 /** The name of the RC SetIrq entry point. */
751 const char *pszSetIrqRC;
752 /** The name of the RC GetInterrupt entry point. */
753 const char *pszGetInterruptRC;
754
755 /** The name of the R0 SetIrq entry point. */
756 const char *pszSetIrqR0;
757 /** The name of the R0 GetInterrupt entry point. */
758 const char *pszGetInterruptR0;
759} PDMPICREG;
760/** Pointer to a PIC registration structure. */
761typedef PDMPICREG *PPDMPICREG;
762
763/** Current PDMPICREG version number. */
764#define PDM_PICREG_VERSION 0xe0020000
765
766/**
767 * PIC RC helpers.
768 */
769typedef struct PDMPICHLPRC
770{
771 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
772 uint32_t u32Version;
773
774 /**
775 * Set the interrupt force action flag.
776 *
777 * @param pDevIns Device instance of the PIC.
778 */
779 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
780
781 /**
782 * Clear the interrupt force action flag.
783 *
784 * @param pDevIns Device instance of the PIC.
785 */
786 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
787
788 /**
789 * Acquires the PDM lock.
790 *
791 * @returns VINF_SUCCESS on success.
792 * @returns rc if we failed to acquire the lock.
793 * @param pDevIns The PIC device instance.
794 * @param rc What to return if we fail to acquire the lock.
795 */
796 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
797
798 /**
799 * Releases the PDM lock.
800 *
801 * @param pDevIns The PIC device instance.
802 */
803 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
804
805 /** Just a safety precaution. */
806 uint32_t u32TheEnd;
807} PDMPICHLPRC;
808
809/** Pointer to PIC RC helpers. */
810typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
811/** Pointer to const PIC RC helpers. */
812typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
813
814/** Current PDMPICHLPRC version number. */
815#define PDM_PICHLPRC_VERSION 0xfc010000
816
817
818/**
819 * PIC R0 helpers.
820 */
821typedef struct PDMPICHLPR0
822{
823 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
824 uint32_t u32Version;
825
826 /**
827 * Set the interrupt force action flag.
828 *
829 * @param pDevIns Device instance of the PIC.
830 */
831 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
832
833 /**
834 * Clear the interrupt force action flag.
835 *
836 * @param pDevIns Device instance of the PIC.
837 */
838 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
839
840 /**
841 * Acquires the PDM lock.
842 *
843 * @returns VINF_SUCCESS on success.
844 * @returns rc if we failed to acquire the lock.
845 * @param pDevIns The PIC device instance.
846 * @param rc What to return if we fail to acquire the lock.
847 */
848 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
849
850 /**
851 * Releases the PDM lock.
852 *
853 * @param pDevIns The PCI device instance.
854 */
855 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
856
857 /** Just a safety precaution. */
858 uint32_t u32TheEnd;
859} PDMPICHLPR0;
860
861/** Pointer to PIC R0 helpers. */
862typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
863/** Pointer to const PIC R0 helpers. */
864typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
865
866/** Current PDMPICHLPR0 version number. */
867#define PDM_PICHLPR0_VERSION 0xfc010000
868
869/**
870 * PIC R3 helpers.
871 */
872typedef struct PDMPICHLPR3
873{
874 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
875 uint32_t u32Version;
876
877 /**
878 * Set the interrupt force action flag.
879 *
880 * @param pDevIns Device instance of the PIC.
881 */
882 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
883
884 /**
885 * Clear the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Acquires the PDM lock.
893 *
894 * @returns VINF_SUCCESS on success.
895 * @returns Fatal error on failure.
896 * @param pDevIns The PIC device instance.
897 * @param rc Dummy for making the interface identical to the RC and R0 versions.
898 */
899 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
900
901 /**
902 * Releases the PDM lock.
903 *
904 * @param pDevIns The PIC device instance.
905 */
906 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
907
908 /**
909 * Gets the address of the RC PIC helpers.
910 *
911 * This should be called at both construction and relocation time
912 * to obtain the correct address of the RC helpers.
913 *
914 * @returns RC pointer to the PIC helpers.
915 * @param pDevIns Device instance of the PIC.
916 */
917 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
918
919 /**
920 * Gets the address of the R0 PIC helpers.
921 *
922 * This should be called at both construction and relocation time
923 * to obtain the correct address of the R0 helpers.
924 *
925 * @returns R0 pointer to the PIC helpers.
926 * @param pDevIns Device instance of the PIC.
927 */
928 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
929
930 /** Just a safety precaution. */
931 uint32_t u32TheEnd;
932} PDMPICHLPR3;
933
934/** Pointer to PIC R3 helpers. */
935typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
936/** Pointer to const PIC R3 helpers. */
937typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
938
939/** Current PDMPICHLPR3 version number. */
940#define PDM_PICHLPR3_VERSION 0xf0010000
941
942
943
944/**
945 * Advanced Programmable Interrupt Controller registration structure.
946 */
947typedef struct PDMAPICREG
948{
949 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
950 uint32_t u32Version;
951
952 /**
953 * Get a pending interrupt.
954 *
955 * @returns Pending interrupt number.
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
959
960 /**
961 * Check if the APIC has a pending interrupt/if a TPR change would active one
962 *
963 * @returns Pending interrupt yes/no
964 * @param pDevIns Device instance of the APIC.
965 */
966 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
967
968 /**
969 * Set the APIC base.
970 *
971 * @param pDevIns Device instance of the APIC.
972 * @param u64Base The new base.
973 */
974 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
975
976 /**
977 * Get the APIC base.
978 *
979 * @returns Current base.
980 * @param pDevIns Device instance of the APIC.
981 */
982 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
983
984 /**
985 * Set the TPR (task priority register).
986 *
987 * @param pDevIns Device instance of the APIC.
988 * @param u8TPR The new TPR.
989 */
990 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
991
992 /**
993 * Get the TPR (task priority register).
994 *
995 * @returns The current TPR.
996 * @param pDevIns Device instance of the APIC.
997 * @param pfPending Pending interrupt state (out).
998 */
999 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
1000
1001 /**
1002 * Write MSR in APIC range.
1003 *
1004 * @returns VBox status code.
1005 * @param pDevIns Device instance of the APIC.
1006 * @param idCpu Target CPU.
1007 * @param u32Reg MSR to write.
1008 * @param u64Value Value to write.
1009 */
1010 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1011
1012 /**
1013 * Read MSR in APIC range.
1014 *
1015 * @returns VBox status code.
1016 * @param pDevIns Device instance of the APIC.
1017 * @param idCpu Target CPU.
1018 * @param u32Reg MSR to read.
1019 * @param pu64Value Value read.
1020 */
1021 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1022
1023 /**
1024 * Private interface between the IOAPIC and APIC.
1025 *
1026 * This is a low-level, APIC/IOAPIC implementation specific interface
1027 * which is registered with PDM only because it makes life so much
1028 * simpler right now (GC bits). This is a bad bad hack! The correct
1029 * way of doing this would involve some way of querying GC interfaces
1030 * and relocating them. Perhaps doing some kind of device init in GC...
1031 *
1032 * @returns The current TPR.
1033 * @param pDevIns Device instance of the APIC.
1034 * @param u8Dest See APIC implementation.
1035 * @param u8DestMode See APIC implementation.
1036 * @param u8DeliveryMode See APIC implementation.
1037 * @param iVector See APIC implementation.
1038 * @param u8Polarity See APIC implementation.
1039 * @param u8TriggerMode See APIC implementation.
1040 */
1041 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1042 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1043
1044 /** The name of the RC GetInterrupt entry point. */
1045 const char *pszGetInterruptRC;
1046 /** The name of the RC HasPendingIrq entry point. */
1047 const char *pszHasPendingIrqRC;
1048 /** The name of the RC SetBase entry point. */
1049 const char *pszSetBaseRC;
1050 /** The name of the RC GetBase entry point. */
1051 const char *pszGetBaseRC;
1052 /** The name of the RC SetTPR entry point. */
1053 const char *pszSetTPRRC;
1054 /** The name of the RC GetTPR entry point. */
1055 const char *pszGetTPRRC;
1056 /** The name of the RC WriteMSR entry point. */
1057 const char *pszWriteMSRRC;
1058 /** The name of the RC ReadMSR entry point. */
1059 const char *pszReadMSRRC;
1060 /** The name of the RC BusDeliver entry point. */
1061 const char *pszBusDeliverRC;
1062
1063 /** The name of the R0 GetInterrupt entry point. */
1064 const char *pszGetInterruptR0;
1065 /** The name of the R0 HasPendingIrq entry point. */
1066 const char *pszHasPendingIrqR0;
1067 /** The name of the R0 SetBase entry point. */
1068 const char *pszSetBaseR0;
1069 /** The name of the R0 GetBase entry point. */
1070 const char *pszGetBaseR0;
1071 /** The name of the R0 SetTPR entry point. */
1072 const char *pszSetTPRR0;
1073 /** The name of the R0 GetTPR entry point. */
1074 const char *pszGetTPRR0;
1075 /** The name of the R0 WriteMSR entry point. */
1076 const char *pszWriteMSRR0;
1077 /** The name of the R0 ReadMSR entry point. */
1078 const char *pszReadMSRR0;
1079 /** The name of the R0 BusDeliver entry point. */
1080 const char *pszBusDeliverR0;
1081
1082} PDMAPICREG;
1083/** Pointer to an APIC registration structure. */
1084typedef PDMAPICREG *PPDMAPICREG;
1085
1086/** Current PDMAPICREG version number. */
1087#define PDM_APICREG_VERSION 0x70010000
1088
1089
1090/**
1091 * APIC version argument for pfnChangeFeature.
1092 */
1093typedef enum PDMAPICVERSION
1094{
1095 /** Invalid 0 entry. */
1096 PDMAPICVERSION_INVALID = 0,
1097 /** No APIC. */
1098 PDMAPICVERSION_NONE,
1099 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1100 PDMAPICVERSION_APIC,
1101 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1102 PDMAPICVERSION_X2APIC,
1103 /** The usual 32-bit paranoia. */
1104 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1105} PDMAPICVERSION;
1106
1107
1108/**
1109 * APIC RC helpers.
1110 */
1111typedef struct PDMAPICHLPRC
1112{
1113 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1114 uint32_t u32Version;
1115
1116 /**
1117 * Set the interrupt force action flag.
1118 *
1119 * @param pDevIns Device instance of the APIC.
1120 * @param idCpu Virtual CPU to set flag upon.
1121 */
1122 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1123
1124 /**
1125 * Clear the interrupt force action flag.
1126 *
1127 * @param pDevIns Device instance of the APIC.
1128 * @param idCpu Virtual CPU to clear flag upon.
1129 */
1130 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1131
1132 /**
1133 * Modifies APIC-related bits in the CPUID feature mask.
1134 *
1135 * @param pDevIns Device instance of the APIC.
1136 * @param enmVersion Supported APIC version.
1137 */
1138 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1139
1140 /**
1141 * Acquires the PDM lock.
1142 *
1143 * @returns VINF_SUCCESS on success.
1144 * @returns rc if we failed to acquire the lock.
1145 * @param pDevIns The APIC device instance.
1146 * @param rc What to return if we fail to acquire the lock.
1147 */
1148 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1149
1150 /**
1151 * Releases the PDM lock.
1152 *
1153 * @param pDevIns The APIC device instance.
1154 */
1155 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1156
1157 /**
1158 * Get the virtual CPU id corresponding to the current EMT.
1159 *
1160 * @param pDevIns The APIC device instance.
1161 */
1162 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1163
1164 /** Just a safety precaution. */
1165 uint32_t u32TheEnd;
1166} PDMAPICHLPRC;
1167/** Pointer to APIC GC helpers. */
1168typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1169/** Pointer to const APIC helpers. */
1170typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1171
1172/** Current PDMAPICHLPRC version number. */
1173#define PDM_APICHLPRC_VERSION 0x60010000
1174
1175
1176/**
1177 * APIC R0 helpers.
1178 */
1179typedef struct PDMAPICHLPR0
1180{
1181 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1182 uint32_t u32Version;
1183
1184 /**
1185 * Set the interrupt force action flag.
1186 *
1187 * @param pDevIns Device instance of the APIC.
1188 * @param idCpu Virtual CPU to set flag upon.
1189 */
1190 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1191
1192 /**
1193 * Clear the interrupt force action flag.
1194 *
1195 * @param pDevIns Device instance of the APIC.
1196 * @param idCpu Virtual CPU to clear flag upon.
1197 */
1198 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1199
1200 /**
1201 * Modifies APIC-related bits in the CPUID feature mask.
1202 *
1203 * @param pDevIns Device instance of the APIC.
1204 * @param enmVersion Supported APIC version.
1205 */
1206 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1207
1208 /**
1209 * Acquires the PDM lock.
1210 *
1211 * @returns VINF_SUCCESS on success.
1212 * @returns rc if we failed to acquire the lock.
1213 * @param pDevIns The APIC device instance.
1214 * @param rc What to return if we fail to acquire the lock.
1215 */
1216 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1217
1218 /**
1219 * Releases the PDM lock.
1220 *
1221 * @param pDevIns The APIC device instance.
1222 */
1223 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1224
1225 /**
1226 * Get the virtual CPU id corresponding to the current EMT.
1227 *
1228 * @param pDevIns The APIC device instance.
1229 */
1230 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1231
1232 /** Just a safety precaution. */
1233 uint32_t u32TheEnd;
1234} PDMAPICHLPR0;
1235/** Pointer to APIC GC helpers. */
1236typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1237/** Pointer to const APIC helpers. */
1238typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1239
1240/** Current PDMAPICHLPR0 version number. */
1241#define PDM_APICHLPR0_VERSION 0x60010000
1242
1243/**
1244 * APIC R3 helpers.
1245 */
1246typedef struct PDMAPICHLPR3
1247{
1248 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1249 uint32_t u32Version;
1250
1251 /**
1252 * Set the interrupt force action flag.
1253 *
1254 * @param pDevIns Device instance of the APIC.
1255 * @param idCpu Virtual CPU to set flag upon.
1256 */
1257 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1258
1259 /**
1260 * Clear the interrupt force action flag.
1261 *
1262 * @param pDevIns Device instance of the APIC.
1263 * @param idCpu Virtual CPU to clear flag upon.
1264 */
1265 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1266
1267 /**
1268 * Modifies APIC-related bits in the CPUID feature mask.
1269 *
1270 * @param pDevIns Device instance of the APIC.
1271 * @param enmVersion Supported APIC version.
1272 */
1273 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1274
1275 /**
1276 * Acquires the PDM lock.
1277 *
1278 * @returns VINF_SUCCESS on success.
1279 * @returns Fatal error on failure.
1280 * @param pDevIns The APIC device instance.
1281 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1282 */
1283 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1284
1285 /**
1286 * Releases the PDM lock.
1287 *
1288 * @param pDevIns The APIC device instance.
1289 */
1290 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1291
1292 /**
1293 * Get the virtual CPU id corresponding to the current EMT.
1294 *
1295 * @param pDevIns The APIC device instance.
1296 */
1297 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1298
1299 /**
1300 * Gets the address of the RC APIC helpers.
1301 *
1302 * This should be called at both construction and relocation time
1303 * to obtain the correct address of the RC helpers.
1304 *
1305 * @returns GC pointer to the APIC helpers.
1306 * @param pDevIns Device instance of the APIC.
1307 */
1308 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1309
1310 /**
1311 * Gets the address of the R0 APIC helpers.
1312 *
1313 * This should be called at both construction and relocation time
1314 * to obtain the correct address of the R0 helpers.
1315 *
1316 * @returns R0 pointer to the APIC helpers.
1317 * @param pDevIns Device instance of the APIC.
1318 */
1319 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1320
1321 /** Just a safety precaution. */
1322 uint32_t u32TheEnd;
1323} PDMAPICHLPR3;
1324/** Pointer to APIC helpers. */
1325typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1326/** Pointer to const APIC helpers. */
1327typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1328
1329/** Current PDMAPICHLP version number. */
1330#define PDM_APICHLPR3_VERSION 0xfd010000
1331
1332
1333/**
1334 * I/O APIC registration structure.
1335 */
1336typedef struct PDMIOAPICREG
1337{
1338 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1339 uint32_t u32Version;
1340
1341 /**
1342 * Set the an IRQ.
1343 *
1344 * @param pDevIns Device instance of the I/O APIC.
1345 * @param iIrq IRQ number to set.
1346 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1347 */
1348 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1349
1350 /** The name of the GC SetIrq entry point. */
1351 const char *pszSetIrqRC;
1352
1353 /** The name of the R0 SetIrq entry point. */
1354 const char *pszSetIrqR0;
1355} PDMIOAPICREG;
1356/** Pointer to an APIC registration structure. */
1357typedef PDMIOAPICREG *PPDMIOAPICREG;
1358
1359/** Current PDMAPICREG version number. */
1360#define PDM_IOAPICREG_VERSION 0x50010000
1361
1362
1363/**
1364 * IOAPIC RC helpers.
1365 */
1366typedef struct PDMIOAPICHLPRC
1367{
1368 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1369 uint32_t u32Version;
1370
1371 /**
1372 * Private interface between the IOAPIC and APIC.
1373 *
1374 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1375 *
1376 * @returns The current TPR.
1377 * @param pDevIns Device instance of the IOAPIC.
1378 * @param u8Dest See APIC implementation.
1379 * @param u8DestMode See APIC implementation.
1380 * @param u8DeliveryMode See APIC implementation.
1381 * @param iVector See APIC implementation.
1382 * @param u8Polarity See APIC implementation.
1383 * @param u8TriggerMode See APIC implementation.
1384 */
1385 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1386 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1387
1388 /**
1389 * Acquires the PDM lock.
1390 *
1391 * @returns VINF_SUCCESS on success.
1392 * @returns rc if we failed to acquire the lock.
1393 * @param pDevIns The IOAPIC device instance.
1394 * @param rc What to return if we fail to acquire the lock.
1395 */
1396 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1397
1398 /**
1399 * Releases the PDM lock.
1400 *
1401 * @param pDevIns The IOAPIC device instance.
1402 */
1403 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1404
1405 /** Just a safety precaution. */
1406 uint32_t u32TheEnd;
1407} PDMIOAPICHLPRC;
1408/** Pointer to IOAPIC RC helpers. */
1409typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1410/** Pointer to const IOAPIC helpers. */
1411typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1412
1413/** Current PDMIOAPICHLPRC version number. */
1414#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1415
1416
1417/**
1418 * IOAPIC R0 helpers.
1419 */
1420typedef struct PDMIOAPICHLPR0
1421{
1422 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1423 uint32_t u32Version;
1424
1425 /**
1426 * Private interface between the IOAPIC and APIC.
1427 *
1428 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1429 *
1430 * @returns The current TPR.
1431 * @param pDevIns Device instance of the IOAPIC.
1432 * @param u8Dest See APIC implementation.
1433 * @param u8DestMode See APIC implementation.
1434 * @param u8DeliveryMode See APIC implementation.
1435 * @param iVector See APIC implementation.
1436 * @param u8Polarity See APIC implementation.
1437 * @param u8TriggerMode See APIC implementation.
1438 */
1439 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1440 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1441
1442 /**
1443 * Acquires the PDM lock.
1444 *
1445 * @returns VINF_SUCCESS on success.
1446 * @returns rc if we failed to acquire the lock.
1447 * @param pDevIns The IOAPIC device instance.
1448 * @param rc What to return if we fail to acquire the lock.
1449 */
1450 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1451
1452 /**
1453 * Releases the PDM lock.
1454 *
1455 * @param pDevIns The IOAPIC device instance.
1456 */
1457 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1458
1459 /** Just a safety precaution. */
1460 uint32_t u32TheEnd;
1461} PDMIOAPICHLPR0;
1462/** Pointer to IOAPIC R0 helpers. */
1463typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1464/** Pointer to const IOAPIC helpers. */
1465typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1466
1467/** Current PDMIOAPICHLPR0 version number. */
1468#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1469
1470/**
1471 * IOAPIC R3 helpers.
1472 */
1473typedef struct PDMIOAPICHLPR3
1474{
1475 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1476 uint32_t u32Version;
1477
1478 /**
1479 * Private interface between the IOAPIC and APIC.
1480 *
1481 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1482 *
1483 * @returns The current TPR.
1484 * @param pDevIns Device instance of the IOAPIC.
1485 * @param u8Dest See APIC implementation.
1486 * @param u8DestMode See APIC implementation.
1487 * @param u8DeliveryMode See APIC implementation.
1488 * @param iVector See APIC implementation.
1489 * @param u8Polarity See APIC implementation.
1490 * @param u8TriggerMode See APIC implementation.
1491 */
1492 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1493 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1494
1495 /**
1496 * Acquires the PDM lock.
1497 *
1498 * @returns VINF_SUCCESS on success.
1499 * @returns Fatal error on failure.
1500 * @param pDevIns The IOAPIC device instance.
1501 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1502 */
1503 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1504
1505 /**
1506 * Releases the PDM lock.
1507 *
1508 * @param pDevIns The IOAPIC device instance.
1509 */
1510 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1511
1512 /**
1513 * Gets the address of the RC IOAPIC helpers.
1514 *
1515 * This should be called at both construction and relocation time
1516 * to obtain the correct address of the RC helpers.
1517 *
1518 * @returns RC pointer to the IOAPIC helpers.
1519 * @param pDevIns Device instance of the IOAPIC.
1520 */
1521 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1522
1523 /**
1524 * Gets the address of the R0 IOAPIC helpers.
1525 *
1526 * This should be called at both construction and relocation time
1527 * to obtain the correct address of the R0 helpers.
1528 *
1529 * @returns R0 pointer to the IOAPIC helpers.
1530 * @param pDevIns Device instance of the IOAPIC.
1531 */
1532 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1533
1534 /** Just a safety precaution. */
1535 uint32_t u32TheEnd;
1536} PDMIOAPICHLPR3;
1537/** Pointer to IOAPIC R3 helpers. */
1538typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1539/** Pointer to const IOAPIC helpers. */
1540typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1541
1542/** Current PDMIOAPICHLPR3 version number. */
1543#define PDM_IOAPICHLPR3_VERSION 0xff010000
1544
1545
1546
1547#ifdef IN_RING3
1548
1549/**
1550 * DMA Transfer Handler.
1551 *
1552 * @returns Number of bytes transferred.
1553 * @param pDevIns Device instance of the DMA.
1554 * @param pvUser User pointer.
1555 * @param uChannel Channel number.
1556 * @param off DMA position.
1557 * @param cb Block size.
1558 */
1559typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1560/** Pointer to a FNDMATRANSFERHANDLER(). */
1561typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1562
1563/**
1564 * DMA Controller registration structure.
1565 */
1566typedef struct PDMDMAREG
1567{
1568 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1569 uint32_t u32Version;
1570
1571 /**
1572 * Execute pending transfers.
1573 *
1574 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1575 * @param pDevIns Device instance of the DMAC.
1576 */
1577 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1578
1579 /**
1580 * Register transfer function for DMA channel.
1581 *
1582 * @param pDevIns Device instance of the DMAC.
1583 * @param uChannel Channel number.
1584 * @param pfnTransferHandler Device specific transfer function.
1585 * @param pvUSer User pointer to be passed to the callback.
1586 */
1587 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1588
1589 /**
1590 * Read memory
1591 *
1592 * @returns Number of bytes read.
1593 * @param pDevIns Device instance of the DMAC.
1594 * @param pvBuffer Pointer to target buffer.
1595 * @param off DMA position.
1596 * @param cbBlock Block size.
1597 */
1598 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1599
1600 /**
1601 * Write memory
1602 *
1603 * @returns Number of bytes written.
1604 * @param pDevIns Device instance of the DMAC.
1605 * @param pvBuffer Memory to write.
1606 * @param off DMA position.
1607 * @param cbBlock Block size.
1608 */
1609 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1610
1611 /**
1612 * Set the DREQ line.
1613 *
1614 * @param pDevIns Device instance of the DMAC.
1615 * @param uChannel Channel number.
1616 * @param uLevel Level of the line.
1617 */
1618 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1619
1620 /**
1621 * Get channel mode
1622 *
1623 * @returns Channel mode.
1624 * @param pDevIns Device instance of the DMAC.
1625 * @param uChannel Channel number.
1626 */
1627 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1628
1629} PDMDMACREG;
1630/** Pointer to a DMAC registration structure. */
1631typedef PDMDMACREG *PPDMDMACREG;
1632
1633/** Current PDMDMACREG version number. */
1634#define PDM_DMACREG_VERSION 0xf5010000
1635
1636
1637/**
1638 * DMA Controller device helpers.
1639 */
1640typedef struct PDMDMACHLP
1641{
1642 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1643 uint32_t u32Version;
1644
1645 /* to-be-defined */
1646
1647} PDMDMACHLP;
1648/** Pointer to DMAC helpers. */
1649typedef PDMDMACHLP *PPDMDMACHLP;
1650/** Pointer to const DMAC helpers. */
1651typedef const PDMDMACHLP *PCPDMDMACHLP;
1652
1653/** Current PDMDMACHLP version number. */
1654#define PDM_DMACHLP_VERSION 0xf6010000
1655
1656#endif /* IN_RING3 */
1657
1658
1659
1660/**
1661 * RTC registration structure.
1662 */
1663typedef struct PDMRTCREG
1664{
1665 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1666 uint32_t u32Version;
1667 uint32_t u32Alignment; /**< structure size alignment. */
1668
1669 /**
1670 * Write to a CMOS register and update the checksum if necessary.
1671 *
1672 * @returns VBox status code.
1673 * @param pDevIns Device instance of the RTC.
1674 * @param iReg The CMOS register index.
1675 * @param u8Value The CMOS register value.
1676 */
1677 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1678
1679 /**
1680 * Read a CMOS register.
1681 *
1682 * @returns VBox status code.
1683 * @param pDevIns Device instance of the RTC.
1684 * @param iReg The CMOS register index.
1685 * @param pu8Value Where to store the CMOS register value.
1686 */
1687 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1688
1689} PDMRTCREG;
1690/** Pointer to a RTC registration structure. */
1691typedef PDMRTCREG *PPDMRTCREG;
1692/** Pointer to a const RTC registration structure. */
1693typedef const PDMRTCREG *PCPDMRTCREG;
1694
1695/** Current PDMRTCREG version number. */
1696#define PDM_RTCREG_VERSION 0xfa010000
1697
1698
1699/**
1700 * RTC device helpers.
1701 */
1702typedef struct PDMRTCHLP
1703{
1704 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1705 uint32_t u32Version;
1706
1707 /* to-be-defined */
1708
1709} PDMRTCHLP;
1710/** Pointer to RTC helpers. */
1711typedef PDMRTCHLP *PPDMRTCHLP;
1712/** Pointer to const RTC helpers. */
1713typedef const PDMRTCHLP *PCPDMRTCHLP;
1714
1715/** Current PDMRTCHLP version number. */
1716#define PDM_RTCHLP_VERSION 0xf6010000
1717
1718
1719
1720#ifdef IN_RING3
1721
1722/**
1723 * PDM Device API.
1724 */
1725typedef struct PDMDEVHLPR3
1726{
1727 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1728 uint32_t u32Version;
1729
1730 /**
1731 * Register a number of I/O ports with a device.
1732 *
1733 * These callbacks are of course for the host context (HC).
1734 * Register HC handlers before guest context (GC) handlers! There must be a
1735 * HC handler for every GC handler!
1736 *
1737 * @returns VBox status.
1738 * @param pDevIns The device instance to register the ports with.
1739 * @param Port First port number in the range.
1740 * @param cPorts Number of ports to register.
1741 * @param pvUser User argument.
1742 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1743 * @param pfnIn Pointer to function which is gonna handle IN operations.
1744 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1745 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1746 * @param pszDesc Pointer to description string. This must not be freed.
1747 */
1748 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1749 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1750 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1751
1752 /**
1753 * Register a number of I/O ports with a device for GC.
1754 *
1755 * These callbacks are for the host context (GC).
1756 * Register host context (HC) handlers before guest context handlers! There must be a
1757 * HC handler for every GC handler!
1758 *
1759 * @returns VBox status.
1760 * @param pDevIns The device instance to register the ports with and which GC module
1761 * to resolve the names against.
1762 * @param Port First port number in the range.
1763 * @param cPorts Number of ports to register.
1764 * @param pvUser User argument.
1765 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1766 * @param pszIn Name of the GC function which is gonna handle IN operations.
1767 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1768 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1769 * @param pszDesc Pointer to description string. This must not be freed.
1770 */
1771 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1772 const char *pszOut, const char *pszIn,
1773 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1774
1775 /**
1776 * Register a number of I/O ports with a device.
1777 *
1778 * These callbacks are of course for the ring-0 host context (R0).
1779 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1780 *
1781 * @returns VBox status.
1782 * @param pDevIns The device instance to register the ports with.
1783 * @param Port First port number in the range.
1784 * @param cPorts Number of ports to register.
1785 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1786 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1787 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1788 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1789 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1790 * @param pszDesc Pointer to description string. This must not be freed.
1791 */
1792 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1793 const char *pszOut, const char *pszIn,
1794 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1795
1796 /**
1797 * Deregister I/O ports.
1798 *
1799 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1800 *
1801 * @returns VBox status.
1802 * @param pDevIns The device instance owning the ports.
1803 * @param Port First port number in the range.
1804 * @param cPorts Number of ports to deregister.
1805 */
1806 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1807
1808 /**
1809 * Register a Memory Mapped I/O (MMIO) region.
1810 *
1811 * These callbacks are of course for the host context (HC).
1812 * Register HC handlers before guest context (GC) handlers! There must be a
1813 * HC handler for every GC handler!
1814 *
1815 * @returns VBox status.
1816 * @param pDevIns The device instance to register the MMIO with.
1817 * @param GCPhysStart First physical address in the range.
1818 * @param cbRange The size of the range (in bytes).
1819 * @param pvUser User argument.
1820 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1821 * @param pfnRead Pointer to function which is gonna handle Read operations.
1822 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1823 * @param pszDesc Pointer to description string. This must not be freed.
1824 */
1825 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1826 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1827 const char *pszDesc));
1828
1829 /**
1830 * Register a Memory Mapped I/O (MMIO) region for GC.
1831 *
1832 * These callbacks are for the guest context (GC).
1833 * Register host context (HC) handlers before guest context handlers! There must be a
1834 * HC handler for every GC handler!
1835 *
1836 * @returns VBox status.
1837 * @param pDevIns The device instance to register the MMIO with.
1838 * @param GCPhysStart First physical address in the range.
1839 * @param cbRange The size of the range (in bytes).
1840 * @param pvUser User argument.
1841 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1842 * @param pszRead Name of the GC function which is gonna handle Read operations.
1843 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1844 * @param pszDesc Obsolete. NULL is fine.
1845 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1846 */
1847 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1848 const char *pszWrite, const char *pszRead, const char *pszFill,
1849 const char *pszDesc));
1850
1851 /**
1852 * Register a Memory Mapped I/O (MMIO) region for R0.
1853 *
1854 * These callbacks are for the ring-0 host context (R0).
1855 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1856 *
1857 * @returns VBox status.
1858 * @param pDevIns The device instance to register the MMIO with.
1859 * @param GCPhysStart First physical address in the range.
1860 * @param cbRange The size of the range (in bytes).
1861 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1862 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1863 * @param pszRead Name of the GC function which is gonna handle Read operations.
1864 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1865 * @param pszDesc Obsolete. NULL is fine.
1866 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1867 */
1868 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1869 const char *pszWrite, const char *pszRead, const char *pszFill,
1870 const char *pszDesc));
1871
1872 /**
1873 * Deregister a Memory Mapped I/O (MMIO) region.
1874 *
1875 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1876 *
1877 * @returns VBox status.
1878 * @param pDevIns The device instance owning the MMIO region(s).
1879 * @param GCPhysStart First physical address in the range.
1880 * @param cbRange The size of the range (in bytes).
1881 */
1882 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1883
1884 /**
1885 * Register a ROM (BIOS) region.
1886 *
1887 * It goes without saying that this is read-only memory. The memory region must be
1888 * in unassigned memory. I.e. from the top of the address space or on the PC in
1889 * the 0xa0000-0xfffff range.
1890 *
1891 * @returns VBox status.
1892 * @param pDevIns The device instance owning the ROM region.
1893 * @param GCPhysStart First physical address in the range.
1894 * Must be page aligned!
1895 * @param cbRange The size of the range (in bytes).
1896 * Must be page aligned!
1897 * @param pvBinary Pointer to the binary data backing the ROM image.
1898 * This must be cbRange bytes big.
1899 * It will be copied and doesn't have to stick around if fShadow is clear.
1900 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1901 * @param pszDesc Pointer to description string. This must not be freed.
1902 *
1903 * @remark There is no way to remove the rom, automatically on device cleanup or
1904 * manually from the device yet. At present I doubt we need such features...
1905 */
1906 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1907
1908 /**
1909 * Register a save state data unit.
1910 *
1911 * @returns VBox status.
1912 * @param pDevIns Device instance.
1913 * @param pszName Data unit name.
1914 * @param u32Instance The instance identifier of the data unit.
1915 * This must together with the name be unique.
1916 * @param u32Version Data layout version number.
1917 * @param cbGuess The approximate amount of data in the unit.
1918 * Only for progress indicators.
1919 * @param pfnSavePrep Prepare save callback, optional.
1920 * @param pfnSaveExec Execute save callback, optional.
1921 * @param pfnSaveDone Done save callback, optional.
1922 * @param pfnLoadPrep Prepare load callback, optional.
1923 * @param pfnLoadExec Execute load callback, optional.
1924 * @param pfnLoadDone Done load callback, optional.
1925 */
1926 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1927 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1928 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1929
1930 /**
1931 * Creates a timer.
1932 *
1933 * @returns VBox status.
1934 * @param pDevIns Device instance.
1935 * @param enmClock The clock to use on this timer.
1936 * @param pfnCallback Callback function.
1937 * @param pszDesc Pointer to description string which must stay around
1938 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1939 * @param ppTimer Where to store the timer on success.
1940 */
1941 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1942
1943 /**
1944 * Creates an external timer.
1945 *
1946 * @returns timer pointer
1947 * @param pDevIns Device instance.
1948 * @param enmClock The clock to use on this timer.
1949 * @param pfnCallback Callback function.
1950 * @param pvUser User pointer
1951 * @param pszDesc Pointer to description string which must stay around
1952 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1953 */
1954 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1955
1956 /**
1957 * Registers the device with the default PCI bus.
1958 *
1959 * @returns VBox status code.
1960 * @param pDevIns Device instance.
1961 * @param pPciDev The PCI device structure.
1962 * Any PCI enabled device must keep this in it's instance data!
1963 * Fill in the PCI data config before registration, please.
1964 * @remark This is the simple interface, a Ex interface will be created if
1965 * more features are needed later.
1966 */
1967 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1968
1969 /**
1970 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1971 *
1972 * @returns VBox status code.
1973 * @param pDevIns Device instance.
1974 * @param iRegion The region number.
1975 * @param cbRegion Size of the region.
1976 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1977 * @param pfnCallback Callback for doing the mapping.
1978 */
1979 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1980
1981 /**
1982 * Register PCI configuration space read/write callbacks.
1983 *
1984 * @param pDevIns Device instance.
1985 * @param pPciDev The PCI device structure.
1986 * If NULL the default PCI device for this device instance is used.
1987 * @param pfnRead Pointer to the user defined PCI config read function.
1988 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1989 * PCI config read function. This way, user can decide when (and if)
1990 * to call default PCI config read function. Can be NULL.
1991 * @param pfnWrite Pointer to the user defined PCI config write function.
1992 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1993 * PCI config write function. This way, user can decide when (and if)
1994 * to call default PCI config write function. Can be NULL.
1995 * @thread EMT
1996 */
1997 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1998 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1999
2000 /**
2001 * Set the IRQ for a PCI device.
2002 *
2003 * @param pDevIns Device instance.
2004 * @param iIrq IRQ number to set.
2005 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2006 * @thread Any thread, but will involve the emulation thread.
2007 */
2008 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2009
2010 /**
2011 * Set the IRQ for a PCI device, but don't wait for EMT to process
2012 * the request when not called from EMT.
2013 *
2014 * @param pDevIns Device instance.
2015 * @param iIrq IRQ number to set.
2016 * @param iLevel IRQ level.
2017 * @thread Any thread, but will involve the emulation thread.
2018 */
2019 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2020
2021 /**
2022 * Set ISA IRQ for a device.
2023 *
2024 * @param pDevIns Device instance.
2025 * @param iIrq IRQ number to set.
2026 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2027 * @thread Any thread, but will involve the emulation thread.
2028 */
2029 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2030
2031 /**
2032 * Set the ISA IRQ for a device, but don't wait for EMT to process
2033 * the request when not called from EMT.
2034 *
2035 * @param pDevIns Device instance.
2036 * @param iIrq IRQ number to set.
2037 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2038 * @thread Any thread, but will involve the emulation thread.
2039 */
2040 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2041
2042 /**
2043 * Attaches a driver (chain) to the device.
2044 *
2045 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2046 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2047 *
2048 * @returns VBox status code.
2049 * @param pDevIns Device instance.
2050 * @param iLun The logical unit to attach.
2051 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2052 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2053 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2054 * for the live of the device instance.
2055 */
2056 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2057
2058 /**
2059 * Allocate memory which is associated with current VM instance
2060 * and automatically freed on it's destruction.
2061 *
2062 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2063 * @param pDevIns Device instance.
2064 * @param cb Number of bytes to allocate.
2065 */
2066 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2067
2068 /**
2069 * Allocate memory which is associated with current VM instance
2070 * and automatically freed on it's destruction. The memory is ZEROed.
2071 *
2072 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2073 * @param pDevIns Device instance.
2074 * @param cb Number of bytes to allocate.
2075 */
2076 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2077
2078 /**
2079 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2080 *
2081 * @param pDevIns Device instance.
2082 * @param pv Pointer to the memory to free.
2083 */
2084 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2085
2086 /**
2087 * Set the VM error message
2088 *
2089 * @returns rc.
2090 * @param pDevIns Device instance.
2091 * @param rc VBox status code.
2092 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2093 * @param pszFormat Error message format string.
2094 * @param ... Error message arguments.
2095 */
2096 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2097
2098 /**
2099 * Set the VM error message
2100 *
2101 * @returns rc.
2102 * @param pDevIns Device instance.
2103 * @param rc VBox status code.
2104 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2105 * @param pszFormat Error message format string.
2106 * @param va Error message arguments.
2107 */
2108 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2109
2110 /**
2111 * Set the VM runtime error message
2112 *
2113 * @returns VBox status code.
2114 * @param pDevIns Device instance.
2115 * @param fFatal Whether it is a fatal error or not.
2116 * @param pszErrorID Error ID string.
2117 * @param pszFormat Error message format string.
2118 * @param ... Error message arguments.
2119 */
2120 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2121
2122 /**
2123 * Set the VM runtime error message
2124 *
2125 * @returns VBox status code.
2126 * @param pDevIns Device instance.
2127 * @param fFatal Whether it is a fatal error or not.
2128 * @param pszErrorID Error ID string.
2129 * @param pszFormat Error message format string.
2130 * @param va Error message arguments.
2131 */
2132 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2133
2134 /**
2135 * Assert that the current thread is the emulation thread.
2136 *
2137 * @returns True if correct.
2138 * @returns False if wrong.
2139 * @param pDevIns Device instance.
2140 * @param pszFile Filename of the assertion location.
2141 * @param iLine The linenumber of the assertion location.
2142 * @param pszFunction Function of the assertion location.
2143 */
2144 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2145
2146 /**
2147 * Assert that the current thread is NOT the emulation thread.
2148 *
2149 * @returns True if correct.
2150 * @returns False if wrong.
2151 * @param pDevIns Device instance.
2152 * @param pszFile Filename of the assertion location.
2153 * @param iLine The linenumber of the assertion location.
2154 * @param pszFunction Function of the assertion location.
2155 */
2156 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2157
2158 /**
2159 * Stops the VM and enters the debugger to look at the guest state.
2160 *
2161 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2162 * invoking this function directly.
2163 *
2164 * @returns VBox status code which must be passed up to the VMM.
2165 * @param pDevIns Device instance.
2166 * @param pszFile Filename of the assertion location.
2167 * @param iLine The linenumber of the assertion location.
2168 * @param pszFunction Function of the assertion location.
2169 * @param pszFormat Message. (optional)
2170 * @param args Message parameters.
2171 */
2172 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2173
2174 /**
2175 * Register a info handler with DBGF,
2176 *
2177 * @returns VBox status code.
2178 * @param pDevIns Device instance.
2179 * @param pszName The identifier of the info.
2180 * @param pszDesc The description of the info and any arguments
2181 * the handler may take.
2182 * @param pfnHandler The handler function to be called to display the
2183 * info.
2184 */
2185 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2186
2187 /**
2188 * Registers a statistics sample if statistics are enabled.
2189 *
2190 * @param pDevIns Device instance of the DMA.
2191 * @param pvSample Pointer to the sample.
2192 * @param enmType Sample type. This indicates what pvSample is
2193 * pointing at.
2194 * @param pszName Sample name. The name is on this form
2195 * "/<component>/<sample>". Further nesting is
2196 * possible.
2197 * @param enmUnit Sample unit.
2198 * @param pszDesc Sample description.
2199 */
2200 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2201
2202 /**
2203 * Same as pfnSTAMRegister except that the name is specified in a
2204 * RTStrPrintf like fashion.
2205 *
2206 * @returns VBox status.
2207 * @param pDevIns Device instance of the DMA.
2208 * @param pvSample Pointer to the sample.
2209 * @param enmType Sample type. This indicates what pvSample is
2210 * pointing at.
2211 * @param enmVisibility Visibility type specifying whether unused
2212 * statistics should be visible or not.
2213 * @param enmUnit Sample unit.
2214 * @param pszDesc Sample description.
2215 * @param pszName The sample name format string.
2216 * @param ... Arguments to the format string.
2217 */
2218 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2219 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2220
2221 /**
2222 * Same as pfnSTAMRegister except that the name is specified in a
2223 * RTStrPrintfV like fashion.
2224 *
2225 * @returns VBox status.
2226 * @param pDevIns Device instance of the DMA.
2227 * @param pvSample Pointer to the sample.
2228 * @param enmType Sample type. This indicates what pvSample is
2229 * pointing at.
2230 * @param enmVisibility Visibility type specifying whether unused
2231 * statistics should be visible or not.
2232 * @param enmUnit Sample unit.
2233 * @param pszDesc Sample description.
2234 * @param pszName The sample name format string.
2235 * @param args Arguments to the format string.
2236 */
2237 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2238 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2239
2240 /**
2241 * Register the RTC device.
2242 *
2243 * @returns VBox status code.
2244 * @param pDevIns Device instance.
2245 * @param pRtcReg Pointer to a RTC registration structure.
2246 * @param ppRtcHlp Where to store the pointer to the helper
2247 * functions.
2248 */
2249 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2250
2251 /**
2252 * Create a queue.
2253 *
2254 * @returns VBox status code.
2255 * @param pDevIns The device instance.
2256 * @param cbItem The size of a queue item.
2257 * @param cItems The number of items in the queue.
2258 * @param cMilliesInterval The number of milliseconds between polling the queue.
2259 * If 0 then the emulation thread will be notified whenever an item arrives.
2260 * @param pfnCallback The consumer function.
2261 * @param fGCEnabled Set if the queue should work in GC too.
2262 * @param ppQueue Where to store the queue handle on success.
2263 * @thread The emulation thread.
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2266 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2267
2268 /**
2269 * Initializes a PDM critical section.
2270 *
2271 * The PDM critical sections are derived from the IPRT critical sections, but
2272 * works in GC as well.
2273 *
2274 * @returns VBox status code.
2275 * @param pDevIns Device instance.
2276 * @param pCritSect Pointer to the critical section.
2277 * @param pszName The name of the critical section (for
2278 * statistics).
2279 */
2280 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2281
2282 /**
2283 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2284 *
2285 * @returns pTime.
2286 * @param pDevIns Device instance.
2287 * @param pTime Where to store the time.
2288 */
2289 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2290
2291 /**
2292 * Creates a PDM thread.
2293 *
2294 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2295 * resuming, and destroying the thread as the VM state changes.
2296 *
2297 * @returns VBox status code.
2298 * @param pDevIns The device instance.
2299 * @param ppThread Where to store the thread 'handle'.
2300 * @param pvUser The user argument to the thread function.
2301 * @param pfnThread The thread function.
2302 * @param pfnWakeup The wakup callback. This is called on the EMT
2303 * thread when a state change is pending.
2304 * @param cbStack See RTThreadCreate.
2305 * @param enmType See RTThreadCreate.
2306 * @param pszName See RTThreadCreate.
2307 */
2308 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2309 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2310
2311 /**
2312 * Convert a guest virtual address to a guest physical address.
2313 *
2314 * @returns VBox status code.
2315 * @param pDevIns Device instance.
2316 * @param GCPtr Guest virtual address.
2317 * @param pGCPhys Where to store the GC physical address
2318 * corresponding to GCPtr.
2319 * @thread The emulation thread.
2320 * @remark Careful with page boundraries.
2321 */
2322 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2323
2324 /**
2325 * Gets the VM state.
2326 *
2327 * @returns VM state.
2328 * @param pDevIns The device instance.
2329 * @thread Any thread (just keep in mind that it's volatile info).
2330 */
2331 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2332
2333 /** Space reserved for future members.
2334 * @{ */
2335 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2336 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2337 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2338 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2339 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2340 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2341 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2342 /** @} */
2343
2344
2345 /** API available to trusted devices only.
2346 *
2347 * These APIs are providing unrestricted access to the guest and the VM,
2348 * or they are interacting intimately with PDM.
2349 *
2350 * @{
2351 */
2352 /**
2353 * Gets the VM handle. Restricted API.
2354 *
2355 * @returns VM Handle.
2356 * @param pDevIns Device instance.
2357 */
2358 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2359
2360 /**
2361 * Register the PCI Bus.
2362 *
2363 * @returns VBox status code.
2364 * @param pDevIns Device instance.
2365 * @param pPciBusReg Pointer to PCI bus registration structure.
2366 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2367 * helpers.
2368 */
2369 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2370
2371 /**
2372 * Register the PIC device.
2373 *
2374 * @returns VBox status code.
2375 * @param pDevIns Device instance.
2376 * @param pPicReg Pointer to a PIC registration structure.
2377 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2378 * helpers.
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2381
2382 /**
2383 * Register the APIC device.
2384 *
2385 * @returns VBox status code.
2386 * @param pDevIns Device instance.
2387 * @param pApicReg Pointer to a APIC registration structure.
2388 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2389 */
2390 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2391
2392 /**
2393 * Register the I/O APIC device.
2394 *
2395 * @returns VBox status code.
2396 * @param pDevIns Device instance.
2397 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2398 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2399 * helpers.
2400 */
2401 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2402
2403 /**
2404 * Register the DMA device.
2405 *
2406 * @returns VBox status code.
2407 * @param pDevIns Device instance.
2408 * @param pDmacReg Pointer to a DMAC registration structure.
2409 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2410 */
2411 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2412
2413 /**
2414 * Read physical memory.
2415 *
2416 * @returns VINF_SUCCESS (for now).
2417 * @param pDevIns Device instance.
2418 * @param GCPhys Physical address start reading from.
2419 * @param pvBuf Where to put the read bits.
2420 * @param cbRead How many bytes to read.
2421 * @thread Any thread, but the call may involve the emulation thread.
2422 */
2423 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2424
2425 /**
2426 * Write to physical memory.
2427 *
2428 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2429 * @param pDevIns Device instance.
2430 * @param GCPhys Physical address to write to.
2431 * @param pvBuf What to write.
2432 * @param cbWrite How many bytes to write.
2433 * @thread Any thread, but the call may involve the emulation thread.
2434 */
2435 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2436
2437 /**
2438 * Requests the mapping of a guest page into ring-3.
2439 *
2440 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2441 * release it.
2442 *
2443 * This API will assume your intention is to write to the page, and will
2444 * therefore replace shared and zero pages. If you do not intend to modify the
2445 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2446 *
2447 * @returns VBox status code.
2448 * @retval VINF_SUCCESS on success.
2449 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2450 * backing or if the page has any active access handlers. The caller
2451 * must fall back on using PGMR3PhysWriteExternal.
2452 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2453 *
2454 * @param pVM The VM handle.
2455 * @param GCPhys The guest physical address of the page that
2456 * should be mapped.
2457 * @param fFlags Flags reserved for future use, MBZ.
2458 * @param ppv Where to store the address corresponding to
2459 * GCPhys.
2460 * @param pLock Where to store the lock information that
2461 * pfnPhysReleasePageMappingLock needs.
2462 *
2463 * @remark Avoid calling this API from within critical sections (other than the
2464 * PGM one) because of the deadlock risk when we have to delegating the
2465 * task to an EMT.
2466 * @thread Any.
2467 */
2468 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2469
2470 /**
2471 * Requests the mapping of a guest page into ring-3, external threads.
2472 *
2473 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2474 * release it.
2475 *
2476 * @returns VBox status code.
2477 * @retval VINF_SUCCESS on success.
2478 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2479 * backing or if the page as an active ALL access handler. The caller
2480 * must fall back on using PGMPhysRead.
2481 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2482 *
2483 * @param pDevIns Device instance.
2484 * @param GCPhys The guest physical address of the page that
2485 * should be mapped.
2486 * @param fFlags Flags reserved for future use, MBZ.
2487 * @param ppv Where to store the address corresponding to
2488 * GCPhys.
2489 * @param pLock Where to store the lock information that
2490 * pfnPhysReleasePageMappingLock needs.
2491 *
2492 * @remark Avoid calling this API from within critical sections.
2493 * @thread Any.
2494 */
2495 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2496
2497 /**
2498 * Release the mapping of a guest page.
2499 *
2500 * This is the counter part of pfnPhysGCPhys2CCPtr and
2501 * pfnPhysGCPhys2CCPtrReadOnly.
2502 *
2503 * @param pDevIns Device instance.
2504 * @param pLock The lock structure initialized by the mapping
2505 * function.
2506 */
2507 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2508
2509 /**
2510 * Read guest physical memory by virtual address.
2511 *
2512 * @param pDevIns Device instance.
2513 * @param pvDst Where to put the read bits.
2514 * @param GCVirtSrc Guest virtual address to start reading from.
2515 * @param cb How many bytes to read.
2516 * @thread The emulation thread.
2517 */
2518 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2519
2520 /**
2521 * Write to guest physical memory by virtual address.
2522 *
2523 * @param pDevIns Device instance.
2524 * @param GCVirtDst Guest virtual address to write to.
2525 * @param pvSrc What to write.
2526 * @param cb How many bytes to write.
2527 * @thread The emulation thread.
2528 */
2529 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2530
2531 /**
2532 * Checks if the Gate A20 is enabled or not.
2533 *
2534 * @returns true if A20 is enabled.
2535 * @returns false if A20 is disabled.
2536 * @param pDevIns Device instance.
2537 * @thread The emulation thread.
2538 */
2539 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2540
2541 /**
2542 * Enables or disables the Gate A20.
2543 *
2544 * @param pDevIns Device instance.
2545 * @param fEnable Set this flag to enable the Gate A20; clear it
2546 * to disable.
2547 * @thread The emulation thread.
2548 */
2549 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2550
2551 /**
2552 * Resets the VM.
2553 *
2554 * @returns The appropriate VBox status code to pass around on reset.
2555 * @param pDevIns Device instance.
2556 * @thread The emulation thread.
2557 */
2558 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2559
2560 /**
2561 * Suspends the VM.
2562 *
2563 * @returns The appropriate VBox status code to pass around on suspend.
2564 * @param pDevIns Device instance.
2565 * @thread The emulation thread.
2566 */
2567 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2568
2569 /**
2570 * Power off the VM.
2571 *
2572 * @returns The appropriate VBox status code to pass around on power off.
2573 * @param pDevIns Device instance.
2574 * @thread The emulation thread.
2575 */
2576 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2577
2578 /**
2579 * Acquire global VM lock
2580 *
2581 * @returns VBox status code
2582 * @param pDevIns Device instance.
2583 */
2584 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2585
2586 /**
2587 * Release global VM lock
2588 *
2589 * @returns VBox status code
2590 * @param pDevIns Device instance.
2591 */
2592 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2593
2594 /**
2595 * Check that the current thread owns the global VM lock.
2596 *
2597 * @returns boolean
2598 * @param pDevIns Device instance.
2599 * @param pszFile Filename of the assertion location.
2600 * @param iLine Linenumber of the assertion location.
2601 * @param pszFunction Function of the assertion location.
2602 */
2603 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2604
2605 /**
2606 * Register transfer function for DMA channel.
2607 *
2608 * @returns VBox status code.
2609 * @param pDevIns Device instance.
2610 * @param uChannel Channel number.
2611 * @param pfnTransferHandler Device specific transfer callback function.
2612 * @param pvUser User pointer to pass to the callback.
2613 * @thread EMT
2614 */
2615 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2616
2617 /**
2618 * Read memory.
2619 *
2620 * @returns VBox status code.
2621 * @param pDevIns Device instance.
2622 * @param uChannel Channel number.
2623 * @param pvBuffer Pointer to target buffer.
2624 * @param off DMA position.
2625 * @param cbBlock Block size.
2626 * @param pcbRead Where to store the number of bytes which was
2627 * read. optional.
2628 * @thread EMT
2629 */
2630 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2631
2632 /**
2633 * Write memory.
2634 *
2635 * @returns VBox status code.
2636 * @param pDevIns Device instance.
2637 * @param uChannel Channel number.
2638 * @param pvBuffer Memory to write.
2639 * @param off DMA position.
2640 * @param cbBlock Block size.
2641 * @param pcbWritten Where to store the number of bytes which was
2642 * written. optional.
2643 * @thread EMT
2644 */
2645 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2646
2647 /**
2648 * Set the DREQ line.
2649 *
2650 * @returns VBox status code.
2651 * @param pDevIns Device instance.
2652 * @param uChannel Channel number.
2653 * @param uLevel Level of the line.
2654 * @thread EMT
2655 */
2656 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2657
2658 /**
2659 * Get channel mode.
2660 *
2661 * @returns Channel mode. See specs.
2662 * @param pDevIns Device instance.
2663 * @param uChannel Channel number.
2664 * @thread EMT
2665 */
2666 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2667
2668 /**
2669 * Schedule DMA execution.
2670 *
2671 * @param pDevIns Device instance.
2672 * @thread Any thread.
2673 */
2674 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2675
2676 /**
2677 * Write CMOS value and update the checksum(s).
2678 *
2679 * @returns VBox status code.
2680 * @param pDevIns Device instance.
2681 * @param iReg The CMOS register index.
2682 * @param u8Value The CMOS register value.
2683 * @thread EMT
2684 */
2685 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2686
2687 /**
2688 * Read CMOS value.
2689 *
2690 * @returns VBox status code.
2691 * @param pDevIns Device instance.
2692 * @param iReg The CMOS register index.
2693 * @param pu8Value Where to store the CMOS register value.
2694 * @thread EMT
2695 */
2696 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2697
2698 /**
2699 * Get CPUID.
2700 *
2701 * @param pDevIns Device instance.
2702 * @param iLeaf The CPUID leaf to get.
2703 * @param pEax Where to store the EAX value.
2704 * @param pEbx Where to store the EBX value.
2705 * @param pEcx Where to store the ECX value.
2706 * @param pEdx Where to store the EDX value.
2707 */
2708 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2709
2710 /**
2711 * Changes the protection of shadowed ROM mapping.
2712 *
2713 * This is intented for use by the system BIOS, chipset or device in question to
2714 * change the protection of shadowed ROM code after init and on reset.
2715 *
2716 * @param pDevIns Device instance.
2717 * @param GCPhysStart Where the mapping starts.
2718 * @param cbRange The size of the mapping.
2719 * @param enmProt The new protection type.
2720 */
2721 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2722
2723 /**
2724 * Allocate and register a MMIO2 region.
2725 *
2726 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2727 * RAM associated with a device. It is also non-shared memory with a
2728 * permanent ring-3 mapping and page backing (presently).
2729 *
2730 * @returns VBox status.
2731 * @param pDevIns The device instance.
2732 * @param iRegion The region number. Use the PCI region number as
2733 * this must be known to the PCI bus device too. If
2734 * it's not associated with the PCI device, then
2735 * any number up to UINT8_MAX is fine.
2736 * @param cb The size (in bytes) of the region.
2737 * @param fFlags Reserved for future use, must be zero.
2738 * @param ppv Where to store the address of the ring-3 mapping
2739 * of the memory.
2740 * @param pszDesc Pointer to description string. This must not be
2741 * freed.
2742 * @thread EMT.
2743 */
2744 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2745
2746 /**
2747 * Deregisters and frees a MMIO2 region.
2748 *
2749 * Any physical (and virtual) access handlers registered for the region must
2750 * be deregistered before calling this function.
2751 *
2752 * @returns VBox status code.
2753 * @param pDevIns The device instance.
2754 * @param iRegion The region number used during registration.
2755 * @thread EMT.
2756 */
2757 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2758
2759 /**
2760 * Maps a MMIO2 region into the physical memory space.
2761 *
2762 * A MMIO2 range may overlap with base memory if a lot of RAM
2763 * is configured for the VM, in which case we'll drop the base
2764 * memory pages. Presently we will make no attempt to preserve
2765 * anything that happens to be present in the base memory that
2766 * is replaced, this is of course incorrectly but it's too much
2767 * effort.
2768 *
2769 * @returns VBox status code.
2770 * @param pDevIns The device instance.
2771 * @param iRegion The region number used during registration.
2772 * @param GCPhys The physical address to map it at.
2773 * @thread EMT.
2774 */
2775 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2776
2777 /**
2778 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2779 *
2780 * @returns VBox status code.
2781 * @param pDevIns The device instance.
2782 * @param iRegion The region number used during registration.
2783 * @param GCPhys The physical address it's currently mapped at.
2784 * @thread EMT.
2785 */
2786 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2787
2788 /**
2789 * Maps a portion of an MMIO2 region into the hypervisor region.
2790 *
2791 * Callers of this API must never deregister the MMIO2 region before the
2792 * VM is powered off.
2793 *
2794 * @return VBox status code.
2795 * @param pDevIns The device owning the MMIO2 memory.
2796 * @param iRegion The region.
2797 * @param off The offset into the region. Will be rounded down
2798 * to closest page boundrary.
2799 * @param cb The number of bytes to map. Will be rounded up
2800 * to the closest page boundrary.
2801 * @param pszDesc Mapping description.
2802 * @param pRCPtr Where to store the RC address.
2803 */
2804 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2805 const char *pszDesc, PRTRCPTR pRCPtr));
2806
2807 /**
2808 * Maps a portion of an MMIO2 region into kernel space (host).
2809 *
2810 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2811 * or the VM is terminated.
2812 *
2813 * @return VBox status code.
2814 * @param pDevIns The device owning the MMIO2 memory.
2815 * @param iRegion The region.
2816 * @param off The offset into the region. Must be page
2817 * aligned.
2818 * @param cb The number of bytes to map. Must be page
2819 * aligned.
2820 * @param pszDesc Mapping description.
2821 * @param pR0Ptr Where to store the R0 address.
2822 */
2823 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2824 const char *pszDesc, PRTR0PTR pR0Ptr));
2825
2826 /**
2827 * Registers the VMM device heap
2828 *
2829 * @returns VBox status code.
2830 * @param pDevIns The device instance.
2831 * @param GCPhys The physical address.
2832 * @param pvHeap Ring 3 heap pointer.
2833 * @param cbSize Size of the heap.
2834 * @thread EMT.
2835 */
2836 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2837
2838 /**
2839 * Unregisters the VMM device heap
2840 *
2841 * @returns VBox status code.
2842 * @param pDevIns The device instance.
2843 * @param GCPhys The physical address.
2844 * @thread EMT.
2845 */
2846 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2847
2848 /** @} */
2849
2850 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2851 uint32_t u32TheEnd;
2852} PDMDEVHLPR3;
2853#endif /* !IN_RING3 */
2854/** Pointer to the R3 PDM Device API. */
2855typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2856/** Pointer to the R3 PDM Device API, const variant. */
2857typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2858
2859/** Current PDMDEVHLP version number. */
2860#define PDM_DEVHLP_VERSION 0xf2080000
2861
2862
2863/**
2864 * PDM Device API - RC Variant.
2865 */
2866typedef struct PDMDEVHLPRC
2867{
2868 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2869 uint32_t u32Version;
2870
2871 /**
2872 * Set the IRQ for a PCI device.
2873 *
2874 * @param pDevIns Device instance.
2875 * @param iIrq IRQ number to set.
2876 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2877 * @thread Any thread, but will involve the emulation thread.
2878 */
2879 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2880
2881 /**
2882 * Set ISA IRQ for a device.
2883 *
2884 * @param pDevIns Device instance.
2885 * @param iIrq IRQ number to set.
2886 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2887 * @thread Any thread, but will involve the emulation thread.
2888 */
2889 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2890
2891 /**
2892 * Read physical memory.
2893 *
2894 * @returns VINF_SUCCESS (for now).
2895 * @param pDevIns Device instance.
2896 * @param GCPhys Physical address start reading from.
2897 * @param pvBuf Where to put the read bits.
2898 * @param cbRead How many bytes to read.
2899 */
2900 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2901
2902 /**
2903 * Write to physical memory.
2904 *
2905 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2906 * @param pDevIns Device instance.
2907 * @param GCPhys Physical address to write to.
2908 * @param pvBuf What to write.
2909 * @param cbWrite How many bytes to write.
2910 */
2911 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2912
2913 /**
2914 * Checks if the Gate A20 is enabled or not.
2915 *
2916 * @returns true if A20 is enabled.
2917 * @returns false if A20 is disabled.
2918 * @param pDevIns Device instance.
2919 * @thread The emulation thread.
2920 */
2921 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2922
2923 /**
2924 * Set the VM error message
2925 *
2926 * @returns rc.
2927 * @param pDrvIns Driver instance.
2928 * @param rc VBox status code.
2929 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2930 * @param pszFormat Error message format string.
2931 * @param ... Error message arguments.
2932 */
2933 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2934
2935 /**
2936 * Set the VM error message
2937 *
2938 * @returns rc.
2939 * @param pDrvIns Driver instance.
2940 * @param rc VBox status code.
2941 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2942 * @param pszFormat Error message format string.
2943 * @param va Error message arguments.
2944 */
2945 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2946
2947 /**
2948 * Set the VM runtime error message
2949 *
2950 * @returns VBox status code.
2951 * @param pDevIns Device instance.
2952 * @param fFatal Whether it is a fatal error or not.
2953 * @param pszErrorID Error ID string.
2954 * @param pszFormat Error message format string.
2955 * @param ... Error message arguments.
2956 */
2957 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2958
2959 /**
2960 * Set the VM runtime error message
2961 *
2962 * @returns VBox status code.
2963 * @param pDevIns Device instance.
2964 * @param fFatal Whether it is a fatal error or not.
2965 * @param pszErrorID Error ID string.
2966 * @param pszFormat Error message format string.
2967 * @param va Error message arguments.
2968 */
2969 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2970
2971 /**
2972 * Set parameters for pending MMIO patch operation
2973 *
2974 * @returns VBox status code.
2975 * @param pDevIns Device instance.
2976 * @param GCPhys MMIO physical address
2977 * @param pCachedData GC pointer to cached data
2978 */
2979 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2980
2981 /**
2982 * Gets the VM handle. Restricted API.
2983 *
2984 * @returns VM Handle.
2985 * @param pDevIns Device instance.
2986 */
2987 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2988
2989 /** Just a safety precaution. */
2990 uint32_t u32TheEnd;
2991} PDMDEVHLPRC;
2992/** Pointer PDM Device RC API. */
2993typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2994/** Pointer PDM Device RC API. */
2995typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2996
2997/** Current PDMDEVHLP version number. */
2998#define PDM_DEVHLPRC_VERSION 0xfb010001
2999
3000
3001/**
3002 * PDM Device API - R0 Variant.
3003 */
3004typedef struct PDMDEVHLPR0
3005{
3006 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3007 uint32_t u32Version;
3008
3009 /**
3010 * Set the IRQ for a PCI device.
3011 *
3012 * @param pDevIns Device instance.
3013 * @param iIrq IRQ number to set.
3014 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3015 * @thread Any thread, but will involve the emulation thread.
3016 */
3017 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3018
3019 /**
3020 * Set ISA IRQ for a device.
3021 *
3022 * @param pDevIns Device instance.
3023 * @param iIrq IRQ number to set.
3024 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3025 * @thread Any thread, but will involve the emulation thread.
3026 */
3027 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3028
3029 /**
3030 * Read physical memory.
3031 *
3032 * @returns VINF_SUCCESS (for now).
3033 * @param pDevIns Device instance.
3034 * @param GCPhys Physical address start reading from.
3035 * @param pvBuf Where to put the read bits.
3036 * @param cbRead How many bytes to read.
3037 */
3038 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3039
3040 /**
3041 * Write to physical memory.
3042 *
3043 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3044 * @param pDevIns Device instance.
3045 * @param GCPhys Physical address to write to.
3046 * @param pvBuf What to write.
3047 * @param cbWrite How many bytes to write.
3048 */
3049 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3050
3051 /**
3052 * Checks if the Gate A20 is enabled or not.
3053 *
3054 * @returns true if A20 is enabled.
3055 * @returns false if A20 is disabled.
3056 * @param pDevIns Device instance.
3057 * @thread The emulation thread.
3058 */
3059 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3060
3061 /**
3062 * Set the VM error message
3063 *
3064 * @returns rc.
3065 * @param pDrvIns Driver instance.
3066 * @param rc VBox status code.
3067 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3068 * @param pszFormat Error message format string.
3069 * @param ... Error message arguments.
3070 */
3071 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3072
3073 /**
3074 * Set the VM error message
3075 *
3076 * @returns rc.
3077 * @param pDrvIns Driver instance.
3078 * @param rc VBox status code.
3079 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3080 * @param pszFormat Error message format string.
3081 * @param va Error message arguments.
3082 */
3083 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3084
3085 /**
3086 * Set the VM runtime error message
3087 *
3088 * @returns VBox status code.
3089 * @param pDevIns Device instance.
3090 * @param fFatal Whether it is a fatal error or not.
3091 * @param pszErrorID Error ID string.
3092 * @param pszFormat Error message format string.
3093 * @param ... Error message arguments.
3094 */
3095 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
3096
3097 /**
3098 * Set the VM runtime error message
3099 *
3100 * @returns VBox status code.
3101 * @param pDevIns Device instance.
3102 * @param fFatal Whether it is a fatal error or not.
3103 * @param pszErrorID Error ID string.
3104 * @param pszFormat Error message format string.
3105 * @param va Error message arguments.
3106 */
3107 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
3108
3109 /**
3110 * Set parameters for pending MMIO patch operation
3111 *
3112 * @returns rc.
3113 * @param pDevIns Device instance.
3114 * @param GCPhys MMIO physical address
3115 * @param pCachedData GC pointer to cached data
3116 */
3117 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3118
3119 /**
3120 * Gets the VM handle. Restricted API.
3121 *
3122 * @returns VM Handle.
3123 * @param pDevIns Device instance.
3124 */
3125 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3126
3127 /**
3128 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3129 *
3130 * @returns true = yes, false = no
3131 * @param pDevIns Device instance.
3132 */
3133 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3134
3135 /** Just a safety precaution. */
3136 uint32_t u32TheEnd;
3137} PDMDEVHLPR0;
3138/** Pointer PDM Device R0 API. */
3139typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3140/** Pointer PDM Device GC API. */
3141typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3142
3143/** Current PDMDEVHLP version number. */
3144#define PDM_DEVHLPR0_VERSION 0xfb020001
3145
3146
3147
3148/**
3149 * PDM Device Instance.
3150 */
3151typedef struct PDMDEVINS
3152{
3153 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3154 uint32_t u32Version;
3155 /** Device instance number. */
3156 RTUINT iInstance;
3157
3158 /** Pointer the GC PDM Device API. */
3159 PCPDMDEVHLPRC pDevHlpRC;
3160 /** Pointer to device instance data. */
3161 RTRCPTR pvInstanceDataRC;
3162
3163 /** Pointer the R0 PDM Device API. */
3164 PCPDMDEVHLPR0 pDevHlpR0;
3165 /** Pointer to device instance data (R0). */
3166 RTR0PTR pvInstanceDataR0;
3167
3168 /** Pointer the HC PDM Device API. */
3169 PCPDMDEVHLPR3 pDevHlpR3;
3170 /** Pointer to device instance data. */
3171 RTR3PTR pvInstanceDataR3;
3172
3173 /** Pointer to device registration structure. */
3174 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3175 /** Configuration handle. */
3176 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3177
3178 /** The base interface of the device.
3179 * The device constructor initializes this if it has any
3180 * device level interfaces to export. To obtain this interface
3181 * call PDMR3QueryDevice(). */
3182 PDMIBASE IBase;
3183 /** Align the internal data more naturally. */
3184 RTR3PTR R3PtrPadding;
3185
3186 /** Internal data. */
3187 union
3188 {
3189#ifdef PDMDEVINSINT_DECLARED
3190 PDMDEVINSINT s;
3191#endif
3192 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3193 } Internal;
3194
3195 /** Device instance data. The size of this area is defined
3196 * in the PDMDEVREG::cbInstanceData field. */
3197 char achInstanceData[8];
3198} PDMDEVINS;
3199
3200/** Current PDMDEVINS version number. */
3201#define PDM_DEVINS_VERSION 0xf3020000
3202
3203/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3204#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3205
3206
3207/** @def PDMDEV_ASSERT_EMT
3208 * Assert that the current thread is the emulation thread.
3209 */
3210#ifdef VBOX_STRICT
3211# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3212#else
3213# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3214#endif
3215
3216/** @def PDMDEV_ASSERT_OTHER
3217 * Assert that the current thread is NOT the emulation thread.
3218 */
3219#ifdef VBOX_STRICT
3220# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3221#else
3222# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3223#endif
3224
3225/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3226 * Assert that the current thread is owner of the VM lock.
3227 */
3228#ifdef VBOX_STRICT
3229# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3230#else
3231# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3232#endif
3233
3234/** @def PDMDEV_SET_ERROR
3235 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3236 */
3237#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3238 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3239
3240/** @def PDMDEV_SET_RUNTIME_ERROR
3241 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3242 */
3243#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3244 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3245
3246/** @def PDMDEVINS_2_RCPTR
3247 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3248 */
3249#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3250
3251/** @def PDMDEVINS_2_R3PTR
3252 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3253 */
3254#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3255
3256/** @def PDMDEVINS_2_R0PTR
3257 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3258 */
3259#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3260
3261
3262/**
3263 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3264 *
3265 * @returns VBox status code which must be passed up to the VMM.
3266 * @param pDevIns Device instance.
3267 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3268 * @param pszFormat Message. (optional)
3269 * @param ... Message parameters.
3270 */
3271DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3272{
3273#ifdef VBOX_STRICT
3274# ifdef IN_RING3
3275 int rc;
3276 va_list args;
3277 va_start(args, pszFormat);
3278 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3279 va_end(args);
3280 return rc;
3281# else
3282 return VINF_EM_DBG_STOP;
3283# endif
3284#else
3285 NOREF(pDevIns);
3286 NOREF(pszFile);
3287 NOREF(iLine);
3288 NOREF(pszFunction);
3289 NOREF(pszFormat);
3290 return VINF_SUCCESS;
3291#endif
3292}
3293
3294
3295#ifdef IN_RING3
3296/**
3297 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3298 */
3299DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3300 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3301 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3302{
3303 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3304}
3305
3306/**
3307 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3308 */
3309DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3310 const char *pszOut, const char *pszIn, const char *pszOutStr,
3311 const char *pszInStr, const char *pszDesc)
3312{
3313 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3314}
3315
3316/**
3317 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3318 */
3319DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3320 const char *pszOut, const char *pszIn, const char *pszOutStr,
3321 const char *pszInStr, const char *pszDesc)
3322{
3323 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3324}
3325
3326/**
3327 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3328 */
3329DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3330 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3331 const char *pszDesc)
3332{
3333 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3334}
3335
3336/**
3337 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3338 */
3339DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3340 const char *pszWrite, const char *pszRead, const char *pszFill)
3341{
3342 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3343}
3344
3345/**
3346 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3347 */
3348DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3349 const char *pszWrite, const char *pszRead, const char *pszFill)
3350{
3351 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3352}
3353
3354/**
3355 * @copydoc PDMDEVHLPR3::pfnROMRegister
3356 */
3357DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3358{
3359 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3360}
3361/**
3362 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3363 */
3364DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3365{
3366 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3367}
3368
3369/**
3370 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3371 */
3372DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3373{
3374 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3375}
3376
3377/**
3378 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3379 */
3380DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3381{
3382 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3383}
3384
3385/**
3386 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3387 */
3388DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3389{
3390 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3391}
3392
3393/**
3394 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3395 */
3396DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3397{
3398 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3399}
3400
3401/**
3402 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3403 */
3404DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3405 const char *pszDesc, PRTRCPTR pRCPtr)
3406{
3407 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3408}
3409
3410/**
3411 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3412 */
3413DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3414 const char *pszDesc, PRTR0PTR pR0Ptr)
3415{
3416 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3417}
3418
3419/**
3420 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3421 */
3422DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3423{
3424 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3425}
3426
3427/**
3428 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3429 */
3430DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3431{
3432 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3433}
3434
3435/**
3436 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3437 */
3438DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3439 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3440 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3441{
3442 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3443 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3444 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3445}
3446
3447/**
3448 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3449 */
3450DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3451{
3452 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3453}
3454
3455/**
3456 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3457 */
3458DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3459{
3460 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3461}
3462
3463/**
3464 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3465 */
3466DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3467{
3468 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3469}
3470
3471/**
3472 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3473 */
3474DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3475 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3476{
3477 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3478}
3479
3480/**
3481 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3482 */
3483DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3484{
3485 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3486}
3487
3488/**
3489 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3490 */
3491DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3492{
3493 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3494}
3495
3496/**
3497 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3498 */
3499DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3500{
3501 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3502}
3503
3504/**
3505 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3506 */
3507DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3508{
3509 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3510}
3511
3512/**
3513 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3514 */
3515DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3516{
3517 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3518}
3519
3520/**
3521 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3522 */
3523DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3524{
3525 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3526}
3527
3528/**
3529 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3530 */
3531DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3532 const char *pszDesc, const char *pszName, ...)
3533{
3534 va_list va;
3535 va_start(va, pszName);
3536 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3537 va_end(va);
3538}
3539
3540/**
3541 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3542 */
3543DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3544 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3545{
3546 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3547}
3548
3549/**
3550 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3551 */
3552DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3553{
3554 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3555}
3556
3557/**
3558 * @copydoc PDMDEVHLPR3::pfnUTCNow
3559 */
3560DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3561{
3562 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3563}
3564
3565/**
3566 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3567 */
3568DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3569{
3570 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3571}
3572
3573/**
3574 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3575 */
3576DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3577{
3578 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3579}
3580
3581/**
3582 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3583 */
3584DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3585{
3586 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3587}
3588
3589/**
3590 * @copydoc PDMDEVHLPR3::pfnVMState
3591 */
3592DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3593{
3594 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3595}
3596
3597/**
3598 * @copydoc PDMDEVHLPR3::pfnA20Set
3599 */
3600DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3601{
3602 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3603}
3604
3605/**
3606 * @copydoc PDMDEVHLPR3::pfnVMReset
3607 */
3608DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3609{
3610 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3611}
3612
3613/**
3614 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3615 */
3616DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3617{
3618 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3619}
3620
3621/**
3622 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3623 */
3624DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3625{
3626 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3627}
3628
3629/**
3630 * @copydoc PDMDEVHLPR3::pfnDMARegister
3631 */
3632DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3633{
3634 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3635}
3636
3637/**
3638 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3639 */
3640DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3641{
3642 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3643}
3644
3645/**
3646 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3647 */
3648DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3649{
3650 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3651}
3652
3653/**
3654 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3655 */
3656DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3657{
3658 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3659}
3660
3661/**
3662 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3663 */
3664DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3665{
3666 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3667}
3668
3669/**
3670 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3671 */
3672DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3673{
3674 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3675}
3676
3677/**
3678 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3679 */
3680DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3681{
3682 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3683}
3684
3685/**
3686 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3687 */
3688DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3689{
3690 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3691}
3692
3693/**
3694 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3695 */
3696DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3697{
3698 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3699}
3700
3701/**
3702 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3703 */
3704DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3705 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3706{
3707 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3708}
3709#endif /* IN_RING3 */
3710
3711
3712/**
3713 * @copydoc PDMDEVHLPR3::pfnGetVM
3714 */
3715DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3716{
3717 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3718}
3719
3720#ifdef IN_RING0
3721/**
3722 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3723 */
3724DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3725{
3726 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3727}
3728#endif
3729
3730/**
3731 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3732 */
3733DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3734{
3735 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3736}
3737
3738/**
3739 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3740 */
3741DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3742{
3743 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3744}
3745
3746/**
3747 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3748 */
3749DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3750{
3751 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3752}
3753
3754/**
3755 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3756 */
3757DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3758{
3759 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3760}
3761
3762/**
3763 * @copydoc PDMDEVHLPR3::pfnPhysRead
3764 */
3765DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3766{
3767 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3768}
3769
3770/**
3771 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3772 */
3773DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3774{
3775 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3776}
3777
3778#ifdef IN_RING3
3779
3780/**
3781 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3782 */
3783DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3784{
3785 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3786}
3787
3788/**
3789 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3790 */
3791DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3792{
3793 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3794}
3795
3796/**
3797 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3798 */
3799DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3800{
3801 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3802}
3803
3804#endif /* IN_RING3 */
3805
3806/**
3807 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3808 */
3809DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3810{
3811 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3812}
3813
3814/**
3815 * @copydoc PDMDEVHLPR3::pfnVMSetError
3816 */
3817DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3818{
3819 va_list va;
3820 va_start(va, pszFormat);
3821 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3822 va_end(va);
3823 return rc;
3824}
3825
3826/**
3827 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3828 */
3829DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3830{
3831 va_list va;
3832 int rc;
3833 va_start(va, pszFormat);
3834 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3835 va_end(va);
3836 return rc;
3837}
3838
3839
3840
3841/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3842typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3843
3844/**
3845 * Callbacks for VBoxDeviceRegister().
3846 */
3847typedef struct PDMDEVREGCB
3848{
3849 /** Interface version.
3850 * This is set to PDM_DEVREG_CB_VERSION. */
3851 uint32_t u32Version;
3852
3853 /**
3854 * Registers a device with the current VM instance.
3855 *
3856 * @returns VBox status code.
3857 * @param pCallbacks Pointer to the callback table.
3858 * @param pDevReg Pointer to the device registration record.
3859 * This data must be permanent and readonly.
3860 */
3861 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3862
3863 /**
3864 * Allocate memory which is associated with current VM instance
3865 * and automatically freed on it's destruction.
3866 *
3867 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3868 * @param pCallbacks Pointer to the callback table.
3869 * @param cb Number of bytes to allocate.
3870 */
3871 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3872} PDMDEVREGCB;
3873
3874/** Current version of the PDMDEVREGCB structure. */
3875#define PDM_DEVREG_CB_VERSION 0xf4010000
3876
3877
3878/**
3879 * The VBoxDevicesRegister callback function.
3880 *
3881 * PDM will invoke this function after loading a device module and letting
3882 * the module decide which devices to register and how to handle conflicts.
3883 *
3884 * @returns VBox status code.
3885 * @param pCallbacks Pointer to the callback table.
3886 * @param u32Version VBox version number.
3887 */
3888typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3889
3890/** @} */
3891
3892__END_DECLS
3893
3894#endif
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