VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 29567

Last change on this file since 29567 was 29521, checked in by vboxsync, 15 years ago

PDM: Added PDMDevHlpCallR0 and PDMDEV_VALIDATE_CONFIG_RETURN.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/pdmcommon.h>
35#include <VBox/iom.h>
36#include <VBox/tm.h>
37#include <VBox/ssm.h>
38#include <VBox/cfgm.h>
39#include <VBox/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44RT_C_DECLS_BEGIN
45
46/** @defgroup grp_pdm_device The PDM Devices API
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data. If the registration structure
56 * is needed, it can be accessed thru pDevIns->pReg.
57 * @param iInstance Instance number. Use this to figure out which registers
58 * and such to use. The instance number is also found in
59 * pDevIns->iInstance, but since it's likely to be
60 * freqently used PDM passes it as parameter.
61 * @param pCfg Configuration node handle for the driver. This is
62 * expected to be in high demand in the constructor and is
63 * therefore passed as an argument. When using it at other
64 * times, it can be found in pDrvIns->pCfg.
65 */
66typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
67/** Pointer to a FNPDMDEVCONSTRUCT() function. */
68typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
69
70/**
71 * Destruct a device instance.
72 *
73 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
74 * resources can be freed correctly.
75 *
76 * @returns VBox status.
77 * @param pDevIns The device instance data.
78 */
79typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
80/** Pointer to a FNPDMDEVDESTRUCT() function. */
81typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
82
83/**
84 * Device relocation callback.
85 *
86 * This is called when the instance data has been relocated in raw-mode context
87 * (RC). It is also called when the RC hypervisor selects changes. The device
88 * must fixup all necessary pointers and re-query all interfaces to other RC
89 * devices and drivers.
90 *
91 * Before the RC code is executed the first time, this function will be called
92 * with a 0 delta so RC pointer calculations can be one in one place.
93 *
94 * @param pDevIns Pointer to the device instance.
95 * @param offDelta The relocation delta relative to the old location.
96 *
97 * @remark A relocation CANNOT fail.
98 */
99typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
100/** Pointer to a FNPDMDEVRELOCATE() function. */
101typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
102
103/**
104 * Device I/O Control interface.
105 *
106 * This is used by external components, such as the COM interface, to
107 * communicate with devices using a class wide interface or a device
108 * specific interface.
109 *
110 * @returns VBox status code.
111 * @param pDevIns Pointer to the device instance.
112 * @param uFunction Function to perform.
113 * @param pvIn Pointer to input data.
114 * @param cbIn Size of input data.
115 * @param pvOut Pointer to output data.
116 * @param cbOut Size of output data.
117 * @param pcbOut Where to store the actual size of the output data.
118 */
119typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
120 void *pvIn, RTUINT cbIn,
121 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
122/** Pointer to a FNPDMDEVIOCTL() function. */
123typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
124
125/**
126 * Power On notification.
127 *
128 * @returns VBox status.
129 * @param pDevIns The device instance data.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVPOWERON() function. */
133typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
134
135/**
136 * Reset notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 */
141typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
142/** Pointer to a FNPDMDEVRESET() function. */
143typedef FNPDMDEVRESET *PFNPDMDEVRESET;
144
145/**
146 * Suspend notification.
147 *
148 * @returns VBox status.
149 * @param pDevIns The device instance data.
150 * @thread EMT(0)
151 */
152typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
153/** Pointer to a FNPDMDEVSUSPEND() function. */
154typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
155
156/**
157 * Resume notification.
158 *
159 * @returns VBox status.
160 * @param pDevIns The device instance data.
161 */
162typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
163/** Pointer to a FNPDMDEVRESUME() function. */
164typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
165
166/**
167 * Power Off notification.
168 *
169 * This is only called when the VMR3PowerOff call is made on a running VM. This
170 * means that there is no notification if the VM was suspended before being
171 * powered of. There will also be no callback when hot plugging devices.
172 *
173 * @param pDevIns The device instance data.
174 * @thread EMT(0)
175 */
176typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
177/** Pointer to a FNPDMDEVPOWEROFF() function. */
178typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
179
180/**
181 * Attach command.
182 *
183 * This is called to let the device attach to a driver for a specified LUN
184 * at runtime. This is not called during VM construction, the device
185 * constructor have to attach to all the available drivers.
186 *
187 * This is like plugging in the keyboard or mouse after turning on the PC.
188 *
189 * @returns VBox status code.
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
193 */
194typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
195/** Pointer to a FNPDMDEVATTACH() function. */
196typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
197
198/**
199 * Detach notification.
200 *
201 * This is called when a driver is detaching itself from a LUN of the device.
202 * The device should adjust it's state to reflect this.
203 *
204 * This is like unplugging the network cable to use it for the laptop or
205 * something while the PC is still running.
206 *
207 * @param pDevIns The device instance.
208 * @param iLUN The logical unit which is being detached.
209 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 */
223typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
224/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
225typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
226
227/**
228 * Init complete notification.
229 * This can be done to do communication with other devices and other
230 * initialization which requires everything to be in place.
231 *
232 * @returns VBOX status code.
233 * @param pDevIns The device instance.
234 */
235typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
236/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
237typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
238
239
240
241/**
242 * PDM Device Registration Structure.
243 *
244 * This structure is used when registering a device from VBoxInitDevices() in HC
245 * Ring-3. PDM will continue use till the VM is terminated.
246 */
247typedef struct PDMDEVREG
248{
249 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
250 uint32_t u32Version;
251 /** Device name. */
252 char szName[32];
253 /** Name of the raw-mode context module (no path).
254 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
255 char szRCMod[32];
256 /** Name of the ring-0 module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
258 char szR0Mod[32];
259 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
260 * remain unchanged from registration till VM destruction. */
261 const char *pszDescription;
262
263 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
264 uint32_t fFlags;
265 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
266 uint32_t fClass;
267 /** Maximum number of instances (per VM). */
268 uint32_t cMaxInstances;
269 /** Size of the instance data. */
270 uint32_t cbInstance;
271
272 /** Construct instance - required. */
273 PFNPDMDEVCONSTRUCT pfnConstruct;
274 /** Destruct instance - optional. */
275 PFNPDMDEVDESTRUCT pfnDestruct;
276 /** Relocation command - optional. */
277 PFNPDMDEVRELOCATE pfnRelocate;
278 /** I/O Control interface - optional. */
279 PFNPDMDEVIOCTL pfnIOCtl;
280 /** Power on notification - optional. */
281 PFNPDMDEVPOWERON pfnPowerOn;
282 /** Reset notification - optional. */
283 PFNPDMDEVRESET pfnReset;
284 /** Suspend notification - optional. */
285 PFNPDMDEVSUSPEND pfnSuspend;
286 /** Resume notification - optional. */
287 PFNPDMDEVRESUME pfnResume;
288 /** Attach command - optional. */
289 PFNPDMDEVATTACH pfnAttach;
290 /** Detach notification - optional. */
291 PFNPDMDEVDETACH pfnDetach;
292 /** Query a LUN base interface - optional. */
293 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
294 /** Init complete notification - optional. */
295 PFNPDMDEVINITCOMPLETE pfnInitComplete;
296 /** Power off notification - optional. */
297 PFNPDMDEVPOWEROFF pfnPowerOff;
298 /** @todo */
299 PFNRT pfnSoftReset;
300 /** Initialization safty marker. */
301 uint32_t u32VersionEnd;
302} PDMDEVREG;
303/** Pointer to a PDM Device Structure. */
304typedef PDMDEVREG *PPDMDEVREG;
305/** Const pointer to a PDM Device Structure. */
306typedef PDMDEVREG const *PCPDMDEVREG;
307
308/** Current DEVREG version number. */
309#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
310
311/** PDM Device Flags.
312 * @{ */
313/** This flag is used to indicate that the device has a RC component. */
314#define PDM_DEVREG_FLAGS_RC 0x00000001
315/** This flag is used to indicate that the device has a R0 component. */
316#define PDM_DEVREG_FLAGS_R0 0x00000002
317
318/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
319 * The bit count for the current host. */
320#if HC_ARCH_BITS == 32
321# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
322#elif HC_ARCH_BITS == 64
323# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
324#else
325# error Unsupported HC_ARCH_BITS value.
326#endif
327/** The host bit count mask. */
328#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
329
330/** The device support only 32-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
332/** The device support only 64-bit guests. */
333#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
334/** The device support both 32-bit & 64-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
336/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
337 * The guest bit count for the current compilation. */
338#if GC_ARCH_BITS == 32
339# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
340#elif GC_ARCH_BITS == 64
341# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
342#else
343# error Unsupported GC_ARCH_BITS value.
344#endif
345/** The guest bit count mask. */
346#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
347
348/** A convenience. */
349#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
350
351/** Indicates that the devices support PAE36 on a 32-bit guest. */
352#define PDM_DEVREG_FLAGS_PAE36 0x00001000
353
354/** Indicates that the device needs to be notified before the drivers when suspending. */
355#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
356
357/** Indicates that the device needs to be notified before the drivers when powering off. */
358#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
359/** @} */
360
361
362/** PDM Device Classes.
363 * The order is important, lower bit earlier instantiation.
364 * @{ */
365/** Architecture device. */
366#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
367/** Architecture BIOS device. */
368#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
369/** PCI bus brigde. */
370#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
371/** ISA bus brigde. */
372#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
373/** Input device (mouse, keyboard, joystick, HID, ...). */
374#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
375/** Interrupt controller (PIC). */
376#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
377/** Interval controoler (PIT). */
378#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
379/** RTC/CMOS. */
380#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
381/** DMA controller. */
382#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
383/** VMM Device. */
384#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
385/** Graphics device, like VGA. */
386#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
387/** Storage controller device. */
388#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
389/** Network interface controller. */
390#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
391/** Audio. */
392#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
393/** USB HIC. */
394#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
395/** ACPI. */
396#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
397/** Serial controller device. */
398#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
399/** Parallel controller device */
400#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
401/** Misc devices (always last). */
402#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
403/** @} */
404
405
406/** @name IRQ Level for use with the *SetIrq APIs.
407 * @{
408 */
409/** Assert the IRQ (can assume value 1). */
410#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
411/** Deassert the IRQ (can assume value 0). */
412#define PDM_IRQ_LEVEL_LOW 0
413/** flip-flop - assert and then deassert it again immediately. */
414#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
415/** @} */
416
417
418/**
419 * PCI Bus registration structure.
420 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
421 */
422typedef struct PDMPCIBUSREG
423{
424 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
425 uint32_t u32Version;
426
427 /**
428 * Registers the device with the default PCI bus.
429 *
430 * @returns VBox status code.
431 * @param pDevIns Device instance of the PCI Bus.
432 * @param pPciDev The PCI device structure.
433 * Any PCI enabled device must keep this in it's instance data!
434 * Fill in the PCI data config before registration, please.
435 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
436 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
437 * If negative, the pci bus device will assign one.
438 */
439 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
440
441 /**
442 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
443 *
444 * @returns VBox status code.
445 * @param pDevIns Device instance of the PCI Bus.
446 * @param pPciDev The PCI device structure.
447 * @param iRegion The region number.
448 * @param cbRegion Size of the region.
449 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
450 * @param pfnCallback Callback for doing the mapping.
451 */
452 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
453
454 /**
455 * Register PCI configuration space read/write callbacks.
456 *
457 * @param pDevIns Device instance of the PCI Bus.
458 * @param pPciDev The PCI device structure.
459 * @param pfnRead Pointer to the user defined PCI config read function.
460 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
461 * PCI config read function. This way, user can decide when (and if)
462 * to call default PCI config read function. Can be NULL.
463 * @param pfnWrite Pointer to the user defined PCI config write function.
464 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
465 * PCI config write function. This way, user can decide when (and if)
466 * to call default PCI config write function. Can be NULL.
467 * @thread EMT
468 */
469 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
470 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
471
472 /**
473 * Set the IRQ for a PCI device.
474 *
475 * @param pDevIns Device instance of the PCI Bus.
476 * @param pPciDev The PCI device structure.
477 * @param iIrq IRQ number to set.
478 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
479 */
480 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
481
482 /**
483 * Saves a state of the PCI device.
484 *
485 * @returns VBox status code.
486 * @param pDevIns Device instance of the PCI Bus.
487 * @param pPciDev Pointer to PCI device.
488 * @param pSSMHandle The handle to save the state to.
489 */
490 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
491
492 /**
493 * Loads a saved PCI device state.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev Pointer to PCI device.
498 * @param pSSMHandle The handle to the saved state.
499 */
500 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
501
502 /**
503 * Called to perform the job of the bios.
504 * This is only called for the first PCI Bus - it is expected to
505 * service all the PCI buses.
506 *
507 * @returns VBox status.
508 * @param pDevIns Device instance of the first bus.
509 */
510 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
511
512 /** The name of the SetIrq RC entry point. */
513 const char *pszSetIrqRC;
514
515 /** The name of the SetIrq R0 entry point. */
516 const char *pszSetIrqR0;
517
518} PDMPCIBUSREG;
519/** Pointer to a PCI bus registration structure. */
520typedef PDMPCIBUSREG *PPDMPCIBUSREG;
521
522/** Current PDMPCIBUSREG version number. */
523#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 1, 0)
524
525/**
526 * PCI Bus RC helpers.
527 */
528typedef struct PDMPCIHLPRC
529{
530 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
531 uint32_t u32Version;
532
533 /**
534 * Set an ISA IRQ.
535 *
536 * @param pDevIns PCI device instance.
537 * @param iIrq IRQ number to set.
538 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
539 * @thread EMT only.
540 */
541 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
542
543 /**
544 * Set an I/O-APIC IRQ.
545 *
546 * @param pDevIns PCI device instance.
547 * @param iIrq IRQ number to set.
548 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
549 * @thread EMT only.
550 */
551 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
552
553 /**
554 * Acquires the PDM lock.
555 *
556 * @returns VINF_SUCCESS on success.
557 * @returns rc if we failed to acquire the lock.
558 * @param pDevIns The PCI device instance.
559 * @param rc What to return if we fail to acquire the lock.
560 */
561 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
562
563 /**
564 * Releases the PDM lock.
565 *
566 * @param pDevIns The PCI device instance.
567 */
568 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
569
570 /** Just a safety precaution. */
571 uint32_t u32TheEnd;
572} PDMPCIHLPRC;
573/** Pointer to PCI helpers. */
574typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
575/** Pointer to const PCI helpers. */
576typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
577
578/** Current PDMPCIHLPR3 version number. */
579#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 1, 0)
580
581
582/**
583 * PCI Bus R0 helpers.
584 */
585typedef struct PDMPCIHLPR0
586{
587 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
588 uint32_t u32Version;
589
590 /**
591 * Set an ISA IRQ.
592 *
593 * @param pDevIns PCI device instance.
594 * @param iIrq IRQ number to set.
595 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
596 * @thread EMT only.
597 */
598 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
599
600 /**
601 * Set an I/O-APIC IRQ.
602 *
603 * @param pDevIns PCI device instance.
604 * @param iIrq IRQ number to set.
605 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
606 * @thread EMT only.
607 */
608 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
609
610 /**
611 * Acquires the PDM lock.
612 *
613 * @returns VINF_SUCCESS on success.
614 * @returns rc if we failed to acquire the lock.
615 * @param pDevIns The PCI device instance.
616 * @param rc What to return if we fail to acquire the lock.
617 */
618 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
619
620 /**
621 * Releases the PDM lock.
622 *
623 * @param pDevIns The PCI device instance.
624 */
625 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
626
627 /** Just a safety precaution. */
628 uint32_t u32TheEnd;
629} PDMPCIHLPR0;
630/** Pointer to PCI helpers. */
631typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
632/** Pointer to const PCI helpers. */
633typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
634
635/** Current PDMPCIHLPR0 version number. */
636#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 1, 0)
637
638/**
639 * PCI device helpers.
640 */
641typedef struct PDMPCIHLPR3
642{
643 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
644 uint32_t u32Version;
645
646 /**
647 * Set an ISA IRQ.
648 *
649 * @param pDevIns The PCI device instance.
650 * @param iIrq IRQ number to set.
651 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
652 * @thread EMT only.
653 */
654 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
655
656 /**
657 * Set an I/O-APIC IRQ.
658 *
659 * @param pDevIns The PCI device instance.
660 * @param iIrq IRQ number to set.
661 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
662 * @thread EMT only.
663 */
664 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
665
666 /**
667 * Checks if the given address is an MMIO2 base address or not.
668 *
669 * @returns true/false accordingly.
670 * @param pDevIns The PCI device instance.
671 * @param pOwner The owner of the memory, optional.
672 * @param GCPhys The address to check.
673 */
674 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
675
676 /**
677 * Gets the address of the RC PCI Bus helpers.
678 *
679 * This should be called at both construction and relocation time
680 * to obtain the correct address of the RC helpers.
681 *
682 * @returns RC pointer to the PCI Bus helpers.
683 * @param pDevIns Device instance of the PCI Bus.
684 * @thread EMT only.
685 */
686 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
687
688 /**
689 * Gets the address of the R0 PCI Bus helpers.
690 *
691 * This should be called at both construction and relocation time
692 * to obtain the correct address of the R0 helpers.
693 *
694 * @returns R0 pointer to the PCI Bus helpers.
695 * @param pDevIns Device instance of the PCI Bus.
696 * @thread EMT only.
697 */
698 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
699
700 /**
701 * Acquires the PDM lock.
702 *
703 * @returns VINF_SUCCESS on success.
704 * @returns Fatal error on failure.
705 * @param pDevIns The PCI device instance.
706 * @param rc Dummy for making the interface identical to the RC and R0 versions.
707 */
708 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
709
710 /**
711 * Releases the PDM lock.
712 *
713 * @param pDevIns The PCI device instance.
714 */
715 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
716
717 /** Just a safety precaution. */
718 uint32_t u32TheEnd;
719} PDMPCIHLPR3;
720/** Pointer to PCI helpers. */
721typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
722/** Pointer to const PCI helpers. */
723typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
724
725/** Current PDMPCIHLPR3 version number. */
726#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 1, 0)
727
728
729/**
730 * Programmable Interrupt Controller registration structure.
731 */
732typedef struct PDMPICREG
733{
734 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set the an IRQ.
739 *
740 * @param pDevIns Device instance of the PIC.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 */
744 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
745
746 /**
747 * Get a pending interrupt.
748 *
749 * @returns Pending interrupt number.
750 * @param pDevIns Device instance of the PIC.
751 */
752 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
753
754 /** The name of the RC SetIrq entry point. */
755 const char *pszSetIrqRC;
756 /** The name of the RC GetInterrupt entry point. */
757 const char *pszGetInterruptRC;
758
759 /** The name of the R0 SetIrq entry point. */
760 const char *pszSetIrqR0;
761 /** The name of the R0 GetInterrupt entry point. */
762 const char *pszGetInterruptR0;
763} PDMPICREG;
764/** Pointer to a PIC registration structure. */
765typedef PDMPICREG *PPDMPICREG;
766
767/** Current PDMPICREG version number. */
768#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
769
770/**
771 * PIC RC helpers.
772 */
773typedef struct PDMPICHLPRC
774{
775 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
776 uint32_t u32Version;
777
778 /**
779 * Set the interrupt force action flag.
780 *
781 * @param pDevIns Device instance of the PIC.
782 */
783 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
784
785 /**
786 * Clear the interrupt force action flag.
787 *
788 * @param pDevIns Device instance of the PIC.
789 */
790 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
791
792 /**
793 * Acquires the PDM lock.
794 *
795 * @returns VINF_SUCCESS on success.
796 * @returns rc if we failed to acquire the lock.
797 * @param pDevIns The PIC device instance.
798 * @param rc What to return if we fail to acquire the lock.
799 */
800 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
801
802 /**
803 * Releases the PDM lock.
804 *
805 * @param pDevIns The PIC device instance.
806 */
807 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
808
809 /** Just a safety precaution. */
810 uint32_t u32TheEnd;
811} PDMPICHLPRC;
812
813/** Pointer to PIC RC helpers. */
814typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
815/** Pointer to const PIC RC helpers. */
816typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
817
818/** Current PDMPICHLPRC version number. */
819#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
820
821
822/**
823 * PIC R0 helpers.
824 */
825typedef struct PDMPICHLPR0
826{
827 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
828 uint32_t u32Version;
829
830 /**
831 * Set the interrupt force action flag.
832 *
833 * @param pDevIns Device instance of the PIC.
834 */
835 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
836
837 /**
838 * Clear the interrupt force action flag.
839 *
840 * @param pDevIns Device instance of the PIC.
841 */
842 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
843
844 /**
845 * Acquires the PDM lock.
846 *
847 * @returns VINF_SUCCESS on success.
848 * @returns rc if we failed to acquire the lock.
849 * @param pDevIns The PIC device instance.
850 * @param rc What to return if we fail to acquire the lock.
851 */
852 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
853
854 /**
855 * Releases the PDM lock.
856 *
857 * @param pDevIns The PCI device instance.
858 */
859 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
860
861 /** Just a safety precaution. */
862 uint32_t u32TheEnd;
863} PDMPICHLPR0;
864
865/** Pointer to PIC R0 helpers. */
866typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
867/** Pointer to const PIC R0 helpers. */
868typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
869
870/** Current PDMPICHLPR0 version number. */
871#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
872
873/**
874 * PIC R3 helpers.
875 */
876typedef struct PDMPICHLPR3
877{
878 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
879 uint32_t u32Version;
880
881 /**
882 * Set the interrupt force action flag.
883 *
884 * @param pDevIns Device instance of the PIC.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
887
888 /**
889 * Clear the interrupt force action flag.
890 *
891 * @param pDevIns Device instance of the PIC.
892 */
893 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
894
895 /**
896 * Acquires the PDM lock.
897 *
898 * @returns VINF_SUCCESS on success.
899 * @returns Fatal error on failure.
900 * @param pDevIns The PIC device instance.
901 * @param rc Dummy for making the interface identical to the RC and R0 versions.
902 */
903 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
904
905 /**
906 * Releases the PDM lock.
907 *
908 * @param pDevIns The PIC device instance.
909 */
910 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
911
912 /**
913 * Gets the address of the RC PIC helpers.
914 *
915 * This should be called at both construction and relocation time
916 * to obtain the correct address of the RC helpers.
917 *
918 * @returns RC pointer to the PIC helpers.
919 * @param pDevIns Device instance of the PIC.
920 */
921 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
922
923 /**
924 * Gets the address of the R0 PIC helpers.
925 *
926 * This should be called at both construction and relocation time
927 * to obtain the correct address of the R0 helpers.
928 *
929 * @returns R0 pointer to the PIC helpers.
930 * @param pDevIns Device instance of the PIC.
931 */
932 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
933
934 /** Just a safety precaution. */
935 uint32_t u32TheEnd;
936} PDMPICHLPR3;
937
938/** Pointer to PIC R3 helpers. */
939typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
940/** Pointer to const PIC R3 helpers. */
941typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
942
943/** Current PDMPICHLPR3 version number. */
944#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
945
946
947
948/**
949 * Advanced Programmable Interrupt Controller registration structure.
950 */
951typedef struct PDMAPICREG
952{
953 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
954 uint32_t u32Version;
955
956 /**
957 * Get a pending interrupt.
958 *
959 * @returns Pending interrupt number.
960 * @param pDevIns Device instance of the APIC.
961 */
962 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
963
964 /**
965 * Check if the APIC has a pending interrupt/if a TPR change would active one
966 *
967 * @returns Pending interrupt yes/no
968 * @param pDevIns Device instance of the APIC.
969 */
970 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
971
972 /**
973 * Set the APIC base.
974 *
975 * @param pDevIns Device instance of the APIC.
976 * @param u64Base The new base.
977 */
978 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
979
980 /**
981 * Get the APIC base.
982 *
983 * @returns Current base.
984 * @param pDevIns Device instance of the APIC.
985 */
986 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
987
988 /**
989 * Set the TPR (task priority register).
990 *
991 * @param pDevIns Device instance of the APIC.
992 * @param idCpu VCPU id
993 * @param u8TPR The new TPR.
994 */
995 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
996
997 /**
998 * Get the TPR (task priority register).
999 *
1000 * @returns The current TPR.
1001 * @param pDevIns Device instance of the APIC.
1002 * @param idCpu VCPU id
1003 */
1004 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1005
1006 /**
1007 * Write MSR in APIC range.
1008 *
1009 * @returns VBox status code.
1010 * @param pDevIns Device instance of the APIC.
1011 * @param idCpu Target CPU.
1012 * @param u32Reg MSR to write.
1013 * @param u64Value Value to write.
1014 */
1015 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1016
1017 /**
1018 * Read MSR in APIC range.
1019 *
1020 * @returns VBox status code.
1021 * @param pDevIns Device instance of the APIC.
1022 * @param idCpu Target CPU.
1023 * @param u32Reg MSR to read.
1024 * @param pu64Value Value read.
1025 */
1026 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1027
1028 /**
1029 * Private interface between the IOAPIC and APIC.
1030 *
1031 * This is a low-level, APIC/IOAPIC implementation specific interface
1032 * which is registered with PDM only because it makes life so much
1033 * simpler right now (GC bits). This is a bad bad hack! The correct
1034 * way of doing this would involve some way of querying GC interfaces
1035 * and relocating them. Perhaps doing some kind of device init in GC...
1036 *
1037 * @returns status code.
1038 * @param pDevIns Device instance of the APIC.
1039 * @param u8Dest See APIC implementation.
1040 * @param u8DestMode See APIC implementation.
1041 * @param u8DeliveryMode See APIC implementation.
1042 * @param iVector See APIC implementation.
1043 * @param u8Polarity See APIC implementation.
1044 * @param u8TriggerMode See APIC implementation.
1045 */
1046 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1047 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1048
1049 /**
1050 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1051 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1052 *
1053 * @returns status code.
1054 * @param pDevIns Device instance of the APIC.
1055 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1056 */
1057 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1058
1059 /** The name of the RC GetInterrupt entry point. */
1060 const char *pszGetInterruptRC;
1061 /** The name of the RC HasPendingIrq entry point. */
1062 const char *pszHasPendingIrqRC;
1063 /** The name of the RC SetBase entry point. */
1064 const char *pszSetBaseRC;
1065 /** The name of the RC GetBase entry point. */
1066 const char *pszGetBaseRC;
1067 /** The name of the RC SetTPR entry point. */
1068 const char *pszSetTPRRC;
1069 /** The name of the RC GetTPR entry point. */
1070 const char *pszGetTPRRC;
1071 /** The name of the RC WriteMSR entry point. */
1072 const char *pszWriteMSRRC;
1073 /** The name of the RC ReadMSR entry point. */
1074 const char *pszReadMSRRC;
1075 /** The name of the RC BusDeliver entry point. */
1076 const char *pszBusDeliverRC;
1077 /** The name of the RC LocalInterrupt entry point. */
1078 const char *pszLocalInterruptRC;
1079
1080 /** The name of the R0 GetInterrupt entry point. */
1081 const char *pszGetInterruptR0;
1082 /** The name of the R0 HasPendingIrq entry point. */
1083 const char *pszHasPendingIrqR0;
1084 /** The name of the R0 SetBase entry point. */
1085 const char *pszSetBaseR0;
1086 /** The name of the R0 GetBase entry point. */
1087 const char *pszGetBaseR0;
1088 /** The name of the R0 SetTPR entry point. */
1089 const char *pszSetTPRR0;
1090 /** The name of the R0 GetTPR entry point. */
1091 const char *pszGetTPRR0;
1092 /** The name of the R0 WriteMSR entry point. */
1093 const char *pszWriteMSRR0;
1094 /** The name of the R0 ReadMSR entry point. */
1095 const char *pszReadMSRR0;
1096 /** The name of the R0 BusDeliver entry point. */
1097 const char *pszBusDeliverR0;
1098 /** The name of the R0 LocalInterrupt entry point. */
1099 const char *pszLocalInterruptR0;
1100
1101} PDMAPICREG;
1102/** Pointer to an APIC registration structure. */
1103typedef PDMAPICREG *PPDMAPICREG;
1104
1105/** Current PDMAPICREG version number. */
1106#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1107
1108
1109/**
1110 * APIC version argument for pfnChangeFeature.
1111 */
1112typedef enum PDMAPICVERSION
1113{
1114 /** Invalid 0 entry. */
1115 PDMAPICVERSION_INVALID = 0,
1116 /** No APIC. */
1117 PDMAPICVERSION_NONE,
1118 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1119 PDMAPICVERSION_APIC,
1120 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1121 PDMAPICVERSION_X2APIC,
1122 /** The usual 32-bit paranoia. */
1123 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1124} PDMAPICVERSION;
1125
1126/**
1127 * APIC irq argument for SetInterruptFF.
1128 */
1129typedef enum PDMAPICIRQ
1130{
1131 /** Invalid 0 entry. */
1132 PDMAPICIRQ_INVALID = 0,
1133 /** Normal hardware interrupt. */
1134 PDMAPICIRQ_HARDWARE,
1135 /** NMI. */
1136 PDMAPICIRQ_NMI,
1137 /** SMI. */
1138 PDMAPICIRQ_SMI,
1139 /** ExtINT (HW interrupt via PIC). */
1140 PDMAPICIRQ_EXTINT,
1141 /** The usual 32-bit paranoia. */
1142 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1143} PDMAPICIRQ;
1144
1145
1146/**
1147 * APIC RC helpers.
1148 */
1149typedef struct PDMAPICHLPRC
1150{
1151 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1152 uint32_t u32Version;
1153
1154 /**
1155 * Set the interrupt force action flag.
1156 *
1157 * @param pDevIns Device instance of the APIC.
1158 * @param enmType IRQ type.
1159 * @param idCpu Virtual CPU to set flag upon.
1160 */
1161 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1162
1163 /**
1164 * Clear the interrupt force action flag.
1165 *
1166 * @param pDevIns Device instance of the APIC.
1167 * @param enmType IRQ type.
1168 * @param idCpu Virtual CPU to clear flag upon.
1169 */
1170 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1171
1172 /**
1173 * Modifies APIC-related bits in the CPUID feature mask.
1174 *
1175 * @param pDevIns Device instance of the APIC.
1176 * @param enmVersion Supported APIC version.
1177 */
1178 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1179
1180 /**
1181 * Acquires the PDM lock.
1182 *
1183 * @returns VINF_SUCCESS on success.
1184 * @returns rc if we failed to acquire the lock.
1185 * @param pDevIns The APIC device instance.
1186 * @param rc What to return if we fail to acquire the lock.
1187 */
1188 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1189
1190 /**
1191 * Releases the PDM lock.
1192 *
1193 * @param pDevIns The APIC device instance.
1194 */
1195 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1196
1197 /**
1198 * Get the virtual CPU id corresponding to the current EMT.
1199 *
1200 * @param pDevIns The APIC device instance.
1201 */
1202 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1203
1204 /** Just a safety precaution. */
1205 uint32_t u32TheEnd;
1206} PDMAPICHLPRC;
1207/** Pointer to APIC GC helpers. */
1208typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1209/** Pointer to const APIC helpers. */
1210typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1211
1212/** Current PDMAPICHLPRC version number. */
1213#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1214
1215
1216/**
1217 * APIC R0 helpers.
1218 */
1219typedef struct PDMAPICHLPR0
1220{
1221 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1222 uint32_t u32Version;
1223
1224 /**
1225 * Set the interrupt force action flag.
1226 *
1227 * @param pDevIns Device instance of the APIC.
1228 * @param enmType IRQ type.
1229 * @param idCpu Virtual CPU to set flag upon.
1230 */
1231 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1232
1233 /**
1234 * Clear the interrupt force action flag.
1235 *
1236 * @param pDevIns Device instance of the APIC.
1237 * @param enmType IRQ type.
1238 * @param idCpu Virtual CPU to clear flag upon.
1239 */
1240 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1241
1242 /**
1243 * Modifies APIC-related bits in the CPUID feature mask.
1244 *
1245 * @param pDevIns Device instance of the APIC.
1246 * @param enmVersion Supported APIC version.
1247 */
1248 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1249
1250 /**
1251 * Acquires the PDM lock.
1252 *
1253 * @returns VINF_SUCCESS on success.
1254 * @returns rc if we failed to acquire the lock.
1255 * @param pDevIns The APIC device instance.
1256 * @param rc What to return if we fail to acquire the lock.
1257 */
1258 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1259
1260 /**
1261 * Releases the PDM lock.
1262 *
1263 * @param pDevIns The APIC device instance.
1264 */
1265 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1266
1267 /**
1268 * Get the virtual CPU id corresponding to the current EMT.
1269 *
1270 * @param pDevIns The APIC device instance.
1271 */
1272 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1273
1274 /** Just a safety precaution. */
1275 uint32_t u32TheEnd;
1276} PDMAPICHLPR0;
1277/** Pointer to APIC GC helpers. */
1278typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1279/** Pointer to const APIC helpers. */
1280typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1281
1282/** Current PDMAPICHLPR0 version number. */
1283#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1284
1285/**
1286 * APIC R3 helpers.
1287 */
1288typedef struct PDMAPICHLPR3
1289{
1290 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1291 uint32_t u32Version;
1292
1293 /**
1294 * Set the interrupt force action flag.
1295 *
1296 * @param pDevIns Device instance of the APIC.
1297 * @param enmType IRQ type.
1298 * @param idCpu Virtual CPU to set flag upon.
1299 */
1300 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1301
1302 /**
1303 * Clear the interrupt force action flag.
1304 *
1305 * @param pDevIns Device instance of the APIC.
1306 * @param enmType IRQ type.
1307 * @param idCpu Virtual CPU to clear flag upon.
1308 */
1309 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1310
1311 /**
1312 * Modifies APIC-related bits in the CPUID feature mask.
1313 *
1314 * @param pDevIns Device instance of the APIC.
1315 * @param enmVersion Supported APIC version.
1316 */
1317 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1318
1319 /**
1320 * Get the virtual CPU id corresponding to the current EMT.
1321 *
1322 * @param pDevIns The APIC device instance.
1323 */
1324 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1325
1326 /**
1327 * Sends SIPI to given virtual CPU.
1328 *
1329 * @param pDevIns The APIC device instance.
1330 * @param idCpu Virtual CPU to perform SIPI on
1331 * @param iVector SIPI vector
1332 */
1333 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1334
1335 /**
1336 * Sends init IPI to given virtual CPU, should result in reset and
1337 * halting till SIPI.
1338 *
1339 * @param pDevIns The APIC device instance.
1340 * @param idCpu Virtual CPU to perform SIPI on
1341 */
1342 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1343
1344 /**
1345 * Gets the address of the RC APIC helpers.
1346 *
1347 * This should be called at both construction and relocation time
1348 * to obtain the correct address of the RC helpers.
1349 *
1350 * @returns GC pointer to the APIC helpers.
1351 * @param pDevIns Device instance of the APIC.
1352 */
1353 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1354
1355 /**
1356 * Gets the address of the R0 APIC helpers.
1357 *
1358 * This should be called at both construction and relocation time
1359 * to obtain the correct address of the R0 helpers.
1360 *
1361 * @returns R0 pointer to the APIC helpers.
1362 * @param pDevIns Device instance of the APIC.
1363 */
1364 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1365
1366 /**
1367 * Get the critical section used to synchronize the PICs, PCI and stuff.
1368 *
1369 * @returns Ring-3 pointer to the critical section.
1370 * @param pDevIns The APIC device instance.
1371 */
1372 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1373
1374 /**
1375 * Get the critical section used to synchronize the PICs, PCI and stuff.
1376 *
1377 * @returns Raw-mode context pointer to the critical section.
1378 * @param pDevIns The APIC device instance.
1379 */
1380 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1381
1382 /**
1383 * Get the critical section used to synchronize the PICs, PCI and stuff.
1384 *
1385 * @returns Ring-0 pointer to the critical section.
1386 * @param pDevIns The APIC device instance.
1387 */
1388 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1389
1390 /** Just a safety precaution. */
1391 uint32_t u32TheEnd;
1392} PDMAPICHLPR3;
1393/** Pointer to APIC helpers. */
1394typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1395/** Pointer to const APIC helpers. */
1396typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1397
1398/** Current PDMAPICHLP version number. */
1399#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1400
1401
1402/**
1403 * I/O APIC registration structure.
1404 */
1405typedef struct PDMIOAPICREG
1406{
1407 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1408 uint32_t u32Version;
1409
1410 /**
1411 * Set the an IRQ.
1412 *
1413 * @param pDevIns Device instance of the I/O APIC.
1414 * @param iIrq IRQ number to set.
1415 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1416 */
1417 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1418
1419 /** The name of the GC SetIrq entry point. */
1420 const char *pszSetIrqRC;
1421
1422 /** The name of the R0 SetIrq entry point. */
1423 const char *pszSetIrqR0;
1424} PDMIOAPICREG;
1425/** Pointer to an APIC registration structure. */
1426typedef PDMIOAPICREG *PPDMIOAPICREG;
1427
1428/** Current PDMAPICREG version number. */
1429#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
1430
1431
1432/**
1433 * IOAPIC RC helpers.
1434 */
1435typedef struct PDMIOAPICHLPRC
1436{
1437 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1438 uint32_t u32Version;
1439
1440 /**
1441 * Private interface between the IOAPIC and APIC.
1442 *
1443 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1444 *
1445 * @returns status code.
1446 * @param pDevIns Device instance of the IOAPIC.
1447 * @param u8Dest See APIC implementation.
1448 * @param u8DestMode See APIC implementation.
1449 * @param u8DeliveryMode See APIC implementation.
1450 * @param iVector See APIC implementation.
1451 * @param u8Polarity See APIC implementation.
1452 * @param u8TriggerMode See APIC implementation.
1453 */
1454 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1456
1457 /**
1458 * Acquires the PDM lock.
1459 *
1460 * @returns VINF_SUCCESS on success.
1461 * @returns rc if we failed to acquire the lock.
1462 * @param pDevIns The IOAPIC device instance.
1463 * @param rc What to return if we fail to acquire the lock.
1464 */
1465 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1466
1467 /**
1468 * Releases the PDM lock.
1469 *
1470 * @param pDevIns The IOAPIC device instance.
1471 */
1472 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1473
1474 /** Just a safety precaution. */
1475 uint32_t u32TheEnd;
1476} PDMIOAPICHLPRC;
1477/** Pointer to IOAPIC RC helpers. */
1478typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1479/** Pointer to const IOAPIC helpers. */
1480typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1481
1482/** Current PDMIOAPICHLPRC version number. */
1483#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1484
1485
1486/**
1487 * IOAPIC R0 helpers.
1488 */
1489typedef struct PDMIOAPICHLPR0
1490{
1491 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1492 uint32_t u32Version;
1493
1494 /**
1495 * Private interface between the IOAPIC and APIC.
1496 *
1497 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1498 *
1499 * @returns status code.
1500 * @param pDevIns Device instance of the IOAPIC.
1501 * @param u8Dest See APIC implementation.
1502 * @param u8DestMode See APIC implementation.
1503 * @param u8DeliveryMode See APIC implementation.
1504 * @param iVector See APIC implementation.
1505 * @param u8Polarity See APIC implementation.
1506 * @param u8TriggerMode See APIC implementation.
1507 */
1508 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1509 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1510
1511 /**
1512 * Acquires the PDM lock.
1513 *
1514 * @returns VINF_SUCCESS on success.
1515 * @returns rc if we failed to acquire the lock.
1516 * @param pDevIns The IOAPIC device instance.
1517 * @param rc What to return if we fail to acquire the lock.
1518 */
1519 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1520
1521 /**
1522 * Releases the PDM lock.
1523 *
1524 * @param pDevIns The IOAPIC device instance.
1525 */
1526 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1527
1528 /** Just a safety precaution. */
1529 uint32_t u32TheEnd;
1530} PDMIOAPICHLPR0;
1531/** Pointer to IOAPIC R0 helpers. */
1532typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1533/** Pointer to const IOAPIC helpers. */
1534typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1535
1536/** Current PDMIOAPICHLPR0 version number. */
1537#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1538
1539/**
1540 * IOAPIC R3 helpers.
1541 */
1542typedef struct PDMIOAPICHLPR3
1543{
1544 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1545 uint32_t u32Version;
1546
1547 /**
1548 * Private interface between the IOAPIC and APIC.
1549 *
1550 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1551 *
1552 * @returns status code
1553 * @param pDevIns Device instance of the IOAPIC.
1554 * @param u8Dest See APIC implementation.
1555 * @param u8DestMode See APIC implementation.
1556 * @param u8DeliveryMode See APIC implementation.
1557 * @param iVector See APIC implementation.
1558 * @param u8Polarity See APIC implementation.
1559 * @param u8TriggerMode See APIC implementation.
1560 */
1561 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1562 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1563
1564 /**
1565 * Acquires the PDM lock.
1566 *
1567 * @returns VINF_SUCCESS on success.
1568 * @returns Fatal error on failure.
1569 * @param pDevIns The IOAPIC device instance.
1570 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1571 */
1572 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1573
1574 /**
1575 * Releases the PDM lock.
1576 *
1577 * @param pDevIns The IOAPIC device instance.
1578 */
1579 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1580
1581 /**
1582 * Gets the address of the RC IOAPIC helpers.
1583 *
1584 * This should be called at both construction and relocation time
1585 * to obtain the correct address of the RC helpers.
1586 *
1587 * @returns RC pointer to the IOAPIC helpers.
1588 * @param pDevIns Device instance of the IOAPIC.
1589 */
1590 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1591
1592 /**
1593 * Gets the address of the R0 IOAPIC helpers.
1594 *
1595 * This should be called at both construction and relocation time
1596 * to obtain the correct address of the R0 helpers.
1597 *
1598 * @returns R0 pointer to the IOAPIC helpers.
1599 * @param pDevIns Device instance of the IOAPIC.
1600 */
1601 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1602
1603 /** Just a safety precaution. */
1604 uint32_t u32TheEnd;
1605} PDMIOAPICHLPR3;
1606/** Pointer to IOAPIC R3 helpers. */
1607typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1608/** Pointer to const IOAPIC helpers. */
1609typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1610
1611/** Current PDMIOAPICHLPR3 version number. */
1612#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1613
1614
1615/**
1616 * HPET registration structure.
1617 */
1618typedef struct PDMHPETREG
1619{
1620 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1621 uint32_t u32Version;
1622
1623} PDMHPETREG;
1624/** Pointer to an HPET registration structure. */
1625typedef PDMHPETREG *PPDMHPETREG;
1626
1627/** Current PDMHPETREG version number. */
1628#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1629
1630/**
1631 * HPET RC helpers.
1632 *
1633 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1634 * at some later point.
1635 */
1636typedef struct PDMHPETHLPRC
1637{
1638 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1639 uint32_t u32Version;
1640
1641 /** Just a safety precaution. */
1642 uint32_t u32TheEnd;
1643} PDMHPETHLPRC;
1644
1645/** Pointer to HPET RC helpers. */
1646typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1647/** Pointer to const HPET RC helpers. */
1648typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1649
1650/** Current PDMHPETHLPRC version number. */
1651#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1652
1653
1654/**
1655 * HPET R0 helpers.
1656 *
1657 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1658 * at some later point.
1659 */
1660typedef struct PDMHPETHLPR0
1661{
1662 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1663 uint32_t u32Version;
1664
1665 /** Just a safety precaution. */
1666 uint32_t u32TheEnd;
1667} PDMHPETHLPR0;
1668
1669/** Pointer to HPET R0 helpers. */
1670typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1671/** Pointer to const HPET R0 helpers. */
1672typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1673
1674/** Current PDMHPETHLPR0 version number. */
1675#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1676
1677/**
1678 * HPET R3 helpers.
1679 */
1680typedef struct PDMHPETHLPR3
1681{
1682 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1683 uint32_t u32Version;
1684
1685 /**
1686 * Gets the address of the RC HPET helpers.
1687 *
1688 * This should be called at both construction and relocation time
1689 * to obtain the correct address of the RC helpers.
1690 *
1691 * @returns RC pointer to the HPET helpers.
1692 * @param pDevIns Device instance of the HPET.
1693 */
1694 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1695
1696 /**
1697 * Gets the address of the R0 HPET helpers.
1698 *
1699 * This should be called at both construction and relocation time
1700 * to obtain the correct address of the R0 helpers.
1701 *
1702 * @returns R0 pointer to the HPET helpers.
1703 * @param pDevIns Device instance of the HPET.
1704 */
1705 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1706
1707 /**
1708 * Set legacy mode on PIT and RTC.
1709 *
1710 * @returns VINF_SUCCESS on success.
1711 * @returns rc if we failed to set legacy mode.
1712 * @param pDevIns Device instance of the HPET.
1713 * @param fActivated Whether legacy mode is activated or deactivated.
1714 */
1715 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1716
1717
1718 /**
1719 * Set IRQ, bypassing ISA bus override rules.
1720 *
1721 * @returns VINF_SUCCESS on success.
1722 * @returns rc if we failed to set legacy mode.
1723 * @param pDevIns Device instance of the HPET.
1724 * @param fActivate Activate or deactivate legacy mode.
1725 */
1726 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1727
1728 /** Just a safety precaution. */
1729 uint32_t u32TheEnd;
1730} PDMHPETHLPR3;
1731
1732/** Pointer to HPET R3 helpers. */
1733typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1734/** Pointer to const HPET R3 helpers. */
1735typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1736
1737/** Current PDMHPETHLPR3 version number. */
1738#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1739
1740
1741
1742#ifdef IN_RING3
1743
1744/**
1745 * DMA Transfer Handler.
1746 *
1747 * @returns Number of bytes transferred.
1748 * @param pDevIns Device instance of the DMA.
1749 * @param pvUser User pointer.
1750 * @param uChannel Channel number.
1751 * @param off DMA position.
1752 * @param cb Block size.
1753 */
1754typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1755/** Pointer to a FNDMATRANSFERHANDLER(). */
1756typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1757
1758/**
1759 * DMA Controller registration structure.
1760 */
1761typedef struct PDMDMAREG
1762{
1763 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1764 uint32_t u32Version;
1765
1766 /**
1767 * Execute pending transfers.
1768 *
1769 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1770 * @param pDevIns Device instance of the DMAC.
1771 */
1772 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1773
1774 /**
1775 * Register transfer function for DMA channel.
1776 *
1777 * @param pDevIns Device instance of the DMAC.
1778 * @param uChannel Channel number.
1779 * @param pfnTransferHandler Device specific transfer function.
1780 * @param pvUSer User pointer to be passed to the callback.
1781 */
1782 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1783
1784 /**
1785 * Read memory
1786 *
1787 * @returns Number of bytes read.
1788 * @param pDevIns Device instance of the DMAC.
1789 * @param pvBuffer Pointer to target buffer.
1790 * @param off DMA position.
1791 * @param cbBlock Block size.
1792 */
1793 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1794
1795 /**
1796 * Write memory
1797 *
1798 * @returns Number of bytes written.
1799 * @param pDevIns Device instance of the DMAC.
1800 * @param pvBuffer Memory to write.
1801 * @param off DMA position.
1802 * @param cbBlock Block size.
1803 */
1804 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1805
1806 /**
1807 * Set the DREQ line.
1808 *
1809 * @param pDevIns Device instance of the DMAC.
1810 * @param uChannel Channel number.
1811 * @param uLevel Level of the line.
1812 */
1813 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1814
1815 /**
1816 * Get channel mode
1817 *
1818 * @returns Channel mode.
1819 * @param pDevIns Device instance of the DMAC.
1820 * @param uChannel Channel number.
1821 */
1822 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1823
1824} PDMDMACREG;
1825/** Pointer to a DMAC registration structure. */
1826typedef PDMDMACREG *PPDMDMACREG;
1827
1828/** Current PDMDMACREG version number. */
1829#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1830
1831
1832/**
1833 * DMA Controller device helpers.
1834 */
1835typedef struct PDMDMACHLP
1836{
1837 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1838 uint32_t u32Version;
1839
1840 /* to-be-defined */
1841
1842} PDMDMACHLP;
1843/** Pointer to DMAC helpers. */
1844typedef PDMDMACHLP *PPDMDMACHLP;
1845/** Pointer to const DMAC helpers. */
1846typedef const PDMDMACHLP *PCPDMDMACHLP;
1847
1848/** Current PDMDMACHLP version number. */
1849#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1850
1851#endif /* IN_RING3 */
1852
1853
1854
1855/**
1856 * RTC registration structure.
1857 */
1858typedef struct PDMRTCREG
1859{
1860 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1861 uint32_t u32Version;
1862 uint32_t u32Alignment; /**< structure size alignment. */
1863
1864 /**
1865 * Write to a CMOS register and update the checksum if necessary.
1866 *
1867 * @returns VBox status code.
1868 * @param pDevIns Device instance of the RTC.
1869 * @param iReg The CMOS register index.
1870 * @param u8Value The CMOS register value.
1871 */
1872 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1873
1874 /**
1875 * Read a CMOS register.
1876 *
1877 * @returns VBox status code.
1878 * @param pDevIns Device instance of the RTC.
1879 * @param iReg The CMOS register index.
1880 * @param pu8Value Where to store the CMOS register value.
1881 */
1882 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1883
1884} PDMRTCREG;
1885/** Pointer to a RTC registration structure. */
1886typedef PDMRTCREG *PPDMRTCREG;
1887/** Pointer to a const RTC registration structure. */
1888typedef const PDMRTCREG *PCPDMRTCREG;
1889
1890/** Current PDMRTCREG version number. */
1891#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1892
1893
1894/**
1895 * RTC device helpers.
1896 */
1897typedef struct PDMRTCHLP
1898{
1899 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1900 uint32_t u32Version;
1901
1902 /* to-be-defined */
1903
1904} PDMRTCHLP;
1905/** Pointer to RTC helpers. */
1906typedef PDMRTCHLP *PPDMRTCHLP;
1907/** Pointer to const RTC helpers. */
1908typedef const PDMRTCHLP *PCPDMRTCHLP;
1909
1910/** Current PDMRTCHLP version number. */
1911#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1912
1913
1914
1915#ifdef IN_RING3
1916
1917/**
1918 * PDM Device API.
1919 */
1920typedef struct PDMDEVHLPR3
1921{
1922 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1923 uint32_t u32Version;
1924
1925 /**
1926 * Register a number of I/O ports with a device.
1927 *
1928 * These callbacks are of course for the host context (HC).
1929 * Register HC handlers before guest context (GC) handlers! There must be a
1930 * HC handler for every GC handler!
1931 *
1932 * @returns VBox status.
1933 * @param pDevIns The device instance to register the ports with.
1934 * @param Port First port number in the range.
1935 * @param cPorts Number of ports to register.
1936 * @param pvUser User argument.
1937 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1938 * @param pfnIn Pointer to function which is gonna handle IN operations.
1939 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1940 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1941 * @param pszDesc Pointer to description string. This must not be freed.
1942 */
1943 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1944 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1945 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1946
1947 /**
1948 * Register a number of I/O ports with a device for RC.
1949 *
1950 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1951 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1952 * for every RC handler!
1953 *
1954 * @returns VBox status.
1955 * @param pDevIns The device instance to register the ports with
1956 * and which RC module to resolve the names
1957 * against.
1958 * @param Port First port number in the range.
1959 * @param cPorts Number of ports to register.
1960 * @param pvUser User argument.
1961 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1962 * @param pszIn Name of the RC function which is gonna handle IN operations.
1963 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1964 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1965 * @param pszDesc Pointer to description string. This must not be freed.
1966 */
1967 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1968 const char *pszOut, const char *pszIn,
1969 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1970
1971 /**
1972 * Register a number of I/O ports with a device.
1973 *
1974 * These callbacks are of course for the ring-0 host context (R0).
1975 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1976 *
1977 * @returns VBox status.
1978 * @param pDevIns The device instance to register the ports with.
1979 * @param Port First port number in the range.
1980 * @param cPorts Number of ports to register.
1981 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1982 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1983 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1984 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1985 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1986 * @param pszDesc Pointer to description string. This must not be freed.
1987 */
1988 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1989 const char *pszOut, const char *pszIn,
1990 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1991
1992 /**
1993 * Deregister I/O ports.
1994 *
1995 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1996 *
1997 * @returns VBox status.
1998 * @param pDevIns The device instance owning the ports.
1999 * @param Port First port number in the range.
2000 * @param cPorts Number of ports to deregister.
2001 */
2002 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2003
2004 /**
2005 * Register a Memory Mapped I/O (MMIO) region.
2006 *
2007 * These callbacks are of course for the ring-3 context (R3). Register HC
2008 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2009 * must be a R3 handler for every RC and R0 handler!
2010 *
2011 * @returns VBox status.
2012 * @param pDevIns The device instance to register the MMIO with.
2013 * @param GCPhysStart First physical address in the range.
2014 * @param cbRange The size of the range (in bytes).
2015 * @param pvUser User argument.
2016 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2017 * @param pfnRead Pointer to function which is gonna handle Read operations.
2018 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2019 * @param pszDesc Pointer to description string. This must not be freed.
2020 */
2021 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2022 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2023 const char *pszDesc));
2024
2025 /**
2026 * Register a Memory Mapped I/O (MMIO) region for GC.
2027 *
2028 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2029 * (R3) handlers before guest context handlers! There must be a R3 handler for
2030 * every RC handler!
2031 *
2032 * @returns VBox status.
2033 * @param pDevIns The device instance to register the MMIO with.
2034 * @param GCPhysStart First physical address in the range.
2035 * @param cbRange The size of the range (in bytes).
2036 * @param pvUser User argument.
2037 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2038 * @param pszRead Name of the RC function which is gonna handle Read operations.
2039 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2040 * @param pszDesc Obsolete. NULL is fine.
2041 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2042 */
2043 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2044 const char *pszWrite, const char *pszRead, const char *pszFill,
2045 const char *pszDesc));
2046
2047 /**
2048 * Register a Memory Mapped I/O (MMIO) region for R0.
2049 *
2050 * These callbacks are for the ring-0 host context (R0). Register ring-3
2051 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2052 * every R0 handler!
2053 *
2054 * @returns VBox status.
2055 * @param pDevIns The device instance to register the MMIO with.
2056 * @param GCPhysStart First physical address in the range.
2057 * @param cbRange The size of the range (in bytes).
2058 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2059 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2060 * @param pszRead Name of the RC function which is gonna handle Read operations.
2061 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2062 * @param pszDesc Obsolete. NULL is fine.
2063 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2064 */
2065 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2066 const char *pszWrite, const char *pszRead, const char *pszFill,
2067 const char *pszDesc));
2068
2069 /**
2070 * Deregister a Memory Mapped I/O (MMIO) region.
2071 *
2072 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2073 *
2074 * @returns VBox status.
2075 * @param pDevIns The device instance owning the MMIO region(s).
2076 * @param GCPhysStart First physical address in the range.
2077 * @param cbRange The size of the range (in bytes).
2078 */
2079 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2080
2081 /**
2082 * Allocate and register a MMIO2 region.
2083 *
2084 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2085 * RAM associated with a device. It is also non-shared memory with a
2086 * permanent ring-3 mapping and page backing (presently).
2087 *
2088 * @returns VBox status.
2089 * @param pDevIns The device instance.
2090 * @param iRegion The region number. Use the PCI region number as
2091 * this must be known to the PCI bus device too. If
2092 * it's not associated with the PCI device, then
2093 * any number up to UINT8_MAX is fine.
2094 * @param cb The size (in bytes) of the region.
2095 * @param fFlags Reserved for future use, must be zero.
2096 * @param ppv Where to store the address of the ring-3 mapping
2097 * of the memory.
2098 * @param pszDesc Pointer to description string. This must not be
2099 * freed.
2100 * @thread EMT.
2101 */
2102 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2103
2104 /**
2105 * Deregisters and frees a MMIO2 region.
2106 *
2107 * Any physical (and virtual) access handlers registered for the region must
2108 * be deregistered before calling this function.
2109 *
2110 * @returns VBox status code.
2111 * @param pDevIns The device instance.
2112 * @param iRegion The region number used during registration.
2113 * @thread EMT.
2114 */
2115 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2116
2117 /**
2118 * Maps a MMIO2 region into the physical memory space.
2119 *
2120 * A MMIO2 range may overlap with base memory if a lot of RAM
2121 * is configured for the VM, in which case we'll drop the base
2122 * memory pages. Presently we will make no attempt to preserve
2123 * anything that happens to be present in the base memory that
2124 * is replaced, this is of course incorrectly but it's too much
2125 * effort.
2126 *
2127 * @returns VBox status code.
2128 * @param pDevIns The device instance.
2129 * @param iRegion The region number used during registration.
2130 * @param GCPhys The physical address to map it at.
2131 * @thread EMT.
2132 */
2133 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2134
2135 /**
2136 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2137 *
2138 * @returns VBox status code.
2139 * @param pDevIns The device instance.
2140 * @param iRegion The region number used during registration.
2141 * @param GCPhys The physical address it's currently mapped at.
2142 * @thread EMT.
2143 */
2144 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2145
2146 /**
2147 * Maps a portion of an MMIO2 region into the hypervisor region.
2148 *
2149 * Callers of this API must never deregister the MMIO2 region before the
2150 * VM is powered off.
2151 *
2152 * @return VBox status code.
2153 * @param pDevIns The device owning the MMIO2 memory.
2154 * @param iRegion The region.
2155 * @param off The offset into the region. Will be rounded down
2156 * to closest page boundrary.
2157 * @param cb The number of bytes to map. Will be rounded up
2158 * to the closest page boundrary.
2159 * @param pszDesc Mapping description.
2160 * @param pRCPtr Where to store the RC address.
2161 */
2162 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2163 const char *pszDesc, PRTRCPTR pRCPtr));
2164
2165 /**
2166 * Maps a portion of an MMIO2 region into kernel space (host).
2167 *
2168 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2169 * or the VM is terminated.
2170 *
2171 * @return VBox status code.
2172 * @param pDevIns The device owning the MMIO2 memory.
2173 * @param iRegion The region.
2174 * @param off The offset into the region. Must be page
2175 * aligned.
2176 * @param cb The number of bytes to map. Must be page
2177 * aligned.
2178 * @param pszDesc Mapping description.
2179 * @param pR0Ptr Where to store the R0 address.
2180 */
2181 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2182 const char *pszDesc, PRTR0PTR pR0Ptr));
2183
2184 /**
2185 * Register a ROM (BIOS) region.
2186 *
2187 * It goes without saying that this is read-only memory. The memory region must be
2188 * in unassigned memory. I.e. from the top of the address space or on the PC in
2189 * the 0xa0000-0xfffff range.
2190 *
2191 * @returns VBox status.
2192 * @param pDevIns The device instance owning the ROM region.
2193 * @param GCPhysStart First physical address in the range.
2194 * Must be page aligned!
2195 * @param cbRange The size of the range (in bytes).
2196 * Must be page aligned!
2197 * @param pvBinary Pointer to the binary data backing the ROM image.
2198 * This must be cbRange bytes big.
2199 * It will be copied and doesn't have to stick around if fShadow is clear.
2200 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2201 * @param pszDesc Pointer to description string. This must not be freed.
2202 *
2203 * @remark There is no way to remove the rom, automatically on device cleanup or
2204 * manually from the device yet. At present I doubt we need such features...
2205 */
2206 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2207
2208 /**
2209 * Changes the protection of shadowed ROM mapping.
2210 *
2211 * This is intented for use by the system BIOS, chipset or device in question to
2212 * change the protection of shadowed ROM code after init and on reset.
2213 *
2214 * @param pDevIns The device instance.
2215 * @param GCPhysStart Where the mapping starts.
2216 * @param cbRange The size of the mapping.
2217 * @param enmProt The new protection type.
2218 */
2219 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2220
2221 /**
2222 * Register a save state data unit.
2223 *
2224 * @returns VBox status.
2225 * @param pDevIns The device instance.
2226 * @param pszName Data unit name.
2227 * @param uInstance The instance identifier of the data unit.
2228 * This must together with the name be unique.
2229 * @param uVersion Data layout version number.
2230 * @param cbGuess The approximate amount of data in the unit.
2231 * Only for progress indicators.
2232 * @param pszBefore Name of data unit which we should be put in
2233 * front of. Optional (NULL).
2234 *
2235 * @param pfnLivePrep Prepare live save callback, optional.
2236 * @param pfnLiveExec Execute live save callback, optional.
2237 * @param pfnLiveVote Vote live save callback, optional.
2238 *
2239 * @param pfnSavePrep Prepare save callback, optional.
2240 * @param pfnSaveExec Execute save callback, optional.
2241 * @param pfnSaveDone Done save callback, optional.
2242 *
2243 * @param pfnLoadPrep Prepare load callback, optional.
2244 * @param pfnLoadExec Execute load callback, optional.
2245 * @param pfnLoadDone Done load callback, optional.
2246 */
2247 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2248 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2249 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2250 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2251
2252 /**
2253 * Creates a timer.
2254 *
2255 * @returns VBox status.
2256 * @param pDevIns The device instance.
2257 * @param enmClock The clock to use on this timer.
2258 * @param pfnCallback Callback function.
2259 * @param pvUser User argument for the callback.
2260 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2261 * @param pszDesc Pointer to description string which must stay around
2262 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2263 * @param ppTimer Where to store the timer on success.
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2266
2267 /**
2268 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2269 *
2270 * @returns pTime.
2271 * @param pDevIns The device instance.
2272 * @param pTime Where to store the time.
2273 */
2274 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2275
2276 /**
2277 * Read physical memory.
2278 *
2279 * @returns VINF_SUCCESS (for now).
2280 * @param pDevIns The device instance.
2281 * @param GCPhys Physical address start reading from.
2282 * @param pvBuf Where to put the read bits.
2283 * @param cbRead How many bytes to read.
2284 * @thread Any thread, but the call may involve the emulation thread.
2285 */
2286 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2287
2288 /**
2289 * Write to physical memory.
2290 *
2291 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2292 * @param pDevIns The device instance.
2293 * @param GCPhys Physical address to write to.
2294 * @param pvBuf What to write.
2295 * @param cbWrite How many bytes to write.
2296 * @thread Any thread, but the call may involve the emulation thread.
2297 */
2298 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2299
2300 /**
2301 * Requests the mapping of a guest page into ring-3.
2302 *
2303 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2304 * release it.
2305 *
2306 * This API will assume your intention is to write to the page, and will
2307 * therefore replace shared and zero pages. If you do not intend to modify the
2308 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2309 *
2310 * @returns VBox status code.
2311 * @retval VINF_SUCCESS on success.
2312 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2313 * backing or if the page has any active access handlers. The caller
2314 * must fall back on using PGMR3PhysWriteExternal.
2315 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2316 *
2317 * @param pVM The VM handle.
2318 * @param GCPhys The guest physical address of the page that
2319 * should be mapped.
2320 * @param fFlags Flags reserved for future use, MBZ.
2321 * @param ppv Where to store the address corresponding to
2322 * GCPhys.
2323 * @param pLock Where to store the lock information that
2324 * pfnPhysReleasePageMappingLock needs.
2325 *
2326 * @remark Avoid calling this API from within critical sections (other than the
2327 * PGM one) because of the deadlock risk when we have to delegating the
2328 * task to an EMT.
2329 * @thread Any.
2330 */
2331 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2332
2333 /**
2334 * Requests the mapping of a guest page into ring-3, external threads.
2335 *
2336 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2337 * release it.
2338 *
2339 * @returns VBox status code.
2340 * @retval VINF_SUCCESS on success.
2341 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2342 * backing or if the page as an active ALL access handler. The caller
2343 * must fall back on using PGMPhysRead.
2344 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2345 *
2346 * @param pDevIns The device instance.
2347 * @param GCPhys The guest physical address of the page that
2348 * should be mapped.
2349 * @param fFlags Flags reserved for future use, MBZ.
2350 * @param ppv Where to store the address corresponding to
2351 * GCPhys.
2352 * @param pLock Where to store the lock information that
2353 * pfnPhysReleasePageMappingLock needs.
2354 *
2355 * @remark Avoid calling this API from within critical sections.
2356 * @thread Any.
2357 */
2358 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2359
2360 /**
2361 * Release the mapping of a guest page.
2362 *
2363 * This is the counter part of pfnPhysGCPhys2CCPtr and
2364 * pfnPhysGCPhys2CCPtrReadOnly.
2365 *
2366 * @param pDevIns The device instance.
2367 * @param pLock The lock structure initialized by the mapping
2368 * function.
2369 */
2370 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2371
2372 /**
2373 * Read guest physical memory by virtual address.
2374 *
2375 * @param pDevIns The device instance.
2376 * @param pvDst Where to put the read bits.
2377 * @param GCVirtSrc Guest virtual address to start reading from.
2378 * @param cb How many bytes to read.
2379 * @thread The emulation thread.
2380 */
2381 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2382
2383 /**
2384 * Write to guest physical memory by virtual address.
2385 *
2386 * @param pDevIns The device instance.
2387 * @param GCVirtDst Guest virtual address to write to.
2388 * @param pvSrc What to write.
2389 * @param cb How many bytes to write.
2390 * @thread The emulation thread.
2391 */
2392 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2393
2394 /**
2395 * Convert a guest virtual address to a guest physical address.
2396 *
2397 * @returns VBox status code.
2398 * @param pDevIns The device instance.
2399 * @param GCPtr Guest virtual address.
2400 * @param pGCPhys Where to store the GC physical address
2401 * corresponding to GCPtr.
2402 * @thread The emulation thread.
2403 * @remark Careful with page boundraries.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2406
2407 /**
2408 * Allocate memory which is associated with current VM instance
2409 * and automatically freed on it's destruction.
2410 *
2411 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2412 * @param pDevIns The device instance.
2413 * @param cb Number of bytes to allocate.
2414 */
2415 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2416
2417 /**
2418 * Allocate memory which is associated with current VM instance
2419 * and automatically freed on it's destruction. The memory is ZEROed.
2420 *
2421 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2422 * @param pDevIns The device instance.
2423 * @param cb Number of bytes to allocate.
2424 */
2425 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2426
2427 /**
2428 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2429 *
2430 * @param pDevIns The device instance.
2431 * @param pv Pointer to the memory to free.
2432 */
2433 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2434
2435 /**
2436 * Gets the VM state.
2437 *
2438 * @returns VM state.
2439 * @param pDevIns The device instance.
2440 * @thread Any thread (just keep in mind that it's volatile info).
2441 */
2442 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2443
2444 /**
2445 * Checks if the VM was teleported and hasn't been fully resumed yet.
2446 *
2447 * @returns true / false.
2448 * @param pDevIns The device instance.
2449 * @thread Any thread.
2450 */
2451 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2452
2453 /**
2454 * Set the VM error message
2455 *
2456 * @returns rc.
2457 * @param pDevIns The device instance.
2458 * @param rc VBox status code.
2459 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2460 * @param pszFormat Error message format string.
2461 * @param ... Error message arguments.
2462 */
2463 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2464
2465 /**
2466 * Set the VM error message
2467 *
2468 * @returns rc.
2469 * @param pDevIns The device instance.
2470 * @param rc VBox status code.
2471 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2472 * @param pszFormat Error message format string.
2473 * @param va Error message arguments.
2474 */
2475 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2476
2477 /**
2478 * Set the VM runtime error message
2479 *
2480 * @returns VBox status code.
2481 * @param pDevIns The device instance.
2482 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2483 * @param pszErrorId Error ID string.
2484 * @param pszFormat Error message format string.
2485 * @param ... Error message arguments.
2486 */
2487 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2488
2489 /**
2490 * Set the VM runtime error message
2491 *
2492 * @returns VBox status code.
2493 * @param pDevIns The device instance.
2494 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2495 * @param pszErrorId Error ID string.
2496 * @param pszFormat Error message format string.
2497 * @param va Error message arguments.
2498 */
2499 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2500
2501 /**
2502 * Stops the VM and enters the debugger to look at the guest state.
2503 *
2504 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2505 * invoking this function directly.
2506 *
2507 * @returns VBox status code which must be passed up to the VMM.
2508 * @param pDevIns The device instance.
2509 * @param pszFile Filename of the assertion location.
2510 * @param iLine The linenumber of the assertion location.
2511 * @param pszFunction Function of the assertion location.
2512 * @param pszFormat Message. (optional)
2513 * @param args Message parameters.
2514 */
2515 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2516
2517 /**
2518 * Register a info handler with DBGF,
2519 *
2520 * @returns VBox status code.
2521 * @param pDevIns The device instance.
2522 * @param pszName The identifier of the info.
2523 * @param pszDesc The description of the info and any arguments
2524 * the handler may take.
2525 * @param pfnHandler The handler function to be called to display the
2526 * info.
2527 */
2528 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2529
2530 /**
2531 * Registers a statistics sample if statistics are enabled.
2532 *
2533 * @param pDevIns Device instance of the DMA.
2534 * @param pvSample Pointer to the sample.
2535 * @param enmType Sample type. This indicates what pvSample is
2536 * pointing at.
2537 * @param pszName Sample name. The name is on this form
2538 * "/<component>/<sample>". Further nesting is
2539 * possible.
2540 * @param enmUnit Sample unit.
2541 * @param pszDesc Sample description.
2542 */
2543 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2544
2545 /**
2546 * Same as pfnSTAMRegister except that the name is specified in a
2547 * RTStrPrintf like fashion.
2548 *
2549 * @returns VBox status.
2550 * @param pDevIns Device instance of the DMA.
2551 * @param pvSample Pointer to the sample.
2552 * @param enmType Sample type. This indicates what pvSample is
2553 * pointing at.
2554 * @param enmVisibility Visibility type specifying whether unused
2555 * statistics should be visible or not.
2556 * @param enmUnit Sample unit.
2557 * @param pszDesc Sample description.
2558 * @param pszName The sample name format string.
2559 * @param ... Arguments to the format string.
2560 */
2561 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2562 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2563
2564 /**
2565 * Same as pfnSTAMRegister except that the name is specified in a
2566 * RTStrPrintfV like fashion.
2567 *
2568 * @returns VBox status.
2569 * @param pDevIns Device instance of the DMA.
2570 * @param pvSample Pointer to the sample.
2571 * @param enmType Sample type. This indicates what pvSample is
2572 * pointing at.
2573 * @param enmVisibility Visibility type specifying whether unused
2574 * statistics should be visible or not.
2575 * @param enmUnit Sample unit.
2576 * @param pszDesc Sample description.
2577 * @param pszName The sample name format string.
2578 * @param args Arguments to the format string.
2579 */
2580 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2581 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2582
2583 /**
2584 * Registers the device with the default PCI bus.
2585 *
2586 * @returns VBox status code.
2587 * @param pDevIns The device instance.
2588 * @param pPciDev The PCI device structure.
2589 * Any PCI enabled device must keep this in it's instance data!
2590 * Fill in the PCI data config before registration, please.
2591 * @remark This is the simple interface, a Ex interface will be created if
2592 * more features are needed later.
2593 */
2594 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2595
2596 /**
2597 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2598 *
2599 * @returns VBox status code.
2600 * @param pDevIns The device instance.
2601 * @param iRegion The region number.
2602 * @param cbRegion Size of the region.
2603 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2604 * @param pfnCallback Callback for doing the mapping.
2605 */
2606 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2607
2608 /**
2609 * Register PCI configuration space read/write callbacks.
2610 *
2611 * @param pDevIns The device instance.
2612 * @param pPciDev The PCI device structure.
2613 * If NULL the default PCI device for this device instance is used.
2614 * @param pfnRead Pointer to the user defined PCI config read function.
2615 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2616 * PCI config read function. This way, user can decide when (and if)
2617 * to call default PCI config read function. Can be NULL.
2618 * @param pfnWrite Pointer to the user defined PCI config write function.
2619 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2620 * PCI config write function. This way, user can decide when (and if)
2621 * to call default PCI config write function. Can be NULL.
2622 * @thread EMT
2623 */
2624 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2625 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2626
2627 /**
2628 * Set the IRQ for a PCI device.
2629 *
2630 * @param pDevIns The device instance.
2631 * @param iIrq IRQ number to set.
2632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2633 * @thread Any thread, but will involve the emulation thread.
2634 */
2635 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2636
2637 /**
2638 * Set the IRQ for a PCI device, but don't wait for EMT to process
2639 * the request when not called from EMT.
2640 *
2641 * @param pDevIns The device instance.
2642 * @param iIrq IRQ number to set.
2643 * @param iLevel IRQ level.
2644 * @thread Any thread, but will involve the emulation thread.
2645 */
2646 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2647
2648 /**
2649 * Set ISA IRQ for a device.
2650 *
2651 * @param pDevIns The device instance.
2652 * @param iIrq IRQ number to set.
2653 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2654 * @thread Any thread, but will involve the emulation thread.
2655 */
2656 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2657
2658 /**
2659 * Set the ISA IRQ for a device, but don't wait for EMT to process
2660 * the request when not called from EMT.
2661 *
2662 * @param pDevIns The device instance.
2663 * @param iIrq IRQ number to set.
2664 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2665 * @thread Any thread, but will involve the emulation thread.
2666 */
2667 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2668
2669 /**
2670 * Attaches a driver (chain) to the device.
2671 *
2672 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2673 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2674 *
2675 * @returns VBox status code.
2676 * @param pDevIns The device instance.
2677 * @param iLun The logical unit to attach.
2678 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2679 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2680 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2681 * for the live of the device instance.
2682 */
2683 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2684
2685 /**
2686 * Create a queue.
2687 *
2688 * @returns VBox status code.
2689 * @param pDevIns The device instance.
2690 * @param cbItem The size of a queue item.
2691 * @param cItems The number of items in the queue.
2692 * @param cMilliesInterval The number of milliseconds between polling the queue.
2693 * If 0 then the emulation thread will be notified whenever an item arrives.
2694 * @param pfnCallback The consumer function.
2695 * @param fRZEnabled Set if the queue should work in RC and R0.
2696 * @param pszName The queue base name. The instance number will be
2697 * appended automatically.
2698 * @param ppQueue Where to store the queue handle on success.
2699 * @thread The emulation thread.
2700 */
2701 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2702 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2703
2704 /**
2705 * Initializes a PDM critical section.
2706 *
2707 * The PDM critical sections are derived from the IPRT critical sections, but
2708 * works in RC and R0 as well.
2709 *
2710 * @returns VBox status code.
2711 * @param pDevIns The device instance.
2712 * @param pCritSect Pointer to the critical section.
2713 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2714 * @param pszNameFmt Format string for namging the critical section.
2715 * For statistics and lock validation.
2716 * @param va Arguments for the format string.
2717 */
2718 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2719 const char *pszNameFmt, va_list va));
2720
2721 /**
2722 * Creates a PDM thread.
2723 *
2724 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2725 * resuming, and destroying the thread as the VM state changes.
2726 *
2727 * @returns VBox status code.
2728 * @param pDevIns The device instance.
2729 * @param ppThread Where to store the thread 'handle'.
2730 * @param pvUser The user argument to the thread function.
2731 * @param pfnThread The thread function.
2732 * @param pfnWakeup The wakup callback. This is called on the EMT
2733 * thread when a state change is pending.
2734 * @param cbStack See RTThreadCreate.
2735 * @param enmType See RTThreadCreate.
2736 * @param pszName See RTThreadCreate.
2737 */
2738 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2739 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2740
2741 /**
2742 * Set up asynchronous handling of a suspend, reset or power off notification.
2743 *
2744 * This shall only be called when getting the notification. It must be called
2745 * for each one.
2746 *
2747 * @returns VBox status code.
2748 * @param pDevIns The device instance.
2749 * @param pfnAsyncNotify The callback.
2750 * @thread EMT(0)
2751 */
2752 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2753
2754 /**
2755 * Notify EMT(0) that the device has completed the asynchronous notification
2756 * handling.
2757 *
2758 * This can be called at any time, spurious calls will simply be ignored.
2759 *
2760 * @param pDevIns The device instance.
2761 * @thread Any
2762 */
2763 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2764
2765 /**
2766 * Register the RTC device.
2767 *
2768 * @returns VBox status code.
2769 * @param pDevIns The device instance.
2770 * @param pRtcReg Pointer to a RTC registration structure.
2771 * @param ppRtcHlp Where to store the pointer to the helper
2772 * functions.
2773 */
2774 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2775
2776 /**
2777 * Register the PCI Bus.
2778 *
2779 * @returns VBox status code.
2780 * @param pDevIns The device instance.
2781 * @param pPciBusReg Pointer to PCI bus registration structure.
2782 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2783 * helpers.
2784 */
2785 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2786
2787 /**
2788 * Register the PIC device.
2789 *
2790 * @returns VBox status code.
2791 * @param pDevIns The device instance.
2792 * @param pPicReg Pointer to a PIC registration structure.
2793 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2794 * helpers.
2795 */
2796 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2797
2798 /**
2799 * Register the APIC device.
2800 *
2801 * @returns VBox status code.
2802 * @param pDevIns The device instance.
2803 * @param pApicReg Pointer to a APIC registration structure.
2804 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2805 */
2806 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2807
2808 /**
2809 * Register the I/O APIC device.
2810 *
2811 * @returns VBox status code.
2812 * @param pDevIns The device instance.
2813 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2814 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2815 * helpers.
2816 */
2817 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2818
2819 /**
2820 * Register the HPET device.
2821 *
2822 * @returns VBox status code.
2823 * @param pDevIns The device instance.
2824 * @param pHpetReg Pointer to a HPET registration structure.
2825 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2826 * helpers.
2827 */
2828 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2829
2830 /**
2831 * Register the DMA device.
2832 *
2833 * @returns VBox status code.
2834 * @param pDevIns The device instance.
2835 * @param pDmacReg Pointer to a DMAC registration structure.
2836 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2837 */
2838 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2839
2840 /**
2841 * Register transfer function for DMA channel.
2842 *
2843 * @returns VBox status code.
2844 * @param pDevIns The device instance.
2845 * @param uChannel Channel number.
2846 * @param pfnTransferHandler Device specific transfer callback function.
2847 * @param pvUser User pointer to pass to the callback.
2848 * @thread EMT
2849 */
2850 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2851
2852 /**
2853 * Read memory.
2854 *
2855 * @returns VBox status code.
2856 * @param pDevIns The device instance.
2857 * @param uChannel Channel number.
2858 * @param pvBuffer Pointer to target buffer.
2859 * @param off DMA position.
2860 * @param cbBlock Block size.
2861 * @param pcbRead Where to store the number of bytes which was
2862 * read. optional.
2863 * @thread EMT
2864 */
2865 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2866
2867 /**
2868 * Write memory.
2869 *
2870 * @returns VBox status code.
2871 * @param pDevIns The device instance.
2872 * @param uChannel Channel number.
2873 * @param pvBuffer Memory to write.
2874 * @param off DMA position.
2875 * @param cbBlock Block size.
2876 * @param pcbWritten Where to store the number of bytes which was
2877 * written. optional.
2878 * @thread EMT
2879 */
2880 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2881
2882 /**
2883 * Set the DREQ line.
2884 *
2885 * @returns VBox status code.
2886 * @param pDevIns Device instance.
2887 * @param uChannel Channel number.
2888 * @param uLevel Level of the line.
2889 * @thread EMT
2890 */
2891 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2892
2893 /**
2894 * Get channel mode.
2895 *
2896 * @returns Channel mode. See specs.
2897 * @param pDevIns The device instance.
2898 * @param uChannel Channel number.
2899 * @thread EMT
2900 */
2901 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2902
2903 /**
2904 * Schedule DMA execution.
2905 *
2906 * @param pDevIns The device instance.
2907 * @thread Any thread.
2908 */
2909 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2910
2911 /**
2912 * Write CMOS value and update the checksum(s).
2913 *
2914 * @returns VBox status code.
2915 * @param pDevIns The device instance.
2916 * @param iReg The CMOS register index.
2917 * @param u8Value The CMOS register value.
2918 * @thread EMT
2919 */
2920 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2921
2922 /**
2923 * Read CMOS value.
2924 *
2925 * @returns VBox status code.
2926 * @param pDevIns The device instance.
2927 * @param iReg The CMOS register index.
2928 * @param pu8Value Where to store the CMOS register value.
2929 * @thread EMT
2930 */
2931 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2932
2933 /**
2934 * Assert that the current thread is the emulation thread.
2935 *
2936 * @returns True if correct.
2937 * @returns False if wrong.
2938 * @param pDevIns The device instance.
2939 * @param pszFile Filename of the assertion location.
2940 * @param iLine The linenumber of the assertion location.
2941 * @param pszFunction Function of the assertion location.
2942 */
2943 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2944
2945 /**
2946 * Assert that the current thread is NOT the emulation thread.
2947 *
2948 * @returns True if correct.
2949 * @returns False if wrong.
2950 * @param pDevIns The device instance.
2951 * @param pszFile Filename of the assertion location.
2952 * @param iLine The linenumber of the assertion location.
2953 * @param pszFunction Function of the assertion location.
2954 */
2955 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2956
2957 /**
2958 * Resolves the symbol for a raw-mode context interface.
2959 *
2960 * @returns VBox status code.
2961 * @param pDevIns The device instance.
2962 * @param pvInterface The interface structure.
2963 * @param cbInterface The size of the interface structure.
2964 * @param pszSymPrefix What to prefix the symbols in the list with
2965 * before resolving them. This must start with
2966 * 'dev' and contain the driver name.
2967 * @param pszSymList List of symbols corresponding to the interface.
2968 * There is generally a there is generally a define
2969 * holding this list associated with the interface
2970 * definition (INTERFACE_SYM_LIST). For more
2971 * details see PDMR3LdrGetInterfaceSymbols.
2972 * @thread EMT
2973 */
2974 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2975 const char *pszSymPrefix, const char *pszSymList));
2976
2977 /**
2978 * Resolves the symbol for a ring-0 context interface.
2979 *
2980 * @returns VBox status code.
2981 * @param pDevIns The device instance.
2982 * @param pvInterface The interface structure.
2983 * @param cbInterface The size of the interface structure.
2984 * @param pszSymPrefix What to prefix the symbols in the list with
2985 * before resolving them. This must start with
2986 * 'dev' and contain the driver name.
2987 * @param pszSymList List of symbols corresponding to the interface.
2988 * There is generally a there is generally a define
2989 * holding this list associated with the interface
2990 * definition (INTERFACE_SYM_LIST). For more
2991 * details see PDMR3LdrGetInterfaceSymbols.
2992 * @thread EMT
2993 */
2994 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2995 const char *pszSymPrefix, const char *pszSymList));
2996
2997 /**
2998 * Call the ring-0 request handler routine of the device.
2999 *
3000 * For this to work, the device must be ring-0 enabled and export a request
3001 * handler function. The name of the function must be the device name in
3002 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3003 * 'ReqHandler'. The device name will be captialized. It shall take the
3004 * exact same arguments as this function and be declared using
3005 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3006 *
3007 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3008 * or two as the handler address will be resolved on each invocation. This
3009 * is the reason for the EMT only restriction as well.
3010 *
3011 * @returns VBox status code.
3012 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3013 * handler function.
3014 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3015 *
3016 * @param pDevIns The device instance.
3017 * @param uOperation The operation to perform.
3018 * @param u64Arg 64-bit integer argument.
3019 * @thread EMT
3020 */
3021 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3022
3023 /** Space reserved for future members.
3024 * @{ */
3025 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3026 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3027 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3028 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3029 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3030 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3031 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3032 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3033 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3034 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3035 /** @} */
3036
3037
3038 /** API available to trusted devices only.
3039 *
3040 * These APIs are providing unrestricted access to the guest and the VM,
3041 * or they are interacting intimately with PDM.
3042 *
3043 * @{
3044 */
3045 /**
3046 * Gets the VM handle. Restricted API.
3047 *
3048 * @returns VM Handle.
3049 * @param pDevIns The device instance.
3050 */
3051 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3052
3053 /**
3054 * Gets the VMCPU handle. Restricted API.
3055 *
3056 * @returns VMCPU Handle.
3057 * @param pDevIns The device instance.
3058 */
3059 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3060
3061 /**
3062 * Registers the VMM device heap
3063 *
3064 * @returns VBox status code.
3065 * @param pDevIns The device instance.
3066 * @param GCPhys The physical address.
3067 * @param pvHeap Ring 3 heap pointer.
3068 * @param cbSize Size of the heap.
3069 * @thread EMT.
3070 */
3071 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3072
3073 /**
3074 * Unregisters the VMM device heap
3075 *
3076 * @returns VBox status code.
3077 * @param pDevIns The device instance.
3078 * @param GCPhys The physical address.
3079 * @thread EMT.
3080 */
3081 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3082
3083 /**
3084 * Resets the VM.
3085 *
3086 * @returns The appropriate VBox status code to pass around on reset.
3087 * @param pDevIns The device instance.
3088 * @thread The emulation thread.
3089 */
3090 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3091
3092 /**
3093 * Suspends the VM.
3094 *
3095 * @returns The appropriate VBox status code to pass around on suspend.
3096 * @param pDevIns The device instance.
3097 * @thread The emulation thread.
3098 */
3099 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3100
3101 /**
3102 * Power off the VM.
3103 *
3104 * @returns The appropriate VBox status code to pass around on power off.
3105 * @param pDevIns The device instance.
3106 * @thread The emulation thread.
3107 */
3108 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3109
3110 /**
3111 * Checks if the Gate A20 is enabled or not.
3112 *
3113 * @returns true if A20 is enabled.
3114 * @returns false if A20 is disabled.
3115 * @param pDevIns The device instance.
3116 * @thread The emulation thread.
3117 */
3118 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3119
3120 /**
3121 * Enables or disables the Gate A20.
3122 *
3123 * @param pDevIns The device instance.
3124 * @param fEnable Set this flag to enable the Gate A20; clear it
3125 * to disable.
3126 * @thread The emulation thread.
3127 */
3128 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3129
3130 /**
3131 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3132 * thread.
3133 *
3134 * @param pDevIns The device instance.
3135 * @param iLeaf The CPUID leaf to get.
3136 * @param pEax Where to store the EAX value.
3137 * @param pEbx Where to store the EBX value.
3138 * @param pEcx Where to store the ECX value.
3139 * @param pEdx Where to store the EDX value.
3140 * @thread EMT.
3141 */
3142 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3143
3144 /** @} */
3145
3146 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3147 uint32_t u32TheEnd;
3148} PDMDEVHLPR3;
3149#endif /* !IN_RING3 */
3150/** Pointer to the R3 PDM Device API. */
3151typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3152/** Pointer to the R3 PDM Device API, const variant. */
3153typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3154
3155/** Current PDMDEVHLPR3 version number. */
3156#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 2, 0)
3157
3158
3159/**
3160 * PDM Device API - RC Variant.
3161 */
3162typedef struct PDMDEVHLPRC
3163{
3164 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3165 uint32_t u32Version;
3166
3167 /**
3168 * Set the IRQ for a PCI device.
3169 *
3170 * @param pDevIns Device instance.
3171 * @param iIrq IRQ number to set.
3172 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3173 * @thread Any thread, but will involve the emulation thread.
3174 */
3175 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3176
3177 /**
3178 * Set ISA IRQ for a device.
3179 *
3180 * @param pDevIns Device instance.
3181 * @param iIrq IRQ number to set.
3182 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3183 * @thread Any thread, but will involve the emulation thread.
3184 */
3185 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3186
3187 /**
3188 * Read physical memory.
3189 *
3190 * @returns VINF_SUCCESS (for now).
3191 * @param pDevIns Device instance.
3192 * @param GCPhys Physical address start reading from.
3193 * @param pvBuf Where to put the read bits.
3194 * @param cbRead How many bytes to read.
3195 */
3196 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3197
3198 /**
3199 * Write to physical memory.
3200 *
3201 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3202 * @param pDevIns Device instance.
3203 * @param GCPhys Physical address to write to.
3204 * @param pvBuf What to write.
3205 * @param cbWrite How many bytes to write.
3206 */
3207 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3208
3209 /**
3210 * Checks if the Gate A20 is enabled or not.
3211 *
3212 * @returns true if A20 is enabled.
3213 * @returns false if A20 is disabled.
3214 * @param pDevIns Device instance.
3215 * @thread The emulation thread.
3216 */
3217 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3218
3219 /**
3220 * Gets the VM state.
3221 *
3222 * @returns VM state.
3223 * @param pDevIns The device instance.
3224 * @thread Any thread (just keep in mind that it's volatile info).
3225 */
3226 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3227
3228 /**
3229 * Set the VM error message
3230 *
3231 * @returns rc.
3232 * @param pDrvIns Driver instance.
3233 * @param rc VBox status code.
3234 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3235 * @param pszFormat Error message format string.
3236 * @param ... Error message arguments.
3237 */
3238 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3239
3240 /**
3241 * Set the VM error message
3242 *
3243 * @returns rc.
3244 * @param pDrvIns Driver instance.
3245 * @param rc VBox status code.
3246 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3247 * @param pszFormat Error message format string.
3248 * @param va Error message arguments.
3249 */
3250 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3251
3252 /**
3253 * Set the VM runtime error message
3254 *
3255 * @returns VBox status code.
3256 * @param pDevIns Device instance.
3257 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3258 * @param pszErrorId Error ID string.
3259 * @param pszFormat Error message format string.
3260 * @param ... Error message arguments.
3261 */
3262 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3263
3264 /**
3265 * Set the VM runtime error message
3266 *
3267 * @returns VBox status code.
3268 * @param pDevIns Device instance.
3269 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3270 * @param pszErrorId Error ID string.
3271 * @param pszFormat Error message format string.
3272 * @param va Error message arguments.
3273 */
3274 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3275
3276 /**
3277 * Set parameters for pending MMIO patch operation
3278 *
3279 * @returns VBox status code.
3280 * @param pDevIns Device instance.
3281 * @param GCPhys MMIO physical address
3282 * @param pCachedData GC pointer to cached data
3283 */
3284 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3285
3286 /**
3287 * Gets the VM handle. Restricted API.
3288 *
3289 * @returns VM Handle.
3290 * @param pDevIns Device instance.
3291 */
3292 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3293
3294 /**
3295 * Gets the VMCPU handle. Restricted API.
3296 *
3297 * @returns VMCPU Handle.
3298 * @param pDevIns The device instance.
3299 */
3300 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3301
3302 /** Just a safety precaution. */
3303 uint32_t u32TheEnd;
3304} PDMDEVHLPRC;
3305/** Pointer PDM Device RC API. */
3306typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3307/** Pointer PDM Device RC API. */
3308typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3309
3310/** Current PDMDEVHLP version number. */
3311#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3312
3313
3314/**
3315 * PDM Device API - R0 Variant.
3316 */
3317typedef struct PDMDEVHLPR0
3318{
3319 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3320 uint32_t u32Version;
3321
3322 /**
3323 * Set the IRQ for a PCI device.
3324 *
3325 * @param pDevIns Device instance.
3326 * @param iIrq IRQ number to set.
3327 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3328 * @thread Any thread, but will involve the emulation thread.
3329 */
3330 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3331
3332 /**
3333 * Set ISA IRQ for a device.
3334 *
3335 * @param pDevIns Device instance.
3336 * @param iIrq IRQ number to set.
3337 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3338 * @thread Any thread, but will involve the emulation thread.
3339 */
3340 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3341
3342 /**
3343 * Read physical memory.
3344 *
3345 * @returns VINF_SUCCESS (for now).
3346 * @param pDevIns Device instance.
3347 * @param GCPhys Physical address start reading from.
3348 * @param pvBuf Where to put the read bits.
3349 * @param cbRead How many bytes to read.
3350 */
3351 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3352
3353 /**
3354 * Write to physical memory.
3355 *
3356 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3357 * @param pDevIns Device instance.
3358 * @param GCPhys Physical address to write to.
3359 * @param pvBuf What to write.
3360 * @param cbWrite How many bytes to write.
3361 */
3362 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3363
3364 /**
3365 * Checks if the Gate A20 is enabled or not.
3366 *
3367 * @returns true if A20 is enabled.
3368 * @returns false if A20 is disabled.
3369 * @param pDevIns Device instance.
3370 * @thread The emulation thread.
3371 */
3372 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3373
3374 /**
3375 * Gets the VM state.
3376 *
3377 * @returns VM state.
3378 * @param pDevIns The device instance.
3379 * @thread Any thread (just keep in mind that it's volatile info).
3380 */
3381 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3382
3383 /**
3384 * Set the VM error message
3385 *
3386 * @returns rc.
3387 * @param pDrvIns Driver instance.
3388 * @param rc VBox status code.
3389 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3390 * @param pszFormat Error message format string.
3391 * @param ... Error message arguments.
3392 */
3393 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3394
3395 /**
3396 * Set the VM error message
3397 *
3398 * @returns rc.
3399 * @param pDrvIns Driver instance.
3400 * @param rc VBox status code.
3401 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3402 * @param pszFormat Error message format string.
3403 * @param va Error message arguments.
3404 */
3405 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3406
3407 /**
3408 * Set the VM runtime error message
3409 *
3410 * @returns VBox status code.
3411 * @param pDevIns Device instance.
3412 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3413 * @param pszErrorId Error ID string.
3414 * @param pszFormat Error message format string.
3415 * @param ... Error message arguments.
3416 */
3417 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3418
3419 /**
3420 * Set the VM runtime error message
3421 *
3422 * @returns VBox status code.
3423 * @param pDevIns Device instance.
3424 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3425 * @param pszErrorId Error ID string.
3426 * @param pszFormat Error message format string.
3427 * @param va Error message arguments.
3428 */
3429 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3430
3431 /**
3432 * Set parameters for pending MMIO patch operation
3433 *
3434 * @returns rc.
3435 * @param pDevIns Device instance.
3436 * @param GCPhys MMIO physical address
3437 * @param pCachedData GC pointer to cached data
3438 */
3439 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3440
3441 /**
3442 * Gets the VM handle. Restricted API.
3443 *
3444 * @returns VM Handle.
3445 * @param pDevIns Device instance.
3446 */
3447 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3448
3449 /**
3450 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3451 *
3452 * @returns true = yes, false = no
3453 * @param pDevIns Device instance.
3454 */
3455 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3456
3457 /**
3458 * Gets the VMCPU handle. Restricted API.
3459 *
3460 * @returns VMCPU Handle.
3461 * @param pDevIns The device instance.
3462 */
3463 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3464
3465 /** Just a safety precaution. */
3466 uint32_t u32TheEnd;
3467} PDMDEVHLPR0;
3468/** Pointer PDM Device R0 API. */
3469typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3470/** Pointer PDM Device GC API. */
3471typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3472
3473/** Current PDMDEVHLP version number. */
3474#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3475
3476
3477
3478/**
3479 * PDM Device Instance.
3480 */
3481typedef struct PDMDEVINS
3482{
3483 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3484 uint32_t u32Version;
3485 /** Device instance number. */
3486 uint32_t iInstance;
3487
3488 /** Pointer the GC PDM Device API. */
3489 PCPDMDEVHLPRC pHlpRC;
3490 /** Pointer to device instance data. */
3491 RTRCPTR pvInstanceDataRC;
3492 /** The critical section for the device, see pCritSectR3.
3493 * This is automatically resolved by PDM when pCritSectR3 is set by the
3494 * constructor. */
3495 RCPTRTYPE(PPDMCRITSECT) pCritSectRC;
3496 /** Alignment padding. */
3497 RTRCPTR pAlignmentRC;
3498
3499 /** Pointer the R0 PDM Device API. */
3500 PCPDMDEVHLPR0 pHlpR0;
3501 /** Pointer to device instance data (R0). */
3502 RTR0PTR pvInstanceDataR0;
3503 /** The critical section for the device, see pCritSectR3.
3504 * This is automatically resolved by PDM when pCritSectR3 is set by the
3505 * constructor. */
3506 R0PTRTYPE(PPDMCRITSECT) pCritSectR0;
3507
3508 /** Pointer the HC PDM Device API. */
3509 PCPDMDEVHLPR3 pHlpR3;
3510 /** Pointer to device instance data. */
3511 RTR3PTR pvInstanceDataR3;
3512 /** The critical section for the device. (Optional)
3513 *
3514 * The device constructor initializes this if it has a critical section for
3515 * the device and desires it to be taken automatically by MMIO, I/O port
3516 * and timer callbacks to the device. The advantages using this locking
3517 * approach is both less code and avoiding the global IOM lock.
3518 *
3519 * @remarks Will not yet be taken by SSM.
3520 */
3521 R3PTRTYPE(PPDMCRITSECT) pCritSectR3;
3522
3523 /** Pointer to device registration structure. */
3524 R3PTRTYPE(PCPDMDEVREG) pReg;
3525 /** Configuration handle. */
3526 R3PTRTYPE(PCFGMNODE) pCfg;
3527
3528 /** The base interface of the device.
3529 *
3530 * The device constructor initializes this if it has any
3531 * device level interfaces to export. To obtain this interface
3532 * call PDMR3QueryDevice(). */
3533 PDMIBASE IBase;
3534 /** Align the internal data more naturally. */
3535 RTR3PTR R3PtrPadding;
3536
3537 /** Internal data. */
3538 union
3539 {
3540#ifdef PDMDEVINSINT_DECLARED
3541 PDMDEVINSINT s;
3542#endif
3543 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3544 } Internal;
3545
3546 /** Device instance data. The size of this area is defined
3547 * in the PDMDEVREG::cbInstanceData field. */
3548 char achInstanceData[8];
3549} PDMDEVINS;
3550
3551/** Current PDMDEVINS version number. */
3552#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3553
3554/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3555#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3556
3557/**
3558 * Checks the structure versions of the device instance and device helpers,
3559 * returning if they are incompatible.
3560 *
3561 * This is for use in the constructor.
3562 *
3563 * @param pDevIns The device instance pointer.
3564 */
3565#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3566 do \
3567 { \
3568 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3569 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3570 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3571 VERR_VERSION_MISMATCH); \
3572 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3573 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3574 VERR_VERSION_MISMATCH); \
3575 } while (0)
3576
3577/**
3578 * Quietly checks the structure versions of the device instance and device
3579 * helpers, returning if they are incompatible.
3580 *
3581 * This is for use in the destructor.
3582 *
3583 * @param pDevIns The device instance pointer.
3584 */
3585#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3586 do \
3587 { \
3588 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3589 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3590 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3591 return VERR_VERSION_MISMATCH; \
3592 } while (0)
3593
3594/**
3595 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
3596 * constructor - returns on failure.
3597 *
3598 * This should be invoked after having initialized the instance data
3599 * sufficiently for the correct operation of the destructor. The destructor is
3600 * always called!
3601 *
3602 * @param pDevIns Pointer to the PDM device instance.
3603 * @param pszValidValues Patterns describing the valid value names. See
3604 * RTStrSimplePatternMultiMatch for details on the
3605 * pattern syntax.
3606 * @param pszValidNodes Patterns describing the valid node (key) names.
3607 * Pass empty string if no valid nodess.
3608 */
3609#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
3610 do \
3611 { \
3612 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
3613 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
3614 if (RT_FAILURE(rcValCfg)) \
3615 return rcValCfg; \
3616 } while (0)
3617
3618/** @def PDMDEV_ASSERT_EMT
3619 * Assert that the current thread is the emulation thread.
3620 */
3621#ifdef VBOX_STRICT
3622# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3623#else
3624# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3625#endif
3626
3627/** @def PDMDEV_ASSERT_OTHER
3628 * Assert that the current thread is NOT the emulation thread.
3629 */
3630#ifdef VBOX_STRICT
3631# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3632#else
3633# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3634#endif
3635
3636/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3637 * Assert that the current thread is owner of the VM lock.
3638 */
3639#ifdef VBOX_STRICT
3640# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3641#else
3642# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3643#endif
3644
3645/** @def PDMDEV_SET_ERROR
3646 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3647 */
3648#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3649 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3650
3651/** @def PDMDEV_SET_RUNTIME_ERROR
3652 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3653 */
3654#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3655 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3656
3657/** @def PDMDEVINS_2_RCPTR
3658 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3659 */
3660#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3661
3662/** @def PDMDEVINS_2_R3PTR
3663 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3664 */
3665#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3666
3667/** @def PDMDEVINS_2_R0PTR
3668 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3669 */
3670#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3671
3672
3673#ifdef IN_RING3
3674
3675/**
3676 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3677 */
3678DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3679 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3680 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3681{
3682 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3683}
3684
3685/**
3686 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3687 */
3688DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3689 const char *pszOut, const char *pszIn, const char *pszOutStr,
3690 const char *pszInStr, const char *pszDesc)
3691{
3692 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3693}
3694
3695/**
3696 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3697 */
3698DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3699 const char *pszOut, const char *pszIn, const char *pszOutStr,
3700 const char *pszInStr, const char *pszDesc)
3701{
3702 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3703}
3704
3705/**
3706 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3707 */
3708DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3709{
3710 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3711}
3712
3713/**
3714 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3715 */
3716DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3717 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3718 const char *pszDesc)
3719{
3720 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3721}
3722
3723/**
3724 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3725 */
3726DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3727 const char *pszWrite, const char *pszRead, const char *pszFill)
3728{
3729 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3730}
3731
3732/**
3733 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3734 */
3735DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3736 const char *pszWrite, const char *pszRead, const char *pszFill)
3737{
3738 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3739}
3740
3741/**
3742 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3743 */
3744DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3745{
3746 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3747}
3748
3749/**
3750 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3751 */
3752DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3753{
3754 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3755}
3756
3757/**
3758 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3759 */
3760DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3761{
3762 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3763}
3764
3765/**
3766 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3767 */
3768DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3769{
3770 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3771}
3772
3773/**
3774 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3775 */
3776DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3777{
3778 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3779}
3780
3781/**
3782 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3783 */
3784DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3785 const char *pszDesc, PRTRCPTR pRCPtr)
3786{
3787 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3788}
3789
3790/**
3791 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3792 */
3793DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3794 const char *pszDesc, PRTR0PTR pR0Ptr)
3795{
3796 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3797}
3798
3799/**
3800 * @copydoc PDMDEVHLPR3::pfnROMRegister
3801 */
3802DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3803{
3804 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3805}
3806
3807/**
3808 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3809 */
3810DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3811{
3812 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3813}
3814
3815/**
3816 * Register a save state data unit.
3817 *
3818 * @returns VBox status.
3819 * @param pDevIns The device instance.
3820 * @param uVersion Data layout version number.
3821 * @param cbGuess The approximate amount of data in the unit.
3822 * Only for progress indicators.
3823 * @param pfnSaveExec Execute save callback, optional.
3824 * @param pfnLoadExec Execute load callback, optional.
3825 */
3826DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3827 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3828{
3829 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3830 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3831 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3832 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3833}
3834
3835/**
3836 * Register a save state data unit with a live save callback as well.
3837 *
3838 * @returns VBox status.
3839 * @param pDevIns The device instance.
3840 * @param uVersion Data layout version number.
3841 * @param cbGuess The approximate amount of data in the unit.
3842 * Only for progress indicators.
3843 * @param pfnLiveExec Execute live callback, optional.
3844 * @param pfnSaveExec Execute save callback, optional.
3845 * @param pfnLoadExec Execute load callback, optional.
3846 */
3847DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3848 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3849{
3850 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3851 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3852 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3853 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3854}
3855
3856/**
3857 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3858 */
3859DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3860 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3861 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3862 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3863{
3864 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3865 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3866 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3867 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3868}
3869
3870/**
3871 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3872 */
3873DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3874 const char *pszDesc, PPTMTIMERR3 ppTimer)
3875{
3876 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3877}
3878
3879/**
3880 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3881 */
3882DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3883{
3884 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3885}
3886
3887#endif /* IN_RING3 */
3888
3889/**
3890 * @copydoc PDMDEVHLPR3::pfnPhysRead
3891 */
3892DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3893{
3894 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3895}
3896
3897/**
3898 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3899 */
3900DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3901{
3902 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3903}
3904
3905#ifdef IN_RING3
3906
3907/**
3908 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3909 */
3910DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3911{
3912 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3913}
3914
3915/**
3916 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3917 */
3918DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3919{
3920 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3921}
3922
3923/**
3924 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3925 */
3926DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3927{
3928 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3929}
3930
3931/**
3932 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3933 */
3934DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3935{
3936 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3937}
3938
3939/**
3940 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3941 */
3942DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3943{
3944 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3945}
3946
3947/**
3948 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3949 */
3950DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3951{
3952 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3953}
3954
3955/**
3956 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3957 */
3958DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3959{
3960 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3961}
3962
3963/**
3964 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3965 */
3966DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3967{
3968 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3969}
3970
3971/**
3972 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3973 */
3974DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3975{
3976 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
3977}
3978#endif /* IN_RING3 */
3979
3980/**
3981 * @copydoc PDMDEVHLPR3::pfnVMState
3982 */
3983DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3984{
3985 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
3986}
3987
3988#ifdef IN_RING3
3989/**
3990 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
3991 */
3992DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
3993{
3994 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
3995}
3996#endif /* IN_RING3 */
3997
3998/**
3999 * @copydoc PDMDEVHLPR3::pfnVMSetError
4000 */
4001DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4002{
4003 va_list va;
4004 va_start(va, pszFormat);
4005 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4006 va_end(va);
4007 return rc;
4008}
4009
4010/**
4011 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4012 */
4013DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4014{
4015 va_list va;
4016 int rc;
4017 va_start(va, pszFormat);
4018 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4019 va_end(va);
4020 return rc;
4021}
4022
4023/**
4024 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4025 *
4026 * @returns VBox status code which must be passed up to the VMM. This will be
4027 * VINF_SUCCESS in non-strict builds.
4028 * @param pDevIns The device instance.
4029 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4030 * @param pszFormat Message. (optional)
4031 * @param ... Message parameters.
4032 */
4033DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4034{
4035#ifdef VBOX_STRICT
4036# ifdef IN_RING3
4037 int rc;
4038 va_list args;
4039 va_start(args, pszFormat);
4040 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4041 va_end(args);
4042 return rc;
4043# else
4044 return VINF_EM_DBG_STOP;
4045# endif
4046#else
4047 NOREF(pDevIns);
4048 NOREF(pszFile);
4049 NOREF(iLine);
4050 NOREF(pszFunction);
4051 NOREF(pszFormat);
4052 return VINF_SUCCESS;
4053#endif
4054}
4055
4056#ifdef IN_RING3
4057
4058/**
4059 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4060 */
4061DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4062{
4063 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4064}
4065
4066/**
4067 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4068 */
4069DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4070{
4071 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4072}
4073
4074/**
4075 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4076 */
4077DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4078 const char *pszDesc, const char *pszName, ...)
4079{
4080 va_list va;
4081 va_start(va, pszName);
4082 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4083 va_end(va);
4084}
4085
4086/**
4087 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4088 */
4089DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4090{
4091 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4092}
4093
4094/**
4095 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4096 */
4097DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4098{
4099 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4100}
4101
4102/**
4103 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4104 */
4105DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4106 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4107{
4108 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4109}
4110
4111#endif /* IN_RING3 */
4112
4113/**
4114 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4115 */
4116DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4117{
4118 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4119}
4120
4121/**
4122 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4123 */
4124DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4125{
4126 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4127}
4128
4129/**
4130 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4131 */
4132DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4133{
4134 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4135}
4136
4137/**
4138 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4139 */
4140DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4141{
4142 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4143}
4144
4145#ifdef IN_RING3
4146
4147/**
4148 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4149 */
4150DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4151{
4152 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4153}
4154
4155/**
4156 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4157 */
4158DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4159 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4160{
4161 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4162}
4163
4164/**
4165 * Initializes a PDM critical section.
4166 *
4167 * The PDM critical sections are derived from the IPRT critical sections, but
4168 * works in RC and R0 as well.
4169 *
4170 * @returns VBox status code.
4171 * @param pDevIns The device instance.
4172 * @param pCritSect Pointer to the critical section.
4173 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4174 * @param pszNameFmt Format string for namging the critical section.
4175 * For statistics and lock validation.
4176 * @param ... Arguments for the format string.
4177 */
4178DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4179{
4180 int rc;
4181 va_list va;
4182 va_start(va, pszNameFmt);
4183 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4184 va_end(va);
4185 return rc;
4186}
4187
4188/**
4189 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4190 */
4191DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4192 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4193{
4194 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4195}
4196
4197/**
4198 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4199 */
4200DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4201{
4202 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4203}
4204
4205/**
4206 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4207 */
4208DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4209{
4210 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4211}
4212
4213/**
4214 * @copydoc PDMDEVHLPR3::pfnA20Set
4215 */
4216DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4217{
4218 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4219}
4220
4221/**
4222 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4223 */
4224DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4225{
4226 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4227}
4228
4229/**
4230 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4231 */
4232DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4233{
4234 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4235}
4236
4237/**
4238 * @copydoc PDMDEVHLPR3::pfnPICRegister
4239 */
4240DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4241{
4242 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4243}
4244
4245/**
4246 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4247 */
4248DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4249{
4250 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4251}
4252
4253/**
4254 * @copydoc PDMDEVHLPR3::pfn
4255 */
4256DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4257{
4258 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4259}
4260
4261/**
4262 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4263 */
4264DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4265{
4266 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4267}
4268
4269/**
4270 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4271 */
4272DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4273{
4274 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4275}
4276
4277/**
4278 * @copydoc PDMDEVHLPR3::pfnDMARegister
4279 */
4280DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4281{
4282 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4283}
4284
4285/**
4286 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4287 */
4288DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4289{
4290 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4291}
4292
4293/**
4294 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4295 */
4296DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4297{
4298 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4299}
4300
4301/**
4302 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4303 */
4304DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4305{
4306 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4307}
4308
4309/**
4310 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4311 */
4312DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4313{
4314 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4315}
4316
4317/**
4318 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4319 */
4320DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4321{
4322 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4323}
4324
4325/**
4326 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4327 */
4328DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4329{
4330 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4331}
4332
4333/**
4334 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4335 */
4336DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4337{
4338 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4339}
4340
4341/**
4342 * @copydoc PDMDEVHLP::pfnCallR0
4343 */
4344DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4345{
4346 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4347}
4348
4349#endif /* IN_RING3 */
4350
4351/**
4352 * @copydoc PDMDEVHLPR3::pfnGetVM
4353 */
4354DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4355{
4356 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4357}
4358
4359/**
4360 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4361 */
4362DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4363{
4364 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4365}
4366
4367#ifdef IN_RING3
4368
4369/**
4370 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4371 */
4372DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4373{
4374 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4375}
4376
4377/**
4378 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4379 */
4380DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4381{
4382 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4383}
4384
4385/**
4386 * @copydoc PDMDEVHLPR3::pfnVMReset
4387 */
4388DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4389{
4390 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4391}
4392
4393/**
4394 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4395 */
4396DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4397{
4398 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4399}
4400
4401/**
4402 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4403 */
4404DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4405{
4406 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4407}
4408
4409#endif /* IN_RING3 */
4410
4411/**
4412 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4413 */
4414DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4415{
4416 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4417}
4418
4419#ifdef IN_RING3
4420
4421/**
4422 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4423 */
4424DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4425{
4426 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4427}
4428
4429#endif /* IN_RING3 */
4430#ifdef IN_RING0
4431
4432/**
4433 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4434 */
4435DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4436{
4437 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4438}
4439
4440#endif /* IN_RING0 */
4441
4442
4443
4444
4445/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4446typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4447
4448/**
4449 * Callbacks for VBoxDeviceRegister().
4450 */
4451typedef struct PDMDEVREGCB
4452{
4453 /** Interface version.
4454 * This is set to PDM_DEVREG_CB_VERSION. */
4455 uint32_t u32Version;
4456
4457 /**
4458 * Registers a device with the current VM instance.
4459 *
4460 * @returns VBox status code.
4461 * @param pCallbacks Pointer to the callback table.
4462 * @param pReg Pointer to the device registration record.
4463 * This data must be permanent and readonly.
4464 */
4465 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4466} PDMDEVREGCB;
4467
4468/** Current version of the PDMDEVREGCB structure. */
4469#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4470
4471
4472/**
4473 * The VBoxDevicesRegister callback function.
4474 *
4475 * PDM will invoke this function after loading a device module and letting
4476 * the module decide which devices to register and how to handle conflicts.
4477 *
4478 * @returns VBox status code.
4479 * @param pCallbacks Pointer to the callback table.
4480 * @param u32Version VBox version number.
4481 */
4482typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4483
4484/** @} */
4485
4486RT_C_DECLS_END
4487
4488#endif
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