VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 7944

Last change on this file since 7944 was 7768, checked in by vboxsync, 17 years ago

Added a VMState dev/usb/drvhlp.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 134.8 KB
Line 
1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/iom.h>
35#include <VBox/tm.h>
36#include <VBox/ssm.h>
37#include <VBox/cfgm.h>
38#include <VBox/dbgf.h>
39#include <VBox/mm.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44__BEGIN_DECLS
45
46/** @defgroup grp_pdm_device Devices
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data.
56 * If the registration structure is needed, pDevIns->pDevReg points to it.
57 * @param iInstance Instance number. Use this to figure out which registers and such to use.
58 * The instance number is also found in pDevIns->iInstance, but since it's
59 * likely to be freqently used PDM passes it as parameter.
60 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
61 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
62 * primary usage will in this function it's passed as a parameter.
63 */
64typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
65/** Pointer to a FNPDMDEVCONSTRUCT() function. */
66typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
67
68/**
69 * Destruct a device instance.
70 *
71 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
72 * resources can be freed correctly.
73 *
74 * @returns VBox status.
75 * @param pDevIns The device instance data.
76 */
77typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
78/** Pointer to a FNPDMDEVDESTRUCT() function. */
79typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
80
81/**
82 * Device relocation callback.
83 *
84 * When this callback is called the device instance data, and if the
85 * device have a GC component, is being relocated, or/and the selectors
86 * have been changed. The device must use the chance to perform the
87 * necessary pointer relocations and data updates.
88 *
89 * Before the GC code is executed the first time, this function will be
90 * called with a 0 delta so GC pointer calculations can be one in one place.
91 *
92 * @param pDevIns Pointer to the device instance.
93 * @param offDelta The relocation delta relative to the old location.
94 *
95 * @remark A relocation CANNOT fail.
96 */
97typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
98/** Pointer to a FNPDMDEVRELOCATE() function. */
99typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
100
101
102/**
103 * Device I/O Control interface.
104 *
105 * This is used by external components, such as the COM interface, to
106 * communicate with devices using a class wide interface or a device
107 * specific interface.
108 *
109 * @returns VBox status code.
110 * @param pDevIns Pointer to the device instance.
111 * @param uFunction Function to perform.
112 * @param pvIn Pointer to input data.
113 * @param cbIn Size of input data.
114 * @param pvOut Pointer to output data.
115 * @param cbOut Size of output data.
116 * @param pcbOut Where to store the actual size of the output data.
117 */
118typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
119 void *pvIn, RTUINT cbIn,
120 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
121/** Pointer to a FNPDMDEVIOCTL() function. */
122typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
123
124/**
125 * Power On notification.
126 *
127 * @returns VBox status.
128 * @param pDevIns The device instance data.
129 */
130typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
131/** Pointer to a FNPDMDEVPOWERON() function. */
132typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
133
134/**
135 * Reset notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 */
140typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
141/** Pointer to a FNPDMDEVRESET() function. */
142typedef FNPDMDEVRESET *PFNPDMDEVRESET;
143
144/**
145 * Suspend notification.
146 *
147 * @returns VBox status.
148 * @param pDevIns The device instance data.
149 */
150typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
151/** Pointer to a FNPDMDEVSUSPEND() function. */
152typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
153
154/**
155 * Resume notification.
156 *
157 * @returns VBox status.
158 * @param pDevIns The device instance data.
159 */
160typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
161/** Pointer to a FNPDMDEVRESUME() function. */
162typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
163
164/**
165 * Power Off notification.
166 *
167 * @param pDevIns The device instance data.
168 */
169typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
170/** Pointer to a FNPDMDEVPOWEROFF() function. */
171typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
172
173/**
174 * Attach command.
175 *
176 * This is called to let the device attach to a driver for a specified LUN
177 * at runtime. This is not called during VM construction, the device
178 * constructor have to attach to all the available drivers.
179 *
180 * This is like plugging in the keyboard or mouse after turning on the PC.
181 *
182 * @returns VBox status code.
183 * @param pDevIns The device instance.
184 * @param iLUN The logical unit which is being detached.
185 */
186typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
187/** Pointer to a FNPDMDEVATTACH() function. */
188typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
189
190/**
191 * Detach notification.
192 *
193 * This is called when a driver is detaching itself from a LUN of the device.
194 * The device should adjust it's state to reflect this.
195 *
196 * This is like unplugging the network cable to use it for the laptop or
197 * something while the PC is still running.
198 *
199 * @param pDevIns The device instance.
200 * @param iLUN The logical unit which is being detached.
201 */
202typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
203/** Pointer to a FNPDMDEVDETACH() function. */
204typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
205
206/**
207 * Query the base interface of a logical unit.
208 *
209 * @returns VBOX status code.
210 * @param pDevIns The device instance.
211 * @param iLUN The logicial unit to query.
212 * @param ppBase Where to store the pointer to the base interface of the LUN.
213 */
214typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
215/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
216typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
217
218/**
219 * Init complete notification.
220 * This can be done to do communication with other devices and other
221 * initialization which requires everything to be in place.
222 *
223 * @returns VBOX status code.
224 * @param pDevIns The device instance.
225 */
226typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
227/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
228typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
229
230
231
232/** PDM Device Registration Structure,
233 * This structure is used when registering a device from
234 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
235 * the VM is terminated.
236 */
237typedef struct PDMDEVREG
238{
239 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
240 uint32_t u32Version;
241 /** Device name. */
242 char szDeviceName[32];
243 /** Name of guest context module (no path).
244 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
245 char szGCMod[32];
246 /** Name of guest context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
248 char szR0Mod[32];
249 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
250 * remain unchanged from registration till VM destruction. */
251 const char *pszDescription;
252
253 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
254 RTUINT fFlags;
255 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
256 RTUINT fClass;
257 /** Maximum number of instances (per VM). */
258 RTUINT cMaxInstances;
259 /** Size of the instance data. */
260 RTUINT cbInstance;
261
262 /** Construct instance - required. */
263 PFNPDMDEVCONSTRUCT pfnConstruct;
264 /** Destruct instance - optional. */
265 PFNPDMDEVDESTRUCT pfnDestruct;
266 /** Relocation command - optional. */
267 PFNPDMDEVRELOCATE pfnRelocate;
268 /** I/O Control interface - optional. */
269 PFNPDMDEVIOCTL pfnIOCtl;
270 /** Power on notification - optional. */
271 PFNPDMDEVPOWERON pfnPowerOn;
272 /** Reset notification - optional. */
273 PFNPDMDEVRESET pfnReset;
274 /** Suspend notification - optional. */
275 PFNPDMDEVSUSPEND pfnSuspend;
276 /** Resume notification - optional. */
277 PFNPDMDEVRESUME pfnResume;
278 /** Attach command - optional. */
279 PFNPDMDEVATTACH pfnAttach;
280 /** Detach notification - optional. */
281 PFNPDMDEVDETACH pfnDetach;
282 /** Query a LUN base interface - optional. */
283 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
284 /** Init complete notification - optional. */
285 PFNPDMDEVINITCOMPLETE pfnInitComplete;
286 /** Power off notification - optional. */
287 PFNPDMDEVPOWEROFF pfnPowerOff;
288} PDMDEVREG;
289/** Pointer to a PDM Device Structure. */
290typedef PDMDEVREG *PPDMDEVREG;
291/** Const pointer to a PDM Device Structure. */
292typedef PDMDEVREG const *PCPDMDEVREG;
293
294/** Current DEVREG version number. */
295#define PDM_DEVREG_VERSION 0xc0010000
296
297/** PDM Device Flags.
298 * @{ */
299/** This flag is used to indicate that the device has a GC component. */
300#define PDM_DEVREG_FLAGS_GC 0x00000001
301/** This flag is used to indicate that the device has a R0 component. */
302#define PDM_DEVREG_FLAGS_R0 0x00010000
303
304/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
305 * The bit count for the current host. */
306#if HC_ARCH_BITS == 32
307# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
308#elif HC_ARCH_BITS == 64
309# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
310#else
311# error Unsupported HC_ARCH_BITS value.
312#endif
313/** The host bit count mask. */
314#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
315
316/** The device support only 32-bit guests. */
317#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
318/** The device support only 64-bit guests. */
319#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
320/** The device support both 32-bit & 64-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
322/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
323 * The guest bit count for the current compilation. */
324#if GC_ARCH_BITS == 32
325# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
326#elif GC_ARCH_BITS == 64
327# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
328#else
329# error Unsupported GC_ARCH_BITS value.
330#endif
331/** The guest bit count mask. */
332#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
333
334/** Indicates that the devices support PAE36 on a 32-bit guest. */
335#define PDM_DEVREG_FLAGS_PAE36 0x00000020
336/** @} */
337
338
339/** PDM Device Classes.
340 * The order is important, lower bit earlier instantiation.
341 * @{ */
342/** Architecture device. */
343#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
344/** Architecture BIOS device. */
345#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
346/** PCI bus brigde. */
347#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
348/** ISA bus brigde. */
349#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
350/** Input device (mouse, keyboard, joystick,..). */
351#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
352/** Interrupt controller (PIC). */
353#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
354/** Interval controoler (PIT). */
355#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
356/** RTC/CMOS. */
357#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
358/** DMA controller. */
359#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
360/** VMM Device. */
361#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
362/** Graphics device, like VGA. */
363#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
364/** Storage controller device. */
365#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
366/** Network interface controller. */
367#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
368/** Audio. */
369#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
370/** USB HIC. */
371#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
372/** ACPI. */
373#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
374/** Serial controller device. */
375#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
376/** Parallel controller device */
377#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
378/** Misc devices (always last). */
379#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
380/** @} */
381
382
383/** @name IRQ Level for use with the *SetIrq APIs.
384 * @{
385 */
386/** Assert the IRQ (can assume value 1). */
387#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
388/** Deassert the IRQ (can assume value 0). */
389#define PDM_IRQ_LEVEL_LOW 0
390/** flip-flop - assert and then deassert it again immediately. */
391#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
392/** @} */
393
394
395/**
396 * PCI Bus registration structure.
397 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
398 */
399typedef struct PDMPCIBUSREG
400{
401 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
402 uint32_t u32Version;
403
404 /**
405 * Registers the device with the default PCI bus.
406 *
407 * @returns VBox status code.
408 * @param pDevIns Device instance of the PCI Bus.
409 * @param pPciDev The PCI device structure.
410 * Any PCI enabled device must keep this in it's instance data!
411 * Fill in the PCI data config before registration, please.
412 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
413 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
414 * If negative, the pci bus device will assign one.
415 */
416 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
417
418 /**
419 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
420 *
421 * @returns VBox status code.
422 * @param pDevIns Device instance of the PCI Bus.
423 * @param pPciDev The PCI device structure.
424 * @param iRegion The region number.
425 * @param cbRegion Size of the region.
426 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
427 * @param pfnCallback Callback for doing the mapping.
428 */
429 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
430
431 /**
432 * Register PCI configuration space read/write callbacks.
433 *
434 * @param pDevIns Device instance of the PCI Bus.
435 * @param pPciDev The PCI device structure.
436 * @param pfnRead Pointer to the user defined PCI config read function.
437 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
438 * PCI config read function. This way, user can decide when (and if)
439 * to call default PCI config read function. Can be NULL.
440 * @param pfnWrite Pointer to the user defined PCI config write function.
441 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
442 * PCI config write function. This way, user can decide when (and if)
443 * to call default PCI config write function. Can be NULL.
444 * @thread EMT
445 */
446 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
447 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
448
449 /**
450 * Set the IRQ for a PCI device.
451 *
452 * @param pDevIns Device instance of the PCI Bus.
453 * @param pPciDev The PCI device structure.
454 * @param iIrq IRQ number to set.
455 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
456 */
457 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
458
459 /**
460 * Saves a state of the PCI device.
461 *
462 * @returns VBox status code.
463 * @param pDevIns Device instance of the PCI Bus.
464 * @param pPciDev Pointer to PCI device.
465 * @param pSSMHandle The handle to save the state to.
466 */
467 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
468
469 /**
470 * Loads a saved PCI device state.
471 *
472 * @returns VBox status code.
473 * @param pDevIns Device instance of the PCI Bus.
474 * @param pPciDev Pointer to PCI device.
475 * @param pSSMHandle The handle to the saved state.
476 */
477 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
478
479 /**
480 * Called to perform the job of the bios.
481 * This is only called for the first PCI Bus - it is expected to
482 * service all the PCI buses.
483 *
484 * @returns VBox status.
485 * @param pDevIns Device instance of the first bus.
486 */
487 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
488
489 /** The name of the SetIrq GC entry point. */
490 const char *pszSetIrqGC;
491
492 /** The name of the SetIrq R0 entry point. */
493 const char *pszSetIrqR0;
494
495} PDMPCIBUSREG;
496/** Pointer to a PCI bus registration structure. */
497typedef PDMPCIBUSREG *PPDMPCIBUSREG;
498
499/** Current PDMPCIBUSREG version number. */
500#define PDM_PCIBUSREG_VERSION 0xd0020000
501
502/**
503 * PCI Bus GC helpers.
504 */
505typedef struct PDMPCIHLPGC
506{
507 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
508 uint32_t u32Version;
509
510 /**
511 * Set an ISA IRQ.
512 *
513 * @param pDevIns PCI device instance.
514 * @param iIrq IRQ number to set.
515 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
516 * @thread EMT only.
517 */
518 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
519
520 /**
521 * Set an I/O-APIC IRQ.
522 *
523 * @param pDevIns PCI device instance.
524 * @param iIrq IRQ number to set.
525 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
526 * @thread EMT only.
527 */
528 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
529
530#ifdef VBOX_WITH_PDM_LOCK
531 /**
532 * Acquires the PDM lock.
533 *
534 * @returns VINF_SUCCESS on success.
535 * @returns rc if we failed to acquire the lock.
536 * @param pDevIns The PCI device instance.
537 * @param rc What to return if we fail to acquire the lock.
538 */
539 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
540
541 /**
542 * Releases the PDM lock.
543 *
544 * @param pDevIns The PCI device instance.
545 */
546 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
547#endif
548 /** Just a safety precaution. */
549 uint32_t u32TheEnd;
550} PDMPCIHLPGC;
551/** Pointer to PCI helpers. */
552typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
553/** Pointer to const PCI helpers. */
554typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
555
556/** Current PDMPCIHLPR3 version number. */
557#define PDM_PCIHLPGC_VERSION 0xe1010000
558
559
560/**
561 * PCI Bus R0 helpers.
562 */
563typedef struct PDMPCIHLPR0
564{
565 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
566 uint32_t u32Version;
567
568 /**
569 * Set an ISA IRQ.
570 *
571 * @param pDevIns PCI device instance.
572 * @param iIrq IRQ number to set.
573 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
574 * @thread EMT only.
575 */
576 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
577
578 /**
579 * Set an I/O-APIC IRQ.
580 *
581 * @param pDevIns PCI device instance.
582 * @param iIrq IRQ number to set.
583 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
584 * @thread EMT only.
585 */
586 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
587
588#ifdef VBOX_WITH_PDM_LOCK
589 /**
590 * Acquires the PDM lock.
591 *
592 * @returns VINF_SUCCESS on success.
593 * @returns rc if we failed to acquire the lock.
594 * @param pDevIns The PCI device instance.
595 * @param rc What to return if we fail to acquire the lock.
596 */
597 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
598
599 /**
600 * Releases the PDM lock.
601 *
602 * @param pDevIns The PCI device instance.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
605#endif
606
607 /** Just a safety precaution. */
608 uint32_t u32TheEnd;
609} PDMPCIHLPR0;
610/** Pointer to PCI helpers. */
611typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
612/** Pointer to const PCI helpers. */
613typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
614
615/** Current PDMPCIHLPR0 version number. */
616#define PDM_PCIHLPR0_VERSION 0xe1010000
617
618/**
619 * PCI device helpers.
620 */
621typedef struct PDMPCIHLPR3
622{
623 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
624 uint32_t u32Version;
625
626 /**
627 * Set an ISA IRQ.
628 *
629 * @param pDevIns The PCI device instance.
630 * @param iIrq IRQ number to set.
631 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
632 * @thread EMT only.
633 */
634 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
635
636 /**
637 * Set an I/O-APIC IRQ.
638 *
639 * @param pDevIns The PCI device instance.
640 * @param iIrq IRQ number to set.
641 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
642 * @thread EMT only.
643 */
644 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
645
646 /**
647 * Checks if the given address is an MMIO2 base address or not.
648 *
649 * @returns true/false accordingly.
650 * @param pDevIns The PCI device instance.
651 * @param pOwner The owner of the memory, optional.
652 * @param GCPhys The address to check.
653 */
654 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
655
656 /**
657 * Gets the address of the GC PCI Bus helpers.
658 *
659 * This should be called at both construction and relocation time
660 * to obtain the correct address of the GC helpers.
661 *
662 * @returns GC pointer to the PCI Bus helpers.
663 * @param pDevIns Device instance of the PCI Bus.
664 * @thread EMT only.
665 */
666 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
667
668 /**
669 * Gets the address of the R0 PCI Bus helpers.
670 *
671 * This should be called at both construction and relocation time
672 * to obtain the correct address of the GC helpers.
673 *
674 * @returns R0 pointer to the PCI Bus helpers.
675 * @param pDevIns Device instance of the PCI Bus.
676 * @thread EMT only.
677 */
678 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
679
680#ifdef VBOX_WITH_PDM_LOCK
681 /**
682 * Acquires the PDM lock.
683 *
684 * @returns VINF_SUCCESS on success.
685 * @returns Fatal error on failure.
686 * @param pDevIns The PCI device instance.
687 * @param rc Dummy for making the interface identical to the GC and R0 versions.
688 */
689 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
690
691 /**
692 * Releases the PDM lock.
693 *
694 * @param pDevIns The PCI device instance.
695 */
696 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
697#endif
698
699 /** Just a safety precaution. */
700 uint32_t u32TheEnd;
701} PDMPCIHLPR3;
702/** Pointer to PCI helpers. */
703typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
704/** Pointer to const PCI helpers. */
705typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
706
707/** Current PDMPCIHLPR3 version number. */
708#define PDM_PCIHLPR3_VERSION 0xf1020000
709
710
711/**
712 * Programmable Interrupt Controller registration structure.
713 */
714typedef struct PDMPICREG
715{
716 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
717 uint32_t u32Version;
718
719 /**
720 * Set the an IRQ.
721 *
722 * @param pDevIns Device instance of the PIC.
723 * @param iIrq IRQ number to set.
724 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
725 */
726 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
727
728 /**
729 * Get a pending interrupt.
730 *
731 * @returns Pending interrupt number.
732 * @param pDevIns Device instance of the PIC.
733 */
734 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
735
736 /** The name of the GC SetIrq entry point. */
737 const char *pszSetIrqGC;
738 /** The name of the GC GetInterrupt entry point. */
739 const char *pszGetInterruptGC;
740
741 /** The name of the R0 SetIrq entry point. */
742 const char *pszSetIrqR0;
743 /** The name of the R0 GetInterrupt entry point. */
744 const char *pszGetInterruptR0;
745} PDMPICREG;
746/** Pointer to a PIC registration structure. */
747typedef PDMPICREG *PPDMPICREG;
748
749/** Current PDMPICREG version number. */
750#define PDM_PICREG_VERSION 0xe0020000
751
752/**
753 * PIC GC helpers.
754 */
755typedef struct PDMPICHLPGC
756{
757 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
758 uint32_t u32Version;
759
760 /**
761 * Set the interrupt force action flag.
762 *
763 * @param pDevIns Device instance of the PIC.
764 */
765 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
766
767 /**
768 * Clear the interrupt force action flag.
769 *
770 * @param pDevIns Device instance of the PIC.
771 */
772 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
773
774#ifdef VBOX_WITH_PDM_LOCK
775 /**
776 * Acquires the PDM lock.
777 *
778 * @returns VINF_SUCCESS on success.
779 * @returns rc if we failed to acquire the lock.
780 * @param pDevIns The PIC device instance.
781 * @param rc What to return if we fail to acquire the lock.
782 */
783 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
784
785 /**
786 * Releases the PDM lock.
787 *
788 * @param pDevIns The PIC device instance.
789 */
790 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
791#endif
792 /** Just a safety precaution. */
793 uint32_t u32TheEnd;
794} PDMPICHLPGC;
795
796/** Pointer to PIC GC helpers. */
797typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
798/** Pointer to const PIC GC helpers. */
799typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
800
801/** Current PDMPICHLPGC version number. */
802#define PDM_PICHLPGC_VERSION 0xfc010000
803
804
805/**
806 * PIC R0 helpers.
807 */
808typedef struct PDMPICHLPR0
809{
810 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
811 uint32_t u32Version;
812
813 /**
814 * Set the interrupt force action flag.
815 *
816 * @param pDevIns Device instance of the PIC.
817 */
818 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
819
820 /**
821 * Clear the interrupt force action flag.
822 *
823 * @param pDevIns Device instance of the PIC.
824 */
825 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
826
827#ifdef VBOX_WITH_PDM_LOCK
828 /**
829 * Acquires the PDM lock.
830 *
831 * @returns VINF_SUCCESS on success.
832 * @returns rc if we failed to acquire the lock.
833 * @param pDevIns The PIC device instance.
834 * @param rc What to return if we fail to acquire the lock.
835 */
836 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
837
838 /**
839 * Releases the PDM lock.
840 *
841 * @param pDevIns The PCI device instance.
842 */
843 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
844#endif
845
846 /** Just a safety precaution. */
847 uint32_t u32TheEnd;
848} PDMPICHLPR0;
849
850/** Pointer to PIC R0 helpers. */
851typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
852/** Pointer to const PIC R0 helpers. */
853typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
854
855/** Current PDMPICHLPR0 version number. */
856#define PDM_PICHLPR0_VERSION 0xfc010000
857
858/**
859 * PIC HC helpers.
860 */
861typedef struct PDMPICHLPR3
862{
863 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
864 uint32_t u32Version;
865
866 /**
867 * Set the interrupt force action flag.
868 *
869 * @param pDevIns Device instance of the PIC.
870 */
871 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
872
873 /**
874 * Clear the interrupt force action flag.
875 *
876 * @param pDevIns Device instance of the PIC.
877 */
878 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
879
880#ifdef VBOX_WITH_PDM_LOCK
881 /**
882 * Acquires the PDM lock.
883 *
884 * @returns VINF_SUCCESS on success.
885 * @returns Fatal error on failure.
886 * @param pDevIns The PIC device instance.
887 * @param rc Dummy for making the interface identical to the GC and R0 versions.
888 */
889 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
890
891 /**
892 * Releases the PDM lock.
893 *
894 * @param pDevIns The PIC device instance.
895 */
896 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
897#endif
898
899 /**
900 * Gets the address of the GC PIC helpers.
901 *
902 * This should be called at both construction and relocation time
903 * to obtain the correct address of the GC helpers.
904 *
905 * @returns GC pointer to the PIC helpers.
906 * @param pDevIns Device instance of the PIC.
907 */
908 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
909
910 /**
911 * Gets the address of the R0 PIC helpers.
912 *
913 * This should be called at both construction and relocation time
914 * to obtain the correct address of the GC helpers.
915 *
916 * @returns R0 pointer to the PIC helpers.
917 * @param pDevIns Device instance of the PIC.
918 */
919 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
920
921 /** Just a safety precaution. */
922 uint32_t u32TheEnd;
923} PDMPICHLPR3;
924
925/** Pointer to PIC HC helpers. */
926typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
927/** Pointer to const PIC HC helpers. */
928typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
929
930/** Current PDMPICHLPR3 version number. */
931#define PDM_PICHLPR3_VERSION 0xf0010000
932
933
934
935/**
936 * Advanced Programmable Interrupt Controller registration structure.
937 */
938typedef struct PDMAPICREG
939{
940 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
941 uint32_t u32Version;
942
943 /**
944 * Get a pending interrupt.
945 *
946 * @returns Pending interrupt number.
947 * @param pDevIns Device instance of the APIC.
948 */
949 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
950
951 /**
952 * Set the APIC base.
953 *
954 * @param pDevIns Device instance of the APIC.
955 * @param u64Base The new base.
956 */
957 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
958
959 /**
960 * Get the APIC base.
961 *
962 * @returns Current base.
963 * @param pDevIns Device instance of the APIC.
964 */
965 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
966
967 /**
968 * Set the TPR (task priority register?).
969 *
970 * @param pDevIns Device instance of the APIC.
971 * @param u8TPR The new TPR.
972 */
973 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
974
975 /**
976 * Get the TPR (task priority register?).
977 *
978 * @returns The current TPR.
979 * @param pDevIns Device instance of the APIC.
980 */
981 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
982
983 /**
984 * Private interface between the IOAPIC and APIC.
985 *
986 * This is a low-level, APIC/IOAPIC implementation specific interface
987 * which is registered with PDM only because it makes life so much
988 * simpler right now (GC bits). This is a bad bad hack! The correct
989 * way of doing this would involve some way of querying GC interfaces
990 * and relocating them. Perhaps doing some kind of device init in GC...
991 *
992 * @returns The current TPR.
993 * @param pDevIns Device instance of the APIC.
994 * @param u8Dest See APIC implementation.
995 * @param u8DestMode See APIC implementation.
996 * @param u8DeliveryMode See APIC implementation.
997 * @param iVector See APIC implementation.
998 * @param u8Polarity See APIC implementation.
999 * @param u8TriggerMode See APIC implementation.
1000 */
1001 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1002 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1003
1004 /** The name of the GC GetInterrupt entry point. */
1005 const char *pszGetInterruptGC;
1006 /** The name of the GC SetBase entry point. */
1007 const char *pszSetBaseGC;
1008 /** The name of the GC GetBase entry point. */
1009 const char *pszGetBaseGC;
1010 /** The name of the GC SetTPR entry point. */
1011 const char *pszSetTPRGC;
1012 /** The name of the GC GetTPR entry point. */
1013 const char *pszGetTPRGC;
1014 /** The name of the GC BusDeliver entry point. */
1015 const char *pszBusDeliverGC;
1016
1017 /** The name of the R0 GetInterrupt entry point. */
1018 const char *pszGetInterruptR0;
1019 /** The name of the R0 SetBase entry point. */
1020 const char *pszSetBaseR0;
1021 /** The name of the R0 GetBase entry point. */
1022 const char *pszGetBaseR0;
1023 /** The name of the R0 SetTPR entry point. */
1024 const char *pszSetTPRR0;
1025 /** The name of the R0 GetTPR entry point. */
1026 const char *pszGetTPRR0;
1027 /** The name of the R0 BusDeliver entry point. */
1028 const char *pszBusDeliverR0;
1029
1030} PDMAPICREG;
1031/** Pointer to an APIC registration structure. */
1032typedef PDMAPICREG *PPDMAPICREG;
1033
1034/** Current PDMAPICREG version number. */
1035#define PDM_APICREG_VERSION 0x70010000
1036
1037
1038/**
1039 * APIC GC helpers.
1040 */
1041typedef struct PDMAPICHLPGC
1042{
1043 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1044 uint32_t u32Version;
1045
1046 /**
1047 * Set the interrupt force action flag.
1048 *
1049 * @param pDevIns Device instance of the APIC.
1050 */
1051 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1052
1053 /**
1054 * Clear the interrupt force action flag.
1055 *
1056 * @param pDevIns Device instance of the APIC.
1057 */
1058 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1059
1060 /**
1061 * Sets or clears the APIC bit in the CPUID feature masks.
1062 *
1063 * @param pDevIns Device instance of the APIC.
1064 * @param fEnabled If true the bit is set, else cleared.
1065 */
1066 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1067
1068#ifdef VBOX_WITH_PDM_LOCK
1069 /**
1070 * Acquires the PDM lock.
1071 *
1072 * @returns VINF_SUCCESS on success.
1073 * @returns rc if we failed to acquire the lock.
1074 * @param pDevIns The APIC device instance.
1075 * @param rc What to return if we fail to acquire the lock.
1076 */
1077 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1078
1079 /**
1080 * Releases the PDM lock.
1081 *
1082 * @param pDevIns The APIC device instance.
1083 */
1084 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1085#endif
1086 /** Just a safety precaution. */
1087 uint32_t u32TheEnd;
1088} PDMAPICHLPGC;
1089/** Pointer to APIC GC helpers. */
1090typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1091/** Pointer to const APIC helpers. */
1092typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1093
1094/** Current PDMAPICHLPGC version number. */
1095#define PDM_APICHLPGC_VERSION 0x60010000
1096
1097
1098/**
1099 * APIC R0 helpers.
1100 */
1101typedef struct PDMAPICHLPR0
1102{
1103 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1104 uint32_t u32Version;
1105
1106 /**
1107 * Set the interrupt force action flag.
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 */
1111 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1112
1113 /**
1114 * Clear the interrupt force action flag.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 */
1118 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1119
1120 /**
1121 * Sets or clears the APIC bit in the CPUID feature masks.
1122 *
1123 * @param pDevIns Device instance of the APIC.
1124 * @param fEnabled If true the bit is set, else cleared.
1125 */
1126 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1127
1128#ifdef VBOX_WITH_PDM_LOCK
1129 /**
1130 * Acquires the PDM lock.
1131 *
1132 * @returns VINF_SUCCESS on success.
1133 * @returns rc if we failed to acquire the lock.
1134 * @param pDevIns The APIC device instance.
1135 * @param rc What to return if we fail to acquire the lock.
1136 */
1137 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1138
1139 /**
1140 * Releases the PDM lock.
1141 *
1142 * @param pDevIns The APIC device instance.
1143 */
1144 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1145#endif
1146
1147 /** Just a safety precaution. */
1148 uint32_t u32TheEnd;
1149} PDMAPICHLPR0;
1150/** Pointer to APIC GC helpers. */
1151typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1152/** Pointer to const APIC helpers. */
1153typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1154
1155/** Current PDMAPICHLPR0 version number. */
1156#define PDM_APICHLPR0_VERSION 0x60010000
1157
1158/**
1159 * APIC HC helpers.
1160 */
1161typedef struct PDMAPICHLPR3
1162{
1163 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1164 uint32_t u32Version;
1165
1166 /**
1167 * Set the interrupt force action flag.
1168 *
1169 * @param pDevIns Device instance of the APIC.
1170 */
1171 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1172
1173 /**
1174 * Clear the interrupt force action flag.
1175 *
1176 * @param pDevIns Device instance of the APIC.
1177 */
1178 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1179
1180 /**
1181 * Sets or clears the APIC bit in the CPUID feature masks.
1182 *
1183 * @param pDevIns Device instance of the APIC.
1184 * @param fEnabled If true the bit is set, else cleared.
1185 */
1186 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1187
1188#ifdef VBOX_WITH_PDM_LOCK
1189 /**
1190 * Acquires the PDM lock.
1191 *
1192 * @returns VINF_SUCCESS on success.
1193 * @returns Fatal error on failure.
1194 * @param pDevIns The APIC device instance.
1195 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1196 */
1197 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1198
1199 /**
1200 * Releases the PDM lock.
1201 *
1202 * @param pDevIns The APIC device instance.
1203 */
1204 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1205#endif
1206
1207 /**
1208 * Gets the address of the GC APIC helpers.
1209 *
1210 * This should be called at both construction and relocation time
1211 * to obtain the correct address of the GC helpers.
1212 *
1213 * @returns GC pointer to the APIC helpers.
1214 * @param pDevIns Device instance of the APIC.
1215 */
1216 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1217
1218 /**
1219 * Gets the address of the R0 APIC helpers.
1220 *
1221 * This should be called at both construction and relocation time
1222 * to obtain the correct address of the R0 helpers.
1223 *
1224 * @returns R0 pointer to the APIC helpers.
1225 * @param pDevIns Device instance of the APIC.
1226 */
1227 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1228
1229 /** Just a safety precaution. */
1230 uint32_t u32TheEnd;
1231} PDMAPICHLPR3;
1232/** Pointer to APIC helpers. */
1233typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1234/** Pointer to const APIC helpers. */
1235typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1236
1237/** Current PDMAPICHLP version number. */
1238#define PDM_APICHLPR3_VERSION 0xfd010000
1239
1240
1241/**
1242 * I/O APIC registration structure.
1243 */
1244typedef struct PDMIOAPICREG
1245{
1246 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1247 uint32_t u32Version;
1248
1249 /**
1250 * Set the an IRQ.
1251 *
1252 * @param pDevIns Device instance of the I/O APIC.
1253 * @param iIrq IRQ number to set.
1254 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1255 */
1256 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1257
1258 /** The name of the GC SetIrq entry point. */
1259 const char *pszSetIrqGC;
1260
1261 /** The name of the R0 SetIrq entry point. */
1262 const char *pszSetIrqR0;
1263} PDMIOAPICREG;
1264/** Pointer to an APIC registration structure. */
1265typedef PDMIOAPICREG *PPDMIOAPICREG;
1266
1267/** Current PDMAPICREG version number. */
1268#define PDM_IOAPICREG_VERSION 0x50010000
1269
1270
1271/**
1272 * IOAPIC GC helpers.
1273 */
1274typedef struct PDMIOAPICHLPGC
1275{
1276 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1277 uint32_t u32Version;
1278
1279 /**
1280 * Private interface between the IOAPIC and APIC.
1281 *
1282 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1283 *
1284 * @returns The current TPR.
1285 * @param pDevIns Device instance of the IOAPIC.
1286 * @param u8Dest See APIC implementation.
1287 * @param u8DestMode See APIC implementation.
1288 * @param u8DeliveryMode See APIC implementation.
1289 * @param iVector See APIC implementation.
1290 * @param u8Polarity See APIC implementation.
1291 * @param u8TriggerMode See APIC implementation.
1292 */
1293 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1294 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1295
1296#ifdef VBOX_WITH_PDM_LOCK
1297 /**
1298 * Acquires the PDM lock.
1299 *
1300 * @returns VINF_SUCCESS on success.
1301 * @returns rc if we failed to acquire the lock.
1302 * @param pDevIns The IOAPIC device instance.
1303 * @param rc What to return if we fail to acquire the lock.
1304 */
1305 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1306
1307 /**
1308 * Releases the PDM lock.
1309 *
1310 * @param pDevIns The IOAPIC device instance.
1311 */
1312 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1313#endif
1314
1315 /** Just a safety precaution. */
1316 uint32_t u32TheEnd;
1317} PDMIOAPICHLPGC;
1318/** Pointer to IOAPIC GC helpers. */
1319typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1320/** Pointer to const IOAPIC helpers. */
1321typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1322
1323/** Current PDMIOAPICHLPGC version number. */
1324#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1325
1326
1327/**
1328 * IOAPIC R0 helpers.
1329 */
1330typedef struct PDMIOAPICHLPR0
1331{
1332 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1333 uint32_t u32Version;
1334
1335 /**
1336 * Private interface between the IOAPIC and APIC.
1337 *
1338 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1339 *
1340 * @returns The current TPR.
1341 * @param pDevIns Device instance of the IOAPIC.
1342 * @param u8Dest See APIC implementation.
1343 * @param u8DestMode See APIC implementation.
1344 * @param u8DeliveryMode See APIC implementation.
1345 * @param iVector See APIC implementation.
1346 * @param u8Polarity See APIC implementation.
1347 * @param u8TriggerMode See APIC implementation.
1348 */
1349 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1350 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1351
1352#ifdef VBOX_WITH_PDM_LOCK
1353 /**
1354 * Acquires the PDM lock.
1355 *
1356 * @returns VINF_SUCCESS on success.
1357 * @returns rc if we failed to acquire the lock.
1358 * @param pDevIns The IOAPIC device instance.
1359 * @param rc What to return if we fail to acquire the lock.
1360 */
1361 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1362
1363 /**
1364 * Releases the PDM lock.
1365 *
1366 * @param pDevIns The IOAPIC device instance.
1367 */
1368 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1369#endif
1370
1371 /** Just a safety precaution. */
1372 uint32_t u32TheEnd;
1373} PDMIOAPICHLPR0;
1374/** Pointer to IOAPIC R0 helpers. */
1375typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1376/** Pointer to const IOAPIC helpers. */
1377typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1378
1379/** Current PDMIOAPICHLPR0 version number. */
1380#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1381
1382/**
1383 * IOAPIC HC helpers.
1384 */
1385typedef struct PDMIOAPICHLPR3
1386{
1387 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1388 uint32_t u32Version;
1389
1390 /**
1391 * Private interface between the IOAPIC and APIC.
1392 *
1393 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1394 *
1395 * @returns The current TPR.
1396 * @param pDevIns Device instance of the IOAPIC.
1397 * @param u8Dest See APIC implementation.
1398 * @param u8DestMode See APIC implementation.
1399 * @param u8DeliveryMode See APIC implementation.
1400 * @param iVector See APIC implementation.
1401 * @param u8Polarity See APIC implementation.
1402 * @param u8TriggerMode See APIC implementation.
1403 */
1404 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1405 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1406
1407#ifdef VBOX_WITH_PDM_LOCK
1408 /**
1409 * Acquires the PDM lock.
1410 *
1411 * @returns VINF_SUCCESS on success.
1412 * @returns Fatal error on failure.
1413 * @param pDevIns The IOAPIC device instance.
1414 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1415 */
1416 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1417
1418 /**
1419 * Releases the PDM lock.
1420 *
1421 * @param pDevIns The IOAPIC device instance.
1422 */
1423 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1424#endif
1425
1426 /**
1427 * Gets the address of the GC IOAPIC helpers.
1428 *
1429 * This should be called at both construction and relocation time
1430 * to obtain the correct address of the GC helpers.
1431 *
1432 * @returns GC pointer to the IOAPIC helpers.
1433 * @param pDevIns Device instance of the IOAPIC.
1434 */
1435 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1436
1437 /**
1438 * Gets the address of the R0 IOAPIC helpers.
1439 *
1440 * This should be called at both construction and relocation time
1441 * to obtain the correct address of the R0 helpers.
1442 *
1443 * @returns R0 pointer to the IOAPIC helpers.
1444 * @param pDevIns Device instance of the IOAPIC.
1445 */
1446 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1447
1448 /** Just a safety precaution. */
1449 uint32_t u32TheEnd;
1450} PDMIOAPICHLPR3;
1451/** Pointer to IOAPIC HC helpers. */
1452typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1453/** Pointer to const IOAPIC helpers. */
1454typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1455
1456/** Current PDMIOAPICHLPR3 version number. */
1457#define PDM_IOAPICHLPR3_VERSION 0xff010000
1458
1459
1460
1461#ifdef IN_RING3
1462
1463/**
1464 * DMA Transfer Handler.
1465 *
1466 * @returns Number of bytes transferred.
1467 * @param pDevIns Device instance of the DMA.
1468 * @param pvUser User pointer.
1469 * @param uChannel Channel number.
1470 * @param off DMA position.
1471 * @param cb Block size.
1472 */
1473typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1474/** Pointer to a FNDMATRANSFERHANDLER(). */
1475typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1476
1477/**
1478 * DMA Controller registration structure.
1479 */
1480typedef struct PDMDMAREG
1481{
1482 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1483 uint32_t u32Version;
1484
1485 /**
1486 * Execute pending transfers.
1487 *
1488 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1489 * @param pDevIns Device instance of the DMAC.
1490 */
1491 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1492
1493 /**
1494 * Register transfer function for DMA channel.
1495 *
1496 * @param pDevIns Device instance of the DMAC.
1497 * @param uChannel Channel number.
1498 * @param pfnTransferHandler Device specific transfer function.
1499 * @param pvUSer User pointer to be passed to the callback.
1500 */
1501 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1502
1503 /**
1504 * Read memory
1505 *
1506 * @returns Number of bytes read.
1507 * @param pDevIns Device instance of the DMAC.
1508 * @param pvBuffer Pointer to target buffer.
1509 * @param off DMA position.
1510 * @param cbBlock Block size.
1511 */
1512 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1513
1514 /**
1515 * Write memory
1516 *
1517 * @returns Number of bytes written.
1518 * @param pDevIns Device instance of the DMAC.
1519 * @param pvBuffer Memory to write.
1520 * @param off DMA position.
1521 * @param cbBlock Block size.
1522 */
1523 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1524
1525 /**
1526 * Set the DREQ line.
1527 *
1528 * @param pDevIns Device instance of the DMAC.
1529 * @param uChannel Channel number.
1530 * @param uLevel Level of the line.
1531 */
1532 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1533
1534 /**
1535 * Get channel mode
1536 *
1537 * @returns Channel mode.
1538 * @param pDevIns Device instance of the DMAC.
1539 * @param uChannel Channel number.
1540 */
1541 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1542
1543} PDMDMACREG;
1544/** Pointer to a DMAC registration structure. */
1545typedef PDMDMACREG *PPDMDMACREG;
1546
1547/** Current PDMDMACREG version number. */
1548#define PDM_DMACREG_VERSION 0xf5010000
1549
1550
1551/**
1552 * DMA Controller device helpers.
1553 */
1554typedef struct PDMDMACHLP
1555{
1556 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1557 uint32_t u32Version;
1558
1559 /* to-be-defined */
1560
1561} PDMDMACHLP;
1562/** Pointer to DMAC helpers. */
1563typedef PDMDMACHLP *PPDMDMACHLP;
1564/** Pointer to const DMAC helpers. */
1565typedef const PDMDMACHLP *PCPDMDMACHLP;
1566
1567/** Current PDMDMACHLP version number. */
1568#define PDM_DMACHLP_VERSION 0xf6010000
1569
1570#endif /* IN_RING3 */
1571
1572
1573
1574/**
1575 * RTC registration structure.
1576 */
1577typedef struct PDMRTCREG
1578{
1579 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1580 uint32_t u32Version;
1581 uint32_t u32Alignment; /**< structure size alignment. */
1582
1583 /**
1584 * Write to a CMOS register and update the checksum if necessary.
1585 *
1586 * @returns VBox status code.
1587 * @param pDevIns Device instance of the RTC.
1588 * @param iReg The CMOS register index.
1589 * @param u8Value The CMOS register value.
1590 */
1591 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1592
1593 /**
1594 * Read a CMOS register.
1595 *
1596 * @returns VBox status code.
1597 * @param pDevIns Device instance of the RTC.
1598 * @param iReg The CMOS register index.
1599 * @param pu8Value Where to store the CMOS register value.
1600 */
1601 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1602
1603} PDMRTCREG;
1604/** Pointer to a RTC registration structure. */
1605typedef PDMRTCREG *PPDMRTCREG;
1606/** Pointer to a const RTC registration structure. */
1607typedef const PDMRTCREG *PCPDMRTCREG;
1608
1609/** Current PDMRTCREG version number. */
1610#define PDM_RTCREG_VERSION 0xfa010000
1611
1612
1613/**
1614 * RTC device helpers.
1615 */
1616typedef struct PDMRTCHLP
1617{
1618 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1619 uint32_t u32Version;
1620
1621 /* to-be-defined */
1622
1623} PDMRTCHLP;
1624/** Pointer to RTC helpers. */
1625typedef PDMRTCHLP *PPDMRTCHLP;
1626/** Pointer to const RTC helpers. */
1627typedef const PDMRTCHLP *PCPDMRTCHLP;
1628
1629/** Current PDMRTCHLP version number. */
1630#define PDM_RTCHLP_VERSION 0xf6010000
1631
1632
1633
1634#ifdef IN_RING3
1635
1636/**
1637 * PDM Device API.
1638 */
1639typedef struct PDMDEVHLP
1640{
1641 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1642 uint32_t u32Version;
1643
1644 /**
1645 * Register a number of I/O ports with a device.
1646 *
1647 * These callbacks are of course for the host context (HC).
1648 * Register HC handlers before guest context (GC) handlers! There must be a
1649 * HC handler for every GC handler!
1650 *
1651 * @returns VBox status.
1652 * @param pDevIns The device instance to register the ports with.
1653 * @param Port First port number in the range.
1654 * @param cPorts Number of ports to register.
1655 * @param pvUser User argument.
1656 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1657 * @param pfnIn Pointer to function which is gonna handle IN operations.
1658 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1659 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1660 * @param pszDesc Pointer to description string. This must not be freed.
1661 */
1662 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1663 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1664 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1665
1666 /**
1667 * Register a number of I/O ports with a device for GC.
1668 *
1669 * These callbacks are for the host context (GC).
1670 * Register host context (HC) handlers before guest context handlers! There must be a
1671 * HC handler for every GC handler!
1672 *
1673 * @returns VBox status.
1674 * @param pDevIns The device instance to register the ports with and which GC module
1675 * to resolve the names against.
1676 * @param Port First port number in the range.
1677 * @param cPorts Number of ports to register.
1678 * @param pvUser User argument.
1679 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1680 * @param pszIn Name of the GC function which is gonna handle IN operations.
1681 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1682 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1683 * @param pszDesc Pointer to description string. This must not be freed.
1684 */
1685 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1686 const char *pszOut, const char *pszIn,
1687 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1688
1689 /**
1690 * Register a number of I/O ports with a device.
1691 *
1692 * These callbacks are of course for the ring-0 host context (R0).
1693 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1694 *
1695 * @returns VBox status.
1696 * @param pDevIns The device instance to register the ports with.
1697 * @param Port First port number in the range.
1698 * @param cPorts Number of ports to register.
1699 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1700 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1701 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1702 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1703 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1704 * @param pszDesc Pointer to description string. This must not be freed.
1705 */
1706 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1707 const char *pszOut, const char *pszIn,
1708 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1709
1710 /**
1711 * Deregister I/O ports.
1712 *
1713 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1714 *
1715 * @returns VBox status.
1716 * @param pDevIns The device instance owning the ports.
1717 * @param Port First port number in the range.
1718 * @param cPorts Number of ports to deregister.
1719 */
1720 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1721
1722 /**
1723 * Register a Memory Mapped I/O (MMIO) region.
1724 *
1725 * These callbacks are of course for the host context (HC).
1726 * Register HC handlers before guest context (GC) handlers! There must be a
1727 * HC handler for every GC handler!
1728 *
1729 * @returns VBox status.
1730 * @param pDevIns The device instance to register the MMIO with.
1731 * @param GCPhysStart First physical address in the range.
1732 * @param cbRange The size of the range (in bytes).
1733 * @param pvUser User argument.
1734 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1735 * @param pfnRead Pointer to function which is gonna handle Read operations.
1736 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1737 * @param pszDesc Pointer to description string. This must not be freed.
1738 */
1739 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1740 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1741 const char *pszDesc));
1742
1743 /**
1744 * Register a Memory Mapped I/O (MMIO) region for GC.
1745 *
1746 * These callbacks are for the guest context (GC).
1747 * Register host context (HC) handlers before guest context handlers! There must be a
1748 * HC handler for every GC handler!
1749 *
1750 * @returns VBox status.
1751 * @param pDevIns The device instance to register the MMIO with.
1752 * @param GCPhysStart First physical address in the range.
1753 * @param cbRange The size of the range (in bytes).
1754 * @param pvUser User argument.
1755 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1756 * @param pszRead Name of the GC function which is gonna handle Read operations.
1757 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1758 * @param pszDesc Obsolete. NULL is fine.
1759 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1760 */
1761 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1762 const char *pszWrite, const char *pszRead, const char *pszFill,
1763 const char *pszDesc));
1764
1765 /**
1766 * Register a Memory Mapped I/O (MMIO) region for R0.
1767 *
1768 * These callbacks are for the ring-0 host context (R0).
1769 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1770 *
1771 * @returns VBox status.
1772 * @param pDevIns The device instance to register the MMIO with.
1773 * @param GCPhysStart First physical address in the range.
1774 * @param cbRange The size of the range (in bytes).
1775 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1776 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1777 * @param pszRead Name of the GC function which is gonna handle Read operations.
1778 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1779 * @param pszDesc Obsolete. NULL is fine.
1780 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1781 */
1782 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1783 const char *pszWrite, const char *pszRead, const char *pszFill,
1784 const char *pszDesc));
1785
1786 /**
1787 * Deregister a Memory Mapped I/O (MMIO) region.
1788 *
1789 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1790 *
1791 * @returns VBox status.
1792 * @param pDevIns The device instance owning the MMIO region(s).
1793 * @param GCPhysStart First physical address in the range.
1794 * @param cbRange The size of the range (in bytes).
1795 */
1796 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1797
1798 /**
1799 * Register a ROM (BIOS) region.
1800 *
1801 * It goes without saying that this is read-only memory. The memory region must be
1802 * in unassigned memory. I.e. from the top of the address space or on the PC in
1803 * the 0xa0000-0xfffff range.
1804 *
1805 * @returns VBox status.
1806 * @param pDevIns The device instance owning the ROM region.
1807 * @param GCPhysStart First physical address in the range.
1808 * Must be page aligned!
1809 * @param cbRange The size of the range (in bytes).
1810 * Must be page aligned!
1811 * @param pvBinary Pointer to the binary data backing the ROM image.
1812 * This must be cbRange bytes big.
1813 * It will be copied and doesn't have to stick around if fShadow is clear.
1814 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1815 * the ROM writable for a while during the POST and refreshing
1816 * it at reset. When this flag is set, the memory pointed to by
1817 * pvBinary has to stick around for the lifespan of the VM.
1818 * @param pszDesc Pointer to description string. This must not be freed.
1819 *
1820 * @remark There is no way to remove the rom, automatically on device cleanup or
1821 * manually from the device yet. At present I doubt we need such features...
1822 */
1823 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1824
1825 /**
1826 * Register a save state data unit.
1827 *
1828 * @returns VBox status.
1829 * @param pDevIns Device instance.
1830 * @param pszName Data unit name.
1831 * @param u32Instance The instance identifier of the data unit.
1832 * This must together with the name be unique.
1833 * @param u32Version Data layout version number.
1834 * @param cbGuess The approximate amount of data in the unit.
1835 * Only for progress indicators.
1836 * @param pfnSavePrep Prepare save callback, optional.
1837 * @param pfnSaveExec Execute save callback, optional.
1838 * @param pfnSaveDone Done save callback, optional.
1839 * @param pfnLoadPrep Prepare load callback, optional.
1840 * @param pfnLoadExec Execute load callback, optional.
1841 * @param pfnLoadDone Done load callback, optional.
1842 */
1843 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1844 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1845 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1846
1847 /**
1848 * Creates a timer.
1849 *
1850 * @returns VBox status.
1851 * @param pDevIns Device instance.
1852 * @param enmClock The clock to use on this timer.
1853 * @param pfnCallback Callback function.
1854 * @param pszDesc Pointer to description string which must stay around
1855 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1856 * @param ppTimer Where to store the timer on success.
1857 */
1858 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1859
1860 /**
1861 * Creates an external timer.
1862 *
1863 * @returns timer pointer
1864 * @param pDevIns Device instance.
1865 * @param enmClock The clock to use on this timer.
1866 * @param pfnCallback Callback function.
1867 * @param pvUser User pointer
1868 * @param pszDesc Pointer to description string which must stay around
1869 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1870 */
1871 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1872
1873 /**
1874 * Registers the device with the default PCI bus.
1875 *
1876 * @returns VBox status code.
1877 * @param pDevIns Device instance.
1878 * @param pPciDev The PCI device structure.
1879 * Any PCI enabled device must keep this in it's instance data!
1880 * Fill in the PCI data config before registration, please.
1881 * @remark This is the simple interface, a Ex interface will be created if
1882 * more features are needed later.
1883 */
1884 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1885
1886 /**
1887 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1888 *
1889 * @returns VBox status code.
1890 * @param pDevIns Device instance.
1891 * @param iRegion The region number.
1892 * @param cbRegion Size of the region.
1893 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1894 * @param pfnCallback Callback for doing the mapping.
1895 */
1896 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1897
1898 /**
1899 * Register PCI configuration space read/write callbacks.
1900 *
1901 * @param pDevIns Device instance.
1902 * @param pPciDev The PCI device structure.
1903 * If NULL the default PCI device for this device instance is used.
1904 * @param pfnRead Pointer to the user defined PCI config read function.
1905 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1906 * PCI config read function. This way, user can decide when (and if)
1907 * to call default PCI config read function. Can be NULL.
1908 * @param pfnWrite Pointer to the user defined PCI config write function.
1909 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1910 * PCI config write function. This way, user can decide when (and if)
1911 * to call default PCI config write function. Can be NULL.
1912 * @thread EMT
1913 */
1914 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1915 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1916
1917 /**
1918 * Set the IRQ for a PCI device.
1919 *
1920 * @param pDevIns Device instance.
1921 * @param iIrq IRQ number to set.
1922 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1923 * @thread Any thread, but will involve the emulation thread.
1924 */
1925 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1926
1927 /**
1928 * Set the IRQ for a PCI device, but don't wait for EMT to process
1929 * the request when not called from EMT.
1930 *
1931 * @param pDevIns Device instance.
1932 * @param iIrq IRQ number to set.
1933 * @param iLevel IRQ level.
1934 * @thread Any thread, but will involve the emulation thread.
1935 */
1936 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1937
1938 /**
1939 * Set ISA IRQ for a device.
1940 *
1941 * @param pDevIns Device instance.
1942 * @param iIrq IRQ number to set.
1943 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1944 * @thread Any thread, but will involve the emulation thread.
1945 */
1946 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1947
1948 /**
1949 * Set the ISA IRQ for a device, but don't wait for EMT to process
1950 * the request when not called from EMT.
1951 *
1952 * @param pDevIns Device instance.
1953 * @param iIrq IRQ number to set.
1954 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1955 * @thread Any thread, but will involve the emulation thread.
1956 */
1957 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1958
1959 /**
1960 * Attaches a driver (chain) to the device.
1961 *
1962 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1963 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1964 *
1965 * @returns VBox status code.
1966 * @param pDevIns Device instance.
1967 * @param iLun The logical unit to attach.
1968 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1969 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1970 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1971 * for the live of the device instance.
1972 */
1973 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1974
1975 /**
1976 * Allocate memory which is associated with current VM instance
1977 * and automatically freed on it's destruction.
1978 *
1979 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1980 * @param pDevIns Device instance.
1981 * @param cb Number of bytes to allocate.
1982 */
1983 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1984
1985 /**
1986 * Allocate memory which is associated with current VM instance
1987 * and automatically freed on it's destruction. The memory is ZEROed.
1988 *
1989 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1990 * @param pDevIns Device instance.
1991 * @param cb Number of bytes to allocate.
1992 */
1993 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1994
1995 /**
1996 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1997 *
1998 * @param pDevIns Device instance.
1999 * @param pv Pointer to the memory to free.
2000 */
2001 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2002
2003 /**
2004 * Set the VM error message
2005 *
2006 * @returns rc.
2007 * @param pDevIns Device instance.
2008 * @param rc VBox status code.
2009 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2010 * @param pszFormat Error message format string.
2011 * @param ... Error message arguments.
2012 */
2013 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2014
2015 /**
2016 * Set the VM error message
2017 *
2018 * @returns rc.
2019 * @param pDevIns Device instance.
2020 * @param rc VBox status code.
2021 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2022 * @param pszFormat Error message format string.
2023 * @param va Error message arguments.
2024 */
2025 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2026
2027 /**
2028 * Set the VM runtime error message
2029 *
2030 * @returns VBox status code.
2031 * @param pDevIns Device instance.
2032 * @param fFatal Whether it is a fatal error or not.
2033 * @param pszErrorID Error ID string.
2034 * @param pszFormat Error message format string.
2035 * @param ... Error message arguments.
2036 */
2037 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2038
2039 /**
2040 * Set the VM runtime error message
2041 *
2042 * @returns VBox status code.
2043 * @param pDevIns Device instance.
2044 * @param fFatal Whether it is a fatal error or not.
2045 * @param pszErrorID Error ID string.
2046 * @param pszFormat Error message format string.
2047 * @param va Error message arguments.
2048 */
2049 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2050
2051 /**
2052 * Assert that the current thread is the emulation thread.
2053 *
2054 * @returns True if correct.
2055 * @returns False if wrong.
2056 * @param pDevIns Device instance.
2057 * @param pszFile Filename of the assertion location.
2058 * @param iLine The linenumber of the assertion location.
2059 * @param pszFunction Function of the assertion location.
2060 */
2061 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2062
2063 /**
2064 * Assert that the current thread is NOT the emulation thread.
2065 *
2066 * @returns True if correct.
2067 * @returns False if wrong.
2068 * @param pDevIns Device instance.
2069 * @param pszFile Filename of the assertion location.
2070 * @param iLine The linenumber of the assertion location.
2071 * @param pszFunction Function of the assertion location.
2072 */
2073 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2074
2075 /**
2076 * Stops the VM and enters the debugger to look at the guest state.
2077 *
2078 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2079 * invoking this function directly.
2080 *
2081 * @returns VBox status code which must be passed up to the VMM.
2082 * @param pDevIns Device instance.
2083 * @param pszFile Filename of the assertion location.
2084 * @param iLine The linenumber of the assertion location.
2085 * @param pszFunction Function of the assertion location.
2086 * @param pszFormat Message. (optional)
2087 * @param args Message parameters.
2088 */
2089 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2090
2091 /**
2092 * Register a info handler with DBGF,
2093 *
2094 * @returns VBox status code.
2095 * @param pDevIns Device instance.
2096 * @param pszName The identifier of the info.
2097 * @param pszDesc The description of the info and any arguments the handler may take.
2098 * @param pfnHandler The handler function to be called to display the info.
2099 */
2100 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2101
2102 /**
2103 * Registers a statistics sample if statistics are enabled.
2104 *
2105 * @param pDevIns Device instance of the DMA.
2106 * @param pvSample Pointer to the sample.
2107 * @param enmType Sample type. This indicates what pvSample is pointing at.
2108 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2109 * Further nesting is possible.
2110 * @param enmUnit Sample unit.
2111 * @param pszDesc Sample description.
2112 */
2113 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2114
2115 /**
2116 * Same as pfnSTAMRegister except that the name is specified in a
2117 * RTStrPrintf like fashion.
2118 *
2119 * @returns VBox status.
2120 * @param pDevIns Device instance of the DMA.
2121 * @param pvSample Pointer to the sample.
2122 * @param enmType Sample type. This indicates what pvSample is pointing at.
2123 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2124 * @param enmUnit Sample unit.
2125 * @param pszDesc Sample description.
2126 * @param pszName The sample name format string.
2127 * @param ... Arguments to the format string.
2128 */
2129 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2130 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2131
2132 /**
2133 * Same as pfnSTAMRegister except that the name is specified in a
2134 * RTStrPrintfV like fashion.
2135 *
2136 * @returns VBox status.
2137 * @param pDevIns Device instance of the DMA.
2138 * @param pvSample Pointer to the sample.
2139 * @param enmType Sample type. This indicates what pvSample is pointing at.
2140 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2141 * @param enmUnit Sample unit.
2142 * @param pszDesc Sample description.
2143 * @param pszName The sample name format string.
2144 * @param args Arguments to the format string.
2145 */
2146 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2147 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2148
2149 /**
2150 * Register the RTC device.
2151 *
2152 * @returns VBox status code.
2153 * @param pDevIns Device instance.
2154 * @param pRtcReg Pointer to a RTC registration structure.
2155 * @param ppRtcHlp Where to store the pointer to the helper functions.
2156 */
2157 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2158
2159 /**
2160 * Create a queue.
2161 *
2162 * @returns VBox status code.
2163 * @param pDevIns The device instance.
2164 * @param cbItem The size of a queue item.
2165 * @param cItems The number of items in the queue.
2166 * @param cMilliesInterval The number of milliseconds between polling the queue.
2167 * If 0 then the emulation thread will be notified whenever an item arrives.
2168 * @param pfnCallback The consumer function.
2169 * @param fGCEnabled Set if the queue should work in GC too.
2170 * @param ppQueue Where to store the queue handle on success.
2171 * @thread The emulation thread.
2172 */
2173 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2174 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2175
2176 /**
2177 * Initializes a PDM critical section.
2178 *
2179 * The PDM critical sections are derived from the IPRT critical sections, but
2180 * works in GC as well.
2181 *
2182 * @returns VBox status code.
2183 * @param pDevIns Device instance.
2184 * @param pCritSect Pointer to the critical section.
2185 * @param pszName The name of the critical section (for statistics).
2186 */
2187 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2188
2189 /**
2190 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2191 *
2192 * @returns pTime.
2193 * @param pDevIns Device instance.
2194 * @param pTime Where to store the time.
2195 */
2196 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2197
2198 /**
2199 * Creates a PDM thread.
2200 *
2201 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2202 * resuming, and destroying the thread as the VM state changes.
2203 *
2204 * @returns VBox status code.
2205 * @param pDevIns The device instance.
2206 * @param ppThread Where to store the thread 'handle'.
2207 * @param pvUser The user argument to the thread function.
2208 * @param pfnThread The thread function.
2209 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2210 * a state change is pending.
2211 * @param cbStack See RTThreadCreate.
2212 * @param enmType See RTThreadCreate.
2213 * @param pszName See RTThreadCreate.
2214 */
2215 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2216 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2217
2218 /**
2219 * Convert a guest virtual address to a guest physical address.
2220 *
2221 * @returns VBox status code.
2222 * @param pDevIns Device instance.
2223 * @param GCPtr Guest virtual address.
2224 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2225 * @thread The emulation thread.
2226 * @remark Careful with page boundraries.
2227 */
2228 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2229
2230 /**
2231 * Gets the VM state.
2232 *
2233 * @returns VM state.
2234 * @param pDevIns The device instance.
2235 * @thread Any thread (just keep in mind that it's volatile info).
2236 */
2237 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2238
2239 /** Space reserved for future members.
2240 * @{ */
2241 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2242 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2243 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2244 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2245 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2246 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2247 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2248 /** @} */
2249
2250
2251 /** API available to trusted devices only.
2252 *
2253 * These APIs are providing unrestricted access to the guest and the VM,
2254 * or they are interacting intimately with PDM.
2255 *
2256 * @{
2257 */
2258 /**
2259 * Gets the VM handle. Restricted API.
2260 *
2261 * @returns VM Handle.
2262 * @param pDevIns Device instance.
2263 */
2264 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2265
2266 /**
2267 * Register the PCI Bus.
2268 *
2269 * @returns VBox status code.
2270 * @param pDevIns Device instance.
2271 * @param pPciBusReg Pointer to PCI bus registration structure.
2272 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2273 */
2274 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2275
2276 /**
2277 * Register the PIC device.
2278 *
2279 * @returns VBox status code.
2280 * @param pDevIns Device instance.
2281 * @param pPicReg Pointer to a PIC registration structure.
2282 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2283 */
2284 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2285
2286 /**
2287 * Register the APIC device.
2288 *
2289 * @returns VBox status code.
2290 * @param pDevIns Device instance.
2291 * @param pApicReg Pointer to a APIC registration structure.
2292 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2293 */
2294 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2295
2296 /**
2297 * Register the I/O APIC device.
2298 *
2299 * @returns VBox status code.
2300 * @param pDevIns Device instance.
2301 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2302 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2303 */
2304 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2305
2306 /**
2307 * Register the DMA device.
2308 *
2309 * @returns VBox status code.
2310 * @param pDevIns Device instance.
2311 * @param pDmacReg Pointer to a DMAC registration structure.
2312 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2313 */
2314 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2315
2316 /**
2317 * Read physical memory.
2318 *
2319 * @param pDevIns Device instance.
2320 * @param GCPhys Physical address start reading from.
2321 * @param pvBuf Where to put the read bits.
2322 * @param cbRead How many bytes to read.
2323 * @thread Any thread, but the call may involve the emulation thread.
2324 */
2325 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2326
2327 /**
2328 * Write to physical memory.
2329 *
2330 * @param pDevIns Device instance.
2331 * @param GCPhys Physical address to write to.
2332 * @param pvBuf What to write.
2333 * @param cbWrite How many bytes to write.
2334 * @thread Any thread, but the call may involve the emulation thread.
2335 */
2336 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2337
2338 /**
2339 * Read guest physical memory by virtual address.
2340 *
2341 * @param pDevIns Device instance.
2342 * @param pvDst Where to put the read bits.
2343 * @param GCVirtSrc Guest virtual address to start reading from.
2344 * @param cb How many bytes to read.
2345 * @thread The emulation thread.
2346 */
2347 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2348
2349 /**
2350 * Write to guest physical memory by virtual address.
2351 *
2352 * @param pDevIns Device instance.
2353 * @param GCVirtDst Guest virtual address to write to.
2354 * @param pvSrc What to write.
2355 * @param cb How many bytes to write.
2356 * @thread The emulation thread.
2357 */
2358 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2359
2360 /**
2361 * Reserve physical address space for ROM and MMIO ranges.
2362 *
2363 * @returns VBox status code.
2364 * @param pDevIns Device instance.
2365 * @param GCPhys Start physical address.
2366 * @param cbRange The size of the range.
2367 * @param pszDesc Description string.
2368 * @thread The emulation thread.
2369 */
2370 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2371
2372 /**
2373 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2374 *
2375 * @returns VBox status code.
2376 * @param pDevIns Device instance.
2377 * @param GCPhys Start physical address.
2378 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2379 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2380 * @thread The emulation thread.
2381 *
2382 * @remark Careful with page boundraries.
2383 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2384 */
2385 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2386
2387 /**
2388 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2389 *
2390 * @returns VBox status code.
2391 * @param pDevIns Device instance.
2392 * @param GCPtr Guest virtual address.
2393 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2394 * @thread The emulation thread.
2395 *
2396 * @remark Careful with page boundraries.
2397 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2398 */
2399 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2400
2401 /**
2402 * Checks if the Gate A20 is enabled or not.
2403 *
2404 * @returns true if A20 is enabled.
2405 * @returns false if A20 is disabled.
2406 * @param pDevIns Device instance.
2407 * @thread The emulation thread.
2408 */
2409 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2410
2411 /**
2412 * Enables or disables the Gate A20.
2413 *
2414 * @param pDevIns Device instance.
2415 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2416 * @thread The emulation thread.
2417 */
2418 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2419
2420 /**
2421 * Resets the VM.
2422 *
2423 * @returns The appropriate VBox status code to pass around on reset.
2424 * @param pDevIns Device instance.
2425 * @thread The emulation thread.
2426 */
2427 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2428
2429 /**
2430 * Suspends the VM.
2431 *
2432 * @returns The appropriate VBox status code to pass around on suspend.
2433 * @param pDevIns Device instance.
2434 * @thread The emulation thread.
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2437
2438 /**
2439 * Power off the VM.
2440 *
2441 * @returns The appropriate VBox status code to pass around on power off.
2442 * @param pDevIns Device instance.
2443 * @thread The emulation thread.
2444 */
2445 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2446
2447 /**
2448 * Acquire global VM lock
2449 *
2450 * @returns VBox status code
2451 * @param pDevIns Device instance.
2452 */
2453 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2454
2455 /**
2456 * Release global VM lock
2457 *
2458 * @returns VBox status code
2459 * @param pDevIns Device instance.
2460 */
2461 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2462
2463 /**
2464 * Check that the current thread owns the global VM lock.
2465 *
2466 * @returns boolean
2467 * @param pDevIns Device instance.
2468 * @param pszFile Filename of the assertion location.
2469 * @param iLine Linenumber of the assertion location.
2470 * @param pszFunction Function of the assertion location.
2471 */
2472 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2473
2474 /**
2475 * Register transfer function for DMA channel.
2476 *
2477 * @returns VBox status code.
2478 * @param pDevIns Device instance.
2479 * @param uChannel Channel number.
2480 * @param pfnTransferHandler Device specific transfer callback function.
2481 * @param pvUser User pointer to pass to the callback.
2482 * @thread EMT
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2485
2486 /**
2487 * Read memory.
2488 *
2489 * @returns VBox status code.
2490 * @param pDevIns Device instance.
2491 * @param uChannel Channel number.
2492 * @param pvBuffer Pointer to target buffer.
2493 * @param off DMA position.
2494 * @param cbBlock Block size.
2495 * @param pcbRead Where to store the number of bytes which was read. optional.
2496 * @thread EMT
2497 */
2498 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2499
2500 /**
2501 * Write memory.
2502 *
2503 * @returns VBox status code.
2504 * @param pDevIns Device instance.
2505 * @param uChannel Channel number.
2506 * @param pvBuffer Memory to write.
2507 * @param off DMA position.
2508 * @param cbBlock Block size.
2509 * @param pcbWritten Where to store the number of bytes which was written. optional.
2510 * @thread EMT
2511 */
2512 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2513
2514 /**
2515 * Set the DREQ line.
2516 *
2517 * @returns VBox status code.
2518 * @param pDevIns Device instance.
2519 * @param uChannel Channel number.
2520 * @param uLevel Level of the line.
2521 * @thread EMT
2522 */
2523 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2524
2525 /**
2526 * Get channel mode.
2527 *
2528 * @returns Channel mode. See specs.
2529 * @param pDevIns Device instance.
2530 * @param uChannel Channel number.
2531 * @thread EMT
2532 */
2533 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2534
2535 /**
2536 * Schedule DMA execution.
2537 *
2538 * @param pDevIns Device instance.
2539 * @thread Any thread.
2540 */
2541 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2542
2543 /**
2544 * Write CMOS value and update the checksum(s).
2545 *
2546 * @returns VBox status code.
2547 * @param pDevIns Device instance.
2548 * @param iReg The CMOS register index.
2549 * @param u8Value The CMOS register value.
2550 * @thread EMT
2551 */
2552 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2553
2554 /**
2555 * Read CMOS value.
2556 *
2557 * @returns VBox status code.
2558 * @param pDevIns Device instance.
2559 * @param iReg The CMOS register index.
2560 * @param pu8Value Where to store the CMOS register value.
2561 * @thread EMT
2562 */
2563 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2564
2565 /**
2566 * Query CPUID.
2567 *
2568 * @param pDevIns Device instance.
2569 * @param iLeaf The CPUID leaf to get.
2570 * @param pEax Where to store the EAX value.
2571 * @param pEbx Where to store the EBX value.
2572 * @param pEcx Where to store the ECX value.
2573 * @param pEdx Where to store the EDX value.
2574 */
2575 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2576
2577 /**
2578 * Write protects a shadow ROM mapping.
2579 *
2580 * This is intented for use by the system BIOS or by the device that
2581 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2582 * write protected once the POST is over.
2583 *
2584 * @param pDevIns Device instance.
2585 * @param GCPhysStart Where the shadow ROM mapping starts.
2586 * @param cbRange The size of the shadow ROM mapping.
2587 */
2588 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2589
2590 /**
2591 * Allocate and register a MMIO2 region.
2592 *
2593 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2594 * RAM associated with a device. It is also non-shared memory with a
2595 * permanent ring-3 mapping and page backing (presently).
2596 *
2597 * @returns VBox status.
2598 * @param pDevIns The device instance.
2599 * @param iRegion The region number. Use the PCI region number as
2600 * this must be known to the PCI bus device too. If it's not associated
2601 * with the PCI device, then any number up to UINT8_MAX is fine.
2602 * @param cb The size (in bytes) of the region.
2603 * @param fFlags Reserved for future use, must be zero.
2604 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2605 * @param pszDesc Pointer to description string. This must not be freed.
2606 * @thread EMT.
2607 */
2608 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2609
2610 /**
2611 * Deregisters and frees a MMIO2 region.
2612 *
2613 * Any physical (and virtual) access handlers registered for the region must
2614 * be deregistered before calling this function.
2615 *
2616 * @returns VBox status code.
2617 * @param pDevIns The device instance.
2618 * @param iRegion The region number used during registration.
2619 * @thread EMT.
2620 */
2621 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2622
2623 /**
2624 * Maps a MMIO2 region into the physical memory space.
2625 *
2626 * A MMIO2 range may overlap with base memory if a lot of RAM
2627 * is configured for the VM, in which case we'll drop the base
2628 * memory pages. Presently we will make no attempt to preserve
2629 * anything that happens to be present in the base memory that
2630 * is replaced, this is of course incorrectly but it's too much
2631 * effort.
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns The device instance.
2635 * @param iRegion The region number used during registration.
2636 * @param GCPhys The physical address to map it at.
2637 * @thread EMT.
2638 */
2639 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2640
2641 /**
2642 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2643 *
2644 * @returns VBox status code.
2645 * @param pDevIns The device instance.
2646 * @param iRegion The region number used during registration.
2647 * @param GCPhys The physical address it's currently mapped at.
2648 * @thread EMT.
2649 */
2650 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2651
2652 /**
2653 * Maps a portion of an MMIO2 region into the hypervisor region.
2654 *
2655 * Callers of this API must never deregister the MMIO2 region before the
2656 * VM is powered off.
2657 *
2658 * @return VBox status code.
2659 * @param pDevIns The device owning the MMIO2 memory.
2660 * @param iRegion The region.
2661 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2662 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2663 * @param pszDesc Mapping description.
2664 * @param pGCPtr Where to store the GC address.
2665 */
2666 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2667 const char *pszDesc, PRTGCPTR pGCPtr));
2668
2669 /** @} */
2670
2671 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2672 uint32_t u32TheEnd;
2673} PDMDEVHLP;
2674#endif /* !IN_RING3 */
2675/** Pointer PDM Device API. */
2676typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2677/** Pointer PDM Device API. */
2678typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2679
2680/** Current PDMDEVHLP version number. */
2681#define PDM_DEVHLP_VERSION 0xf2050002
2682
2683
2684/**
2685 * PDM Device API - GC Variant.
2686 */
2687typedef struct PDMDEVHLPGC
2688{
2689 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2690 uint32_t u32Version;
2691
2692 /**
2693 * Set the IRQ for a PCI device.
2694 *
2695 * @param pDevIns Device instance.
2696 * @param iIrq IRQ number to set.
2697 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2698 * @thread Any thread, but will involve the emulation thread.
2699 */
2700 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2701
2702 /**
2703 * Set ISA IRQ for a device.
2704 *
2705 * @param pDevIns Device instance.
2706 * @param iIrq IRQ number to set.
2707 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2708 * @thread Any thread, but will involve the emulation thread.
2709 */
2710 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2711
2712 /**
2713 * Read physical memory.
2714 *
2715 * @param pDevIns Device instance.
2716 * @param GCPhys Physical address start reading from.
2717 * @param pvBuf Where to put the read bits.
2718 * @param cbRead How many bytes to read.
2719 */
2720 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2721
2722 /**
2723 * Write to physical memory.
2724 *
2725 * @param pDevIns Device instance.
2726 * @param GCPhys Physical address to write to.
2727 * @param pvBuf What to write.
2728 * @param cbWrite How many bytes to write.
2729 */
2730 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2731
2732 /**
2733 * Checks if the Gate A20 is enabled or not.
2734 *
2735 * @returns true if A20 is enabled.
2736 * @returns false if A20 is disabled.
2737 * @param pDevIns Device instance.
2738 * @thread The emulation thread.
2739 */
2740 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2741
2742 /**
2743 * Set the VM error message
2744 *
2745 * @returns rc.
2746 * @param pDrvIns Driver instance.
2747 * @param rc VBox status code.
2748 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2749 * @param pszFormat Error message format string.
2750 * @param ... Error message arguments.
2751 */
2752 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2753
2754 /**
2755 * Set the VM error message
2756 *
2757 * @returns rc.
2758 * @param pDrvIns Driver instance.
2759 * @param rc VBox status code.
2760 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2761 * @param pszFormat Error message format string.
2762 * @param va Error message arguments.
2763 */
2764 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2765
2766 /**
2767 * Set the VM runtime error message
2768 *
2769 * @returns VBox status code.
2770 * @param pDevIns Device instance.
2771 * @param fFatal Whether it is a fatal error or not.
2772 * @param pszErrorID Error ID string.
2773 * @param pszFormat Error message format string.
2774 * @param ... Error message arguments.
2775 */
2776 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2777
2778 /**
2779 * Set the VM runtime error message
2780 *
2781 * @returns VBox status code.
2782 * @param pDevIns Device instance.
2783 * @param fFatal Whether it is a fatal error or not.
2784 * @param pszErrorID Error ID string.
2785 * @param pszFormat Error message format string.
2786 * @param va Error message arguments.
2787 */
2788 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2789
2790 /**
2791 * Set parameters for pending MMIO patch operation
2792 *
2793 * @returns VBox status code.
2794 * @param pDevIns Device instance.
2795 * @param GCPhys MMIO physical address
2796 * @param pCachedData GC pointer to cached data
2797 */
2798 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2799
2800 /** Just a safety precaution. */
2801 uint32_t u32TheEnd;
2802} PDMDEVHLPGC;
2803/** Pointer PDM Device GC API. */
2804typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2805/** Pointer PDM Device GC API. */
2806typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2807
2808/** Current PDMDEVHLP version number. */
2809#define PDM_DEVHLPGC_VERSION 0xfb010000
2810
2811
2812/**
2813 * PDM Device API - R0 Variant.
2814 */
2815typedef struct PDMDEVHLPR0
2816{
2817 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2818 uint32_t u32Version;
2819
2820 /**
2821 * Set the IRQ for a PCI device.
2822 *
2823 * @param pDevIns Device instance.
2824 * @param iIrq IRQ number to set.
2825 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2826 * @thread Any thread, but will involve the emulation thread.
2827 */
2828 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2829
2830 /**
2831 * Set ISA IRQ for a device.
2832 *
2833 * @param pDevIns Device instance.
2834 * @param iIrq IRQ number to set.
2835 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2836 * @thread Any thread, but will involve the emulation thread.
2837 */
2838 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2839
2840 /**
2841 * Read physical memory.
2842 *
2843 * @param pDevIns Device instance.
2844 * @param GCPhys Physical address start reading from.
2845 * @param pvBuf Where to put the read bits.
2846 * @param cbRead How many bytes to read.
2847 */
2848 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2849
2850 /**
2851 * Write to physical memory.
2852 *
2853 * @param pDevIns Device instance.
2854 * @param GCPhys Physical address to write to.
2855 * @param pvBuf What to write.
2856 * @param cbWrite How many bytes to write.
2857 */
2858 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2859
2860 /**
2861 * Checks if the Gate A20 is enabled or not.
2862 *
2863 * @returns true if A20 is enabled.
2864 * @returns false if A20 is disabled.
2865 * @param pDevIns Device instance.
2866 * @thread The emulation thread.
2867 */
2868 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2869
2870 /**
2871 * Set the VM error message
2872 *
2873 * @returns rc.
2874 * @param pDrvIns Driver instance.
2875 * @param rc VBox status code.
2876 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2877 * @param pszFormat Error message format string.
2878 * @param ... Error message arguments.
2879 */
2880 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2881
2882 /**
2883 * Set the VM error message
2884 *
2885 * @returns rc.
2886 * @param pDrvIns Driver instance.
2887 * @param rc VBox status code.
2888 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2889 * @param pszFormat Error message format string.
2890 * @param va Error message arguments.
2891 */
2892 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2893
2894 /**
2895 * Set the VM runtime error message
2896 *
2897 * @returns VBox status code.
2898 * @param pDevIns Device instance.
2899 * @param fFatal Whether it is a fatal error or not.
2900 * @param pszErrorID Error ID string.
2901 * @param pszFormat Error message format string.
2902 * @param ... Error message arguments.
2903 */
2904 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2905
2906 /**
2907 * Set the VM runtime error message
2908 *
2909 * @returns VBox status code.
2910 * @param pDevIns Device instance.
2911 * @param fFatal Whether it is a fatal error or not.
2912 * @param pszErrorID Error ID string.
2913 * @param pszFormat Error message format string.
2914 * @param va Error message arguments.
2915 */
2916 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2917
2918 /**
2919 * Set parameters for pending MMIO patch operation
2920 *
2921 * @returns rc.
2922 * @param pDevIns Device instance.
2923 * @param GCPhys MMIO physical address
2924 * @param pCachedData GC pointer to cached data
2925 */
2926 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2927
2928 /** Just a safety precaution. */
2929 uint32_t u32TheEnd;
2930} PDMDEVHLPR0;
2931/** Pointer PDM Device R0 API. */
2932typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2933/** Pointer PDM Device GC API. */
2934typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2935
2936/** Current PDMDEVHLP version number. */
2937#define PDM_DEVHLPR0_VERSION 0xfb010000
2938
2939
2940
2941/**
2942 * PDM Device Instance.
2943 */
2944typedef struct PDMDEVINS
2945{
2946 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2947 uint32_t u32Version;
2948 /** Device instance number. */
2949 RTUINT iInstance;
2950 /** The base interface of the device.
2951 * The device constructor initializes this if it has any
2952 * device level interfaces to export. To obtain this interface
2953 * call PDMR3QueryDevice(). */
2954 PDMIBASE IBase;
2955
2956 /** Internal data. */
2957 union
2958 {
2959#ifdef PDMDEVINSINT_DECLARED
2960 PDMDEVINSINT s;
2961#endif
2962 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2963 } Internal;
2964
2965 /** Pointer the HC PDM Device API. */
2966 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2967 /** Pointer the R0 PDM Device API. */
2968 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2969 /** Pointer to device registration structure. */
2970 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2971 /** Configuration handle. */
2972 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2973 /** Pointer to device instance data. */
2974 R3PTRTYPE(void *) pvInstanceDataR3;
2975 /** Pointer to device instance data. */
2976 R0PTRTYPE(void *) pvInstanceDataR0;
2977 /** Pointer the GC PDM Device API. */
2978 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2979 /** Pointer to device instance data. */
2980 GCPTRTYPE(void *) pvInstanceDataGC;
2981 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2982 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2983 /** Device instance data. The size of this area is defined
2984 * in the PDMDEVREG::cbInstanceData field. */
2985 char achInstanceData[8];
2986} PDMDEVINS;
2987
2988/** Current DEVREG version number. */
2989#define PDM_DEVINS_VERSION 0xf3010000
2990
2991/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2992#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2993
2994
2995/** @def PDMDEV_ASSERT_EMT
2996 * Assert that the current thread is the emulation thread.
2997 */
2998#ifdef VBOX_STRICT
2999# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3000#else
3001# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3002#endif
3003
3004/** @def PDMDEV_ASSERT_OTHER
3005 * Assert that the current thread is NOT the emulation thread.
3006 */
3007#ifdef VBOX_STRICT
3008# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3009#else
3010# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3011#endif
3012
3013/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3014 * Assert that the current thread is owner of the VM lock.
3015 */
3016#ifdef VBOX_STRICT
3017# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3018#else
3019# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3020#endif
3021
3022/** @def PDMDEV_SET_ERROR
3023 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3024 */
3025#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3026 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3027
3028/** @def PDMDEV_SET_RUNTIME_ERROR
3029 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3030 */
3031#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3032 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3033
3034/** @def PDMDEVINS_2_GCPTR
3035 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
3036 */
3037#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3038
3039/** @def PDMDEVINS_2_R3PTR
3040 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
3041 */
3042#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3043
3044/** @def PDMDEVINS_2_R0PTR
3045 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3046 */
3047#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3048
3049
3050/**
3051 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3052 *
3053 * @returns VBox status code which must be passed up to the VMM.
3054 * @param pDevIns Device instance.
3055 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3056 * @param pszFormat Message. (optional)
3057 * @param ... Message parameters.
3058 */
3059DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3060{
3061#ifdef VBOX_STRICT
3062# ifdef IN_RING3
3063 int rc;
3064 va_list args;
3065 va_start(args, pszFormat);
3066 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3067 va_end(args);
3068 return rc;
3069# else
3070 return VINF_EM_DBG_STOP;
3071# endif
3072#else
3073 return VINF_SUCCESS;
3074#endif
3075}
3076
3077
3078#ifdef IN_RING3
3079/**
3080 * @copydoc PDMDEVHLP::pfnIOPortRegister
3081 */
3082DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3083 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3084 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3085{
3086 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3087}
3088
3089/**
3090 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
3091 */
3092DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
3093 const char *pszOut, const char *pszIn, const char *pszOutStr,
3094 const char *pszInStr, const char *pszDesc)
3095{
3096 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3097}
3098
3099/**
3100 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
3101 */
3102DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3103 const char *pszOut, const char *pszIn, const char *pszOutStr,
3104 const char *pszInStr, const char *pszDesc)
3105{
3106 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3107}
3108
3109/**
3110 * @copydoc PDMDEVHLP::pfnMMIORegister
3111 */
3112DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3113 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3114 const char *pszDesc)
3115{
3116 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3117}
3118
3119/**
3120 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
3121 */
3122DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3123 const char *pszWrite, const char *pszRead, const char *pszFill)
3124{
3125 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3126}
3127
3128/**
3129 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3130 */
3131DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3132 const char *pszWrite, const char *pszRead, const char *pszFill)
3133{
3134 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3135}
3136
3137/**
3138 * @copydoc PDMDEVHLP::pfnROMRegister
3139 */
3140DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3141{
3142 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3143}
3144/**
3145 * @copydoc PDMDEVHLP::pfnROMProtectShadow
3146 */
3147DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3148{
3149 return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3150}
3151
3152/**
3153 * @copydoc PDMDEVHLP::pfnMMIO2Register
3154 */
3155DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3156{
3157 return pDevIns->pDevHlp->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3158}
3159
3160/**
3161 * @copydoc PDMDEVHLP::pfnMMIO2Deregister
3162 */
3163DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3164{
3165 return pDevIns->pDevHlp->pfnMMIO2Deregister(pDevIns, iRegion);
3166}
3167
3168/**
3169 * @copydoc PDMDEVHLP::pfnMMIO2Map
3170 */
3171DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3172{
3173 return pDevIns->pDevHlp->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3174}
3175
3176/**
3177 * @copydoc PDMDEVHLP::pfnMMIO2Unmap
3178 */
3179DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3180{
3181 return pDevIns->pDevHlp->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3182}
3183
3184/**
3185 * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
3186 */
3187DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3188 const char *pszDesc, PRTGCPTR pGCPtr)
3189{
3190 return pDevIns->pDevHlp->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pGCPtr);
3191}
3192
3193/**
3194 * @copydoc PDMDEVHLP::pfnSSMRegister
3195 */
3196DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3197 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3198 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3199{
3200 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3201 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3202 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3203}
3204
3205/**
3206 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3207 */
3208DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3209{
3210 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3211}
3212
3213/**
3214 * @copydoc PDMDEVHLP::pfnPCIRegister
3215 */
3216DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3217{
3218 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3219}
3220
3221/**
3222 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3223 */
3224DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3225{
3226 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3227}
3228
3229/**
3230 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3231 */
3232DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3233 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3234{
3235 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3236}
3237
3238/**
3239 * @copydoc PDMDEVHLP::pfnDriverAttach
3240 */
3241DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3242{
3243 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3244}
3245
3246/**
3247 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3248 */
3249DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3250{
3251 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3252}
3253
3254/**
3255 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3256 */
3257DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3258{
3259 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3260}
3261
3262/**
3263 * @copydoc PDMDEVHLP::pfnMMHeapFree
3264 */
3265DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3266{
3267 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3268}
3269
3270/**
3271 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3272 */
3273DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3274{
3275 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3276}
3277
3278/**
3279 * @copydoc PDMDEVHLP::pfnSTAMRegister
3280 */
3281DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3282{
3283 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3284}
3285
3286/**
3287 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3288 */
3289DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3290 const char *pszDesc, const char *pszName, ...)
3291{
3292 va_list va;
3293 va_start(va, pszName);
3294 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3295 va_end(va);
3296}
3297
3298/**
3299 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3300 */
3301DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3302 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3303{
3304 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3305}
3306
3307/**
3308 * @copydoc PDMDEVHLP::pfnCritSectInit
3309 */
3310DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3311{
3312 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3313}
3314
3315/**
3316 * @copydoc PDMDEVHLP::pfnUTCNow
3317 */
3318DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3319{
3320 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3321}
3322
3323/**
3324 * @copydoc PDMDEVHLP::pfnGetVM
3325 */
3326DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3327{
3328 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3329}
3330
3331/**
3332 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3333 */
3334DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3335{
3336 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3337}
3338
3339/**
3340 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3341 */
3342DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3343{
3344 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3345}
3346
3347/**
3348 * @copydoc PDMDEVHLP::pfnPhysReserve
3349 */
3350DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3351{
3352 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3353}
3354
3355/**
3356 * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
3357 */
3358DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3359{
3360 return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3361}
3362
3363/**
3364 * @copydoc PDMDEVHLP::pfnVMState
3365 */
3366DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3367{
3368 return pDevIns->pDevHlp->pfnVMState(pDevIns);
3369}
3370
3371/**
3372 * @copydoc PDMDEVHLP::pfnA20Set
3373 */
3374DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3375{
3376 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3377}
3378
3379/**
3380 * @copydoc PDMDEVHLP::pfnVMReset
3381 */
3382DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3383{
3384 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3385}
3386
3387/**
3388 * @copydoc PDMDEVHLP::pfnVMSuspend
3389 */
3390DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3391{
3392 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3393}
3394
3395/**
3396 * @copydoc PDMDEVHLP::pfnVMPowerOff
3397 */
3398DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3399{
3400 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3401}
3402
3403/**
3404 * @copydoc PDMDEVHLP::pfnDMARegister
3405 */
3406DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3407{
3408 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3409}
3410
3411/**
3412 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3413 */
3414DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3415{
3416 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3417}
3418
3419/**
3420 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3421 */
3422DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3423{
3424 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3425}
3426
3427/**
3428 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3429 */
3430DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3431{
3432 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3433}
3434
3435/**
3436 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3437 */
3438DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3439{
3440 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3441}
3442
3443/**
3444 * @copydoc PDMDEVHLP::pfnDMASchedule
3445 */
3446DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3447{
3448 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3449}
3450
3451/**
3452 * @copydoc PDMDEVHLP::pfnCMOSWrite
3453 */
3454DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3455{
3456 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3457}
3458
3459/**
3460 * @copydoc PDMDEVHLP::pfnCMOSRead
3461 */
3462DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3463{
3464 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3465}
3466
3467/**
3468 * @copydoc PDMDEVHLP::pfnGetCpuId
3469 */
3470DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3471{
3472 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3473}
3474
3475/**
3476 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3477 */
3478DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3479 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3480{
3481 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3482}
3483#endif /* IN_RING3 */
3484
3485
3486/**
3487 * @copydoc PDMDEVHLP::pfnPCISetIrq
3488 */
3489DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3490{
3491#ifdef IN_GC
3492 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3493#elif defined(IN_RING0)
3494 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3495#else
3496 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3497#endif
3498}
3499
3500/**
3501 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3502 */
3503DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3504{
3505#ifdef IN_GC
3506 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3507#elif defined(IN_RING0)
3508 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3509#else
3510 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3511#endif
3512}
3513
3514/**
3515 * @copydoc PDMDEVHLP::pfnISASetIrq
3516 */
3517DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3518{
3519#ifdef IN_GC
3520 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3521#elif defined(IN_RING0)
3522 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3523#else
3524 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3525#endif
3526}
3527
3528/**
3529 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3530 */
3531DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3532{
3533#ifdef IN_GC
3534 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3535#elif defined(IN_RING0)
3536 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3537#else
3538 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3539#endif
3540}
3541
3542/**
3543 * @copydoc PDMDEVHLP::pfnPhysRead
3544 */
3545DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3546{
3547#ifdef IN_GC
3548 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3549#elif defined(IN_RING0)
3550 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3551#else
3552 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3553#endif
3554}
3555
3556/**
3557 * @copydoc PDMDEVHLP::pfnPhysWrite
3558 */
3559DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3560{
3561#ifdef IN_GC
3562 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3563#elif defined(IN_RING0)
3564 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3565#else
3566 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3567#endif
3568}
3569
3570/**
3571 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3572 */
3573DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3574{
3575#ifdef IN_GC
3576 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3577#elif defined(IN_RING0)
3578 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3579#else
3580 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3581#endif
3582}
3583
3584/**
3585 * @copydoc PDMDEVHLP::pfnVMSetError
3586 */
3587DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3588{
3589 va_list va;
3590 va_start(va, pszFormat);
3591#ifdef IN_GC
3592 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3593#elif defined(IN_RING0)
3594 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3595#else
3596 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3597#endif
3598 va_end(va);
3599 return rc;
3600}
3601
3602/**
3603 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3604 */
3605DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3606{
3607 va_list va;
3608 int rc;
3609 va_start(va, pszFormat);
3610#ifdef IN_GC
3611 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3612#elif defined(IN_RING0)
3613 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3614#else
3615 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3616#endif
3617 va_end(va);
3618 return rc;
3619}
3620
3621
3622
3623/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3624typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3625
3626/**
3627 * Callbacks for VBoxDeviceRegister().
3628 */
3629typedef struct PDMDEVREGCB
3630{
3631 /** Interface version.
3632 * This is set to PDM_DEVREG_CB_VERSION. */
3633 uint32_t u32Version;
3634
3635 /**
3636 * Registers a device with the current VM instance.
3637 *
3638 * @returns VBox status code.
3639 * @param pCallbacks Pointer to the callback table.
3640 * @param pDevReg Pointer to the device registration record.
3641 * This data must be permanent and readonly.
3642 */
3643 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3644
3645 /**
3646 * Allocate memory which is associated with current VM instance
3647 * and automatically freed on it's destruction.
3648 *
3649 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3650 * @param pCallbacks Pointer to the callback table.
3651 * @param cb Number of bytes to allocate.
3652 */
3653 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3654} PDMDEVREGCB;
3655
3656/** Current version of the PDMDEVREGCB structure. */
3657#define PDM_DEVREG_CB_VERSION 0xf4010000
3658
3659
3660/**
3661 * The VBoxDevicesRegister callback function.
3662 *
3663 * PDM will invoke this function after loading a device module and letting
3664 * the module decide which devices to register and how to handle conflicts.
3665 *
3666 * @returns VBox status code.
3667 * @param pCallbacks Pointer to the callback table.
3668 * @param u32Version VBox version number.
3669 */
3670typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3671
3672/** @} */
3673
3674__END_DECLS
3675
3676#endif
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette