VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 10273

Last change on this file since 10273 was 10202, checked in by vboxsync, 16 years ago

removed VBOX_WITH_PDM_LOCK

  • Property svn:eol-style set to native
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File size: 134.6 KB
Line 
1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device Devices
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of guest context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
249 char szGCMod[32];
250 /** Name of guest context module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292} PDMDEVREG;
293/** Pointer to a PDM Device Structure. */
294typedef PDMDEVREG *PPDMDEVREG;
295/** Const pointer to a PDM Device Structure. */
296typedef PDMDEVREG const *PCPDMDEVREG;
297
298/** Current DEVREG version number. */
299#define PDM_DEVREG_VERSION 0xc0010000
300
301/** PDM Device Flags.
302 * @{ */
303/** This flag is used to indicate that the device has a GC component. */
304#define PDM_DEVREG_FLAGS_GC 0x00000001
305/** This flag is used to indicate that the device has a R0 component. */
306#define PDM_DEVREG_FLAGS_R0 0x00010000
307
308/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
309 * The bit count for the current host. */
310#if HC_ARCH_BITS == 32
311# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
312#elif HC_ARCH_BITS == 64
313# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
314#else
315# error Unsupported HC_ARCH_BITS value.
316#endif
317/** The host bit count mask. */
318#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
319
320/** The device support only 32-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
322/** The device support only 64-bit guests. */
323#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
324/** The device support both 32-bit & 64-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
326/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
327 * The guest bit count for the current compilation. */
328#if GC_ARCH_BITS == 32
329# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
330#elif GC_ARCH_BITS == 64
331# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
332#else
333# error Unsupported GC_ARCH_BITS value.
334#endif
335/** The guest bit count mask. */
336#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
337
338/** Indicates that the devices support PAE36 on a 32-bit guest. */
339#define PDM_DEVREG_FLAGS_PAE36 0x00000020
340/** @} */
341
342
343/** PDM Device Classes.
344 * The order is important, lower bit earlier instantiation.
345 * @{ */
346/** Architecture device. */
347#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
348/** Architecture BIOS device. */
349#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
350/** PCI bus brigde. */
351#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
352/** ISA bus brigde. */
353#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
354/** Input device (mouse, keyboard, joystick,..). */
355#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
356/** Interrupt controller (PIC). */
357#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
358/** Interval controoler (PIT). */
359#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
360/** RTC/CMOS. */
361#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
362/** DMA controller. */
363#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
364/** VMM Device. */
365#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
366/** Graphics device, like VGA. */
367#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
368/** Storage controller device. */
369#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
370/** Network interface controller. */
371#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
372/** Audio. */
373#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
374/** USB HIC. */
375#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
376/** ACPI. */
377#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
378/** Serial controller device. */
379#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
380/** Parallel controller device */
381#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
382/** Misc devices (always last). */
383#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
384/** @} */
385
386
387/** @name IRQ Level for use with the *SetIrq APIs.
388 * @{
389 */
390/** Assert the IRQ (can assume value 1). */
391#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
392/** Deassert the IRQ (can assume value 0). */
393#define PDM_IRQ_LEVEL_LOW 0
394/** flip-flop - assert and then deassert it again immediately. */
395#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
396/** @} */
397
398
399/**
400 * PCI Bus registration structure.
401 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
402 */
403typedef struct PDMPCIBUSREG
404{
405 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
406 uint32_t u32Version;
407
408 /**
409 * Registers the device with the default PCI bus.
410 *
411 * @returns VBox status code.
412 * @param pDevIns Device instance of the PCI Bus.
413 * @param pPciDev The PCI device structure.
414 * Any PCI enabled device must keep this in it's instance data!
415 * Fill in the PCI data config before registration, please.
416 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
417 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
418 * If negative, the pci bus device will assign one.
419 */
420 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
421
422 /**
423 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
424 *
425 * @returns VBox status code.
426 * @param pDevIns Device instance of the PCI Bus.
427 * @param pPciDev The PCI device structure.
428 * @param iRegion The region number.
429 * @param cbRegion Size of the region.
430 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
431 * @param pfnCallback Callback for doing the mapping.
432 */
433 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
434
435 /**
436 * Register PCI configuration space read/write callbacks.
437 *
438 * @param pDevIns Device instance of the PCI Bus.
439 * @param pPciDev The PCI device structure.
440 * @param pfnRead Pointer to the user defined PCI config read function.
441 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
442 * PCI config read function. This way, user can decide when (and if)
443 * to call default PCI config read function. Can be NULL.
444 * @param pfnWrite Pointer to the user defined PCI config write function.
445 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
446 * PCI config write function. This way, user can decide when (and if)
447 * to call default PCI config write function. Can be NULL.
448 * @thread EMT
449 */
450 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
451 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
452
453 /**
454 * Set the IRQ for a PCI device.
455 *
456 * @param pDevIns Device instance of the PCI Bus.
457 * @param pPciDev The PCI device structure.
458 * @param iIrq IRQ number to set.
459 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
460 */
461 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
462
463 /**
464 * Saves a state of the PCI device.
465 *
466 * @returns VBox status code.
467 * @param pDevIns Device instance of the PCI Bus.
468 * @param pPciDev Pointer to PCI device.
469 * @param pSSMHandle The handle to save the state to.
470 */
471 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
472
473 /**
474 * Loads a saved PCI device state.
475 *
476 * @returns VBox status code.
477 * @param pDevIns Device instance of the PCI Bus.
478 * @param pPciDev Pointer to PCI device.
479 * @param pSSMHandle The handle to the saved state.
480 */
481 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
482
483 /**
484 * Called to perform the job of the bios.
485 * This is only called for the first PCI Bus - it is expected to
486 * service all the PCI buses.
487 *
488 * @returns VBox status.
489 * @param pDevIns Device instance of the first bus.
490 */
491 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
492
493 /** The name of the SetIrq GC entry point. */
494 const char *pszSetIrqGC;
495
496 /** The name of the SetIrq R0 entry point. */
497 const char *pszSetIrqR0;
498
499} PDMPCIBUSREG;
500/** Pointer to a PCI bus registration structure. */
501typedef PDMPCIBUSREG *PPDMPCIBUSREG;
502
503/** Current PDMPCIBUSREG version number. */
504#define PDM_PCIBUSREG_VERSION 0xd0020000
505
506/**
507 * PCI Bus GC helpers.
508 */
509typedef struct PDMPCIHLPGC
510{
511 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
512 uint32_t u32Version;
513
514 /**
515 * Set an ISA IRQ.
516 *
517 * @param pDevIns PCI device instance.
518 * @param iIrq IRQ number to set.
519 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
520 * @thread EMT only.
521 */
522 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
523
524 /**
525 * Set an I/O-APIC IRQ.
526 *
527 * @param pDevIns PCI device instance.
528 * @param iIrq IRQ number to set.
529 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
530 * @thread EMT only.
531 */
532 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
533
534 /**
535 * Acquires the PDM lock.
536 *
537 * @returns VINF_SUCCESS on success.
538 * @returns rc if we failed to acquire the lock.
539 * @param pDevIns The PCI device instance.
540 * @param rc What to return if we fail to acquire the lock.
541 */
542 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
543
544 /**
545 * Releases the PDM lock.
546 *
547 * @param pDevIns The PCI device instance.
548 */
549 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
550
551 /** Just a safety precaution. */
552 uint32_t u32TheEnd;
553} PDMPCIHLPGC;
554/** Pointer to PCI helpers. */
555typedef RCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
556/** Pointer to const PCI helpers. */
557typedef RCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
558
559/** Current PDMPCIHLPR3 version number. */
560#define PDM_PCIHLPGC_VERSION 0xe1010000
561
562
563/**
564 * PCI Bus R0 helpers.
565 */
566typedef struct PDMPCIHLPR0
567{
568 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
569 uint32_t u32Version;
570
571 /**
572 * Set an ISA IRQ.
573 *
574 * @param pDevIns PCI device instance.
575 * @param iIrq IRQ number to set.
576 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
577 * @thread EMT only.
578 */
579 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
580
581 /**
582 * Set an I/O-APIC IRQ.
583 *
584 * @param pDevIns PCI device instance.
585 * @param iIrq IRQ number to set.
586 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
587 * @thread EMT only.
588 */
589 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
590
591 /**
592 * Acquires the PDM lock.
593 *
594 * @returns VINF_SUCCESS on success.
595 * @returns rc if we failed to acquire the lock.
596 * @param pDevIns The PCI device instance.
597 * @param rc What to return if we fail to acquire the lock.
598 */
599 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
600
601 /**
602 * Releases the PDM lock.
603 *
604 * @param pDevIns The PCI device instance.
605 */
606 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
607
608 /** Just a safety precaution. */
609 uint32_t u32TheEnd;
610} PDMPCIHLPR0;
611/** Pointer to PCI helpers. */
612typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
613/** Pointer to const PCI helpers. */
614typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
615
616/** Current PDMPCIHLPR0 version number. */
617#define PDM_PCIHLPR0_VERSION 0xe1010000
618
619/**
620 * PCI device helpers.
621 */
622typedef struct PDMPCIHLPR3
623{
624 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
625 uint32_t u32Version;
626
627 /**
628 * Set an ISA IRQ.
629 *
630 * @param pDevIns The PCI device instance.
631 * @param iIrq IRQ number to set.
632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
633 * @thread EMT only.
634 */
635 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
636
637 /**
638 * Set an I/O-APIC IRQ.
639 *
640 * @param pDevIns The PCI device instance.
641 * @param iIrq IRQ number to set.
642 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
643 * @thread EMT only.
644 */
645 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
646
647 /**
648 * Checks if the given address is an MMIO2 base address or not.
649 *
650 * @returns true/false accordingly.
651 * @param pDevIns The PCI device instance.
652 * @param pOwner The owner of the memory, optional.
653 * @param GCPhys The address to check.
654 */
655 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
656
657 /**
658 * Gets the address of the GC PCI Bus helpers.
659 *
660 * This should be called at both construction and relocation time
661 * to obtain the correct address of the GC helpers.
662 *
663 * @returns GC pointer to the PCI Bus helpers.
664 * @param pDevIns Device instance of the PCI Bus.
665 * @thread EMT only.
666 */
667 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
668
669 /**
670 * Gets the address of the R0 PCI Bus helpers.
671 *
672 * This should be called at both construction and relocation time
673 * to obtain the correct address of the GC helpers.
674 *
675 * @returns R0 pointer to the PCI Bus helpers.
676 * @param pDevIns Device instance of the PCI Bus.
677 * @thread EMT only.
678 */
679 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
680
681 /**
682 * Acquires the PDM lock.
683 *
684 * @returns VINF_SUCCESS on success.
685 * @returns Fatal error on failure.
686 * @param pDevIns The PCI device instance.
687 * @param rc Dummy for making the interface identical to the GC and R0 versions.
688 */
689 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
690
691 /**
692 * Releases the PDM lock.
693 *
694 * @param pDevIns The PCI device instance.
695 */
696 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
697
698 /** Just a safety precaution. */
699 uint32_t u32TheEnd;
700} PDMPCIHLPR3;
701/** Pointer to PCI helpers. */
702typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
703/** Pointer to const PCI helpers. */
704typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
705
706/** Current PDMPCIHLPR3 version number. */
707#define PDM_PCIHLPR3_VERSION 0xf1020000
708
709
710/**
711 * Programmable Interrupt Controller registration structure.
712 */
713typedef struct PDMPICREG
714{
715 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
716 uint32_t u32Version;
717
718 /**
719 * Set the an IRQ.
720 *
721 * @param pDevIns Device instance of the PIC.
722 * @param iIrq IRQ number to set.
723 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
724 */
725 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
726
727 /**
728 * Get a pending interrupt.
729 *
730 * @returns Pending interrupt number.
731 * @param pDevIns Device instance of the PIC.
732 */
733 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
734
735 /** The name of the GC SetIrq entry point. */
736 const char *pszSetIrqGC;
737 /** The name of the GC GetInterrupt entry point. */
738 const char *pszGetInterruptGC;
739
740 /** The name of the R0 SetIrq entry point. */
741 const char *pszSetIrqR0;
742 /** The name of the R0 GetInterrupt entry point. */
743 const char *pszGetInterruptR0;
744} PDMPICREG;
745/** Pointer to a PIC registration structure. */
746typedef PDMPICREG *PPDMPICREG;
747
748/** Current PDMPICREG version number. */
749#define PDM_PICREG_VERSION 0xe0020000
750
751/**
752 * PIC GC helpers.
753 */
754typedef struct PDMPICHLPGC
755{
756 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
757 uint32_t u32Version;
758
759 /**
760 * Set the interrupt force action flag.
761 *
762 * @param pDevIns Device instance of the PIC.
763 */
764 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
765
766 /**
767 * Clear the interrupt force action flag.
768 *
769 * @param pDevIns Device instance of the PIC.
770 */
771 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
772
773 /**
774 * Acquires the PDM lock.
775 *
776 * @returns VINF_SUCCESS on success.
777 * @returns rc if we failed to acquire the lock.
778 * @param pDevIns The PIC device instance.
779 * @param rc What to return if we fail to acquire the lock.
780 */
781 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
782
783 /**
784 * Releases the PDM lock.
785 *
786 * @param pDevIns The PIC device instance.
787 */
788 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
789
790 /** Just a safety precaution. */
791 uint32_t u32TheEnd;
792} PDMPICHLPGC;
793
794/** Pointer to PIC GC helpers. */
795typedef RCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
796/** Pointer to const PIC GC helpers. */
797typedef RCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
798
799/** Current PDMPICHLPGC version number. */
800#define PDM_PICHLPGC_VERSION 0xfc010000
801
802
803/**
804 * PIC R0 helpers.
805 */
806typedef struct PDMPICHLPR0
807{
808 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
809 uint32_t u32Version;
810
811 /**
812 * Set the interrupt force action flag.
813 *
814 * @param pDevIns Device instance of the PIC.
815 */
816 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
817
818 /**
819 * Clear the interrupt force action flag.
820 *
821 * @param pDevIns Device instance of the PIC.
822 */
823 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
824
825 /**
826 * Acquires the PDM lock.
827 *
828 * @returns VINF_SUCCESS on success.
829 * @returns rc if we failed to acquire the lock.
830 * @param pDevIns The PIC device instance.
831 * @param rc What to return if we fail to acquire the lock.
832 */
833 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
834
835 /**
836 * Releases the PDM lock.
837 *
838 * @param pDevIns The PCI device instance.
839 */
840 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
841
842 /** Just a safety precaution. */
843 uint32_t u32TheEnd;
844} PDMPICHLPR0;
845
846/** Pointer to PIC R0 helpers. */
847typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
848/** Pointer to const PIC R0 helpers. */
849typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
850
851/** Current PDMPICHLPR0 version number. */
852#define PDM_PICHLPR0_VERSION 0xfc010000
853
854/**
855 * PIC HC helpers.
856 */
857typedef struct PDMPICHLPR3
858{
859 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
860 uint32_t u32Version;
861
862 /**
863 * Set the interrupt force action flag.
864 *
865 * @param pDevIns Device instance of the PIC.
866 */
867 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
868
869 /**
870 * Clear the interrupt force action flag.
871 *
872 * @param pDevIns Device instance of the PIC.
873 */
874 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
875
876 /**
877 * Acquires the PDM lock.
878 *
879 * @returns VINF_SUCCESS on success.
880 * @returns Fatal error on failure.
881 * @param pDevIns The PIC device instance.
882 * @param rc Dummy for making the interface identical to the GC and R0 versions.
883 */
884 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
885
886 /**
887 * Releases the PDM lock.
888 *
889 * @param pDevIns The PIC device instance.
890 */
891 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
892
893 /**
894 * Gets the address of the GC PIC helpers.
895 *
896 * This should be called at both construction and relocation time
897 * to obtain the correct address of the GC helpers.
898 *
899 * @returns GC pointer to the PIC helpers.
900 * @param pDevIns Device instance of the PIC.
901 */
902 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
903
904 /**
905 * Gets the address of the R0 PIC helpers.
906 *
907 * This should be called at both construction and relocation time
908 * to obtain the correct address of the GC helpers.
909 *
910 * @returns R0 pointer to the PIC helpers.
911 * @param pDevIns Device instance of the PIC.
912 */
913 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPR3;
918
919/** Pointer to PIC HC helpers. */
920typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
921/** Pointer to const PIC HC helpers. */
922typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
923
924/** Current PDMPICHLPR3 version number. */
925#define PDM_PICHLPR3_VERSION 0xf0010000
926
927
928
929/**
930 * Advanced Programmable Interrupt Controller registration structure.
931 */
932typedef struct PDMAPICREG
933{
934 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
935 uint32_t u32Version;
936
937 /**
938 * Get a pending interrupt.
939 *
940 * @returns Pending interrupt number.
941 * @param pDevIns Device instance of the APIC.
942 */
943 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
944
945 /**
946 * Set the APIC base.
947 *
948 * @param pDevIns Device instance of the APIC.
949 * @param u64Base The new base.
950 */
951 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
952
953 /**
954 * Get the APIC base.
955 *
956 * @returns Current base.
957 * @param pDevIns Device instance of the APIC.
958 */
959 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
960
961 /**
962 * Set the TPR (task priority register?).
963 *
964 * @param pDevIns Device instance of the APIC.
965 * @param u8TPR The new TPR.
966 */
967 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
968
969 /**
970 * Get the TPR (task priority register?).
971 *
972 * @returns The current TPR.
973 * @param pDevIns Device instance of the APIC.
974 */
975 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
976
977 /**
978 * Private interface between the IOAPIC and APIC.
979 *
980 * This is a low-level, APIC/IOAPIC implementation specific interface
981 * which is registered with PDM only because it makes life so much
982 * simpler right now (GC bits). This is a bad bad hack! The correct
983 * way of doing this would involve some way of querying GC interfaces
984 * and relocating them. Perhaps doing some kind of device init in GC...
985 *
986 * @returns The current TPR.
987 * @param pDevIns Device instance of the APIC.
988 * @param u8Dest See APIC implementation.
989 * @param u8DestMode See APIC implementation.
990 * @param u8DeliveryMode See APIC implementation.
991 * @param iVector See APIC implementation.
992 * @param u8Polarity See APIC implementation.
993 * @param u8TriggerMode See APIC implementation.
994 */
995 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
996 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
997
998 /** The name of the GC GetInterrupt entry point. */
999 const char *pszGetInterruptGC;
1000 /** The name of the GC SetBase entry point. */
1001 const char *pszSetBaseGC;
1002 /** The name of the GC GetBase entry point. */
1003 const char *pszGetBaseGC;
1004 /** The name of the GC SetTPR entry point. */
1005 const char *pszSetTPRGC;
1006 /** The name of the GC GetTPR entry point. */
1007 const char *pszGetTPRGC;
1008 /** The name of the GC BusDeliver entry point. */
1009 const char *pszBusDeliverGC;
1010
1011 /** The name of the R0 GetInterrupt entry point. */
1012 const char *pszGetInterruptR0;
1013 /** The name of the R0 SetBase entry point. */
1014 const char *pszSetBaseR0;
1015 /** The name of the R0 GetBase entry point. */
1016 const char *pszGetBaseR0;
1017 /** The name of the R0 SetTPR entry point. */
1018 const char *pszSetTPRR0;
1019 /** The name of the R0 GetTPR entry point. */
1020 const char *pszGetTPRR0;
1021 /** The name of the R0 BusDeliver entry point. */
1022 const char *pszBusDeliverR0;
1023
1024} PDMAPICREG;
1025/** Pointer to an APIC registration structure. */
1026typedef PDMAPICREG *PPDMAPICREG;
1027
1028/** Current PDMAPICREG version number. */
1029#define PDM_APICREG_VERSION 0x70010000
1030
1031
1032/**
1033 * APIC GC helpers.
1034 */
1035typedef struct PDMAPICHLPGC
1036{
1037 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1038 uint32_t u32Version;
1039
1040 /**
1041 * Set the interrupt force action flag.
1042 *
1043 * @param pDevIns Device instance of the APIC.
1044 */
1045 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1046
1047 /**
1048 * Clear the interrupt force action flag.
1049 *
1050 * @param pDevIns Device instance of the APIC.
1051 */
1052 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1053
1054 /**
1055 * Sets or clears the APIC bit in the CPUID feature masks.
1056 *
1057 * @param pDevIns Device instance of the APIC.
1058 * @param fEnabled If true the bit is set, else cleared.
1059 */
1060 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1061
1062 /**
1063 * Acquires the PDM lock.
1064 *
1065 * @returns VINF_SUCCESS on success.
1066 * @returns rc if we failed to acquire the lock.
1067 * @param pDevIns The APIC device instance.
1068 * @param rc What to return if we fail to acquire the lock.
1069 */
1070 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1071
1072 /**
1073 * Releases the PDM lock.
1074 *
1075 * @param pDevIns The APIC device instance.
1076 */
1077 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1078
1079 /** Just a safety precaution. */
1080 uint32_t u32TheEnd;
1081} PDMAPICHLPGC;
1082/** Pointer to APIC GC helpers. */
1083typedef RCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1084/** Pointer to const APIC helpers. */
1085typedef RCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1086
1087/** Current PDMAPICHLPGC version number. */
1088#define PDM_APICHLPGC_VERSION 0x60010000
1089
1090
1091/**
1092 * APIC R0 helpers.
1093 */
1094typedef struct PDMAPICHLPR0
1095{
1096 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1097 uint32_t u32Version;
1098
1099 /**
1100 * Set the interrupt force action flag.
1101 *
1102 * @param pDevIns Device instance of the APIC.
1103 */
1104 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1105
1106 /**
1107 * Clear the interrupt force action flag.
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 */
1111 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1112
1113 /**
1114 * Sets or clears the APIC bit in the CPUID feature masks.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 * @param fEnabled If true the bit is set, else cleared.
1118 */
1119 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1120
1121 /**
1122 * Acquires the PDM lock.
1123 *
1124 * @returns VINF_SUCCESS on success.
1125 * @returns rc if we failed to acquire the lock.
1126 * @param pDevIns The APIC device instance.
1127 * @param rc What to return if we fail to acquire the lock.
1128 */
1129 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1130
1131 /**
1132 * Releases the PDM lock.
1133 *
1134 * @param pDevIns The APIC device instance.
1135 */
1136 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1137
1138 /** Just a safety precaution. */
1139 uint32_t u32TheEnd;
1140} PDMAPICHLPR0;
1141/** Pointer to APIC GC helpers. */
1142typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1143/** Pointer to const APIC helpers. */
1144typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1145
1146/** Current PDMAPICHLPR0 version number. */
1147#define PDM_APICHLPR0_VERSION 0x60010000
1148
1149/**
1150 * APIC HC helpers.
1151 */
1152typedef struct PDMAPICHLPR3
1153{
1154 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1155 uint32_t u32Version;
1156
1157 /**
1158 * Set the interrupt force action flag.
1159 *
1160 * @param pDevIns Device instance of the APIC.
1161 */
1162 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1163
1164 /**
1165 * Clear the interrupt force action flag.
1166 *
1167 * @param pDevIns Device instance of the APIC.
1168 */
1169 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1170
1171 /**
1172 * Sets or clears the APIC bit in the CPUID feature masks.
1173 *
1174 * @param pDevIns Device instance of the APIC.
1175 * @param fEnabled If true the bit is set, else cleared.
1176 */
1177 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1178
1179 /**
1180 * Acquires the PDM lock.
1181 *
1182 * @returns VINF_SUCCESS on success.
1183 * @returns Fatal error on failure.
1184 * @param pDevIns The APIC device instance.
1185 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1186 */
1187 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1188
1189 /**
1190 * Releases the PDM lock.
1191 *
1192 * @param pDevIns The APIC device instance.
1193 */
1194 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1195
1196 /**
1197 * Gets the address of the GC APIC helpers.
1198 *
1199 * This should be called at both construction and relocation time
1200 * to obtain the correct address of the GC helpers.
1201 *
1202 * @returns GC pointer to the APIC helpers.
1203 * @param pDevIns Device instance of the APIC.
1204 */
1205 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1206
1207 /**
1208 * Gets the address of the R0 APIC helpers.
1209 *
1210 * This should be called at both construction and relocation time
1211 * to obtain the correct address of the R0 helpers.
1212 *
1213 * @returns R0 pointer to the APIC helpers.
1214 * @param pDevIns Device instance of the APIC.
1215 */
1216 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1217
1218 /** Just a safety precaution. */
1219 uint32_t u32TheEnd;
1220} PDMAPICHLPR3;
1221/** Pointer to APIC helpers. */
1222typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1223/** Pointer to const APIC helpers. */
1224typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1225
1226/** Current PDMAPICHLP version number. */
1227#define PDM_APICHLPR3_VERSION 0xfd010000
1228
1229
1230/**
1231 * I/O APIC registration structure.
1232 */
1233typedef struct PDMIOAPICREG
1234{
1235 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1236 uint32_t u32Version;
1237
1238 /**
1239 * Set the an IRQ.
1240 *
1241 * @param pDevIns Device instance of the I/O APIC.
1242 * @param iIrq IRQ number to set.
1243 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1244 */
1245 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1246
1247 /** The name of the GC SetIrq entry point. */
1248 const char *pszSetIrqGC;
1249
1250 /** The name of the R0 SetIrq entry point. */
1251 const char *pszSetIrqR0;
1252} PDMIOAPICREG;
1253/** Pointer to an APIC registration structure. */
1254typedef PDMIOAPICREG *PPDMIOAPICREG;
1255
1256/** Current PDMAPICREG version number. */
1257#define PDM_IOAPICREG_VERSION 0x50010000
1258
1259
1260/**
1261 * IOAPIC GC helpers.
1262 */
1263typedef struct PDMIOAPICHLPGC
1264{
1265 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1266 uint32_t u32Version;
1267
1268 /**
1269 * Private interface between the IOAPIC and APIC.
1270 *
1271 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1272 *
1273 * @returns The current TPR.
1274 * @param pDevIns Device instance of the IOAPIC.
1275 * @param u8Dest See APIC implementation.
1276 * @param u8DestMode See APIC implementation.
1277 * @param u8DeliveryMode See APIC implementation.
1278 * @param iVector See APIC implementation.
1279 * @param u8Polarity See APIC implementation.
1280 * @param u8TriggerMode See APIC implementation.
1281 */
1282 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1283 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1284
1285 /**
1286 * Acquires the PDM lock.
1287 *
1288 * @returns VINF_SUCCESS on success.
1289 * @returns rc if we failed to acquire the lock.
1290 * @param pDevIns The IOAPIC device instance.
1291 * @param rc What to return if we fail to acquire the lock.
1292 */
1293 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1294
1295 /**
1296 * Releases the PDM lock.
1297 *
1298 * @param pDevIns The IOAPIC device instance.
1299 */
1300 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1301
1302 /** Just a safety precaution. */
1303 uint32_t u32TheEnd;
1304} PDMIOAPICHLPGC;
1305/** Pointer to IOAPIC GC helpers. */
1306typedef RCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1307/** Pointer to const IOAPIC helpers. */
1308typedef RCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1309
1310/** Current PDMIOAPICHLPGC version number. */
1311#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1312
1313
1314/**
1315 * IOAPIC R0 helpers.
1316 */
1317typedef struct PDMIOAPICHLPR0
1318{
1319 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1320 uint32_t u32Version;
1321
1322 /**
1323 * Private interface between the IOAPIC and APIC.
1324 *
1325 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1326 *
1327 * @returns The current TPR.
1328 * @param pDevIns Device instance of the IOAPIC.
1329 * @param u8Dest See APIC implementation.
1330 * @param u8DestMode See APIC implementation.
1331 * @param u8DeliveryMode See APIC implementation.
1332 * @param iVector See APIC implementation.
1333 * @param u8Polarity See APIC implementation.
1334 * @param u8TriggerMode See APIC implementation.
1335 */
1336 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1337 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1338
1339 /**
1340 * Acquires the PDM lock.
1341 *
1342 * @returns VINF_SUCCESS on success.
1343 * @returns rc if we failed to acquire the lock.
1344 * @param pDevIns The IOAPIC device instance.
1345 * @param rc What to return if we fail to acquire the lock.
1346 */
1347 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1348
1349 /**
1350 * Releases the PDM lock.
1351 *
1352 * @param pDevIns The IOAPIC device instance.
1353 */
1354 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1355
1356 /** Just a safety precaution. */
1357 uint32_t u32TheEnd;
1358} PDMIOAPICHLPR0;
1359/** Pointer to IOAPIC R0 helpers. */
1360typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1361/** Pointer to const IOAPIC helpers. */
1362typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1363
1364/** Current PDMIOAPICHLPR0 version number. */
1365#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1366
1367/**
1368 * IOAPIC HC helpers.
1369 */
1370typedef struct PDMIOAPICHLPR3
1371{
1372 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1373 uint32_t u32Version;
1374
1375 /**
1376 * Private interface between the IOAPIC and APIC.
1377 *
1378 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1379 *
1380 * @returns The current TPR.
1381 * @param pDevIns Device instance of the IOAPIC.
1382 * @param u8Dest See APIC implementation.
1383 * @param u8DestMode See APIC implementation.
1384 * @param u8DeliveryMode See APIC implementation.
1385 * @param iVector See APIC implementation.
1386 * @param u8Polarity See APIC implementation.
1387 * @param u8TriggerMode See APIC implementation.
1388 */
1389 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1390 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1391
1392 /**
1393 * Acquires the PDM lock.
1394 *
1395 * @returns VINF_SUCCESS on success.
1396 * @returns Fatal error on failure.
1397 * @param pDevIns The IOAPIC device instance.
1398 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1399 */
1400 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1401
1402 /**
1403 * Releases the PDM lock.
1404 *
1405 * @param pDevIns The IOAPIC device instance.
1406 */
1407 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1408
1409 /**
1410 * Gets the address of the GC IOAPIC helpers.
1411 *
1412 * This should be called at both construction and relocation time
1413 * to obtain the correct address of the GC helpers.
1414 *
1415 * @returns GC pointer to the IOAPIC helpers.
1416 * @param pDevIns Device instance of the IOAPIC.
1417 */
1418 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1419
1420 /**
1421 * Gets the address of the R0 IOAPIC helpers.
1422 *
1423 * This should be called at both construction and relocation time
1424 * to obtain the correct address of the R0 helpers.
1425 *
1426 * @returns R0 pointer to the IOAPIC helpers.
1427 * @param pDevIns Device instance of the IOAPIC.
1428 */
1429 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1430
1431 /** Just a safety precaution. */
1432 uint32_t u32TheEnd;
1433} PDMIOAPICHLPR3;
1434/** Pointer to IOAPIC HC helpers. */
1435typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1436/** Pointer to const IOAPIC helpers. */
1437typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1438
1439/** Current PDMIOAPICHLPR3 version number. */
1440#define PDM_IOAPICHLPR3_VERSION 0xff010000
1441
1442
1443
1444#ifdef IN_RING3
1445
1446/**
1447 * DMA Transfer Handler.
1448 *
1449 * @returns Number of bytes transferred.
1450 * @param pDevIns Device instance of the DMA.
1451 * @param pvUser User pointer.
1452 * @param uChannel Channel number.
1453 * @param off DMA position.
1454 * @param cb Block size.
1455 */
1456typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1457/** Pointer to a FNDMATRANSFERHANDLER(). */
1458typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1459
1460/**
1461 * DMA Controller registration structure.
1462 */
1463typedef struct PDMDMAREG
1464{
1465 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1466 uint32_t u32Version;
1467
1468 /**
1469 * Execute pending transfers.
1470 *
1471 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1472 * @param pDevIns Device instance of the DMAC.
1473 */
1474 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1475
1476 /**
1477 * Register transfer function for DMA channel.
1478 *
1479 * @param pDevIns Device instance of the DMAC.
1480 * @param uChannel Channel number.
1481 * @param pfnTransferHandler Device specific transfer function.
1482 * @param pvUSer User pointer to be passed to the callback.
1483 */
1484 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1485
1486 /**
1487 * Read memory
1488 *
1489 * @returns Number of bytes read.
1490 * @param pDevIns Device instance of the DMAC.
1491 * @param pvBuffer Pointer to target buffer.
1492 * @param off DMA position.
1493 * @param cbBlock Block size.
1494 */
1495 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1496
1497 /**
1498 * Write memory
1499 *
1500 * @returns Number of bytes written.
1501 * @param pDevIns Device instance of the DMAC.
1502 * @param pvBuffer Memory to write.
1503 * @param off DMA position.
1504 * @param cbBlock Block size.
1505 */
1506 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1507
1508 /**
1509 * Set the DREQ line.
1510 *
1511 * @param pDevIns Device instance of the DMAC.
1512 * @param uChannel Channel number.
1513 * @param uLevel Level of the line.
1514 */
1515 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1516
1517 /**
1518 * Get channel mode
1519 *
1520 * @returns Channel mode.
1521 * @param pDevIns Device instance of the DMAC.
1522 * @param uChannel Channel number.
1523 */
1524 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1525
1526} PDMDMACREG;
1527/** Pointer to a DMAC registration structure. */
1528typedef PDMDMACREG *PPDMDMACREG;
1529
1530/** Current PDMDMACREG version number. */
1531#define PDM_DMACREG_VERSION 0xf5010000
1532
1533
1534/**
1535 * DMA Controller device helpers.
1536 */
1537typedef struct PDMDMACHLP
1538{
1539 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1540 uint32_t u32Version;
1541
1542 /* to-be-defined */
1543
1544} PDMDMACHLP;
1545/** Pointer to DMAC helpers. */
1546typedef PDMDMACHLP *PPDMDMACHLP;
1547/** Pointer to const DMAC helpers. */
1548typedef const PDMDMACHLP *PCPDMDMACHLP;
1549
1550/** Current PDMDMACHLP version number. */
1551#define PDM_DMACHLP_VERSION 0xf6010000
1552
1553#endif /* IN_RING3 */
1554
1555
1556
1557/**
1558 * RTC registration structure.
1559 */
1560typedef struct PDMRTCREG
1561{
1562 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1563 uint32_t u32Version;
1564 uint32_t u32Alignment; /**< structure size alignment. */
1565
1566 /**
1567 * Write to a CMOS register and update the checksum if necessary.
1568 *
1569 * @returns VBox status code.
1570 * @param pDevIns Device instance of the RTC.
1571 * @param iReg The CMOS register index.
1572 * @param u8Value The CMOS register value.
1573 */
1574 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1575
1576 /**
1577 * Read a CMOS register.
1578 *
1579 * @returns VBox status code.
1580 * @param pDevIns Device instance of the RTC.
1581 * @param iReg The CMOS register index.
1582 * @param pu8Value Where to store the CMOS register value.
1583 */
1584 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1585
1586} PDMRTCREG;
1587/** Pointer to a RTC registration structure. */
1588typedef PDMRTCREG *PPDMRTCREG;
1589/** Pointer to a const RTC registration structure. */
1590typedef const PDMRTCREG *PCPDMRTCREG;
1591
1592/** Current PDMRTCREG version number. */
1593#define PDM_RTCREG_VERSION 0xfa010000
1594
1595
1596/**
1597 * RTC device helpers.
1598 */
1599typedef struct PDMRTCHLP
1600{
1601 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1602 uint32_t u32Version;
1603
1604 /* to-be-defined */
1605
1606} PDMRTCHLP;
1607/** Pointer to RTC helpers. */
1608typedef PDMRTCHLP *PPDMRTCHLP;
1609/** Pointer to const RTC helpers. */
1610typedef const PDMRTCHLP *PCPDMRTCHLP;
1611
1612/** Current PDMRTCHLP version number. */
1613#define PDM_RTCHLP_VERSION 0xf6010000
1614
1615
1616
1617#ifdef IN_RING3
1618
1619/**
1620 * PDM Device API.
1621 */
1622typedef struct PDMDEVHLP
1623{
1624 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1625 uint32_t u32Version;
1626
1627 /**
1628 * Register a number of I/O ports with a device.
1629 *
1630 * These callbacks are of course for the host context (HC).
1631 * Register HC handlers before guest context (GC) handlers! There must be a
1632 * HC handler for every GC handler!
1633 *
1634 * @returns VBox status.
1635 * @param pDevIns The device instance to register the ports with.
1636 * @param Port First port number in the range.
1637 * @param cPorts Number of ports to register.
1638 * @param pvUser User argument.
1639 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1640 * @param pfnIn Pointer to function which is gonna handle IN operations.
1641 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1642 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1643 * @param pszDesc Pointer to description string. This must not be freed.
1644 */
1645 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1646 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1647 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1648
1649 /**
1650 * Register a number of I/O ports with a device for GC.
1651 *
1652 * These callbacks are for the host context (GC).
1653 * Register host context (HC) handlers before guest context handlers! There must be a
1654 * HC handler for every GC handler!
1655 *
1656 * @returns VBox status.
1657 * @param pDevIns The device instance to register the ports with and which GC module
1658 * to resolve the names against.
1659 * @param Port First port number in the range.
1660 * @param cPorts Number of ports to register.
1661 * @param pvUser User argument.
1662 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1663 * @param pszIn Name of the GC function which is gonna handle IN operations.
1664 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1665 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1666 * @param pszDesc Pointer to description string. This must not be freed.
1667 */
1668 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1669 const char *pszOut, const char *pszIn,
1670 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1671
1672 /**
1673 * Register a number of I/O ports with a device.
1674 *
1675 * These callbacks are of course for the ring-0 host context (R0).
1676 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1677 *
1678 * @returns VBox status.
1679 * @param pDevIns The device instance to register the ports with.
1680 * @param Port First port number in the range.
1681 * @param cPorts Number of ports to register.
1682 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1683 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1684 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1685 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1686 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1687 * @param pszDesc Pointer to description string. This must not be freed.
1688 */
1689 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1690 const char *pszOut, const char *pszIn,
1691 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1692
1693 /**
1694 * Deregister I/O ports.
1695 *
1696 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1697 *
1698 * @returns VBox status.
1699 * @param pDevIns The device instance owning the ports.
1700 * @param Port First port number in the range.
1701 * @param cPorts Number of ports to deregister.
1702 */
1703 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1704
1705 /**
1706 * Register a Memory Mapped I/O (MMIO) region.
1707 *
1708 * These callbacks are of course for the host context (HC).
1709 * Register HC handlers before guest context (GC) handlers! There must be a
1710 * HC handler for every GC handler!
1711 *
1712 * @returns VBox status.
1713 * @param pDevIns The device instance to register the MMIO with.
1714 * @param GCPhysStart First physical address in the range.
1715 * @param cbRange The size of the range (in bytes).
1716 * @param pvUser User argument.
1717 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1718 * @param pfnRead Pointer to function which is gonna handle Read operations.
1719 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1720 * @param pszDesc Pointer to description string. This must not be freed.
1721 */
1722 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1723 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1724 const char *pszDesc));
1725
1726 /**
1727 * Register a Memory Mapped I/O (MMIO) region for GC.
1728 *
1729 * These callbacks are for the guest context (GC).
1730 * Register host context (HC) handlers before guest context handlers! There must be a
1731 * HC handler for every GC handler!
1732 *
1733 * @returns VBox status.
1734 * @param pDevIns The device instance to register the MMIO with.
1735 * @param GCPhysStart First physical address in the range.
1736 * @param cbRange The size of the range (in bytes).
1737 * @param pvUser User argument.
1738 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1739 * @param pszRead Name of the GC function which is gonna handle Read operations.
1740 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1741 * @param pszDesc Obsolete. NULL is fine.
1742 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1743 */
1744 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1745 const char *pszWrite, const char *pszRead, const char *pszFill,
1746 const char *pszDesc));
1747
1748 /**
1749 * Register a Memory Mapped I/O (MMIO) region for R0.
1750 *
1751 * These callbacks are for the ring-0 host context (R0).
1752 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1753 *
1754 * @returns VBox status.
1755 * @param pDevIns The device instance to register the MMIO with.
1756 * @param GCPhysStart First physical address in the range.
1757 * @param cbRange The size of the range (in bytes).
1758 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1759 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1760 * @param pszRead Name of the GC function which is gonna handle Read operations.
1761 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1762 * @param pszDesc Obsolete. NULL is fine.
1763 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1764 */
1765 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1766 const char *pszWrite, const char *pszRead, const char *pszFill,
1767 const char *pszDesc));
1768
1769 /**
1770 * Deregister a Memory Mapped I/O (MMIO) region.
1771 *
1772 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1773 *
1774 * @returns VBox status.
1775 * @param pDevIns The device instance owning the MMIO region(s).
1776 * @param GCPhysStart First physical address in the range.
1777 * @param cbRange The size of the range (in bytes).
1778 */
1779 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1780
1781 /**
1782 * Register a ROM (BIOS) region.
1783 *
1784 * It goes without saying that this is read-only memory. The memory region must be
1785 * in unassigned memory. I.e. from the top of the address space or on the PC in
1786 * the 0xa0000-0xfffff range.
1787 *
1788 * @returns VBox status.
1789 * @param pDevIns The device instance owning the ROM region.
1790 * @param GCPhysStart First physical address in the range.
1791 * Must be page aligned!
1792 * @param cbRange The size of the range (in bytes).
1793 * Must be page aligned!
1794 * @param pvBinary Pointer to the binary data backing the ROM image.
1795 * This must be cbRange bytes big.
1796 * It will be copied and doesn't have to stick around if fShadow is clear.
1797 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1798 * the ROM writable for a while during the POST and refreshing
1799 * it at reset. When this flag is set, the memory pointed to by
1800 * pvBinary has to stick around for the lifespan of the VM.
1801 * @param pszDesc Pointer to description string. This must not be freed.
1802 *
1803 * @remark There is no way to remove the rom, automatically on device cleanup or
1804 * manually from the device yet. At present I doubt we need such features...
1805 */
1806 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1807
1808 /**
1809 * Register a save state data unit.
1810 *
1811 * @returns VBox status.
1812 * @param pDevIns Device instance.
1813 * @param pszName Data unit name.
1814 * @param u32Instance The instance identifier of the data unit.
1815 * This must together with the name be unique.
1816 * @param u32Version Data layout version number.
1817 * @param cbGuess The approximate amount of data in the unit.
1818 * Only for progress indicators.
1819 * @param pfnSavePrep Prepare save callback, optional.
1820 * @param pfnSaveExec Execute save callback, optional.
1821 * @param pfnSaveDone Done save callback, optional.
1822 * @param pfnLoadPrep Prepare load callback, optional.
1823 * @param pfnLoadExec Execute load callback, optional.
1824 * @param pfnLoadDone Done load callback, optional.
1825 */
1826 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1827 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1828 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1829
1830 /**
1831 * Creates a timer.
1832 *
1833 * @returns VBox status.
1834 * @param pDevIns Device instance.
1835 * @param enmClock The clock to use on this timer.
1836 * @param pfnCallback Callback function.
1837 * @param pszDesc Pointer to description string which must stay around
1838 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1839 * @param ppTimer Where to store the timer on success.
1840 */
1841 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1842
1843 /**
1844 * Creates an external timer.
1845 *
1846 * @returns timer pointer
1847 * @param pDevIns Device instance.
1848 * @param enmClock The clock to use on this timer.
1849 * @param pfnCallback Callback function.
1850 * @param pvUser User pointer
1851 * @param pszDesc Pointer to description string which must stay around
1852 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1853 */
1854 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1855
1856 /**
1857 * Registers the device with the default PCI bus.
1858 *
1859 * @returns VBox status code.
1860 * @param pDevIns Device instance.
1861 * @param pPciDev The PCI device structure.
1862 * Any PCI enabled device must keep this in it's instance data!
1863 * Fill in the PCI data config before registration, please.
1864 * @remark This is the simple interface, a Ex interface will be created if
1865 * more features are needed later.
1866 */
1867 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1868
1869 /**
1870 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1871 *
1872 * @returns VBox status code.
1873 * @param pDevIns Device instance.
1874 * @param iRegion The region number.
1875 * @param cbRegion Size of the region.
1876 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1877 * @param pfnCallback Callback for doing the mapping.
1878 */
1879 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1880
1881 /**
1882 * Register PCI configuration space read/write callbacks.
1883 *
1884 * @param pDevIns Device instance.
1885 * @param pPciDev The PCI device structure.
1886 * If NULL the default PCI device for this device instance is used.
1887 * @param pfnRead Pointer to the user defined PCI config read function.
1888 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1889 * PCI config read function. This way, user can decide when (and if)
1890 * to call default PCI config read function. Can be NULL.
1891 * @param pfnWrite Pointer to the user defined PCI config write function.
1892 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1893 * PCI config write function. This way, user can decide when (and if)
1894 * to call default PCI config write function. Can be NULL.
1895 * @thread EMT
1896 */
1897 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1898 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1899
1900 /**
1901 * Set the IRQ for a PCI device.
1902 *
1903 * @param pDevIns Device instance.
1904 * @param iIrq IRQ number to set.
1905 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1906 * @thread Any thread, but will involve the emulation thread.
1907 */
1908 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1909
1910 /**
1911 * Set the IRQ for a PCI device, but don't wait for EMT to process
1912 * the request when not called from EMT.
1913 *
1914 * @param pDevIns Device instance.
1915 * @param iIrq IRQ number to set.
1916 * @param iLevel IRQ level.
1917 * @thread Any thread, but will involve the emulation thread.
1918 */
1919 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1920
1921 /**
1922 * Set ISA IRQ for a device.
1923 *
1924 * @param pDevIns Device instance.
1925 * @param iIrq IRQ number to set.
1926 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1927 * @thread Any thread, but will involve the emulation thread.
1928 */
1929 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1930
1931 /**
1932 * Set the ISA IRQ for a device, but don't wait for EMT to process
1933 * the request when not called from EMT.
1934 *
1935 * @param pDevIns Device instance.
1936 * @param iIrq IRQ number to set.
1937 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1938 * @thread Any thread, but will involve the emulation thread.
1939 */
1940 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1941
1942 /**
1943 * Attaches a driver (chain) to the device.
1944 *
1945 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1946 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1947 *
1948 * @returns VBox status code.
1949 * @param pDevIns Device instance.
1950 * @param iLun The logical unit to attach.
1951 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1952 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1953 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1954 * for the live of the device instance.
1955 */
1956 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1957
1958 /**
1959 * Allocate memory which is associated with current VM instance
1960 * and automatically freed on it's destruction.
1961 *
1962 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1963 * @param pDevIns Device instance.
1964 * @param cb Number of bytes to allocate.
1965 */
1966 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1967
1968 /**
1969 * Allocate memory which is associated with current VM instance
1970 * and automatically freed on it's destruction. The memory is ZEROed.
1971 *
1972 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1973 * @param pDevIns Device instance.
1974 * @param cb Number of bytes to allocate.
1975 */
1976 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1977
1978 /**
1979 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1980 *
1981 * @param pDevIns Device instance.
1982 * @param pv Pointer to the memory to free.
1983 */
1984 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1985
1986 /**
1987 * Set the VM error message
1988 *
1989 * @returns rc.
1990 * @param pDevIns Device instance.
1991 * @param rc VBox status code.
1992 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1993 * @param pszFormat Error message format string.
1994 * @param ... Error message arguments.
1995 */
1996 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
1997
1998 /**
1999 * Set the VM error message
2000 *
2001 * @returns rc.
2002 * @param pDevIns Device instance.
2003 * @param rc VBox status code.
2004 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2005 * @param pszFormat Error message format string.
2006 * @param va Error message arguments.
2007 */
2008 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2009
2010 /**
2011 * Set the VM runtime error message
2012 *
2013 * @returns VBox status code.
2014 * @param pDevIns Device instance.
2015 * @param fFatal Whether it is a fatal error or not.
2016 * @param pszErrorID Error ID string.
2017 * @param pszFormat Error message format string.
2018 * @param ... Error message arguments.
2019 */
2020 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2021
2022 /**
2023 * Set the VM runtime error message
2024 *
2025 * @returns VBox status code.
2026 * @param pDevIns Device instance.
2027 * @param fFatal Whether it is a fatal error or not.
2028 * @param pszErrorID Error ID string.
2029 * @param pszFormat Error message format string.
2030 * @param va Error message arguments.
2031 */
2032 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2033
2034 /**
2035 * Assert that the current thread is the emulation thread.
2036 *
2037 * @returns True if correct.
2038 * @returns False if wrong.
2039 * @param pDevIns Device instance.
2040 * @param pszFile Filename of the assertion location.
2041 * @param iLine The linenumber of the assertion location.
2042 * @param pszFunction Function of the assertion location.
2043 */
2044 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2045
2046 /**
2047 * Assert that the current thread is NOT the emulation thread.
2048 *
2049 * @returns True if correct.
2050 * @returns False if wrong.
2051 * @param pDevIns Device instance.
2052 * @param pszFile Filename of the assertion location.
2053 * @param iLine The linenumber of the assertion location.
2054 * @param pszFunction Function of the assertion location.
2055 */
2056 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2057
2058 /**
2059 * Stops the VM and enters the debugger to look at the guest state.
2060 *
2061 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2062 * invoking this function directly.
2063 *
2064 * @returns VBox status code which must be passed up to the VMM.
2065 * @param pDevIns Device instance.
2066 * @param pszFile Filename of the assertion location.
2067 * @param iLine The linenumber of the assertion location.
2068 * @param pszFunction Function of the assertion location.
2069 * @param pszFormat Message. (optional)
2070 * @param args Message parameters.
2071 */
2072 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2073
2074 /**
2075 * Register a info handler with DBGF,
2076 *
2077 * @returns VBox status code.
2078 * @param pDevIns Device instance.
2079 * @param pszName The identifier of the info.
2080 * @param pszDesc The description of the info and any arguments the handler may take.
2081 * @param pfnHandler The handler function to be called to display the info.
2082 */
2083 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2084
2085 /**
2086 * Registers a statistics sample if statistics are enabled.
2087 *
2088 * @param pDevIns Device instance of the DMA.
2089 * @param pvSample Pointer to the sample.
2090 * @param enmType Sample type. This indicates what pvSample is pointing at.
2091 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2092 * Further nesting is possible.
2093 * @param enmUnit Sample unit.
2094 * @param pszDesc Sample description.
2095 */
2096 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2097
2098 /**
2099 * Same as pfnSTAMRegister except that the name is specified in a
2100 * RTStrPrintf like fashion.
2101 *
2102 * @returns VBox status.
2103 * @param pDevIns Device instance of the DMA.
2104 * @param pvSample Pointer to the sample.
2105 * @param enmType Sample type. This indicates what pvSample is pointing at.
2106 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2107 * @param enmUnit Sample unit.
2108 * @param pszDesc Sample description.
2109 * @param pszName The sample name format string.
2110 * @param ... Arguments to the format string.
2111 */
2112 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2113 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2114
2115 /**
2116 * Same as pfnSTAMRegister except that the name is specified in a
2117 * RTStrPrintfV like fashion.
2118 *
2119 * @returns VBox status.
2120 * @param pDevIns Device instance of the DMA.
2121 * @param pvSample Pointer to the sample.
2122 * @param enmType Sample type. This indicates what pvSample is pointing at.
2123 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2124 * @param enmUnit Sample unit.
2125 * @param pszDesc Sample description.
2126 * @param pszName The sample name format string.
2127 * @param args Arguments to the format string.
2128 */
2129 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2130 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2131
2132 /**
2133 * Register the RTC device.
2134 *
2135 * @returns VBox status code.
2136 * @param pDevIns Device instance.
2137 * @param pRtcReg Pointer to a RTC registration structure.
2138 * @param ppRtcHlp Where to store the pointer to the helper functions.
2139 */
2140 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2141
2142 /**
2143 * Create a queue.
2144 *
2145 * @returns VBox status code.
2146 * @param pDevIns The device instance.
2147 * @param cbItem The size of a queue item.
2148 * @param cItems The number of items in the queue.
2149 * @param cMilliesInterval The number of milliseconds between polling the queue.
2150 * If 0 then the emulation thread will be notified whenever an item arrives.
2151 * @param pfnCallback The consumer function.
2152 * @param fGCEnabled Set if the queue should work in GC too.
2153 * @param ppQueue Where to store the queue handle on success.
2154 * @thread The emulation thread.
2155 */
2156 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2157 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2158
2159 /**
2160 * Initializes a PDM critical section.
2161 *
2162 * The PDM critical sections are derived from the IPRT critical sections, but
2163 * works in GC as well.
2164 *
2165 * @returns VBox status code.
2166 * @param pDevIns Device instance.
2167 * @param pCritSect Pointer to the critical section.
2168 * @param pszName The name of the critical section (for statistics).
2169 */
2170 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2171
2172 /**
2173 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2174 *
2175 * @returns pTime.
2176 * @param pDevIns Device instance.
2177 * @param pTime Where to store the time.
2178 */
2179 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2180
2181 /**
2182 * Creates a PDM thread.
2183 *
2184 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2185 * resuming, and destroying the thread as the VM state changes.
2186 *
2187 * @returns VBox status code.
2188 * @param pDevIns The device instance.
2189 * @param ppThread Where to store the thread 'handle'.
2190 * @param pvUser The user argument to the thread function.
2191 * @param pfnThread The thread function.
2192 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2193 * a state change is pending.
2194 * @param cbStack See RTThreadCreate.
2195 * @param enmType See RTThreadCreate.
2196 * @param pszName See RTThreadCreate.
2197 */
2198 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2199 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2200
2201 /**
2202 * Convert a guest virtual address to a guest physical address.
2203 *
2204 * @returns VBox status code.
2205 * @param pDevIns Device instance.
2206 * @param GCPtr Guest virtual address.
2207 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2208 * @thread The emulation thread.
2209 * @remark Careful with page boundraries.
2210 */
2211 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2212
2213 /**
2214 * Gets the VM state.
2215 *
2216 * @returns VM state.
2217 * @param pDevIns The device instance.
2218 * @thread Any thread (just keep in mind that it's volatile info).
2219 */
2220 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2221
2222 /** Space reserved for future members.
2223 * @{ */
2224 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2225 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2226 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2227 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2228 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2229 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2230 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2231 /** @} */
2232
2233
2234 /** API available to trusted devices only.
2235 *
2236 * These APIs are providing unrestricted access to the guest and the VM,
2237 * or they are interacting intimately with PDM.
2238 *
2239 * @{
2240 */
2241 /**
2242 * Gets the VM handle. Restricted API.
2243 *
2244 * @returns VM Handle.
2245 * @param pDevIns Device instance.
2246 */
2247 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2248
2249 /**
2250 * Register the PCI Bus.
2251 *
2252 * @returns VBox status code.
2253 * @param pDevIns Device instance.
2254 * @param pPciBusReg Pointer to PCI bus registration structure.
2255 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2256 */
2257 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2258
2259 /**
2260 * Register the PIC device.
2261 *
2262 * @returns VBox status code.
2263 * @param pDevIns Device instance.
2264 * @param pPicReg Pointer to a PIC registration structure.
2265 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2266 */
2267 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2268
2269 /**
2270 * Register the APIC device.
2271 *
2272 * @returns VBox status code.
2273 * @param pDevIns Device instance.
2274 * @param pApicReg Pointer to a APIC registration structure.
2275 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2276 */
2277 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2278
2279 /**
2280 * Register the I/O APIC device.
2281 *
2282 * @returns VBox status code.
2283 * @param pDevIns Device instance.
2284 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2285 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2286 */
2287 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2288
2289 /**
2290 * Register the DMA device.
2291 *
2292 * @returns VBox status code.
2293 * @param pDevIns Device instance.
2294 * @param pDmacReg Pointer to a DMAC registration structure.
2295 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2296 */
2297 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2298
2299 /**
2300 * Read physical memory.
2301 *
2302 * @param pDevIns Device instance.
2303 * @param GCPhys Physical address start reading from.
2304 * @param pvBuf Where to put the read bits.
2305 * @param cbRead How many bytes to read.
2306 * @thread Any thread, but the call may involve the emulation thread.
2307 */
2308 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2309
2310 /**
2311 * Write to physical memory.
2312 *
2313 * @param pDevIns Device instance.
2314 * @param GCPhys Physical address to write to.
2315 * @param pvBuf What to write.
2316 * @param cbWrite How many bytes to write.
2317 * @thread Any thread, but the call may involve the emulation thread.
2318 */
2319 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2320
2321 /**
2322 * Read guest physical memory by virtual address.
2323 *
2324 * @param pDevIns Device instance.
2325 * @param pvDst Where to put the read bits.
2326 * @param GCVirtSrc Guest virtual address to start reading from.
2327 * @param cb How many bytes to read.
2328 * @thread The emulation thread.
2329 */
2330 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2331
2332 /**
2333 * Write to guest physical memory by virtual address.
2334 *
2335 * @param pDevIns Device instance.
2336 * @param GCVirtDst Guest virtual address to write to.
2337 * @param pvSrc What to write.
2338 * @param cb How many bytes to write.
2339 * @thread The emulation thread.
2340 */
2341 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2342
2343 /**
2344 * Reserve physical address space for ROM and MMIO ranges.
2345 *
2346 * @returns VBox status code.
2347 * @param pDevIns Device instance.
2348 * @param GCPhys Start physical address.
2349 * @param cbRange The size of the range.
2350 * @param pszDesc Description string.
2351 * @thread The emulation thread.
2352 */
2353 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2354
2355 /**
2356 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2357 *
2358 * @returns VBox status code.
2359 * @param pDevIns Device instance.
2360 * @param GCPhys Start physical address.
2361 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2362 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2363 * @thread The emulation thread.
2364 *
2365 * @remark Careful with page boundraries.
2366 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2367 */
2368 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2369
2370 /**
2371 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2372 *
2373 * @returns VBox status code.
2374 * @param pDevIns Device instance.
2375 * @param GCPtr Guest virtual address.
2376 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2377 * @thread The emulation thread.
2378 *
2379 * @remark Careful with page boundraries.
2380 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2381 */
2382 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2383
2384 /**
2385 * Checks if the Gate A20 is enabled or not.
2386 *
2387 * @returns true if A20 is enabled.
2388 * @returns false if A20 is disabled.
2389 * @param pDevIns Device instance.
2390 * @thread The emulation thread.
2391 */
2392 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2393
2394 /**
2395 * Enables or disables the Gate A20.
2396 *
2397 * @param pDevIns Device instance.
2398 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2399 * @thread The emulation thread.
2400 */
2401 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2402
2403 /**
2404 * Resets the VM.
2405 *
2406 * @returns The appropriate VBox status code to pass around on reset.
2407 * @param pDevIns Device instance.
2408 * @thread The emulation thread.
2409 */
2410 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2411
2412 /**
2413 * Suspends the VM.
2414 *
2415 * @returns The appropriate VBox status code to pass around on suspend.
2416 * @param pDevIns Device instance.
2417 * @thread The emulation thread.
2418 */
2419 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2420
2421 /**
2422 * Power off the VM.
2423 *
2424 * @returns The appropriate VBox status code to pass around on power off.
2425 * @param pDevIns Device instance.
2426 * @thread The emulation thread.
2427 */
2428 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2429
2430 /**
2431 * Acquire global VM lock
2432 *
2433 * @returns VBox status code
2434 * @param pDevIns Device instance.
2435 */
2436 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2437
2438 /**
2439 * Release global VM lock
2440 *
2441 * @returns VBox status code
2442 * @param pDevIns Device instance.
2443 */
2444 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2445
2446 /**
2447 * Check that the current thread owns the global VM lock.
2448 *
2449 * @returns boolean
2450 * @param pDevIns Device instance.
2451 * @param pszFile Filename of the assertion location.
2452 * @param iLine Linenumber of the assertion location.
2453 * @param pszFunction Function of the assertion location.
2454 */
2455 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2456
2457 /**
2458 * Register transfer function for DMA channel.
2459 *
2460 * @returns VBox status code.
2461 * @param pDevIns Device instance.
2462 * @param uChannel Channel number.
2463 * @param pfnTransferHandler Device specific transfer callback function.
2464 * @param pvUser User pointer to pass to the callback.
2465 * @thread EMT
2466 */
2467 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2468
2469 /**
2470 * Read memory.
2471 *
2472 * @returns VBox status code.
2473 * @param pDevIns Device instance.
2474 * @param uChannel Channel number.
2475 * @param pvBuffer Pointer to target buffer.
2476 * @param off DMA position.
2477 * @param cbBlock Block size.
2478 * @param pcbRead Where to store the number of bytes which was read. optional.
2479 * @thread EMT
2480 */
2481 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2482
2483 /**
2484 * Write memory.
2485 *
2486 * @returns VBox status code.
2487 * @param pDevIns Device instance.
2488 * @param uChannel Channel number.
2489 * @param pvBuffer Memory to write.
2490 * @param off DMA position.
2491 * @param cbBlock Block size.
2492 * @param pcbWritten Where to store the number of bytes which was written. optional.
2493 * @thread EMT
2494 */
2495 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2496
2497 /**
2498 * Set the DREQ line.
2499 *
2500 * @returns VBox status code.
2501 * @param pDevIns Device instance.
2502 * @param uChannel Channel number.
2503 * @param uLevel Level of the line.
2504 * @thread EMT
2505 */
2506 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2507
2508 /**
2509 * Get channel mode.
2510 *
2511 * @returns Channel mode. See specs.
2512 * @param pDevIns Device instance.
2513 * @param uChannel Channel number.
2514 * @thread EMT
2515 */
2516 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2517
2518 /**
2519 * Schedule DMA execution.
2520 *
2521 * @param pDevIns Device instance.
2522 * @thread Any thread.
2523 */
2524 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2525
2526 /**
2527 * Write CMOS value and update the checksum(s).
2528 *
2529 * @returns VBox status code.
2530 * @param pDevIns Device instance.
2531 * @param iReg The CMOS register index.
2532 * @param u8Value The CMOS register value.
2533 * @thread EMT
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2536
2537 /**
2538 * Read CMOS value.
2539 *
2540 * @returns VBox status code.
2541 * @param pDevIns Device instance.
2542 * @param iReg The CMOS register index.
2543 * @param pu8Value Where to store the CMOS register value.
2544 * @thread EMT
2545 */
2546 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2547
2548 /**
2549 * Query CPUID.
2550 *
2551 * @param pDevIns Device instance.
2552 * @param iLeaf The CPUID leaf to get.
2553 * @param pEax Where to store the EAX value.
2554 * @param pEbx Where to store the EBX value.
2555 * @param pEcx Where to store the ECX value.
2556 * @param pEdx Where to store the EDX value.
2557 */
2558 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2559
2560 /**
2561 * Write protects a shadow ROM mapping.
2562 *
2563 * This is intented for use by the system BIOS or by the device that
2564 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2565 * write protected once the POST is over.
2566 *
2567 * @param pDevIns Device instance.
2568 * @param GCPhysStart Where the shadow ROM mapping starts.
2569 * @param cbRange The size of the shadow ROM mapping.
2570 */
2571 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2572
2573 /**
2574 * Allocate and register a MMIO2 region.
2575 *
2576 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2577 * RAM associated with a device. It is also non-shared memory with a
2578 * permanent ring-3 mapping and page backing (presently).
2579 *
2580 * @returns VBox status.
2581 * @param pDevIns The device instance.
2582 * @param iRegion The region number. Use the PCI region number as
2583 * this must be known to the PCI bus device too. If it's not associated
2584 * with the PCI device, then any number up to UINT8_MAX is fine.
2585 * @param cb The size (in bytes) of the region.
2586 * @param fFlags Reserved for future use, must be zero.
2587 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2588 * @param pszDesc Pointer to description string. This must not be freed.
2589 * @thread EMT.
2590 */
2591 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2592
2593 /**
2594 * Deregisters and frees a MMIO2 region.
2595 *
2596 * Any physical (and virtual) access handlers registered for the region must
2597 * be deregistered before calling this function.
2598 *
2599 * @returns VBox status code.
2600 * @param pDevIns The device instance.
2601 * @param iRegion The region number used during registration.
2602 * @thread EMT.
2603 */
2604 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2605
2606 /**
2607 * Maps a MMIO2 region into the physical memory space.
2608 *
2609 * A MMIO2 range may overlap with base memory if a lot of RAM
2610 * is configured for the VM, in which case we'll drop the base
2611 * memory pages. Presently we will make no attempt to preserve
2612 * anything that happens to be present in the base memory that
2613 * is replaced, this is of course incorrectly but it's too much
2614 * effort.
2615 *
2616 * @returns VBox status code.
2617 * @param pDevIns The device instance.
2618 * @param iRegion The region number used during registration.
2619 * @param GCPhys The physical address to map it at.
2620 * @thread EMT.
2621 */
2622 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2623
2624 /**
2625 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2626 *
2627 * @returns VBox status code.
2628 * @param pDevIns The device instance.
2629 * @param iRegion The region number used during registration.
2630 * @param GCPhys The physical address it's currently mapped at.
2631 * @thread EMT.
2632 */
2633 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2634
2635 /**
2636 * Maps a portion of an MMIO2 region into the hypervisor region.
2637 *
2638 * Callers of this API must never deregister the MMIO2 region before the
2639 * VM is powered off.
2640 *
2641 * @return VBox status code.
2642 * @param pDevIns The device owning the MMIO2 memory.
2643 * @param iRegion The region.
2644 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2645 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2646 * @param pszDesc Mapping description.
2647 * @param pGCPtr Where to store the GC address.
2648 */
2649 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2650 const char *pszDesc, PRTGCPTR pGCPtr));
2651
2652 /** @} */
2653
2654 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2655 uint32_t u32TheEnd;
2656} PDMDEVHLP;
2657#endif /* !IN_RING3 */
2658/** Pointer PDM Device API. */
2659typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2660/** Pointer PDM Device API. */
2661typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2662
2663/** Current PDMDEVHLP version number. */
2664#define PDM_DEVHLP_VERSION 0xf2050002
2665
2666
2667/**
2668 * PDM Device API - GC Variant.
2669 */
2670typedef struct PDMDEVHLPGC
2671{
2672 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2673 uint32_t u32Version;
2674
2675 /**
2676 * Set the IRQ for a PCI device.
2677 *
2678 * @param pDevIns Device instance.
2679 * @param iIrq IRQ number to set.
2680 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2681 * @thread Any thread, but will involve the emulation thread.
2682 */
2683 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2684
2685 /**
2686 * Set ISA IRQ for a device.
2687 *
2688 * @param pDevIns Device instance.
2689 * @param iIrq IRQ number to set.
2690 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2691 * @thread Any thread, but will involve the emulation thread.
2692 */
2693 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2694
2695 /**
2696 * Read physical memory.
2697 *
2698 * @param pDevIns Device instance.
2699 * @param GCPhys Physical address start reading from.
2700 * @param pvBuf Where to put the read bits.
2701 * @param cbRead How many bytes to read.
2702 */
2703 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2704
2705 /**
2706 * Write to physical memory.
2707 *
2708 * @param pDevIns Device instance.
2709 * @param GCPhys Physical address to write to.
2710 * @param pvBuf What to write.
2711 * @param cbWrite How many bytes to write.
2712 */
2713 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2714
2715 /**
2716 * Checks if the Gate A20 is enabled or not.
2717 *
2718 * @returns true if A20 is enabled.
2719 * @returns false if A20 is disabled.
2720 * @param pDevIns Device instance.
2721 * @thread The emulation thread.
2722 */
2723 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2724
2725 /**
2726 * Set the VM error message
2727 *
2728 * @returns rc.
2729 * @param pDrvIns Driver instance.
2730 * @param rc VBox status code.
2731 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2732 * @param pszFormat Error message format string.
2733 * @param ... Error message arguments.
2734 */
2735 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2736
2737 /**
2738 * Set the VM error message
2739 *
2740 * @returns rc.
2741 * @param pDrvIns Driver instance.
2742 * @param rc VBox status code.
2743 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2744 * @param pszFormat Error message format string.
2745 * @param va Error message arguments.
2746 */
2747 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2748
2749 /**
2750 * Set the VM runtime error message
2751 *
2752 * @returns VBox status code.
2753 * @param pDevIns Device instance.
2754 * @param fFatal Whether it is a fatal error or not.
2755 * @param pszErrorID Error ID string.
2756 * @param pszFormat Error message format string.
2757 * @param ... Error message arguments.
2758 */
2759 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2760
2761 /**
2762 * Set the VM runtime error message
2763 *
2764 * @returns VBox status code.
2765 * @param pDevIns Device instance.
2766 * @param fFatal Whether it is a fatal error or not.
2767 * @param pszErrorID Error ID string.
2768 * @param pszFormat Error message format string.
2769 * @param va Error message arguments.
2770 */
2771 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2772
2773 /**
2774 * Set parameters for pending MMIO patch operation
2775 *
2776 * @returns VBox status code.
2777 * @param pDevIns Device instance.
2778 * @param GCPhys MMIO physical address
2779 * @param pCachedData GC pointer to cached data
2780 */
2781 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2782
2783 /** Just a safety precaution. */
2784 uint32_t u32TheEnd;
2785} PDMDEVHLPGC;
2786/** Pointer PDM Device GC API. */
2787typedef RCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2788/** Pointer PDM Device GC API. */
2789typedef RCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2790
2791/** Current PDMDEVHLP version number. */
2792#define PDM_DEVHLPGC_VERSION 0xfb010000
2793
2794
2795/**
2796 * PDM Device API - R0 Variant.
2797 */
2798typedef struct PDMDEVHLPR0
2799{
2800 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2801 uint32_t u32Version;
2802
2803 /**
2804 * Set the IRQ for a PCI device.
2805 *
2806 * @param pDevIns Device instance.
2807 * @param iIrq IRQ number to set.
2808 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2809 * @thread Any thread, but will involve the emulation thread.
2810 */
2811 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2812
2813 /**
2814 * Set ISA IRQ for a device.
2815 *
2816 * @param pDevIns Device instance.
2817 * @param iIrq IRQ number to set.
2818 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2819 * @thread Any thread, but will involve the emulation thread.
2820 */
2821 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2822
2823 /**
2824 * Read physical memory.
2825 *
2826 * @param pDevIns Device instance.
2827 * @param GCPhys Physical address start reading from.
2828 * @param pvBuf Where to put the read bits.
2829 * @param cbRead How many bytes to read.
2830 */
2831 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2832
2833 /**
2834 * Write to physical memory.
2835 *
2836 * @param pDevIns Device instance.
2837 * @param GCPhys Physical address to write to.
2838 * @param pvBuf What to write.
2839 * @param cbWrite How many bytes to write.
2840 */
2841 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2842
2843 /**
2844 * Checks if the Gate A20 is enabled or not.
2845 *
2846 * @returns true if A20 is enabled.
2847 * @returns false if A20 is disabled.
2848 * @param pDevIns Device instance.
2849 * @thread The emulation thread.
2850 */
2851 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2852
2853 /**
2854 * Set the VM error message
2855 *
2856 * @returns rc.
2857 * @param pDrvIns Driver instance.
2858 * @param rc VBox status code.
2859 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2860 * @param pszFormat Error message format string.
2861 * @param ... Error message arguments.
2862 */
2863 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2864
2865 /**
2866 * Set the VM error message
2867 *
2868 * @returns rc.
2869 * @param pDrvIns Driver instance.
2870 * @param rc VBox status code.
2871 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2872 * @param pszFormat Error message format string.
2873 * @param va Error message arguments.
2874 */
2875 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2876
2877 /**
2878 * Set the VM runtime error message
2879 *
2880 * @returns VBox status code.
2881 * @param pDevIns Device instance.
2882 * @param fFatal Whether it is a fatal error or not.
2883 * @param pszErrorID Error ID string.
2884 * @param pszFormat Error message format string.
2885 * @param ... Error message arguments.
2886 */
2887 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2888
2889 /**
2890 * Set the VM runtime error message
2891 *
2892 * @returns VBox status code.
2893 * @param pDevIns Device instance.
2894 * @param fFatal Whether it is a fatal error or not.
2895 * @param pszErrorID Error ID string.
2896 * @param pszFormat Error message format string.
2897 * @param va Error message arguments.
2898 */
2899 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2900
2901 /**
2902 * Set parameters for pending MMIO patch operation
2903 *
2904 * @returns rc.
2905 * @param pDevIns Device instance.
2906 * @param GCPhys MMIO physical address
2907 * @param pCachedData GC pointer to cached data
2908 */
2909 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2910
2911 /** Just a safety precaution. */
2912 uint32_t u32TheEnd;
2913} PDMDEVHLPR0;
2914/** Pointer PDM Device R0 API. */
2915typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2916/** Pointer PDM Device GC API. */
2917typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2918
2919/** Current PDMDEVHLP version number. */
2920#define PDM_DEVHLPR0_VERSION 0xfb010000
2921
2922
2923
2924/**
2925 * PDM Device Instance.
2926 */
2927typedef struct PDMDEVINS
2928{
2929 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2930 uint32_t u32Version;
2931 /** Device instance number. */
2932 RTUINT iInstance;
2933 /** The base interface of the device.
2934 * The device constructor initializes this if it has any
2935 * device level interfaces to export. To obtain this interface
2936 * call PDMR3QueryDevice(). */
2937 PDMIBASE IBase;
2938
2939 /** Internal data. */
2940 union
2941 {
2942#ifdef PDMDEVINSINT_DECLARED
2943 PDMDEVINSINT s;
2944#endif
2945 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2946 } Internal;
2947
2948 /** Pointer the HC PDM Device API. */
2949 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2950 /** Pointer the R0 PDM Device API. */
2951 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2952 /** Pointer to device registration structure. */
2953 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2954 /** Configuration handle. */
2955 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2956 /** Pointer to device instance data. */
2957 R3PTRTYPE(void *) pvInstanceDataR3;
2958 /** Pointer to device instance data. */
2959 R0PTRTYPE(void *) pvInstanceDataR0;
2960 /** Pointer the GC PDM Device API. */
2961 RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2962 /** Pointer to device instance data. */
2963 RCPTRTYPE(void *) pvInstanceDataGC;
2964 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2965 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2966 /** Device instance data. The size of this area is defined
2967 * in the PDMDEVREG::cbInstanceData field. */
2968 char achInstanceData[8];
2969} PDMDEVINS;
2970
2971/** Current DEVREG version number. */
2972#define PDM_DEVINS_VERSION 0xf3010000
2973
2974/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2975#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2976
2977
2978/** @def PDMDEV_ASSERT_EMT
2979 * Assert that the current thread is the emulation thread.
2980 */
2981#ifdef VBOX_STRICT
2982# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2983#else
2984# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2985#endif
2986
2987/** @def PDMDEV_ASSERT_OTHER
2988 * Assert that the current thread is NOT the emulation thread.
2989 */
2990#ifdef VBOX_STRICT
2991# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2992#else
2993# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2994#endif
2995
2996/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2997 * Assert that the current thread is owner of the VM lock.
2998 */
2999#ifdef VBOX_STRICT
3000# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3001#else
3002# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3003#endif
3004
3005/** @def PDMDEV_SET_ERROR
3006 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3007 */
3008#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3009 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3010
3011/** @def PDMDEV_SET_RUNTIME_ERROR
3012 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3013 */
3014#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3015 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3016
3017/** @def PDMDEVINS_2_GCPTR
3018 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
3019 */
3020#define PDMDEVINS_2_GCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3021
3022/** @def PDMDEVINS_2_R3PTR
3023 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
3024 */
3025#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3026
3027/** @def PDMDEVINS_2_R0PTR
3028 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3029 */
3030#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3031
3032
3033/**
3034 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3035 *
3036 * @returns VBox status code which must be passed up to the VMM.
3037 * @param pDevIns Device instance.
3038 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3039 * @param pszFormat Message. (optional)
3040 * @param ... Message parameters.
3041 */
3042DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3043{
3044#ifdef VBOX_STRICT
3045# ifdef IN_RING3
3046 int rc;
3047 va_list args;
3048 va_start(args, pszFormat);
3049 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3050 va_end(args);
3051 return rc;
3052# else
3053 return VINF_EM_DBG_STOP;
3054# endif
3055#else
3056 return VINF_SUCCESS;
3057#endif
3058}
3059
3060
3061#ifdef IN_RING3
3062/**
3063 * @copydoc PDMDEVHLP::pfnIOPortRegister
3064 */
3065DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3066 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3067 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3068{
3069 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3070}
3071
3072/**
3073 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
3074 */
3075DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3076 const char *pszOut, const char *pszIn, const char *pszOutStr,
3077 const char *pszInStr, const char *pszDesc)
3078{
3079 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3080}
3081
3082/**
3083 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
3084 */
3085DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3086 const char *pszOut, const char *pszIn, const char *pszOutStr,
3087 const char *pszInStr, const char *pszDesc)
3088{
3089 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3090}
3091
3092/**
3093 * @copydoc PDMDEVHLP::pfnMMIORegister
3094 */
3095DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3096 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3097 const char *pszDesc)
3098{
3099 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3100}
3101
3102/**
3103 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
3104 */
3105DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3106 const char *pszWrite, const char *pszRead, const char *pszFill)
3107{
3108 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3109}
3110
3111/**
3112 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3113 */
3114DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3115 const char *pszWrite, const char *pszRead, const char *pszFill)
3116{
3117 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3118}
3119
3120/**
3121 * @copydoc PDMDEVHLP::pfnROMRegister
3122 */
3123DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3124{
3125 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3126}
3127/**
3128 * @copydoc PDMDEVHLP::pfnROMProtectShadow
3129 */
3130DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3131{
3132 return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3133}
3134
3135/**
3136 * @copydoc PDMDEVHLP::pfnMMIO2Register
3137 */
3138DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3139{
3140 return pDevIns->pDevHlp->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3141}
3142
3143/**
3144 * @copydoc PDMDEVHLP::pfnMMIO2Deregister
3145 */
3146DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3147{
3148 return pDevIns->pDevHlp->pfnMMIO2Deregister(pDevIns, iRegion);
3149}
3150
3151/**
3152 * @copydoc PDMDEVHLP::pfnMMIO2Map
3153 */
3154DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3155{
3156 return pDevIns->pDevHlp->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3157}
3158
3159/**
3160 * @copydoc PDMDEVHLP::pfnMMIO2Unmap
3161 */
3162DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3163{
3164 return pDevIns->pDevHlp->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3165}
3166
3167/**
3168 * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
3169 */
3170DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3171 const char *pszDesc, PRTGCPTR pGCPtr)
3172{
3173 return pDevIns->pDevHlp->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pGCPtr);
3174}
3175
3176/**
3177 * @copydoc PDMDEVHLP::pfnSSMRegister
3178 */
3179DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3180 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3181 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3182{
3183 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3184 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3185 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3186}
3187
3188/**
3189 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3190 */
3191DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3192{
3193 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3194}
3195
3196/**
3197 * @copydoc PDMDEVHLP::pfnPCIRegister
3198 */
3199DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3200{
3201 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3202}
3203
3204/**
3205 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3206 */
3207DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3208{
3209 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3210}
3211
3212/**
3213 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3214 */
3215DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3216 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3217{
3218 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3219}
3220
3221/**
3222 * @copydoc PDMDEVHLP::pfnDriverAttach
3223 */
3224DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3225{
3226 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3227}
3228
3229/**
3230 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3231 */
3232DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3233{
3234 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3235}
3236
3237/**
3238 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3239 */
3240DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3241{
3242 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3243}
3244
3245/**
3246 * @copydoc PDMDEVHLP::pfnMMHeapFree
3247 */
3248DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3249{
3250 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3251}
3252
3253/**
3254 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3255 */
3256DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3257{
3258 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3259}
3260
3261/**
3262 * @copydoc PDMDEVHLP::pfnSTAMRegister
3263 */
3264DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3265{
3266 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3267}
3268
3269/**
3270 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3271 */
3272DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3273 const char *pszDesc, const char *pszName, ...)
3274{
3275 va_list va;
3276 va_start(va, pszName);
3277 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3278 va_end(va);
3279}
3280
3281/**
3282 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3283 */
3284DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3285 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3286{
3287 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3288}
3289
3290/**
3291 * @copydoc PDMDEVHLP::pfnCritSectInit
3292 */
3293DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3294{
3295 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3296}
3297
3298/**
3299 * @copydoc PDMDEVHLP::pfnUTCNow
3300 */
3301DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3302{
3303 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3304}
3305
3306/**
3307 * @copydoc PDMDEVHLP::pfnGetVM
3308 */
3309DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3310{
3311 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3312}
3313
3314/**
3315 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3316 */
3317DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3318{
3319 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3320}
3321
3322/**
3323 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3324 */
3325DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3326{
3327 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3328}
3329
3330/**
3331 * @copydoc PDMDEVHLP::pfnPhysReserve
3332 */
3333DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3334{
3335 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3336}
3337
3338/**
3339 * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
3340 */
3341DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3342{
3343 return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3344}
3345
3346/**
3347 * @copydoc PDMDEVHLP::pfnVMState
3348 */
3349DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3350{
3351 return pDevIns->pDevHlp->pfnVMState(pDevIns);
3352}
3353
3354/**
3355 * @copydoc PDMDEVHLP::pfnA20Set
3356 */
3357DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3358{
3359 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3360}
3361
3362/**
3363 * @copydoc PDMDEVHLP::pfnVMReset
3364 */
3365DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3366{
3367 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3368}
3369
3370/**
3371 * @copydoc PDMDEVHLP::pfnVMSuspend
3372 */
3373DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3374{
3375 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3376}
3377
3378/**
3379 * @copydoc PDMDEVHLP::pfnVMPowerOff
3380 */
3381DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3382{
3383 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3384}
3385
3386/**
3387 * @copydoc PDMDEVHLP::pfnDMARegister
3388 */
3389DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3390{
3391 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3392}
3393
3394/**
3395 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3396 */
3397DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3398{
3399 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3400}
3401
3402/**
3403 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3404 */
3405DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3406{
3407 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3408}
3409
3410/**
3411 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3412 */
3413DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3414{
3415 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3416}
3417
3418/**
3419 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3420 */
3421DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3422{
3423 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3424}
3425
3426/**
3427 * @copydoc PDMDEVHLP::pfnDMASchedule
3428 */
3429DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3430{
3431 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3432}
3433
3434/**
3435 * @copydoc PDMDEVHLP::pfnCMOSWrite
3436 */
3437DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3438{
3439 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3440}
3441
3442/**
3443 * @copydoc PDMDEVHLP::pfnCMOSRead
3444 */
3445DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3446{
3447 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3448}
3449
3450/**
3451 * @copydoc PDMDEVHLP::pfnGetCpuId
3452 */
3453DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3454{
3455 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3456}
3457
3458/**
3459 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3460 */
3461DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3462 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3463{
3464 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3465}
3466#endif /* IN_RING3 */
3467
3468
3469/**
3470 * @copydoc PDMDEVHLP::pfnPCISetIrq
3471 */
3472DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3473{
3474#ifdef IN_GC
3475 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3476#elif defined(IN_RING0)
3477 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3478#else
3479 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3480#endif
3481}
3482
3483/**
3484 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3485 */
3486DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3487{
3488#ifdef IN_GC
3489 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3490#elif defined(IN_RING0)
3491 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3492#else
3493 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3494#endif
3495}
3496
3497/**
3498 * @copydoc PDMDEVHLP::pfnISASetIrq
3499 */
3500DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3501{
3502#ifdef IN_GC
3503 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3504#elif defined(IN_RING0)
3505 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3506#else
3507 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3508#endif
3509}
3510
3511/**
3512 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3513 */
3514DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3515{
3516#ifdef IN_GC
3517 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3518#elif defined(IN_RING0)
3519 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3520#else
3521 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3522#endif
3523}
3524
3525/**
3526 * @copydoc PDMDEVHLP::pfnPhysRead
3527 */
3528DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3529{
3530#ifdef IN_GC
3531 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3532#elif defined(IN_RING0)
3533 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3534#else
3535 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3536#endif
3537}
3538
3539/**
3540 * @copydoc PDMDEVHLP::pfnPhysWrite
3541 */
3542DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3543{
3544#ifdef IN_GC
3545 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3546#elif defined(IN_RING0)
3547 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3548#else
3549 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3550#endif
3551}
3552
3553/**
3554 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3555 */
3556DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3557{
3558#ifdef IN_GC
3559 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3560#elif defined(IN_RING0)
3561 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3562#else
3563 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3564#endif
3565}
3566
3567/**
3568 * @copydoc PDMDEVHLP::pfnVMSetError
3569 */
3570DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3571{
3572 va_list va;
3573 va_start(va, pszFormat);
3574#ifdef IN_GC
3575 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3576#elif defined(IN_RING0)
3577 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3578#else
3579 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3580#endif
3581 va_end(va);
3582 return rc;
3583}
3584
3585/**
3586 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3587 */
3588DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3589{
3590 va_list va;
3591 int rc;
3592 va_start(va, pszFormat);
3593#ifdef IN_GC
3594 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3595#elif defined(IN_RING0)
3596 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3597#else
3598 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3599#endif
3600 va_end(va);
3601 return rc;
3602}
3603
3604
3605
3606/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3607typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3608
3609/**
3610 * Callbacks for VBoxDeviceRegister().
3611 */
3612typedef struct PDMDEVREGCB
3613{
3614 /** Interface version.
3615 * This is set to PDM_DEVREG_CB_VERSION. */
3616 uint32_t u32Version;
3617
3618 /**
3619 * Registers a device with the current VM instance.
3620 *
3621 * @returns VBox status code.
3622 * @param pCallbacks Pointer to the callback table.
3623 * @param pDevReg Pointer to the device registration record.
3624 * This data must be permanent and readonly.
3625 */
3626 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3627
3628 /**
3629 * Allocate memory which is associated with current VM instance
3630 * and automatically freed on it's destruction.
3631 *
3632 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3633 * @param pCallbacks Pointer to the callback table.
3634 * @param cb Number of bytes to allocate.
3635 */
3636 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3637} PDMDEVREGCB;
3638
3639/** Current version of the PDMDEVREGCB structure. */
3640#define PDM_DEVREG_CB_VERSION 0xf4010000
3641
3642
3643/**
3644 * The VBoxDevicesRegister callback function.
3645 *
3646 * PDM will invoke this function after loading a device module and letting
3647 * the module decide which devices to register and how to handle conflicts.
3648 *
3649 * @returns VBox status code.
3650 * @param pCallbacks Pointer to the callback table.
3651 * @param u32Version VBox version number.
3652 */
3653typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3654
3655/** @} */
3656
3657__END_DECLS
3658
3659#endif
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