VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 10518

Last change on this file since 10518 was 10492, checked in by vboxsync, 16 years ago

Added PDMApicHasPendingIrq.

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File size: 135.1 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device Devices
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of guest context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
249 char szGCMod[32];
250 /** Name of guest context module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292} PDMDEVREG;
293/** Pointer to a PDM Device Structure. */
294typedef PDMDEVREG *PPDMDEVREG;
295/** Const pointer to a PDM Device Structure. */
296typedef PDMDEVREG const *PCPDMDEVREG;
297
298/** Current DEVREG version number. */
299#define PDM_DEVREG_VERSION 0xc0010000
300
301/** PDM Device Flags.
302 * @{ */
303/** This flag is used to indicate that the device has a GC component. */
304#define PDM_DEVREG_FLAGS_GC 0x00000001
305/** This flag is used to indicate that the device has a R0 component. */
306#define PDM_DEVREG_FLAGS_R0 0x00010000
307
308/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
309 * The bit count for the current host. */
310#if HC_ARCH_BITS == 32
311# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
312#elif HC_ARCH_BITS == 64
313# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
314#else
315# error Unsupported HC_ARCH_BITS value.
316#endif
317/** The host bit count mask. */
318#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
319
320/** The device support only 32-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
322/** The device support only 64-bit guests. */
323#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
324/** The device support both 32-bit & 64-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
326/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
327 * The guest bit count for the current compilation. */
328#if GC_ARCH_BITS == 32
329# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
330#elif GC_ARCH_BITS == 64
331# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
332#else
333# error Unsupported GC_ARCH_BITS value.
334#endif
335/** The guest bit count mask. */
336#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
337
338/** Indicates that the devices support PAE36 on a 32-bit guest. */
339#define PDM_DEVREG_FLAGS_PAE36 0x00000020
340/** @} */
341
342
343/** PDM Device Classes.
344 * The order is important, lower bit earlier instantiation.
345 * @{ */
346/** Architecture device. */
347#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
348/** Architecture BIOS device. */
349#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
350/** PCI bus brigde. */
351#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
352/** ISA bus brigde. */
353#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
354/** Input device (mouse, keyboard, joystick,..). */
355#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
356/** Interrupt controller (PIC). */
357#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
358/** Interval controoler (PIT). */
359#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
360/** RTC/CMOS. */
361#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
362/** DMA controller. */
363#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
364/** VMM Device. */
365#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
366/** Graphics device, like VGA. */
367#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
368/** Storage controller device. */
369#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
370/** Network interface controller. */
371#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
372/** Audio. */
373#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
374/** USB HIC. */
375#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
376/** ACPI. */
377#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
378/** Serial controller device. */
379#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
380/** Parallel controller device */
381#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
382/** Misc devices (always last). */
383#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
384/** @} */
385
386
387/** @name IRQ Level for use with the *SetIrq APIs.
388 * @{
389 */
390/** Assert the IRQ (can assume value 1). */
391#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
392/** Deassert the IRQ (can assume value 0). */
393#define PDM_IRQ_LEVEL_LOW 0
394/** flip-flop - assert and then deassert it again immediately. */
395#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
396/** @} */
397
398
399/**
400 * PCI Bus registration structure.
401 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
402 */
403typedef struct PDMPCIBUSREG
404{
405 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
406 uint32_t u32Version;
407
408 /**
409 * Registers the device with the default PCI bus.
410 *
411 * @returns VBox status code.
412 * @param pDevIns Device instance of the PCI Bus.
413 * @param pPciDev The PCI device structure.
414 * Any PCI enabled device must keep this in it's instance data!
415 * Fill in the PCI data config before registration, please.
416 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
417 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
418 * If negative, the pci bus device will assign one.
419 */
420 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
421
422 /**
423 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
424 *
425 * @returns VBox status code.
426 * @param pDevIns Device instance of the PCI Bus.
427 * @param pPciDev The PCI device structure.
428 * @param iRegion The region number.
429 * @param cbRegion Size of the region.
430 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
431 * @param pfnCallback Callback for doing the mapping.
432 */
433 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
434
435 /**
436 * Register PCI configuration space read/write callbacks.
437 *
438 * @param pDevIns Device instance of the PCI Bus.
439 * @param pPciDev The PCI device structure.
440 * @param pfnRead Pointer to the user defined PCI config read function.
441 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
442 * PCI config read function. This way, user can decide when (and if)
443 * to call default PCI config read function. Can be NULL.
444 * @param pfnWrite Pointer to the user defined PCI config write function.
445 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
446 * PCI config write function. This way, user can decide when (and if)
447 * to call default PCI config write function. Can be NULL.
448 * @thread EMT
449 */
450 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
451 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
452
453 /**
454 * Set the IRQ for a PCI device.
455 *
456 * @param pDevIns Device instance of the PCI Bus.
457 * @param pPciDev The PCI device structure.
458 * @param iIrq IRQ number to set.
459 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
460 */
461 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
462
463 /**
464 * Saves a state of the PCI device.
465 *
466 * @returns VBox status code.
467 * @param pDevIns Device instance of the PCI Bus.
468 * @param pPciDev Pointer to PCI device.
469 * @param pSSMHandle The handle to save the state to.
470 */
471 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
472
473 /**
474 * Loads a saved PCI device state.
475 *
476 * @returns VBox status code.
477 * @param pDevIns Device instance of the PCI Bus.
478 * @param pPciDev Pointer to PCI device.
479 * @param pSSMHandle The handle to the saved state.
480 */
481 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
482
483 /**
484 * Called to perform the job of the bios.
485 * This is only called for the first PCI Bus - it is expected to
486 * service all the PCI buses.
487 *
488 * @returns VBox status.
489 * @param pDevIns Device instance of the first bus.
490 */
491 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
492
493 /** The name of the SetIrq GC entry point. */
494 const char *pszSetIrqGC;
495
496 /** The name of the SetIrq R0 entry point. */
497 const char *pszSetIrqR0;
498
499} PDMPCIBUSREG;
500/** Pointer to a PCI bus registration structure. */
501typedef PDMPCIBUSREG *PPDMPCIBUSREG;
502
503/** Current PDMPCIBUSREG version number. */
504#define PDM_PCIBUSREG_VERSION 0xd0020000
505
506/**
507 * PCI Bus GC helpers.
508 */
509typedef struct PDMPCIHLPGC
510{
511 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
512 uint32_t u32Version;
513
514 /**
515 * Set an ISA IRQ.
516 *
517 * @param pDevIns PCI device instance.
518 * @param iIrq IRQ number to set.
519 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
520 * @thread EMT only.
521 */
522 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
523
524 /**
525 * Set an I/O-APIC IRQ.
526 *
527 * @param pDevIns PCI device instance.
528 * @param iIrq IRQ number to set.
529 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
530 * @thread EMT only.
531 */
532 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
533
534 /**
535 * Acquires the PDM lock.
536 *
537 * @returns VINF_SUCCESS on success.
538 * @returns rc if we failed to acquire the lock.
539 * @param pDevIns The PCI device instance.
540 * @param rc What to return if we fail to acquire the lock.
541 */
542 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
543
544 /**
545 * Releases the PDM lock.
546 *
547 * @param pDevIns The PCI device instance.
548 */
549 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
550
551 /** Just a safety precaution. */
552 uint32_t u32TheEnd;
553} PDMPCIHLPGC;
554/** Pointer to PCI helpers. */
555typedef RCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
556/** Pointer to const PCI helpers. */
557typedef RCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
558
559/** Current PDMPCIHLPR3 version number. */
560#define PDM_PCIHLPGC_VERSION 0xe1010000
561
562
563/**
564 * PCI Bus R0 helpers.
565 */
566typedef struct PDMPCIHLPR0
567{
568 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
569 uint32_t u32Version;
570
571 /**
572 * Set an ISA IRQ.
573 *
574 * @param pDevIns PCI device instance.
575 * @param iIrq IRQ number to set.
576 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
577 * @thread EMT only.
578 */
579 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
580
581 /**
582 * Set an I/O-APIC IRQ.
583 *
584 * @param pDevIns PCI device instance.
585 * @param iIrq IRQ number to set.
586 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
587 * @thread EMT only.
588 */
589 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
590
591 /**
592 * Acquires the PDM lock.
593 *
594 * @returns VINF_SUCCESS on success.
595 * @returns rc if we failed to acquire the lock.
596 * @param pDevIns The PCI device instance.
597 * @param rc What to return if we fail to acquire the lock.
598 */
599 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
600
601 /**
602 * Releases the PDM lock.
603 *
604 * @param pDevIns The PCI device instance.
605 */
606 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
607
608 /** Just a safety precaution. */
609 uint32_t u32TheEnd;
610} PDMPCIHLPR0;
611/** Pointer to PCI helpers. */
612typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
613/** Pointer to const PCI helpers. */
614typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
615
616/** Current PDMPCIHLPR0 version number. */
617#define PDM_PCIHLPR0_VERSION 0xe1010000
618
619/**
620 * PCI device helpers.
621 */
622typedef struct PDMPCIHLPR3
623{
624 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
625 uint32_t u32Version;
626
627 /**
628 * Set an ISA IRQ.
629 *
630 * @param pDevIns The PCI device instance.
631 * @param iIrq IRQ number to set.
632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
633 * @thread EMT only.
634 */
635 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
636
637 /**
638 * Set an I/O-APIC IRQ.
639 *
640 * @param pDevIns The PCI device instance.
641 * @param iIrq IRQ number to set.
642 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
643 * @thread EMT only.
644 */
645 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
646
647 /**
648 * Checks if the given address is an MMIO2 base address or not.
649 *
650 * @returns true/false accordingly.
651 * @param pDevIns The PCI device instance.
652 * @param pOwner The owner of the memory, optional.
653 * @param GCPhys The address to check.
654 */
655 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
656
657 /**
658 * Gets the address of the GC PCI Bus helpers.
659 *
660 * This should be called at both construction and relocation time
661 * to obtain the correct address of the GC helpers.
662 *
663 * @returns GC pointer to the PCI Bus helpers.
664 * @param pDevIns Device instance of the PCI Bus.
665 * @thread EMT only.
666 */
667 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
668
669 /**
670 * Gets the address of the R0 PCI Bus helpers.
671 *
672 * This should be called at both construction and relocation time
673 * to obtain the correct address of the GC helpers.
674 *
675 * @returns R0 pointer to the PCI Bus helpers.
676 * @param pDevIns Device instance of the PCI Bus.
677 * @thread EMT only.
678 */
679 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
680
681 /**
682 * Acquires the PDM lock.
683 *
684 * @returns VINF_SUCCESS on success.
685 * @returns Fatal error on failure.
686 * @param pDevIns The PCI device instance.
687 * @param rc Dummy for making the interface identical to the GC and R0 versions.
688 */
689 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
690
691 /**
692 * Releases the PDM lock.
693 *
694 * @param pDevIns The PCI device instance.
695 */
696 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
697
698 /** Just a safety precaution. */
699 uint32_t u32TheEnd;
700} PDMPCIHLPR3;
701/** Pointer to PCI helpers. */
702typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
703/** Pointer to const PCI helpers. */
704typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
705
706/** Current PDMPCIHLPR3 version number. */
707#define PDM_PCIHLPR3_VERSION 0xf1020000
708
709
710/**
711 * Programmable Interrupt Controller registration structure.
712 */
713typedef struct PDMPICREG
714{
715 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
716 uint32_t u32Version;
717
718 /**
719 * Set the an IRQ.
720 *
721 * @param pDevIns Device instance of the PIC.
722 * @param iIrq IRQ number to set.
723 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
724 */
725 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
726
727 /**
728 * Get a pending interrupt.
729 *
730 * @returns Pending interrupt number.
731 * @param pDevIns Device instance of the PIC.
732 */
733 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
734
735 /** The name of the GC SetIrq entry point. */
736 const char *pszSetIrqGC;
737 /** The name of the GC GetInterrupt entry point. */
738 const char *pszGetInterruptGC;
739
740 /** The name of the R0 SetIrq entry point. */
741 const char *pszSetIrqR0;
742 /** The name of the R0 GetInterrupt entry point. */
743 const char *pszGetInterruptR0;
744} PDMPICREG;
745/** Pointer to a PIC registration structure. */
746typedef PDMPICREG *PPDMPICREG;
747
748/** Current PDMPICREG version number. */
749#define PDM_PICREG_VERSION 0xe0020000
750
751/**
752 * PIC GC helpers.
753 */
754typedef struct PDMPICHLPGC
755{
756 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
757 uint32_t u32Version;
758
759 /**
760 * Set the interrupt force action flag.
761 *
762 * @param pDevIns Device instance of the PIC.
763 */
764 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
765
766 /**
767 * Clear the interrupt force action flag.
768 *
769 * @param pDevIns Device instance of the PIC.
770 */
771 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
772
773 /**
774 * Acquires the PDM lock.
775 *
776 * @returns VINF_SUCCESS on success.
777 * @returns rc if we failed to acquire the lock.
778 * @param pDevIns The PIC device instance.
779 * @param rc What to return if we fail to acquire the lock.
780 */
781 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
782
783 /**
784 * Releases the PDM lock.
785 *
786 * @param pDevIns The PIC device instance.
787 */
788 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
789
790 /** Just a safety precaution. */
791 uint32_t u32TheEnd;
792} PDMPICHLPGC;
793
794/** Pointer to PIC GC helpers. */
795typedef RCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
796/** Pointer to const PIC GC helpers. */
797typedef RCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
798
799/** Current PDMPICHLPGC version number. */
800#define PDM_PICHLPGC_VERSION 0xfc010000
801
802
803/**
804 * PIC R0 helpers.
805 */
806typedef struct PDMPICHLPR0
807{
808 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
809 uint32_t u32Version;
810
811 /**
812 * Set the interrupt force action flag.
813 *
814 * @param pDevIns Device instance of the PIC.
815 */
816 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
817
818 /**
819 * Clear the interrupt force action flag.
820 *
821 * @param pDevIns Device instance of the PIC.
822 */
823 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
824
825 /**
826 * Acquires the PDM lock.
827 *
828 * @returns VINF_SUCCESS on success.
829 * @returns rc if we failed to acquire the lock.
830 * @param pDevIns The PIC device instance.
831 * @param rc What to return if we fail to acquire the lock.
832 */
833 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
834
835 /**
836 * Releases the PDM lock.
837 *
838 * @param pDevIns The PCI device instance.
839 */
840 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
841
842 /** Just a safety precaution. */
843 uint32_t u32TheEnd;
844} PDMPICHLPR0;
845
846/** Pointer to PIC R0 helpers. */
847typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
848/** Pointer to const PIC R0 helpers. */
849typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
850
851/** Current PDMPICHLPR0 version number. */
852#define PDM_PICHLPR0_VERSION 0xfc010000
853
854/**
855 * PIC HC helpers.
856 */
857typedef struct PDMPICHLPR3
858{
859 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
860 uint32_t u32Version;
861
862 /**
863 * Set the interrupt force action flag.
864 *
865 * @param pDevIns Device instance of the PIC.
866 */
867 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
868
869 /**
870 * Clear the interrupt force action flag.
871 *
872 * @param pDevIns Device instance of the PIC.
873 */
874 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
875
876 /**
877 * Acquires the PDM lock.
878 *
879 * @returns VINF_SUCCESS on success.
880 * @returns Fatal error on failure.
881 * @param pDevIns The PIC device instance.
882 * @param rc Dummy for making the interface identical to the GC and R0 versions.
883 */
884 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
885
886 /**
887 * Releases the PDM lock.
888 *
889 * @param pDevIns The PIC device instance.
890 */
891 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
892
893 /**
894 * Gets the address of the GC PIC helpers.
895 *
896 * This should be called at both construction and relocation time
897 * to obtain the correct address of the GC helpers.
898 *
899 * @returns GC pointer to the PIC helpers.
900 * @param pDevIns Device instance of the PIC.
901 */
902 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
903
904 /**
905 * Gets the address of the R0 PIC helpers.
906 *
907 * This should be called at both construction and relocation time
908 * to obtain the correct address of the GC helpers.
909 *
910 * @returns R0 pointer to the PIC helpers.
911 * @param pDevIns Device instance of the PIC.
912 */
913 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPR3;
918
919/** Pointer to PIC HC helpers. */
920typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
921/** Pointer to const PIC HC helpers. */
922typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
923
924/** Current PDMPICHLPR3 version number. */
925#define PDM_PICHLPR3_VERSION 0xf0010000
926
927
928
929/**
930 * Advanced Programmable Interrupt Controller registration structure.
931 */
932typedef struct PDMAPICREG
933{
934 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
935 uint32_t u32Version;
936
937 /**
938 * Get a pending interrupt.
939 *
940 * @returns Pending interrupt number.
941 * @param pDevIns Device instance of the APIC.
942 */
943 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
944
945 /**
946 * Check if the APIC has a pending interrupt/if a TPR change would active one
947 *
948 * @returns Pending interrupt yes/no
949 * @param pDevIns Device instance of the APIC.
950 */
951 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqHC,(PPDMDEVINS pDevIns));
952
953 /**
954 * Set the APIC base.
955 *
956 * @param pDevIns Device instance of the APIC.
957 * @param u64Base The new base.
958 */
959 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
960
961 /**
962 * Get the APIC base.
963 *
964 * @returns Current base.
965 * @param pDevIns Device instance of the APIC.
966 */
967 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
968
969 /**
970 * Set the TPR (task priority register?).
971 *
972 * @param pDevIns Device instance of the APIC.
973 * @param u8TPR The new TPR.
974 */
975 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
976
977 /**
978 * Get the TPR (task priority register?).
979 *
980 * @returns The current TPR.
981 * @param pDevIns Device instance of the APIC.
982 */
983 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
984
985 /**
986 * Private interface between the IOAPIC and APIC.
987 *
988 * This is a low-level, APIC/IOAPIC implementation specific interface
989 * which is registered with PDM only because it makes life so much
990 * simpler right now (GC bits). This is a bad bad hack! The correct
991 * way of doing this would involve some way of querying GC interfaces
992 * and relocating them. Perhaps doing some kind of device init in GC...
993 *
994 * @returns The current TPR.
995 * @param pDevIns Device instance of the APIC.
996 * @param u8Dest See APIC implementation.
997 * @param u8DestMode See APIC implementation.
998 * @param u8DeliveryMode See APIC implementation.
999 * @param iVector See APIC implementation.
1000 * @param u8Polarity See APIC implementation.
1001 * @param u8TriggerMode See APIC implementation.
1002 */
1003 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1004 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1005
1006 /** The name of the GC GetInterrupt entry point. */
1007 const char *pszGetInterruptGC;
1008 /** The name of the GC HasPendingIrq entry point. */
1009 const char *pszHasPendingIrqGC;
1010 /** The name of the GC SetBase entry point. */
1011 const char *pszSetBaseGC;
1012 /** The name of the GC GetBase entry point. */
1013 const char *pszGetBaseGC;
1014 /** The name of the GC SetTPR entry point. */
1015 const char *pszSetTPRGC;
1016 /** The name of the GC GetTPR entry point. */
1017 const char *pszGetTPRGC;
1018 /** The name of the GC BusDeliver entry point. */
1019 const char *pszBusDeliverGC;
1020
1021 /** The name of the R0 GetInterrupt entry point. */
1022 const char *pszGetInterruptR0;
1023 /** The name of the R0 HasPendingIrq entry point. */
1024 const char *pszHasPendingIrqR0;
1025 /** The name of the R0 SetBase entry point. */
1026 const char *pszSetBaseR0;
1027 /** The name of the R0 GetBase entry point. */
1028 const char *pszGetBaseR0;
1029 /** The name of the R0 SetTPR entry point. */
1030 const char *pszSetTPRR0;
1031 /** The name of the R0 GetTPR entry point. */
1032 const char *pszGetTPRR0;
1033 /** The name of the R0 BusDeliver entry point. */
1034 const char *pszBusDeliverR0;
1035
1036} PDMAPICREG;
1037/** Pointer to an APIC registration structure. */
1038typedef PDMAPICREG *PPDMAPICREG;
1039
1040/** Current PDMAPICREG version number. */
1041#define PDM_APICREG_VERSION 0x70010000
1042
1043
1044/**
1045 * APIC GC helpers.
1046 */
1047typedef struct PDMAPICHLPGC
1048{
1049 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1050 uint32_t u32Version;
1051
1052 /**
1053 * Set the interrupt force action flag.
1054 *
1055 * @param pDevIns Device instance of the APIC.
1056 */
1057 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1058
1059 /**
1060 * Clear the interrupt force action flag.
1061 *
1062 * @param pDevIns Device instance of the APIC.
1063 */
1064 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1065
1066 /**
1067 * Sets or clears the APIC bit in the CPUID feature masks.
1068 *
1069 * @param pDevIns Device instance of the APIC.
1070 * @param fEnabled If true the bit is set, else cleared.
1071 */
1072 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1073
1074 /**
1075 * Acquires the PDM lock.
1076 *
1077 * @returns VINF_SUCCESS on success.
1078 * @returns rc if we failed to acquire the lock.
1079 * @param pDevIns The APIC device instance.
1080 * @param rc What to return if we fail to acquire the lock.
1081 */
1082 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1083
1084 /**
1085 * Releases the PDM lock.
1086 *
1087 * @param pDevIns The APIC device instance.
1088 */
1089 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1090
1091 /** Just a safety precaution. */
1092 uint32_t u32TheEnd;
1093} PDMAPICHLPGC;
1094/** Pointer to APIC GC helpers. */
1095typedef RCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1096/** Pointer to const APIC helpers. */
1097typedef RCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1098
1099/** Current PDMAPICHLPGC version number. */
1100#define PDM_APICHLPGC_VERSION 0x60010000
1101
1102
1103/**
1104 * APIC R0 helpers.
1105 */
1106typedef struct PDMAPICHLPR0
1107{
1108 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1109 uint32_t u32Version;
1110
1111 /**
1112 * Set the interrupt force action flag.
1113 *
1114 * @param pDevIns Device instance of the APIC.
1115 */
1116 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1117
1118 /**
1119 * Clear the interrupt force action flag.
1120 *
1121 * @param pDevIns Device instance of the APIC.
1122 */
1123 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1124
1125 /**
1126 * Sets or clears the APIC bit in the CPUID feature masks.
1127 *
1128 * @param pDevIns Device instance of the APIC.
1129 * @param fEnabled If true the bit is set, else cleared.
1130 */
1131 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1132
1133 /**
1134 * Acquires the PDM lock.
1135 *
1136 * @returns VINF_SUCCESS on success.
1137 * @returns rc if we failed to acquire the lock.
1138 * @param pDevIns The APIC device instance.
1139 * @param rc What to return if we fail to acquire the lock.
1140 */
1141 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1142
1143 /**
1144 * Releases the PDM lock.
1145 *
1146 * @param pDevIns The APIC device instance.
1147 */
1148 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1149
1150 /** Just a safety precaution. */
1151 uint32_t u32TheEnd;
1152} PDMAPICHLPR0;
1153/** Pointer to APIC GC helpers. */
1154typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1155/** Pointer to const APIC helpers. */
1156typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1157
1158/** Current PDMAPICHLPR0 version number. */
1159#define PDM_APICHLPR0_VERSION 0x60010000
1160
1161/**
1162 * APIC HC helpers.
1163 */
1164typedef struct PDMAPICHLPR3
1165{
1166 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1167 uint32_t u32Version;
1168
1169 /**
1170 * Set the interrupt force action flag.
1171 *
1172 * @param pDevIns Device instance of the APIC.
1173 */
1174 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1175
1176 /**
1177 * Clear the interrupt force action flag.
1178 *
1179 * @param pDevIns Device instance of the APIC.
1180 */
1181 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1182
1183 /**
1184 * Sets or clears the APIC bit in the CPUID feature masks.
1185 *
1186 * @param pDevIns Device instance of the APIC.
1187 * @param fEnabled If true the bit is set, else cleared.
1188 */
1189 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1190
1191 /**
1192 * Acquires the PDM lock.
1193 *
1194 * @returns VINF_SUCCESS on success.
1195 * @returns Fatal error on failure.
1196 * @param pDevIns The APIC device instance.
1197 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1198 */
1199 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1200
1201 /**
1202 * Releases the PDM lock.
1203 *
1204 * @param pDevIns The APIC device instance.
1205 */
1206 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1207
1208 /**
1209 * Gets the address of the GC APIC helpers.
1210 *
1211 * This should be called at both construction and relocation time
1212 * to obtain the correct address of the GC helpers.
1213 *
1214 * @returns GC pointer to the APIC helpers.
1215 * @param pDevIns Device instance of the APIC.
1216 */
1217 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1218
1219 /**
1220 * Gets the address of the R0 APIC helpers.
1221 *
1222 * This should be called at both construction and relocation time
1223 * to obtain the correct address of the R0 helpers.
1224 *
1225 * @returns R0 pointer to the APIC helpers.
1226 * @param pDevIns Device instance of the APIC.
1227 */
1228 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1229
1230 /** Just a safety precaution. */
1231 uint32_t u32TheEnd;
1232} PDMAPICHLPR3;
1233/** Pointer to APIC helpers. */
1234typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1235/** Pointer to const APIC helpers. */
1236typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1237
1238/** Current PDMAPICHLP version number. */
1239#define PDM_APICHLPR3_VERSION 0xfd010000
1240
1241
1242/**
1243 * I/O APIC registration structure.
1244 */
1245typedef struct PDMIOAPICREG
1246{
1247 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1248 uint32_t u32Version;
1249
1250 /**
1251 * Set the an IRQ.
1252 *
1253 * @param pDevIns Device instance of the I/O APIC.
1254 * @param iIrq IRQ number to set.
1255 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1256 */
1257 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1258
1259 /** The name of the GC SetIrq entry point. */
1260 const char *pszSetIrqGC;
1261
1262 /** The name of the R0 SetIrq entry point. */
1263 const char *pszSetIrqR0;
1264} PDMIOAPICREG;
1265/** Pointer to an APIC registration structure. */
1266typedef PDMIOAPICREG *PPDMIOAPICREG;
1267
1268/** Current PDMAPICREG version number. */
1269#define PDM_IOAPICREG_VERSION 0x50010000
1270
1271
1272/**
1273 * IOAPIC GC helpers.
1274 */
1275typedef struct PDMIOAPICHLPGC
1276{
1277 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1278 uint32_t u32Version;
1279
1280 /**
1281 * Private interface between the IOAPIC and APIC.
1282 *
1283 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1284 *
1285 * @returns The current TPR.
1286 * @param pDevIns Device instance of the IOAPIC.
1287 * @param u8Dest See APIC implementation.
1288 * @param u8DestMode See APIC implementation.
1289 * @param u8DeliveryMode See APIC implementation.
1290 * @param iVector See APIC implementation.
1291 * @param u8Polarity See APIC implementation.
1292 * @param u8TriggerMode See APIC implementation.
1293 */
1294 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1295 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1296
1297 /**
1298 * Acquires the PDM lock.
1299 *
1300 * @returns VINF_SUCCESS on success.
1301 * @returns rc if we failed to acquire the lock.
1302 * @param pDevIns The IOAPIC device instance.
1303 * @param rc What to return if we fail to acquire the lock.
1304 */
1305 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1306
1307 /**
1308 * Releases the PDM lock.
1309 *
1310 * @param pDevIns The IOAPIC device instance.
1311 */
1312 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1313
1314 /** Just a safety precaution. */
1315 uint32_t u32TheEnd;
1316} PDMIOAPICHLPGC;
1317/** Pointer to IOAPIC GC helpers. */
1318typedef RCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1319/** Pointer to const IOAPIC helpers. */
1320typedef RCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1321
1322/** Current PDMIOAPICHLPGC version number. */
1323#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1324
1325
1326/**
1327 * IOAPIC R0 helpers.
1328 */
1329typedef struct PDMIOAPICHLPR0
1330{
1331 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1332 uint32_t u32Version;
1333
1334 /**
1335 * Private interface between the IOAPIC and APIC.
1336 *
1337 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1338 *
1339 * @returns The current TPR.
1340 * @param pDevIns Device instance of the IOAPIC.
1341 * @param u8Dest See APIC implementation.
1342 * @param u8DestMode See APIC implementation.
1343 * @param u8DeliveryMode See APIC implementation.
1344 * @param iVector See APIC implementation.
1345 * @param u8Polarity See APIC implementation.
1346 * @param u8TriggerMode See APIC implementation.
1347 */
1348 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1349 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1350
1351 /**
1352 * Acquires the PDM lock.
1353 *
1354 * @returns VINF_SUCCESS on success.
1355 * @returns rc if we failed to acquire the lock.
1356 * @param pDevIns The IOAPIC device instance.
1357 * @param rc What to return if we fail to acquire the lock.
1358 */
1359 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1360
1361 /**
1362 * Releases the PDM lock.
1363 *
1364 * @param pDevIns The IOAPIC device instance.
1365 */
1366 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1367
1368 /** Just a safety precaution. */
1369 uint32_t u32TheEnd;
1370} PDMIOAPICHLPR0;
1371/** Pointer to IOAPIC R0 helpers. */
1372typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1373/** Pointer to const IOAPIC helpers. */
1374typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1375
1376/** Current PDMIOAPICHLPR0 version number. */
1377#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1378
1379/**
1380 * IOAPIC HC helpers.
1381 */
1382typedef struct PDMIOAPICHLPR3
1383{
1384 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1385 uint32_t u32Version;
1386
1387 /**
1388 * Private interface between the IOAPIC and APIC.
1389 *
1390 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1391 *
1392 * @returns The current TPR.
1393 * @param pDevIns Device instance of the IOAPIC.
1394 * @param u8Dest See APIC implementation.
1395 * @param u8DestMode See APIC implementation.
1396 * @param u8DeliveryMode See APIC implementation.
1397 * @param iVector See APIC implementation.
1398 * @param u8Polarity See APIC implementation.
1399 * @param u8TriggerMode See APIC implementation.
1400 */
1401 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1402 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1403
1404 /**
1405 * Acquires the PDM lock.
1406 *
1407 * @returns VINF_SUCCESS on success.
1408 * @returns Fatal error on failure.
1409 * @param pDevIns The IOAPIC device instance.
1410 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1411 */
1412 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1413
1414 /**
1415 * Releases the PDM lock.
1416 *
1417 * @param pDevIns The IOAPIC device instance.
1418 */
1419 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1420
1421 /**
1422 * Gets the address of the GC IOAPIC helpers.
1423 *
1424 * This should be called at both construction and relocation time
1425 * to obtain the correct address of the GC helpers.
1426 *
1427 * @returns GC pointer to the IOAPIC helpers.
1428 * @param pDevIns Device instance of the IOAPIC.
1429 */
1430 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1431
1432 /**
1433 * Gets the address of the R0 IOAPIC helpers.
1434 *
1435 * This should be called at both construction and relocation time
1436 * to obtain the correct address of the R0 helpers.
1437 *
1438 * @returns R0 pointer to the IOAPIC helpers.
1439 * @param pDevIns Device instance of the IOAPIC.
1440 */
1441 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1442
1443 /** Just a safety precaution. */
1444 uint32_t u32TheEnd;
1445} PDMIOAPICHLPR3;
1446/** Pointer to IOAPIC HC helpers. */
1447typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1448/** Pointer to const IOAPIC helpers. */
1449typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1450
1451/** Current PDMIOAPICHLPR3 version number. */
1452#define PDM_IOAPICHLPR3_VERSION 0xff010000
1453
1454
1455
1456#ifdef IN_RING3
1457
1458/**
1459 * DMA Transfer Handler.
1460 *
1461 * @returns Number of bytes transferred.
1462 * @param pDevIns Device instance of the DMA.
1463 * @param pvUser User pointer.
1464 * @param uChannel Channel number.
1465 * @param off DMA position.
1466 * @param cb Block size.
1467 */
1468typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1469/** Pointer to a FNDMATRANSFERHANDLER(). */
1470typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1471
1472/**
1473 * DMA Controller registration structure.
1474 */
1475typedef struct PDMDMAREG
1476{
1477 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1478 uint32_t u32Version;
1479
1480 /**
1481 * Execute pending transfers.
1482 *
1483 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1484 * @param pDevIns Device instance of the DMAC.
1485 */
1486 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1487
1488 /**
1489 * Register transfer function for DMA channel.
1490 *
1491 * @param pDevIns Device instance of the DMAC.
1492 * @param uChannel Channel number.
1493 * @param pfnTransferHandler Device specific transfer function.
1494 * @param pvUSer User pointer to be passed to the callback.
1495 */
1496 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1497
1498 /**
1499 * Read memory
1500 *
1501 * @returns Number of bytes read.
1502 * @param pDevIns Device instance of the DMAC.
1503 * @param pvBuffer Pointer to target buffer.
1504 * @param off DMA position.
1505 * @param cbBlock Block size.
1506 */
1507 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1508
1509 /**
1510 * Write memory
1511 *
1512 * @returns Number of bytes written.
1513 * @param pDevIns Device instance of the DMAC.
1514 * @param pvBuffer Memory to write.
1515 * @param off DMA position.
1516 * @param cbBlock Block size.
1517 */
1518 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1519
1520 /**
1521 * Set the DREQ line.
1522 *
1523 * @param pDevIns Device instance of the DMAC.
1524 * @param uChannel Channel number.
1525 * @param uLevel Level of the line.
1526 */
1527 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1528
1529 /**
1530 * Get channel mode
1531 *
1532 * @returns Channel mode.
1533 * @param pDevIns Device instance of the DMAC.
1534 * @param uChannel Channel number.
1535 */
1536 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1537
1538} PDMDMACREG;
1539/** Pointer to a DMAC registration structure. */
1540typedef PDMDMACREG *PPDMDMACREG;
1541
1542/** Current PDMDMACREG version number. */
1543#define PDM_DMACREG_VERSION 0xf5010000
1544
1545
1546/**
1547 * DMA Controller device helpers.
1548 */
1549typedef struct PDMDMACHLP
1550{
1551 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1552 uint32_t u32Version;
1553
1554 /* to-be-defined */
1555
1556} PDMDMACHLP;
1557/** Pointer to DMAC helpers. */
1558typedef PDMDMACHLP *PPDMDMACHLP;
1559/** Pointer to const DMAC helpers. */
1560typedef const PDMDMACHLP *PCPDMDMACHLP;
1561
1562/** Current PDMDMACHLP version number. */
1563#define PDM_DMACHLP_VERSION 0xf6010000
1564
1565#endif /* IN_RING3 */
1566
1567
1568
1569/**
1570 * RTC registration structure.
1571 */
1572typedef struct PDMRTCREG
1573{
1574 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1575 uint32_t u32Version;
1576 uint32_t u32Alignment; /**< structure size alignment. */
1577
1578 /**
1579 * Write to a CMOS register and update the checksum if necessary.
1580 *
1581 * @returns VBox status code.
1582 * @param pDevIns Device instance of the RTC.
1583 * @param iReg The CMOS register index.
1584 * @param u8Value The CMOS register value.
1585 */
1586 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1587
1588 /**
1589 * Read a CMOS register.
1590 *
1591 * @returns VBox status code.
1592 * @param pDevIns Device instance of the RTC.
1593 * @param iReg The CMOS register index.
1594 * @param pu8Value Where to store the CMOS register value.
1595 */
1596 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1597
1598} PDMRTCREG;
1599/** Pointer to a RTC registration structure. */
1600typedef PDMRTCREG *PPDMRTCREG;
1601/** Pointer to a const RTC registration structure. */
1602typedef const PDMRTCREG *PCPDMRTCREG;
1603
1604/** Current PDMRTCREG version number. */
1605#define PDM_RTCREG_VERSION 0xfa010000
1606
1607
1608/**
1609 * RTC device helpers.
1610 */
1611typedef struct PDMRTCHLP
1612{
1613 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1614 uint32_t u32Version;
1615
1616 /* to-be-defined */
1617
1618} PDMRTCHLP;
1619/** Pointer to RTC helpers. */
1620typedef PDMRTCHLP *PPDMRTCHLP;
1621/** Pointer to const RTC helpers. */
1622typedef const PDMRTCHLP *PCPDMRTCHLP;
1623
1624/** Current PDMRTCHLP version number. */
1625#define PDM_RTCHLP_VERSION 0xf6010000
1626
1627
1628
1629#ifdef IN_RING3
1630
1631/**
1632 * PDM Device API.
1633 */
1634typedef struct PDMDEVHLP
1635{
1636 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1637 uint32_t u32Version;
1638
1639 /**
1640 * Register a number of I/O ports with a device.
1641 *
1642 * These callbacks are of course for the host context (HC).
1643 * Register HC handlers before guest context (GC) handlers! There must be a
1644 * HC handler for every GC handler!
1645 *
1646 * @returns VBox status.
1647 * @param pDevIns The device instance to register the ports with.
1648 * @param Port First port number in the range.
1649 * @param cPorts Number of ports to register.
1650 * @param pvUser User argument.
1651 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1652 * @param pfnIn Pointer to function which is gonna handle IN operations.
1653 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1654 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1655 * @param pszDesc Pointer to description string. This must not be freed.
1656 */
1657 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1658 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1659 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1660
1661 /**
1662 * Register a number of I/O ports with a device for GC.
1663 *
1664 * These callbacks are for the host context (GC).
1665 * Register host context (HC) handlers before guest context handlers! There must be a
1666 * HC handler for every GC handler!
1667 *
1668 * @returns VBox status.
1669 * @param pDevIns The device instance to register the ports with and which GC module
1670 * to resolve the names against.
1671 * @param Port First port number in the range.
1672 * @param cPorts Number of ports to register.
1673 * @param pvUser User argument.
1674 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1675 * @param pszIn Name of the GC function which is gonna handle IN operations.
1676 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1677 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1678 * @param pszDesc Pointer to description string. This must not be freed.
1679 */
1680 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1681 const char *pszOut, const char *pszIn,
1682 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1683
1684 /**
1685 * Register a number of I/O ports with a device.
1686 *
1687 * These callbacks are of course for the ring-0 host context (R0).
1688 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1689 *
1690 * @returns VBox status.
1691 * @param pDevIns The device instance to register the ports with.
1692 * @param Port First port number in the range.
1693 * @param cPorts Number of ports to register.
1694 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1695 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1696 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1697 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1698 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1699 * @param pszDesc Pointer to description string. This must not be freed.
1700 */
1701 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1702 const char *pszOut, const char *pszIn,
1703 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1704
1705 /**
1706 * Deregister I/O ports.
1707 *
1708 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1709 *
1710 * @returns VBox status.
1711 * @param pDevIns The device instance owning the ports.
1712 * @param Port First port number in the range.
1713 * @param cPorts Number of ports to deregister.
1714 */
1715 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1716
1717 /**
1718 * Register a Memory Mapped I/O (MMIO) region.
1719 *
1720 * These callbacks are of course for the host context (HC).
1721 * Register HC handlers before guest context (GC) handlers! There must be a
1722 * HC handler for every GC handler!
1723 *
1724 * @returns VBox status.
1725 * @param pDevIns The device instance to register the MMIO with.
1726 * @param GCPhysStart First physical address in the range.
1727 * @param cbRange The size of the range (in bytes).
1728 * @param pvUser User argument.
1729 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1730 * @param pfnRead Pointer to function which is gonna handle Read operations.
1731 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1732 * @param pszDesc Pointer to description string. This must not be freed.
1733 */
1734 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1735 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1736 const char *pszDesc));
1737
1738 /**
1739 * Register a Memory Mapped I/O (MMIO) region for GC.
1740 *
1741 * These callbacks are for the guest context (GC).
1742 * Register host context (HC) handlers before guest context handlers! There must be a
1743 * HC handler for every GC handler!
1744 *
1745 * @returns VBox status.
1746 * @param pDevIns The device instance to register the MMIO with.
1747 * @param GCPhysStart First physical address in the range.
1748 * @param cbRange The size of the range (in bytes).
1749 * @param pvUser User argument.
1750 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1751 * @param pszRead Name of the GC function which is gonna handle Read operations.
1752 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1753 * @param pszDesc Obsolete. NULL is fine.
1754 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1755 */
1756 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1757 const char *pszWrite, const char *pszRead, const char *pszFill,
1758 const char *pszDesc));
1759
1760 /**
1761 * Register a Memory Mapped I/O (MMIO) region for R0.
1762 *
1763 * These callbacks are for the ring-0 host context (R0).
1764 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1765 *
1766 * @returns VBox status.
1767 * @param pDevIns The device instance to register the MMIO with.
1768 * @param GCPhysStart First physical address in the range.
1769 * @param cbRange The size of the range (in bytes).
1770 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1771 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1772 * @param pszRead Name of the GC function which is gonna handle Read operations.
1773 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1774 * @param pszDesc Obsolete. NULL is fine.
1775 * @todo Remove pszDesc in the next major revision of PDMDEVHLP.
1776 */
1777 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1778 const char *pszWrite, const char *pszRead, const char *pszFill,
1779 const char *pszDesc));
1780
1781 /**
1782 * Deregister a Memory Mapped I/O (MMIO) region.
1783 *
1784 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1785 *
1786 * @returns VBox status.
1787 * @param pDevIns The device instance owning the MMIO region(s).
1788 * @param GCPhysStart First physical address in the range.
1789 * @param cbRange The size of the range (in bytes).
1790 */
1791 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1792
1793 /**
1794 * Register a ROM (BIOS) region.
1795 *
1796 * It goes without saying that this is read-only memory. The memory region must be
1797 * in unassigned memory. I.e. from the top of the address space or on the PC in
1798 * the 0xa0000-0xfffff range.
1799 *
1800 * @returns VBox status.
1801 * @param pDevIns The device instance owning the ROM region.
1802 * @param GCPhysStart First physical address in the range.
1803 * Must be page aligned!
1804 * @param cbRange The size of the range (in bytes).
1805 * Must be page aligned!
1806 * @param pvBinary Pointer to the binary data backing the ROM image.
1807 * This must be cbRange bytes big.
1808 * It will be copied and doesn't have to stick around if fShadow is clear.
1809 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1810 * the ROM writable for a while during the POST and refreshing
1811 * it at reset. When this flag is set, the memory pointed to by
1812 * pvBinary has to stick around for the lifespan of the VM.
1813 * @param pszDesc Pointer to description string. This must not be freed.
1814 *
1815 * @remark There is no way to remove the rom, automatically on device cleanup or
1816 * manually from the device yet. At present I doubt we need such features...
1817 */
1818 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1819
1820 /**
1821 * Register a save state data unit.
1822 *
1823 * @returns VBox status.
1824 * @param pDevIns Device instance.
1825 * @param pszName Data unit name.
1826 * @param u32Instance The instance identifier of the data unit.
1827 * This must together with the name be unique.
1828 * @param u32Version Data layout version number.
1829 * @param cbGuess The approximate amount of data in the unit.
1830 * Only for progress indicators.
1831 * @param pfnSavePrep Prepare save callback, optional.
1832 * @param pfnSaveExec Execute save callback, optional.
1833 * @param pfnSaveDone Done save callback, optional.
1834 * @param pfnLoadPrep Prepare load callback, optional.
1835 * @param pfnLoadExec Execute load callback, optional.
1836 * @param pfnLoadDone Done load callback, optional.
1837 */
1838 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1839 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1840 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1841
1842 /**
1843 * Creates a timer.
1844 *
1845 * @returns VBox status.
1846 * @param pDevIns Device instance.
1847 * @param enmClock The clock to use on this timer.
1848 * @param pfnCallback Callback function.
1849 * @param pszDesc Pointer to description string which must stay around
1850 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1851 * @param ppTimer Where to store the timer on success.
1852 */
1853 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1854
1855 /**
1856 * Creates an external timer.
1857 *
1858 * @returns timer pointer
1859 * @param pDevIns Device instance.
1860 * @param enmClock The clock to use on this timer.
1861 * @param pfnCallback Callback function.
1862 * @param pvUser User pointer
1863 * @param pszDesc Pointer to description string which must stay around
1864 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1865 */
1866 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1867
1868 /**
1869 * Registers the device with the default PCI bus.
1870 *
1871 * @returns VBox status code.
1872 * @param pDevIns Device instance.
1873 * @param pPciDev The PCI device structure.
1874 * Any PCI enabled device must keep this in it's instance data!
1875 * Fill in the PCI data config before registration, please.
1876 * @remark This is the simple interface, a Ex interface will be created if
1877 * more features are needed later.
1878 */
1879 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1880
1881 /**
1882 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1883 *
1884 * @returns VBox status code.
1885 * @param pDevIns Device instance.
1886 * @param iRegion The region number.
1887 * @param cbRegion Size of the region.
1888 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1889 * @param pfnCallback Callback for doing the mapping.
1890 */
1891 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1892
1893 /**
1894 * Register PCI configuration space read/write callbacks.
1895 *
1896 * @param pDevIns Device instance.
1897 * @param pPciDev The PCI device structure.
1898 * If NULL the default PCI device for this device instance is used.
1899 * @param pfnRead Pointer to the user defined PCI config read function.
1900 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1901 * PCI config read function. This way, user can decide when (and if)
1902 * to call default PCI config read function. Can be NULL.
1903 * @param pfnWrite Pointer to the user defined PCI config write function.
1904 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1905 * PCI config write function. This way, user can decide when (and if)
1906 * to call default PCI config write function. Can be NULL.
1907 * @thread EMT
1908 */
1909 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1910 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1911
1912 /**
1913 * Set the IRQ for a PCI device.
1914 *
1915 * @param pDevIns Device instance.
1916 * @param iIrq IRQ number to set.
1917 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1918 * @thread Any thread, but will involve the emulation thread.
1919 */
1920 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1921
1922 /**
1923 * Set the IRQ for a PCI device, but don't wait for EMT to process
1924 * the request when not called from EMT.
1925 *
1926 * @param pDevIns Device instance.
1927 * @param iIrq IRQ number to set.
1928 * @param iLevel IRQ level.
1929 * @thread Any thread, but will involve the emulation thread.
1930 */
1931 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1932
1933 /**
1934 * Set ISA IRQ for a device.
1935 *
1936 * @param pDevIns Device instance.
1937 * @param iIrq IRQ number to set.
1938 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1939 * @thread Any thread, but will involve the emulation thread.
1940 */
1941 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1942
1943 /**
1944 * Set the ISA IRQ for a device, but don't wait for EMT to process
1945 * the request when not called from EMT.
1946 *
1947 * @param pDevIns Device instance.
1948 * @param iIrq IRQ number to set.
1949 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1950 * @thread Any thread, but will involve the emulation thread.
1951 */
1952 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1953
1954 /**
1955 * Attaches a driver (chain) to the device.
1956 *
1957 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1958 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1959 *
1960 * @returns VBox status code.
1961 * @param pDevIns Device instance.
1962 * @param iLun The logical unit to attach.
1963 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1964 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1965 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1966 * for the live of the device instance.
1967 */
1968 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1969
1970 /**
1971 * Allocate memory which is associated with current VM instance
1972 * and automatically freed on it's destruction.
1973 *
1974 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1975 * @param pDevIns Device instance.
1976 * @param cb Number of bytes to allocate.
1977 */
1978 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1979
1980 /**
1981 * Allocate memory which is associated with current VM instance
1982 * and automatically freed on it's destruction. The memory is ZEROed.
1983 *
1984 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1985 * @param pDevIns Device instance.
1986 * @param cb Number of bytes to allocate.
1987 */
1988 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1989
1990 /**
1991 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1992 *
1993 * @param pDevIns Device instance.
1994 * @param pv Pointer to the memory to free.
1995 */
1996 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1997
1998 /**
1999 * Set the VM error message
2000 *
2001 * @returns rc.
2002 * @param pDevIns Device instance.
2003 * @param rc VBox status code.
2004 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2005 * @param pszFormat Error message format string.
2006 * @param ... Error message arguments.
2007 */
2008 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2009
2010 /**
2011 * Set the VM error message
2012 *
2013 * @returns rc.
2014 * @param pDevIns Device instance.
2015 * @param rc VBox status code.
2016 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2017 * @param pszFormat Error message format string.
2018 * @param va Error message arguments.
2019 */
2020 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2021
2022 /**
2023 * Set the VM runtime error message
2024 *
2025 * @returns VBox status code.
2026 * @param pDevIns Device instance.
2027 * @param fFatal Whether it is a fatal error or not.
2028 * @param pszErrorID Error ID string.
2029 * @param pszFormat Error message format string.
2030 * @param ... Error message arguments.
2031 */
2032 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2033
2034 /**
2035 * Set the VM runtime error message
2036 *
2037 * @returns VBox status code.
2038 * @param pDevIns Device instance.
2039 * @param fFatal Whether it is a fatal error or not.
2040 * @param pszErrorID Error ID string.
2041 * @param pszFormat Error message format string.
2042 * @param va Error message arguments.
2043 */
2044 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2045
2046 /**
2047 * Assert that the current thread is the emulation thread.
2048 *
2049 * @returns True if correct.
2050 * @returns False if wrong.
2051 * @param pDevIns Device instance.
2052 * @param pszFile Filename of the assertion location.
2053 * @param iLine The linenumber of the assertion location.
2054 * @param pszFunction Function of the assertion location.
2055 */
2056 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2057
2058 /**
2059 * Assert that the current thread is NOT the emulation thread.
2060 *
2061 * @returns True if correct.
2062 * @returns False if wrong.
2063 * @param pDevIns Device instance.
2064 * @param pszFile Filename of the assertion location.
2065 * @param iLine The linenumber of the assertion location.
2066 * @param pszFunction Function of the assertion location.
2067 */
2068 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2069
2070 /**
2071 * Stops the VM and enters the debugger to look at the guest state.
2072 *
2073 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2074 * invoking this function directly.
2075 *
2076 * @returns VBox status code which must be passed up to the VMM.
2077 * @param pDevIns Device instance.
2078 * @param pszFile Filename of the assertion location.
2079 * @param iLine The linenumber of the assertion location.
2080 * @param pszFunction Function of the assertion location.
2081 * @param pszFormat Message. (optional)
2082 * @param args Message parameters.
2083 */
2084 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2085
2086 /**
2087 * Register a info handler with DBGF,
2088 *
2089 * @returns VBox status code.
2090 * @param pDevIns Device instance.
2091 * @param pszName The identifier of the info.
2092 * @param pszDesc The description of the info and any arguments the handler may take.
2093 * @param pfnHandler The handler function to be called to display the info.
2094 */
2095 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2096
2097 /**
2098 * Registers a statistics sample if statistics are enabled.
2099 *
2100 * @param pDevIns Device instance of the DMA.
2101 * @param pvSample Pointer to the sample.
2102 * @param enmType Sample type. This indicates what pvSample is pointing at.
2103 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2104 * Further nesting is possible.
2105 * @param enmUnit Sample unit.
2106 * @param pszDesc Sample description.
2107 */
2108 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2109
2110 /**
2111 * Same as pfnSTAMRegister except that the name is specified in a
2112 * RTStrPrintf like fashion.
2113 *
2114 * @returns VBox status.
2115 * @param pDevIns Device instance of the DMA.
2116 * @param pvSample Pointer to the sample.
2117 * @param enmType Sample type. This indicates what pvSample is pointing at.
2118 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2119 * @param enmUnit Sample unit.
2120 * @param pszDesc Sample description.
2121 * @param pszName The sample name format string.
2122 * @param ... Arguments to the format string.
2123 */
2124 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2125 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2126
2127 /**
2128 * Same as pfnSTAMRegister except that the name is specified in a
2129 * RTStrPrintfV like fashion.
2130 *
2131 * @returns VBox status.
2132 * @param pDevIns Device instance of the DMA.
2133 * @param pvSample Pointer to the sample.
2134 * @param enmType Sample type. This indicates what pvSample is pointing at.
2135 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2136 * @param enmUnit Sample unit.
2137 * @param pszDesc Sample description.
2138 * @param pszName The sample name format string.
2139 * @param args Arguments to the format string.
2140 */
2141 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2142 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2143
2144 /**
2145 * Register the RTC device.
2146 *
2147 * @returns VBox status code.
2148 * @param pDevIns Device instance.
2149 * @param pRtcReg Pointer to a RTC registration structure.
2150 * @param ppRtcHlp Where to store the pointer to the helper functions.
2151 */
2152 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2153
2154 /**
2155 * Create a queue.
2156 *
2157 * @returns VBox status code.
2158 * @param pDevIns The device instance.
2159 * @param cbItem The size of a queue item.
2160 * @param cItems The number of items in the queue.
2161 * @param cMilliesInterval The number of milliseconds between polling the queue.
2162 * If 0 then the emulation thread will be notified whenever an item arrives.
2163 * @param pfnCallback The consumer function.
2164 * @param fGCEnabled Set if the queue should work in GC too.
2165 * @param ppQueue Where to store the queue handle on success.
2166 * @thread The emulation thread.
2167 */
2168 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2169 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2170
2171 /**
2172 * Initializes a PDM critical section.
2173 *
2174 * The PDM critical sections are derived from the IPRT critical sections, but
2175 * works in GC as well.
2176 *
2177 * @returns VBox status code.
2178 * @param pDevIns Device instance.
2179 * @param pCritSect Pointer to the critical section.
2180 * @param pszName The name of the critical section (for statistics).
2181 */
2182 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2183
2184 /**
2185 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2186 *
2187 * @returns pTime.
2188 * @param pDevIns Device instance.
2189 * @param pTime Where to store the time.
2190 */
2191 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2192
2193 /**
2194 * Creates a PDM thread.
2195 *
2196 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2197 * resuming, and destroying the thread as the VM state changes.
2198 *
2199 * @returns VBox status code.
2200 * @param pDevIns The device instance.
2201 * @param ppThread Where to store the thread 'handle'.
2202 * @param pvUser The user argument to the thread function.
2203 * @param pfnThread The thread function.
2204 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2205 * a state change is pending.
2206 * @param cbStack See RTThreadCreate.
2207 * @param enmType See RTThreadCreate.
2208 * @param pszName See RTThreadCreate.
2209 */
2210 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2211 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2212
2213 /**
2214 * Convert a guest virtual address to a guest physical address.
2215 *
2216 * @returns VBox status code.
2217 * @param pDevIns Device instance.
2218 * @param GCPtr Guest virtual address.
2219 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2220 * @thread The emulation thread.
2221 * @remark Careful with page boundraries.
2222 */
2223 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2224
2225 /**
2226 * Gets the VM state.
2227 *
2228 * @returns VM state.
2229 * @param pDevIns The device instance.
2230 * @thread Any thread (just keep in mind that it's volatile info).
2231 */
2232 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2233
2234 /** Space reserved for future members.
2235 * @{ */
2236 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2237 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2238 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2239 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2240 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2241 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2242 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2243 /** @} */
2244
2245
2246 /** API available to trusted devices only.
2247 *
2248 * These APIs are providing unrestricted access to the guest and the VM,
2249 * or they are interacting intimately with PDM.
2250 *
2251 * @{
2252 */
2253 /**
2254 * Gets the VM handle. Restricted API.
2255 *
2256 * @returns VM Handle.
2257 * @param pDevIns Device instance.
2258 */
2259 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2260
2261 /**
2262 * Register the PCI Bus.
2263 *
2264 * @returns VBox status code.
2265 * @param pDevIns Device instance.
2266 * @param pPciBusReg Pointer to PCI bus registration structure.
2267 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2268 */
2269 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2270
2271 /**
2272 * Register the PIC device.
2273 *
2274 * @returns VBox status code.
2275 * @param pDevIns Device instance.
2276 * @param pPicReg Pointer to a PIC registration structure.
2277 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2278 */
2279 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2280
2281 /**
2282 * Register the APIC device.
2283 *
2284 * @returns VBox status code.
2285 * @param pDevIns Device instance.
2286 * @param pApicReg Pointer to a APIC registration structure.
2287 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2288 */
2289 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2290
2291 /**
2292 * Register the I/O APIC device.
2293 *
2294 * @returns VBox status code.
2295 * @param pDevIns Device instance.
2296 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2297 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2298 */
2299 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2300
2301 /**
2302 * Register the DMA device.
2303 *
2304 * @returns VBox status code.
2305 * @param pDevIns Device instance.
2306 * @param pDmacReg Pointer to a DMAC registration structure.
2307 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2308 */
2309 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2310
2311 /**
2312 * Read physical memory.
2313 *
2314 * @param pDevIns Device instance.
2315 * @param GCPhys Physical address start reading from.
2316 * @param pvBuf Where to put the read bits.
2317 * @param cbRead How many bytes to read.
2318 * @thread Any thread, but the call may involve the emulation thread.
2319 */
2320 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2321
2322 /**
2323 * Write to physical memory.
2324 *
2325 * @param pDevIns Device instance.
2326 * @param GCPhys Physical address to write to.
2327 * @param pvBuf What to write.
2328 * @param cbWrite How many bytes to write.
2329 * @thread Any thread, but the call may involve the emulation thread.
2330 */
2331 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2332
2333 /**
2334 * Read guest physical memory by virtual address.
2335 *
2336 * @param pDevIns Device instance.
2337 * @param pvDst Where to put the read bits.
2338 * @param GCVirtSrc Guest virtual address to start reading from.
2339 * @param cb How many bytes to read.
2340 * @thread The emulation thread.
2341 */
2342 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2343
2344 /**
2345 * Write to guest physical memory by virtual address.
2346 *
2347 * @param pDevIns Device instance.
2348 * @param GCVirtDst Guest virtual address to write to.
2349 * @param pvSrc What to write.
2350 * @param cb How many bytes to write.
2351 * @thread The emulation thread.
2352 */
2353 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2354
2355 /**
2356 * Reserve physical address space for ROM and MMIO ranges.
2357 *
2358 * @returns VBox status code.
2359 * @param pDevIns Device instance.
2360 * @param GCPhys Start physical address.
2361 * @param cbRange The size of the range.
2362 * @param pszDesc Description string.
2363 * @thread The emulation thread.
2364 */
2365 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2366
2367 /**
2368 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2369 *
2370 * @returns VBox status code.
2371 * @param pDevIns Device instance.
2372 * @param GCPhys Start physical address.
2373 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2374 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2375 * @thread The emulation thread.
2376 *
2377 * @remark Careful with page boundraries.
2378 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2381
2382 /**
2383 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2384 *
2385 * @returns VBox status code.
2386 * @param pDevIns Device instance.
2387 * @param GCPtr Guest virtual address.
2388 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2389 * @thread The emulation thread.
2390 *
2391 * @remark Careful with page boundraries.
2392 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2393 */
2394 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2395
2396 /**
2397 * Checks if the Gate A20 is enabled or not.
2398 *
2399 * @returns true if A20 is enabled.
2400 * @returns false if A20 is disabled.
2401 * @param pDevIns Device instance.
2402 * @thread The emulation thread.
2403 */
2404 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2405
2406 /**
2407 * Enables or disables the Gate A20.
2408 *
2409 * @param pDevIns Device instance.
2410 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2411 * @thread The emulation thread.
2412 */
2413 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2414
2415 /**
2416 * Resets the VM.
2417 *
2418 * @returns The appropriate VBox status code to pass around on reset.
2419 * @param pDevIns Device instance.
2420 * @thread The emulation thread.
2421 */
2422 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2423
2424 /**
2425 * Suspends the VM.
2426 *
2427 * @returns The appropriate VBox status code to pass around on suspend.
2428 * @param pDevIns Device instance.
2429 * @thread The emulation thread.
2430 */
2431 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2432
2433 /**
2434 * Power off the VM.
2435 *
2436 * @returns The appropriate VBox status code to pass around on power off.
2437 * @param pDevIns Device instance.
2438 * @thread The emulation thread.
2439 */
2440 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2441
2442 /**
2443 * Acquire global VM lock
2444 *
2445 * @returns VBox status code
2446 * @param pDevIns Device instance.
2447 */
2448 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2449
2450 /**
2451 * Release global VM lock
2452 *
2453 * @returns VBox status code
2454 * @param pDevIns Device instance.
2455 */
2456 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2457
2458 /**
2459 * Check that the current thread owns the global VM lock.
2460 *
2461 * @returns boolean
2462 * @param pDevIns Device instance.
2463 * @param pszFile Filename of the assertion location.
2464 * @param iLine Linenumber of the assertion location.
2465 * @param pszFunction Function of the assertion location.
2466 */
2467 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2468
2469 /**
2470 * Register transfer function for DMA channel.
2471 *
2472 * @returns VBox status code.
2473 * @param pDevIns Device instance.
2474 * @param uChannel Channel number.
2475 * @param pfnTransferHandler Device specific transfer callback function.
2476 * @param pvUser User pointer to pass to the callback.
2477 * @thread EMT
2478 */
2479 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2480
2481 /**
2482 * Read memory.
2483 *
2484 * @returns VBox status code.
2485 * @param pDevIns Device instance.
2486 * @param uChannel Channel number.
2487 * @param pvBuffer Pointer to target buffer.
2488 * @param off DMA position.
2489 * @param cbBlock Block size.
2490 * @param pcbRead Where to store the number of bytes which was read. optional.
2491 * @thread EMT
2492 */
2493 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2494
2495 /**
2496 * Write memory.
2497 *
2498 * @returns VBox status code.
2499 * @param pDevIns Device instance.
2500 * @param uChannel Channel number.
2501 * @param pvBuffer Memory to write.
2502 * @param off DMA position.
2503 * @param cbBlock Block size.
2504 * @param pcbWritten Where to store the number of bytes which was written. optional.
2505 * @thread EMT
2506 */
2507 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2508
2509 /**
2510 * Set the DREQ line.
2511 *
2512 * @returns VBox status code.
2513 * @param pDevIns Device instance.
2514 * @param uChannel Channel number.
2515 * @param uLevel Level of the line.
2516 * @thread EMT
2517 */
2518 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2519
2520 /**
2521 * Get channel mode.
2522 *
2523 * @returns Channel mode. See specs.
2524 * @param pDevIns Device instance.
2525 * @param uChannel Channel number.
2526 * @thread EMT
2527 */
2528 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2529
2530 /**
2531 * Schedule DMA execution.
2532 *
2533 * @param pDevIns Device instance.
2534 * @thread Any thread.
2535 */
2536 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2537
2538 /**
2539 * Write CMOS value and update the checksum(s).
2540 *
2541 * @returns VBox status code.
2542 * @param pDevIns Device instance.
2543 * @param iReg The CMOS register index.
2544 * @param u8Value The CMOS register value.
2545 * @thread EMT
2546 */
2547 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2548
2549 /**
2550 * Read CMOS value.
2551 *
2552 * @returns VBox status code.
2553 * @param pDevIns Device instance.
2554 * @param iReg The CMOS register index.
2555 * @param pu8Value Where to store the CMOS register value.
2556 * @thread EMT
2557 */
2558 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2559
2560 /**
2561 * Query CPUID.
2562 *
2563 * @param pDevIns Device instance.
2564 * @param iLeaf The CPUID leaf to get.
2565 * @param pEax Where to store the EAX value.
2566 * @param pEbx Where to store the EBX value.
2567 * @param pEcx Where to store the ECX value.
2568 * @param pEdx Where to store the EDX value.
2569 */
2570 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2571
2572 /**
2573 * Write protects a shadow ROM mapping.
2574 *
2575 * This is intented for use by the system BIOS or by the device that
2576 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2577 * write protected once the POST is over.
2578 *
2579 * @param pDevIns Device instance.
2580 * @param GCPhysStart Where the shadow ROM mapping starts.
2581 * @param cbRange The size of the shadow ROM mapping.
2582 */
2583 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2584
2585 /**
2586 * Allocate and register a MMIO2 region.
2587 *
2588 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2589 * RAM associated with a device. It is also non-shared memory with a
2590 * permanent ring-3 mapping and page backing (presently).
2591 *
2592 * @returns VBox status.
2593 * @param pDevIns The device instance.
2594 * @param iRegion The region number. Use the PCI region number as
2595 * this must be known to the PCI bus device too. If it's not associated
2596 * with the PCI device, then any number up to UINT8_MAX is fine.
2597 * @param cb The size (in bytes) of the region.
2598 * @param fFlags Reserved for future use, must be zero.
2599 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2600 * @param pszDesc Pointer to description string. This must not be freed.
2601 * @thread EMT.
2602 */
2603 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2604
2605 /**
2606 * Deregisters and frees a MMIO2 region.
2607 *
2608 * Any physical (and virtual) access handlers registered for the region must
2609 * be deregistered before calling this function.
2610 *
2611 * @returns VBox status code.
2612 * @param pDevIns The device instance.
2613 * @param iRegion The region number used during registration.
2614 * @thread EMT.
2615 */
2616 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2617
2618 /**
2619 * Maps a MMIO2 region into the physical memory space.
2620 *
2621 * A MMIO2 range may overlap with base memory if a lot of RAM
2622 * is configured for the VM, in which case we'll drop the base
2623 * memory pages. Presently we will make no attempt to preserve
2624 * anything that happens to be present in the base memory that
2625 * is replaced, this is of course incorrectly but it's too much
2626 * effort.
2627 *
2628 * @returns VBox status code.
2629 * @param pDevIns The device instance.
2630 * @param iRegion The region number used during registration.
2631 * @param GCPhys The physical address to map it at.
2632 * @thread EMT.
2633 */
2634 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2635
2636 /**
2637 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2638 *
2639 * @returns VBox status code.
2640 * @param pDevIns The device instance.
2641 * @param iRegion The region number used during registration.
2642 * @param GCPhys The physical address it's currently mapped at.
2643 * @thread EMT.
2644 */
2645 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2646
2647 /**
2648 * Maps a portion of an MMIO2 region into the hypervisor region.
2649 *
2650 * Callers of this API must never deregister the MMIO2 region before the
2651 * VM is powered off.
2652 *
2653 * @return VBox status code.
2654 * @param pDevIns The device owning the MMIO2 memory.
2655 * @param iRegion The region.
2656 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2657 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2658 * @param pszDesc Mapping description.
2659 * @param pGCPtr Where to store the GC address.
2660 */
2661 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2662 const char *pszDesc, PRTGCPTR pGCPtr));
2663
2664 /** @} */
2665
2666 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2667 uint32_t u32TheEnd;
2668} PDMDEVHLP;
2669#endif /* !IN_RING3 */
2670/** Pointer PDM Device API. */
2671typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2672/** Pointer PDM Device API. */
2673typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2674
2675/** Current PDMDEVHLP version number. */
2676#define PDM_DEVHLP_VERSION 0xf2050002
2677
2678
2679/**
2680 * PDM Device API - GC Variant.
2681 */
2682typedef struct PDMDEVHLPGC
2683{
2684 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2685 uint32_t u32Version;
2686
2687 /**
2688 * Set the IRQ for a PCI device.
2689 *
2690 * @param pDevIns Device instance.
2691 * @param iIrq IRQ number to set.
2692 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2693 * @thread Any thread, but will involve the emulation thread.
2694 */
2695 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2696
2697 /**
2698 * Set ISA IRQ for a device.
2699 *
2700 * @param pDevIns Device instance.
2701 * @param iIrq IRQ number to set.
2702 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2703 * @thread Any thread, but will involve the emulation thread.
2704 */
2705 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2706
2707 /**
2708 * Read physical memory.
2709 *
2710 * @param pDevIns Device instance.
2711 * @param GCPhys Physical address start reading from.
2712 * @param pvBuf Where to put the read bits.
2713 * @param cbRead How many bytes to read.
2714 */
2715 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2716
2717 /**
2718 * Write to physical memory.
2719 *
2720 * @param pDevIns Device instance.
2721 * @param GCPhys Physical address to write to.
2722 * @param pvBuf What to write.
2723 * @param cbWrite How many bytes to write.
2724 */
2725 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2726
2727 /**
2728 * Checks if the Gate A20 is enabled or not.
2729 *
2730 * @returns true if A20 is enabled.
2731 * @returns false if A20 is disabled.
2732 * @param pDevIns Device instance.
2733 * @thread The emulation thread.
2734 */
2735 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2736
2737 /**
2738 * Set the VM error message
2739 *
2740 * @returns rc.
2741 * @param pDrvIns Driver instance.
2742 * @param rc VBox status code.
2743 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2744 * @param pszFormat Error message format string.
2745 * @param ... Error message arguments.
2746 */
2747 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2748
2749 /**
2750 * Set the VM error message
2751 *
2752 * @returns rc.
2753 * @param pDrvIns Driver instance.
2754 * @param rc VBox status code.
2755 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2756 * @param pszFormat Error message format string.
2757 * @param va Error message arguments.
2758 */
2759 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2760
2761 /**
2762 * Set the VM runtime error message
2763 *
2764 * @returns VBox status code.
2765 * @param pDevIns Device instance.
2766 * @param fFatal Whether it is a fatal error or not.
2767 * @param pszErrorID Error ID string.
2768 * @param pszFormat Error message format string.
2769 * @param ... Error message arguments.
2770 */
2771 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2772
2773 /**
2774 * Set the VM runtime error message
2775 *
2776 * @returns VBox status code.
2777 * @param pDevIns Device instance.
2778 * @param fFatal Whether it is a fatal error or not.
2779 * @param pszErrorID Error ID string.
2780 * @param pszFormat Error message format string.
2781 * @param va Error message arguments.
2782 */
2783 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2784
2785 /**
2786 * Set parameters for pending MMIO patch operation
2787 *
2788 * @returns VBox status code.
2789 * @param pDevIns Device instance.
2790 * @param GCPhys MMIO physical address
2791 * @param pCachedData GC pointer to cached data
2792 */
2793 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2794
2795 /** Just a safety precaution. */
2796 uint32_t u32TheEnd;
2797} PDMDEVHLPGC;
2798/** Pointer PDM Device GC API. */
2799typedef RCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2800/** Pointer PDM Device GC API. */
2801typedef RCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2802
2803/** Current PDMDEVHLP version number. */
2804#define PDM_DEVHLPGC_VERSION 0xfb010000
2805
2806
2807/**
2808 * PDM Device API - R0 Variant.
2809 */
2810typedef struct PDMDEVHLPR0
2811{
2812 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2813 uint32_t u32Version;
2814
2815 /**
2816 * Set the IRQ for a PCI device.
2817 *
2818 * @param pDevIns Device instance.
2819 * @param iIrq IRQ number to set.
2820 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2821 * @thread Any thread, but will involve the emulation thread.
2822 */
2823 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2824
2825 /**
2826 * Set ISA IRQ for a device.
2827 *
2828 * @param pDevIns Device instance.
2829 * @param iIrq IRQ number to set.
2830 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2831 * @thread Any thread, but will involve the emulation thread.
2832 */
2833 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2834
2835 /**
2836 * Read physical memory.
2837 *
2838 * @param pDevIns Device instance.
2839 * @param GCPhys Physical address start reading from.
2840 * @param pvBuf Where to put the read bits.
2841 * @param cbRead How many bytes to read.
2842 */
2843 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2844
2845 /**
2846 * Write to physical memory.
2847 *
2848 * @param pDevIns Device instance.
2849 * @param GCPhys Physical address to write to.
2850 * @param pvBuf What to write.
2851 * @param cbWrite How many bytes to write.
2852 */
2853 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2854
2855 /**
2856 * Checks if the Gate A20 is enabled or not.
2857 *
2858 * @returns true if A20 is enabled.
2859 * @returns false if A20 is disabled.
2860 * @param pDevIns Device instance.
2861 * @thread The emulation thread.
2862 */
2863 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2864
2865 /**
2866 * Set the VM error message
2867 *
2868 * @returns rc.
2869 * @param pDrvIns Driver instance.
2870 * @param rc VBox status code.
2871 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2872 * @param pszFormat Error message format string.
2873 * @param ... Error message arguments.
2874 */
2875 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2876
2877 /**
2878 * Set the VM error message
2879 *
2880 * @returns rc.
2881 * @param pDrvIns Driver instance.
2882 * @param rc VBox status code.
2883 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2884 * @param pszFormat Error message format string.
2885 * @param va Error message arguments.
2886 */
2887 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2888
2889 /**
2890 * Set the VM runtime error message
2891 *
2892 * @returns VBox status code.
2893 * @param pDevIns Device instance.
2894 * @param fFatal Whether it is a fatal error or not.
2895 * @param pszErrorID Error ID string.
2896 * @param pszFormat Error message format string.
2897 * @param ... Error message arguments.
2898 */
2899 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2900
2901 /**
2902 * Set the VM runtime error message
2903 *
2904 * @returns VBox status code.
2905 * @param pDevIns Device instance.
2906 * @param fFatal Whether it is a fatal error or not.
2907 * @param pszErrorID Error ID string.
2908 * @param pszFormat Error message format string.
2909 * @param va Error message arguments.
2910 */
2911 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2912
2913 /**
2914 * Set parameters for pending MMIO patch operation
2915 *
2916 * @returns rc.
2917 * @param pDevIns Device instance.
2918 * @param GCPhys MMIO physical address
2919 * @param pCachedData GC pointer to cached data
2920 */
2921 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2922
2923 /** Just a safety precaution. */
2924 uint32_t u32TheEnd;
2925} PDMDEVHLPR0;
2926/** Pointer PDM Device R0 API. */
2927typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2928/** Pointer PDM Device GC API. */
2929typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2930
2931/** Current PDMDEVHLP version number. */
2932#define PDM_DEVHLPR0_VERSION 0xfb010000
2933
2934
2935
2936/**
2937 * PDM Device Instance.
2938 */
2939typedef struct PDMDEVINS
2940{
2941 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2942 uint32_t u32Version;
2943 /** Device instance number. */
2944 RTUINT iInstance;
2945 /** The base interface of the device.
2946 * The device constructor initializes this if it has any
2947 * device level interfaces to export. To obtain this interface
2948 * call PDMR3QueryDevice(). */
2949 PDMIBASE IBase;
2950
2951 /** Internal data. */
2952 union
2953 {
2954#ifdef PDMDEVINSINT_DECLARED
2955 PDMDEVINSINT s;
2956#endif
2957 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2958 } Internal;
2959
2960 /** Pointer the HC PDM Device API. */
2961 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2962 /** Pointer the R0 PDM Device API. */
2963 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2964 /** Pointer to device registration structure. */
2965 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2966 /** Configuration handle. */
2967 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2968 /** Pointer to device instance data. */
2969 R3PTRTYPE(void *) pvInstanceDataR3;
2970 /** Pointer to device instance data. */
2971 R0PTRTYPE(void *) pvInstanceDataR0;
2972 /** Pointer the GC PDM Device API. */
2973 RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2974 /** Pointer to device instance data. */
2975 RCPTRTYPE(void *) pvInstanceDataGC;
2976 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2977 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2978 /** Device instance data. The size of this area is defined
2979 * in the PDMDEVREG::cbInstanceData field. */
2980 char achInstanceData[8];
2981} PDMDEVINS;
2982
2983/** Current DEVREG version number. */
2984#define PDM_DEVINS_VERSION 0xf3010000
2985
2986/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2987#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2988
2989
2990/** @def PDMDEV_ASSERT_EMT
2991 * Assert that the current thread is the emulation thread.
2992 */
2993#ifdef VBOX_STRICT
2994# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2995#else
2996# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2997#endif
2998
2999/** @def PDMDEV_ASSERT_OTHER
3000 * Assert that the current thread is NOT the emulation thread.
3001 */
3002#ifdef VBOX_STRICT
3003# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3004#else
3005# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3006#endif
3007
3008/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3009 * Assert that the current thread is owner of the VM lock.
3010 */
3011#ifdef VBOX_STRICT
3012# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3013#else
3014# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3015#endif
3016
3017/** @def PDMDEV_SET_ERROR
3018 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3019 */
3020#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3021 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3022
3023/** @def PDMDEV_SET_RUNTIME_ERROR
3024 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3025 */
3026#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3027 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3028
3029/** @def PDMDEVINS_2_GCPTR
3030 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
3031 */
3032#define PDMDEVINS_2_GCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3033
3034/** @def PDMDEVINS_2_R3PTR
3035 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
3036 */
3037#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3038
3039/** @def PDMDEVINS_2_R0PTR
3040 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3041 */
3042#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3043
3044
3045/**
3046 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3047 *
3048 * @returns VBox status code which must be passed up to the VMM.
3049 * @param pDevIns Device instance.
3050 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3051 * @param pszFormat Message. (optional)
3052 * @param ... Message parameters.
3053 */
3054DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3055{
3056#ifdef VBOX_STRICT
3057# ifdef IN_RING3
3058 int rc;
3059 va_list args;
3060 va_start(args, pszFormat);
3061 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3062 va_end(args);
3063 return rc;
3064# else
3065 return VINF_EM_DBG_STOP;
3066# endif
3067#else
3068 return VINF_SUCCESS;
3069#endif
3070}
3071
3072
3073#ifdef IN_RING3
3074/**
3075 * @copydoc PDMDEVHLP::pfnIOPortRegister
3076 */
3077DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3078 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3079 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3080{
3081 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3082}
3083
3084/**
3085 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
3086 */
3087DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3088 const char *pszOut, const char *pszIn, const char *pszOutStr,
3089 const char *pszInStr, const char *pszDesc)
3090{
3091 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3092}
3093
3094/**
3095 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
3096 */
3097DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3098 const char *pszOut, const char *pszIn, const char *pszOutStr,
3099 const char *pszInStr, const char *pszDesc)
3100{
3101 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3102}
3103
3104/**
3105 * @copydoc PDMDEVHLP::pfnMMIORegister
3106 */
3107DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3108 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3109 const char *pszDesc)
3110{
3111 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3112}
3113
3114/**
3115 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
3116 */
3117DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3118 const char *pszWrite, const char *pszRead, const char *pszFill)
3119{
3120 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3121}
3122
3123/**
3124 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3125 */
3126DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3127 const char *pszWrite, const char *pszRead, const char *pszFill)
3128{
3129 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3130}
3131
3132/**
3133 * @copydoc PDMDEVHLP::pfnROMRegister
3134 */
3135DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3136{
3137 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3138}
3139/**
3140 * @copydoc PDMDEVHLP::pfnROMProtectShadow
3141 */
3142DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3143{
3144 return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3145}
3146
3147/**
3148 * @copydoc PDMDEVHLP::pfnMMIO2Register
3149 */
3150DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3151{
3152 return pDevIns->pDevHlp->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3153}
3154
3155/**
3156 * @copydoc PDMDEVHLP::pfnMMIO2Deregister
3157 */
3158DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3159{
3160 return pDevIns->pDevHlp->pfnMMIO2Deregister(pDevIns, iRegion);
3161}
3162
3163/**
3164 * @copydoc PDMDEVHLP::pfnMMIO2Map
3165 */
3166DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3167{
3168 return pDevIns->pDevHlp->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3169}
3170
3171/**
3172 * @copydoc PDMDEVHLP::pfnMMIO2Unmap
3173 */
3174DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3175{
3176 return pDevIns->pDevHlp->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3177}
3178
3179/**
3180 * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
3181 */
3182DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3183 const char *pszDesc, PRTGCPTR pGCPtr)
3184{
3185 return pDevIns->pDevHlp->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pGCPtr);
3186}
3187
3188/**
3189 * @copydoc PDMDEVHLP::pfnSSMRegister
3190 */
3191DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3192 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3193 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3194{
3195 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3196 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3197 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3198}
3199
3200/**
3201 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3202 */
3203DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3204{
3205 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3206}
3207
3208/**
3209 * @copydoc PDMDEVHLP::pfnPCIRegister
3210 */
3211DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3212{
3213 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3214}
3215
3216/**
3217 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3218 */
3219DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3220{
3221 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3222}
3223
3224/**
3225 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3226 */
3227DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3228 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3229{
3230 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3231}
3232
3233/**
3234 * @copydoc PDMDEVHLP::pfnDriverAttach
3235 */
3236DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3237{
3238 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3239}
3240
3241/**
3242 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3243 */
3244DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3245{
3246 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3247}
3248
3249/**
3250 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3251 */
3252DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3253{
3254 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3255}
3256
3257/**
3258 * @copydoc PDMDEVHLP::pfnMMHeapFree
3259 */
3260DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3261{
3262 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3263}
3264
3265/**
3266 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3267 */
3268DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3269{
3270 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3271}
3272
3273/**
3274 * @copydoc PDMDEVHLP::pfnSTAMRegister
3275 */
3276DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3277{
3278 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3279}
3280
3281/**
3282 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3283 */
3284DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3285 const char *pszDesc, const char *pszName, ...)
3286{
3287 va_list va;
3288 va_start(va, pszName);
3289 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3290 va_end(va);
3291}
3292
3293/**
3294 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3295 */
3296DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3297 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3298{
3299 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3300}
3301
3302/**
3303 * @copydoc PDMDEVHLP::pfnCritSectInit
3304 */
3305DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3306{
3307 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3308}
3309
3310/**
3311 * @copydoc PDMDEVHLP::pfnUTCNow
3312 */
3313DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3314{
3315 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3316}
3317
3318/**
3319 * @copydoc PDMDEVHLP::pfnGetVM
3320 */
3321DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3322{
3323 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3324}
3325
3326/**
3327 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3328 */
3329DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3330{
3331 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3332}
3333
3334/**
3335 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3336 */
3337DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3338{
3339 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3340}
3341
3342/**
3343 * @copydoc PDMDEVHLP::pfnPhysReserve
3344 */
3345DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3346{
3347 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3348}
3349
3350/**
3351 * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
3352 */
3353DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3354{
3355 return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3356}
3357
3358/**
3359 * @copydoc PDMDEVHLP::pfnVMState
3360 */
3361DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3362{
3363 return pDevIns->pDevHlp->pfnVMState(pDevIns);
3364}
3365
3366/**
3367 * @copydoc PDMDEVHLP::pfnA20Set
3368 */
3369DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3370{
3371 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3372}
3373
3374/**
3375 * @copydoc PDMDEVHLP::pfnVMReset
3376 */
3377DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3378{
3379 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLP::pfnVMSuspend
3384 */
3385DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3386{
3387 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3388}
3389
3390/**
3391 * @copydoc PDMDEVHLP::pfnVMPowerOff
3392 */
3393DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3394{
3395 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3396}
3397
3398/**
3399 * @copydoc PDMDEVHLP::pfnDMARegister
3400 */
3401DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3402{
3403 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3404}
3405
3406/**
3407 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3408 */
3409DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3410{
3411 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3412}
3413
3414/**
3415 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3416 */
3417DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3418{
3419 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3420}
3421
3422/**
3423 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3424 */
3425DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3426{
3427 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3428}
3429
3430/**
3431 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3432 */
3433DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3434{
3435 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3436}
3437
3438/**
3439 * @copydoc PDMDEVHLP::pfnDMASchedule
3440 */
3441DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3442{
3443 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3444}
3445
3446/**
3447 * @copydoc PDMDEVHLP::pfnCMOSWrite
3448 */
3449DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3450{
3451 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3452}
3453
3454/**
3455 * @copydoc PDMDEVHLP::pfnCMOSRead
3456 */
3457DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3458{
3459 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3460}
3461
3462/**
3463 * @copydoc PDMDEVHLP::pfnGetCpuId
3464 */
3465DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3466{
3467 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3468}
3469
3470/**
3471 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3472 */
3473DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3474 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3475{
3476 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3477}
3478#endif /* IN_RING3 */
3479
3480
3481/**
3482 * @copydoc PDMDEVHLP::pfnPCISetIrq
3483 */
3484DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3485{
3486#ifdef IN_GC
3487 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3488#elif defined(IN_RING0)
3489 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3490#else
3491 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3492#endif
3493}
3494
3495/**
3496 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3497 */
3498DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3499{
3500#ifdef IN_GC
3501 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3502#elif defined(IN_RING0)
3503 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3504#else
3505 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3506#endif
3507}
3508
3509/**
3510 * @copydoc PDMDEVHLP::pfnISASetIrq
3511 */
3512DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3513{
3514#ifdef IN_GC
3515 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3516#elif defined(IN_RING0)
3517 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3518#else
3519 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3520#endif
3521}
3522
3523/**
3524 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3525 */
3526DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3527{
3528#ifdef IN_GC
3529 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3530#elif defined(IN_RING0)
3531 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3532#else
3533 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3534#endif
3535}
3536
3537/**
3538 * @copydoc PDMDEVHLP::pfnPhysRead
3539 */
3540DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3541{
3542#ifdef IN_GC
3543 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3544#elif defined(IN_RING0)
3545 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3546#else
3547 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3548#endif
3549}
3550
3551/**
3552 * @copydoc PDMDEVHLP::pfnPhysWrite
3553 */
3554DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3555{
3556#ifdef IN_GC
3557 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3558#elif defined(IN_RING0)
3559 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3560#else
3561 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3562#endif
3563}
3564
3565/**
3566 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3567 */
3568DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3569{
3570#ifdef IN_GC
3571 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3572#elif defined(IN_RING0)
3573 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3574#else
3575 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3576#endif
3577}
3578
3579/**
3580 * @copydoc PDMDEVHLP::pfnVMSetError
3581 */
3582DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3583{
3584 va_list va;
3585 va_start(va, pszFormat);
3586#ifdef IN_GC
3587 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3588#elif defined(IN_RING0)
3589 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3590#else
3591 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3592#endif
3593 va_end(va);
3594 return rc;
3595}
3596
3597/**
3598 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3599 */
3600DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3601{
3602 va_list va;
3603 int rc;
3604 va_start(va, pszFormat);
3605#ifdef IN_GC
3606 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3607#elif defined(IN_RING0)
3608 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3609#else
3610 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3611#endif
3612 va_end(va);
3613 return rc;
3614}
3615
3616
3617
3618/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3619typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3620
3621/**
3622 * Callbacks for VBoxDeviceRegister().
3623 */
3624typedef struct PDMDEVREGCB
3625{
3626 /** Interface version.
3627 * This is set to PDM_DEVREG_CB_VERSION. */
3628 uint32_t u32Version;
3629
3630 /**
3631 * Registers a device with the current VM instance.
3632 *
3633 * @returns VBox status code.
3634 * @param pCallbacks Pointer to the callback table.
3635 * @param pDevReg Pointer to the device registration record.
3636 * This data must be permanent and readonly.
3637 */
3638 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3639
3640 /**
3641 * Allocate memory which is associated with current VM instance
3642 * and automatically freed on it's destruction.
3643 *
3644 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3645 * @param pCallbacks Pointer to the callback table.
3646 * @param cb Number of bytes to allocate.
3647 */
3648 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3649} PDMDEVREGCB;
3650
3651/** Current version of the PDMDEVREGCB structure. */
3652#define PDM_DEVREG_CB_VERSION 0xf4010000
3653
3654
3655/**
3656 * The VBoxDevicesRegister callback function.
3657 *
3658 * PDM will invoke this function after loading a device module and letting
3659 * the module decide which devices to register and how to handle conflicts.
3660 *
3661 * @returns VBox status code.
3662 * @param pCallbacks Pointer to the callback table.
3663 * @param u32Version VBox version number.
3664 */
3665typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3666
3667/** @} */
3668
3669__END_DECLS
3670
3671#endif
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