VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 12978

Last change on this file since 12978 was 12978, checked in by vboxsync, 16 years ago

PDM: PDM_DEVREG_FLAGS_DEFAULT_BITS convenience.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device Devices
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of the raw-mode context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
249 char szRCMod[32];
250 /** Name of the ring-0 module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292 /** @todo */
293 PFNRT pfnSoftReset;
294 /** Initialization safty marker. */
295 uint32_t u32VersionEnd;
296} PDMDEVREG;
297/** Pointer to a PDM Device Structure. */
298typedef PDMDEVREG *PPDMDEVREG;
299/** Const pointer to a PDM Device Structure. */
300typedef PDMDEVREG const *PCPDMDEVREG;
301
302/** Current DEVREG version number. */
303#define PDM_DEVREG_VERSION 0xc0020000
304
305/** PDM Device Flags.
306 * @{ */
307/** This flag is used to indicate that the device has a RC component. */
308#define PDM_DEVREG_FLAGS_RC 0x00000001
309/** This flag is used to indicate that the device has a R0 component. */
310#define PDM_DEVREG_FLAGS_R0 0x00000002
311
312/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
313 * The bit count for the current host. */
314#if HC_ARCH_BITS == 32
315# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
316#elif HC_ARCH_BITS == 64
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
318#else
319# error Unsupported HC_ARCH_BITS value.
320#endif
321/** The host bit count mask. */
322#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
323
324/** The device support only 32-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
326/** The device support only 64-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
328/** The device support both 32-bit & 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
330/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
331 * The guest bit count for the current compilation. */
332#if GC_ARCH_BITS == 32
333# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
334#elif GC_ARCH_BITS == 64
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
336#else
337# error Unsupported GC_ARCH_BITS value.
338#endif
339/** The guest bit count mask. */
340#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
341
342/** A convenience. */
343#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
344
345/** Indicates that the devices support PAE36 on a 32-bit guest. */
346#define PDM_DEVREG_FLAGS_PAE36 0x00001000
347/** @} */
348
349
350/** PDM Device Classes.
351 * The order is important, lower bit earlier instantiation.
352 * @{ */
353/** Architecture device. */
354#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
355/** Architecture BIOS device. */
356#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
357/** PCI bus brigde. */
358#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
359/** ISA bus brigde. */
360#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
361/** Input device (mouse, keyboard, joystick, HID, ...). */
362#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
363/** Interrupt controller (PIC). */
364#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
365/** Interval controoler (PIT). */
366#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
367/** RTC/CMOS. */
368#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
369/** DMA controller. */
370#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
371/** VMM Device. */
372#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
373/** Graphics device, like VGA. */
374#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
375/** Storage controller device. */
376#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
377/** Network interface controller. */
378#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
379/** Audio. */
380#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
381/** USB HIC. */
382#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
383/** ACPI. */
384#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
385/** Serial controller device. */
386#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
387/** Parallel controller device */
388#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
389/** Misc devices (always last). */
390#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
391/** @} */
392
393
394/** @name IRQ Level for use with the *SetIrq APIs.
395 * @{
396 */
397/** Assert the IRQ (can assume value 1). */
398#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
399/** Deassert the IRQ (can assume value 0). */
400#define PDM_IRQ_LEVEL_LOW 0
401/** flip-flop - assert and then deassert it again immediately. */
402#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
403/** @} */
404
405
406/**
407 * PCI Bus registration structure.
408 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
409 */
410typedef struct PDMPCIBUSREG
411{
412 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
413 uint32_t u32Version;
414
415 /**
416 * Registers the device with the default PCI bus.
417 *
418 * @returns VBox status code.
419 * @param pDevIns Device instance of the PCI Bus.
420 * @param pPciDev The PCI device structure.
421 * Any PCI enabled device must keep this in it's instance data!
422 * Fill in the PCI data config before registration, please.
423 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
424 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
425 * If negative, the pci bus device will assign one.
426 */
427 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
428
429 /**
430 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
431 *
432 * @returns VBox status code.
433 * @param pDevIns Device instance of the PCI Bus.
434 * @param pPciDev The PCI device structure.
435 * @param iRegion The region number.
436 * @param cbRegion Size of the region.
437 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
438 * @param pfnCallback Callback for doing the mapping.
439 */
440 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
441
442 /**
443 * Register PCI configuration space read/write callbacks.
444 *
445 * @param pDevIns Device instance of the PCI Bus.
446 * @param pPciDev The PCI device structure.
447 * @param pfnRead Pointer to the user defined PCI config read function.
448 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
449 * PCI config read function. This way, user can decide when (and if)
450 * to call default PCI config read function. Can be NULL.
451 * @param pfnWrite Pointer to the user defined PCI config write function.
452 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
453 * PCI config write function. This way, user can decide when (and if)
454 * to call default PCI config write function. Can be NULL.
455 * @thread EMT
456 */
457 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
458 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
459
460 /**
461 * Set the IRQ for a PCI device.
462 *
463 * @param pDevIns Device instance of the PCI Bus.
464 * @param pPciDev The PCI device structure.
465 * @param iIrq IRQ number to set.
466 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
467 */
468 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
469
470 /**
471 * Saves a state of the PCI device.
472 *
473 * @returns VBox status code.
474 * @param pDevIns Device instance of the PCI Bus.
475 * @param pPciDev Pointer to PCI device.
476 * @param pSSMHandle The handle to save the state to.
477 */
478 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
479
480 /**
481 * Loads a saved PCI device state.
482 *
483 * @returns VBox status code.
484 * @param pDevIns Device instance of the PCI Bus.
485 * @param pPciDev Pointer to PCI device.
486 * @param pSSMHandle The handle to the saved state.
487 */
488 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
489
490 /**
491 * Called to perform the job of the bios.
492 * This is only called for the first PCI Bus - it is expected to
493 * service all the PCI buses.
494 *
495 * @returns VBox status.
496 * @param pDevIns Device instance of the first bus.
497 */
498 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
499
500 /** The name of the SetIrq RC entry point. */
501 const char *pszSetIrqRC;
502
503 /** The name of the SetIrq R0 entry point. */
504 const char *pszSetIrqR0;
505
506} PDMPCIBUSREG;
507/** Pointer to a PCI bus registration structure. */
508typedef PDMPCIBUSREG *PPDMPCIBUSREG;
509
510/** Current PDMPCIBUSREG version number. */
511#define PDM_PCIBUSREG_VERSION 0xd0020000
512
513/**
514 * PCI Bus RC helpers.
515 */
516typedef struct PDMPCIHLPRC
517{
518 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
519 uint32_t u32Version;
520
521 /**
522 * Set an ISA IRQ.
523 *
524 * @param pDevIns PCI device instance.
525 * @param iIrq IRQ number to set.
526 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
527 * @thread EMT only.
528 */
529 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
530
531 /**
532 * Set an I/O-APIC IRQ.
533 *
534 * @param pDevIns PCI device instance.
535 * @param iIrq IRQ number to set.
536 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
537 * @thread EMT only.
538 */
539 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
540
541 /**
542 * Acquires the PDM lock.
543 *
544 * @returns VINF_SUCCESS on success.
545 * @returns rc if we failed to acquire the lock.
546 * @param pDevIns The PCI device instance.
547 * @param rc What to return if we fail to acquire the lock.
548 */
549 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
550
551 /**
552 * Releases the PDM lock.
553 *
554 * @param pDevIns The PCI device instance.
555 */
556 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
557
558 /** Just a safety precaution. */
559 uint32_t u32TheEnd;
560} PDMPCIHLPRC;
561/** Pointer to PCI helpers. */
562typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
563/** Pointer to const PCI helpers. */
564typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
565
566/** Current PDMPCIHLPR3 version number. */
567#define PDM_PCIHLPRC_VERSION 0xe1010000
568
569
570/**
571 * PCI Bus R0 helpers.
572 */
573typedef struct PDMPCIHLPR0
574{
575 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
576 uint32_t u32Version;
577
578 /**
579 * Set an ISA IRQ.
580 *
581 * @param pDevIns PCI device instance.
582 * @param iIrq IRQ number to set.
583 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
584 * @thread EMT only.
585 */
586 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
587
588 /**
589 * Set an I/O-APIC IRQ.
590 *
591 * @param pDevIns PCI device instance.
592 * @param iIrq IRQ number to set.
593 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
594 * @thread EMT only.
595 */
596 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
597
598 /**
599 * Acquires the PDM lock.
600 *
601 * @returns VINF_SUCCESS on success.
602 * @returns rc if we failed to acquire the lock.
603 * @param pDevIns The PCI device instance.
604 * @param rc What to return if we fail to acquire the lock.
605 */
606 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
607
608 /**
609 * Releases the PDM lock.
610 *
611 * @param pDevIns The PCI device instance.
612 */
613 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
614
615 /** Just a safety precaution. */
616 uint32_t u32TheEnd;
617} PDMPCIHLPR0;
618/** Pointer to PCI helpers. */
619typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
620/** Pointer to const PCI helpers. */
621typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
622
623/** Current PDMPCIHLPR0 version number. */
624#define PDM_PCIHLPR0_VERSION 0xe1010000
625
626/**
627 * PCI device helpers.
628 */
629typedef struct PDMPCIHLPR3
630{
631 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
632 uint32_t u32Version;
633
634 /**
635 * Set an ISA IRQ.
636 *
637 * @param pDevIns The PCI device instance.
638 * @param iIrq IRQ number to set.
639 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
640 * @thread EMT only.
641 */
642 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
643
644 /**
645 * Set an I/O-APIC IRQ.
646 *
647 * @param pDevIns The PCI device instance.
648 * @param iIrq IRQ number to set.
649 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
650 * @thread EMT only.
651 */
652 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
653
654 /**
655 * Checks if the given address is an MMIO2 base address or not.
656 *
657 * @returns true/false accordingly.
658 * @param pDevIns The PCI device instance.
659 * @param pOwner The owner of the memory, optional.
660 * @param GCPhys The address to check.
661 */
662 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
663
664 /**
665 * Gets the address of the RC PCI Bus helpers.
666 *
667 * This should be called at both construction and relocation time
668 * to obtain the correct address of the RC helpers.
669 *
670 * @returns RC pointer to the PCI Bus helpers.
671 * @param pDevIns Device instance of the PCI Bus.
672 * @thread EMT only.
673 */
674 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
675
676 /**
677 * Gets the address of the R0 PCI Bus helpers.
678 *
679 * This should be called at both construction and relocation time
680 * to obtain the correct address of the R0 helpers.
681 *
682 * @returns R0 pointer to the PCI Bus helpers.
683 * @param pDevIns Device instance of the PCI Bus.
684 * @thread EMT only.
685 */
686 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
687
688 /**
689 * Acquires the PDM lock.
690 *
691 * @returns VINF_SUCCESS on success.
692 * @returns Fatal error on failure.
693 * @param pDevIns The PCI device instance.
694 * @param rc Dummy for making the interface identical to the RC and R0 versions.
695 */
696 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
697
698 /**
699 * Releases the PDM lock.
700 *
701 * @param pDevIns The PCI device instance.
702 */
703 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
704
705 /** Just a safety precaution. */
706 uint32_t u32TheEnd;
707} PDMPCIHLPR3;
708/** Pointer to PCI helpers. */
709typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
710/** Pointer to const PCI helpers. */
711typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
712
713/** Current PDMPCIHLPR3 version number. */
714#define PDM_PCIHLPR3_VERSION 0xf1020000
715
716
717/**
718 * Programmable Interrupt Controller registration structure.
719 */
720typedef struct PDMPICREG
721{
722 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
723 uint32_t u32Version;
724
725 /**
726 * Set the an IRQ.
727 *
728 * @param pDevIns Device instance of the PIC.
729 * @param iIrq IRQ number to set.
730 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
731 */
732 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
733
734 /**
735 * Get a pending interrupt.
736 *
737 * @returns Pending interrupt number.
738 * @param pDevIns Device instance of the PIC.
739 */
740 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
741
742 /** The name of the RC SetIrq entry point. */
743 const char *pszSetIrqRC;
744 /** The name of the RC GetInterrupt entry point. */
745 const char *pszGetInterruptRC;
746
747 /** The name of the R0 SetIrq entry point. */
748 const char *pszSetIrqR0;
749 /** The name of the R0 GetInterrupt entry point. */
750 const char *pszGetInterruptR0;
751} PDMPICREG;
752/** Pointer to a PIC registration structure. */
753typedef PDMPICREG *PPDMPICREG;
754
755/** Current PDMPICREG version number. */
756#define PDM_PICREG_VERSION 0xe0020000
757
758/**
759 * PIC RC helpers.
760 */
761typedef struct PDMPICHLPRC
762{
763 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
764 uint32_t u32Version;
765
766 /**
767 * Set the interrupt force action flag.
768 *
769 * @param pDevIns Device instance of the PIC.
770 */
771 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
772
773 /**
774 * Clear the interrupt force action flag.
775 *
776 * @param pDevIns Device instance of the PIC.
777 */
778 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
779
780 /**
781 * Acquires the PDM lock.
782 *
783 * @returns VINF_SUCCESS on success.
784 * @returns rc if we failed to acquire the lock.
785 * @param pDevIns The PIC device instance.
786 * @param rc What to return if we fail to acquire the lock.
787 */
788 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
789
790 /**
791 * Releases the PDM lock.
792 *
793 * @param pDevIns The PIC device instance.
794 */
795 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
796
797 /** Just a safety precaution. */
798 uint32_t u32TheEnd;
799} PDMPICHLPRC;
800
801/** Pointer to PIC RC helpers. */
802typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
803/** Pointer to const PIC RC helpers. */
804typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
805
806/** Current PDMPICHLPRC version number. */
807#define PDM_PICHLPRC_VERSION 0xfc010000
808
809
810/**
811 * PIC R0 helpers.
812 */
813typedef struct PDMPICHLPR0
814{
815 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
816 uint32_t u32Version;
817
818 /**
819 * Set the interrupt force action flag.
820 *
821 * @param pDevIns Device instance of the PIC.
822 */
823 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
824
825 /**
826 * Clear the interrupt force action flag.
827 *
828 * @param pDevIns Device instance of the PIC.
829 */
830 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
831
832 /**
833 * Acquires the PDM lock.
834 *
835 * @returns VINF_SUCCESS on success.
836 * @returns rc if we failed to acquire the lock.
837 * @param pDevIns The PIC device instance.
838 * @param rc What to return if we fail to acquire the lock.
839 */
840 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
841
842 /**
843 * Releases the PDM lock.
844 *
845 * @param pDevIns The PCI device instance.
846 */
847 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
848
849 /** Just a safety precaution. */
850 uint32_t u32TheEnd;
851} PDMPICHLPR0;
852
853/** Pointer to PIC R0 helpers. */
854typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
855/** Pointer to const PIC R0 helpers. */
856typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
857
858/** Current PDMPICHLPR0 version number. */
859#define PDM_PICHLPR0_VERSION 0xfc010000
860
861/**
862 * PIC R3 helpers.
863 */
864typedef struct PDMPICHLPR3
865{
866 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
867 uint32_t u32Version;
868
869 /**
870 * Set the interrupt force action flag.
871 *
872 * @param pDevIns Device instance of the PIC.
873 */
874 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
875
876 /**
877 * Clear the interrupt force action flag.
878 *
879 * @param pDevIns Device instance of the PIC.
880 */
881 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
882
883 /**
884 * Acquires the PDM lock.
885 *
886 * @returns VINF_SUCCESS on success.
887 * @returns Fatal error on failure.
888 * @param pDevIns The PIC device instance.
889 * @param rc Dummy for making the interface identical to the RC and R0 versions.
890 */
891 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
892
893 /**
894 * Releases the PDM lock.
895 *
896 * @param pDevIns The PIC device instance.
897 */
898 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
899
900 /**
901 * Gets the address of the RC PIC helpers.
902 *
903 * This should be called at both construction and relocation time
904 * to obtain the correct address of the RC helpers.
905 *
906 * @returns RC pointer to the PIC helpers.
907 * @param pDevIns Device instance of the PIC.
908 */
909 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
910
911 /**
912 * Gets the address of the R0 PIC helpers.
913 *
914 * This should be called at both construction and relocation time
915 * to obtain the correct address of the R0 helpers.
916 *
917 * @returns R0 pointer to the PIC helpers.
918 * @param pDevIns Device instance of the PIC.
919 */
920 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
921
922 /** Just a safety precaution. */
923 uint32_t u32TheEnd;
924} PDMPICHLPR3;
925
926/** Pointer to PIC R3 helpers. */
927typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
928/** Pointer to const PIC R3 helpers. */
929typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
930
931/** Current PDMPICHLPR3 version number. */
932#define PDM_PICHLPR3_VERSION 0xf0010000
933
934
935
936/**
937 * Advanced Programmable Interrupt Controller registration structure.
938 */
939typedef struct PDMAPICREG
940{
941 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
942 uint32_t u32Version;
943
944 /**
945 * Get a pending interrupt.
946 *
947 * @returns Pending interrupt number.
948 * @param pDevIns Device instance of the APIC.
949 */
950 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
951
952 /**
953 * Check if the APIC has a pending interrupt/if a TPR change would active one
954 *
955 * @returns Pending interrupt yes/no
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
959
960 /**
961 * Set the APIC base.
962 *
963 * @param pDevIns Device instance of the APIC.
964 * @param u64Base The new base.
965 */
966 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
967
968 /**
969 * Get the APIC base.
970 *
971 * @returns Current base.
972 * @param pDevIns Device instance of the APIC.
973 */
974 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
975
976 /**
977 * Set the TPR (task priority register).
978 *
979 * @param pDevIns Device instance of the APIC.
980 * @param u8TPR The new TPR.
981 */
982 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
983
984 /**
985 * Get the TPR (task priority register).
986 *
987 * @returns The current TPR.
988 * @param pDevIns Device instance of the APIC.
989 * @param pfPending Pending interrupt state (out).
990 */
991 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
992
993 /**
994 * Private interface between the IOAPIC and APIC.
995 *
996 * This is a low-level, APIC/IOAPIC implementation specific interface
997 * which is registered with PDM only because it makes life so much
998 * simpler right now (GC bits). This is a bad bad hack! The correct
999 * way of doing this would involve some way of querying GC interfaces
1000 * and relocating them. Perhaps doing some kind of device init in GC...
1001 *
1002 * @returns The current TPR.
1003 * @param pDevIns Device instance of the APIC.
1004 * @param u8Dest See APIC implementation.
1005 * @param u8DestMode See APIC implementation.
1006 * @param u8DeliveryMode See APIC implementation.
1007 * @param iVector See APIC implementation.
1008 * @param u8Polarity See APIC implementation.
1009 * @param u8TriggerMode See APIC implementation.
1010 */
1011 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1012 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1013
1014 /** The name of the RC GetInterrupt entry point. */
1015 const char *pszGetInterruptRC;
1016 /** The name of the RC HasPendingIrq entry point. */
1017 const char *pszHasPendingIrqRC;
1018 /** The name of the RC SetBase entry point. */
1019 const char *pszSetBaseRC;
1020 /** The name of the RC GetBase entry point. */
1021 const char *pszGetBaseRC;
1022 /** The name of the RC SetTPR entry point. */
1023 const char *pszSetTPRRC;
1024 /** The name of the RC GetTPR entry point. */
1025 const char *pszGetTPRRC;
1026 /** The name of the RC BusDeliver entry point. */
1027 const char *pszBusDeliverRC;
1028
1029 /** The name of the R0 GetInterrupt entry point. */
1030 const char *pszGetInterruptR0;
1031 /** The name of the R0 HasPendingIrq entry point. */
1032 const char *pszHasPendingIrqR0;
1033 /** The name of the R0 SetBase entry point. */
1034 const char *pszSetBaseR0;
1035 /** The name of the R0 GetBase entry point. */
1036 const char *pszGetBaseR0;
1037 /** The name of the R0 SetTPR entry point. */
1038 const char *pszSetTPRR0;
1039 /** The name of the R0 GetTPR entry point. */
1040 const char *pszGetTPRR0;
1041 /** The name of the R0 BusDeliver entry point. */
1042 const char *pszBusDeliverR0;
1043
1044} PDMAPICREG;
1045/** Pointer to an APIC registration structure. */
1046typedef PDMAPICREG *PPDMAPICREG;
1047
1048/** Current PDMAPICREG version number. */
1049#define PDM_APICREG_VERSION 0x70010000
1050
1051
1052/**
1053 * APIC version argument for pfnChangeFeature.
1054 */
1055typedef enum PDMAPICVERSION
1056{
1057 /** Invalid 0 entry. */
1058 PDMAPICVERSION_INVALID = 0,
1059 /** No APIC. */
1060 PDMAPICVERSION_NONE,
1061 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1062 PDMAPICVERSION_APIC,
1063 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1064 PDMAPICVERSION_X2APIC,
1065 /** The usual 32-bit paranoia. */
1066 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1067} PDMAPICVERSION;
1068
1069
1070/**
1071 * APIC RC helpers.
1072 */
1073typedef struct PDMAPICHLPRC
1074{
1075 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1076 uint32_t u32Version;
1077
1078 /**
1079 * Set the interrupt force action flag.
1080 *
1081 * @param pDevIns Device instance of the APIC.
1082 * @param idCpu Virtual CPU to set flag upon.
1083 */
1084 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1085
1086 /**
1087 * Clear the interrupt force action flag.
1088 *
1089 * @param pDevIns Device instance of the APIC.
1090 * @param idCpu Virtual CPU to clear flag upon.
1091 */
1092 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1093
1094 /**
1095 * Modifies APIC-related bits in the CPUID feature mask.
1096 *
1097 * @param pDevIns Device instance of the APIC.
1098 * @param enmVersion Supported APIC version.
1099 */
1100 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1101
1102 /**
1103 * Acquires the PDM lock.
1104 *
1105 * @returns VINF_SUCCESS on success.
1106 * @returns rc if we failed to acquire the lock.
1107 * @param pDevIns The APIC device instance.
1108 * @param rc What to return if we fail to acquire the lock.
1109 */
1110 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1111
1112 /**
1113 * Releases the PDM lock.
1114 *
1115 * @param pDevIns The APIC device instance.
1116 */
1117 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1118
1119 /**
1120 * Get the virtual CPU id corresponding to the current EMT.
1121 *
1122 * @param pDevIns The APIC device instance.
1123 */
1124 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1125
1126 /** Just a safety precaution. */
1127 uint32_t u32TheEnd;
1128} PDMAPICHLPRC;
1129/** Pointer to APIC GC helpers. */
1130typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1131/** Pointer to const APIC helpers. */
1132typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1133
1134/** Current PDMAPICHLPRC version number. */
1135#define PDM_APICHLPRC_VERSION 0x60010000
1136
1137
1138/**
1139 * APIC R0 helpers.
1140 */
1141typedef struct PDMAPICHLPR0
1142{
1143 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1144 uint32_t u32Version;
1145
1146 /**
1147 * Set the interrupt force action flag.
1148 *
1149 * @param pDevIns Device instance of the APIC.
1150 * @param idCpu Virtual CPU to set flag upon.
1151 */
1152 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1153
1154 /**
1155 * Clear the interrupt force action flag.
1156 *
1157 * @param pDevIns Device instance of the APIC.
1158 * @param idCpu Virtual CPU to clear flag upon.
1159 */
1160 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1161
1162 /**
1163 * Modifies APIC-related bits in the CPUID feature mask.
1164 *
1165 * @param pDevIns Device instance of the APIC.
1166 * @param enmVersion Supported APIC version.
1167 */
1168 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1169
1170 /**
1171 * Acquires the PDM lock.
1172 *
1173 * @returns VINF_SUCCESS on success.
1174 * @returns rc if we failed to acquire the lock.
1175 * @param pDevIns The APIC device instance.
1176 * @param rc What to return if we fail to acquire the lock.
1177 */
1178 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1179
1180 /**
1181 * Releases the PDM lock.
1182 *
1183 * @param pDevIns The APIC device instance.
1184 */
1185 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1186
1187 /**
1188 * Get the virtual CPU id corresponding to the current EMT.
1189 *
1190 * @param pDevIns The APIC device instance.
1191 */
1192 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1193
1194 /** Just a safety precaution. */
1195 uint32_t u32TheEnd;
1196} PDMAPICHLPR0;
1197/** Pointer to APIC GC helpers. */
1198typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1199/** Pointer to const APIC helpers. */
1200typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1201
1202/** Current PDMAPICHLPR0 version number. */
1203#define PDM_APICHLPR0_VERSION 0x60010000
1204
1205/**
1206 * APIC R3 helpers.
1207 */
1208typedef struct PDMAPICHLPR3
1209{
1210 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1211 uint32_t u32Version;
1212
1213 /**
1214 * Set the interrupt force action flag.
1215 *
1216 * @param pDevIns Device instance of the APIC.
1217 * @param idCpu Virtual CPU to set flag upon.
1218 */
1219 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1220
1221 /**
1222 * Clear the interrupt force action flag.
1223 *
1224 * @param pDevIns Device instance of the APIC.
1225 * @param idCpu Virtual CPU to clear flag upon.
1226 */
1227 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1228
1229 /**
1230 * Modifies APIC-related bits in the CPUID feature mask.
1231 *
1232 * @param pDevIns Device instance of the APIC.
1233 * @param enmVersion Supported APIC version.
1234 */
1235 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1236
1237 /**
1238 * Acquires the PDM lock.
1239 *
1240 * @returns VINF_SUCCESS on success.
1241 * @returns Fatal error on failure.
1242 * @param pDevIns The APIC device instance.
1243 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1244 */
1245 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1246
1247 /**
1248 * Releases the PDM lock.
1249 *
1250 * @param pDevIns The APIC device instance.
1251 */
1252 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1253
1254 /**
1255 * Get the virtual CPU id corresponding to the current EMT.
1256 *
1257 * @param pDevIns The APIC device instance.
1258 */
1259 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1260
1261 /**
1262 * Gets the address of the RC APIC helpers.
1263 *
1264 * This should be called at both construction and relocation time
1265 * to obtain the correct address of the RC helpers.
1266 *
1267 * @returns GC pointer to the APIC helpers.
1268 * @param pDevIns Device instance of the APIC.
1269 */
1270 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1271
1272 /**
1273 * Gets the address of the R0 APIC helpers.
1274 *
1275 * This should be called at both construction and relocation time
1276 * to obtain the correct address of the R0 helpers.
1277 *
1278 * @returns R0 pointer to the APIC helpers.
1279 * @param pDevIns Device instance of the APIC.
1280 */
1281 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1282
1283 /** Just a safety precaution. */
1284 uint32_t u32TheEnd;
1285} PDMAPICHLPR3;
1286/** Pointer to APIC helpers. */
1287typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1288/** Pointer to const APIC helpers. */
1289typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1290
1291/** Current PDMAPICHLP version number. */
1292#define PDM_APICHLPR3_VERSION 0xfd010000
1293
1294
1295/**
1296 * I/O APIC registration structure.
1297 */
1298typedef struct PDMIOAPICREG
1299{
1300 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1301 uint32_t u32Version;
1302
1303 /**
1304 * Set the an IRQ.
1305 *
1306 * @param pDevIns Device instance of the I/O APIC.
1307 * @param iIrq IRQ number to set.
1308 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1309 */
1310 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1311
1312 /** The name of the GC SetIrq entry point. */
1313 const char *pszSetIrqRC;
1314
1315 /** The name of the R0 SetIrq entry point. */
1316 const char *pszSetIrqR0;
1317} PDMIOAPICREG;
1318/** Pointer to an APIC registration structure. */
1319typedef PDMIOAPICREG *PPDMIOAPICREG;
1320
1321/** Current PDMAPICREG version number. */
1322#define PDM_IOAPICREG_VERSION 0x50010000
1323
1324
1325/**
1326 * IOAPIC RC helpers.
1327 */
1328typedef struct PDMIOAPICHLPRC
1329{
1330 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1331 uint32_t u32Version;
1332
1333 /**
1334 * Private interface between the IOAPIC and APIC.
1335 *
1336 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1337 *
1338 * @returns The current TPR.
1339 * @param pDevIns Device instance of the IOAPIC.
1340 * @param u8Dest See APIC implementation.
1341 * @param u8DestMode See APIC implementation.
1342 * @param u8DeliveryMode See APIC implementation.
1343 * @param iVector See APIC implementation.
1344 * @param u8Polarity See APIC implementation.
1345 * @param u8TriggerMode See APIC implementation.
1346 */
1347 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1348 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1349
1350 /**
1351 * Acquires the PDM lock.
1352 *
1353 * @returns VINF_SUCCESS on success.
1354 * @returns rc if we failed to acquire the lock.
1355 * @param pDevIns The IOAPIC device instance.
1356 * @param rc What to return if we fail to acquire the lock.
1357 */
1358 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1359
1360 /**
1361 * Releases the PDM lock.
1362 *
1363 * @param pDevIns The IOAPIC device instance.
1364 */
1365 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1366
1367 /** Just a safety precaution. */
1368 uint32_t u32TheEnd;
1369} PDMIOAPICHLPRC;
1370/** Pointer to IOAPIC RC helpers. */
1371typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1372/** Pointer to const IOAPIC helpers. */
1373typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1374
1375/** Current PDMIOAPICHLPRC version number. */
1376#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1377
1378
1379/**
1380 * IOAPIC R0 helpers.
1381 */
1382typedef struct PDMIOAPICHLPR0
1383{
1384 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1385 uint32_t u32Version;
1386
1387 /**
1388 * Private interface between the IOAPIC and APIC.
1389 *
1390 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1391 *
1392 * @returns The current TPR.
1393 * @param pDevIns Device instance of the IOAPIC.
1394 * @param u8Dest See APIC implementation.
1395 * @param u8DestMode See APIC implementation.
1396 * @param u8DeliveryMode See APIC implementation.
1397 * @param iVector See APIC implementation.
1398 * @param u8Polarity See APIC implementation.
1399 * @param u8TriggerMode See APIC implementation.
1400 */
1401 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1402 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1403
1404 /**
1405 * Acquires the PDM lock.
1406 *
1407 * @returns VINF_SUCCESS on success.
1408 * @returns rc if we failed to acquire the lock.
1409 * @param pDevIns The IOAPIC device instance.
1410 * @param rc What to return if we fail to acquire the lock.
1411 */
1412 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1413
1414 /**
1415 * Releases the PDM lock.
1416 *
1417 * @param pDevIns The IOAPIC device instance.
1418 */
1419 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1420
1421 /** Just a safety precaution. */
1422 uint32_t u32TheEnd;
1423} PDMIOAPICHLPR0;
1424/** Pointer to IOAPIC R0 helpers. */
1425typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1426/** Pointer to const IOAPIC helpers. */
1427typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1428
1429/** Current PDMIOAPICHLPR0 version number. */
1430#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1431
1432/**
1433 * IOAPIC R3 helpers.
1434 */
1435typedef struct PDMIOAPICHLPR3
1436{
1437 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1438 uint32_t u32Version;
1439
1440 /**
1441 * Private interface between the IOAPIC and APIC.
1442 *
1443 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1444 *
1445 * @returns The current TPR.
1446 * @param pDevIns Device instance of the IOAPIC.
1447 * @param u8Dest See APIC implementation.
1448 * @param u8DestMode See APIC implementation.
1449 * @param u8DeliveryMode See APIC implementation.
1450 * @param iVector See APIC implementation.
1451 * @param u8Polarity See APIC implementation.
1452 * @param u8TriggerMode See APIC implementation.
1453 */
1454 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1456
1457 /**
1458 * Acquires the PDM lock.
1459 *
1460 * @returns VINF_SUCCESS on success.
1461 * @returns Fatal error on failure.
1462 * @param pDevIns The IOAPIC device instance.
1463 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1464 */
1465 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1466
1467 /**
1468 * Releases the PDM lock.
1469 *
1470 * @param pDevIns The IOAPIC device instance.
1471 */
1472 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1473
1474 /**
1475 * Gets the address of the RC IOAPIC helpers.
1476 *
1477 * This should be called at both construction and relocation time
1478 * to obtain the correct address of the RC helpers.
1479 *
1480 * @returns RC pointer to the IOAPIC helpers.
1481 * @param pDevIns Device instance of the IOAPIC.
1482 */
1483 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1484
1485 /**
1486 * Gets the address of the R0 IOAPIC helpers.
1487 *
1488 * This should be called at both construction and relocation time
1489 * to obtain the correct address of the R0 helpers.
1490 *
1491 * @returns R0 pointer to the IOAPIC helpers.
1492 * @param pDevIns Device instance of the IOAPIC.
1493 */
1494 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1495
1496 /** Just a safety precaution. */
1497 uint32_t u32TheEnd;
1498} PDMIOAPICHLPR3;
1499/** Pointer to IOAPIC R3 helpers. */
1500typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1501/** Pointer to const IOAPIC helpers. */
1502typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1503
1504/** Current PDMIOAPICHLPR3 version number. */
1505#define PDM_IOAPICHLPR3_VERSION 0xff010000
1506
1507
1508
1509#ifdef IN_RING3
1510
1511/**
1512 * DMA Transfer Handler.
1513 *
1514 * @returns Number of bytes transferred.
1515 * @param pDevIns Device instance of the DMA.
1516 * @param pvUser User pointer.
1517 * @param uChannel Channel number.
1518 * @param off DMA position.
1519 * @param cb Block size.
1520 */
1521typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1522/** Pointer to a FNDMATRANSFERHANDLER(). */
1523typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1524
1525/**
1526 * DMA Controller registration structure.
1527 */
1528typedef struct PDMDMAREG
1529{
1530 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1531 uint32_t u32Version;
1532
1533 /**
1534 * Execute pending transfers.
1535 *
1536 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1537 * @param pDevIns Device instance of the DMAC.
1538 */
1539 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1540
1541 /**
1542 * Register transfer function for DMA channel.
1543 *
1544 * @param pDevIns Device instance of the DMAC.
1545 * @param uChannel Channel number.
1546 * @param pfnTransferHandler Device specific transfer function.
1547 * @param pvUSer User pointer to be passed to the callback.
1548 */
1549 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1550
1551 /**
1552 * Read memory
1553 *
1554 * @returns Number of bytes read.
1555 * @param pDevIns Device instance of the DMAC.
1556 * @param pvBuffer Pointer to target buffer.
1557 * @param off DMA position.
1558 * @param cbBlock Block size.
1559 */
1560 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1561
1562 /**
1563 * Write memory
1564 *
1565 * @returns Number of bytes written.
1566 * @param pDevIns Device instance of the DMAC.
1567 * @param pvBuffer Memory to write.
1568 * @param off DMA position.
1569 * @param cbBlock Block size.
1570 */
1571 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1572
1573 /**
1574 * Set the DREQ line.
1575 *
1576 * @param pDevIns Device instance of the DMAC.
1577 * @param uChannel Channel number.
1578 * @param uLevel Level of the line.
1579 */
1580 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1581
1582 /**
1583 * Get channel mode
1584 *
1585 * @returns Channel mode.
1586 * @param pDevIns Device instance of the DMAC.
1587 * @param uChannel Channel number.
1588 */
1589 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1590
1591} PDMDMACREG;
1592/** Pointer to a DMAC registration structure. */
1593typedef PDMDMACREG *PPDMDMACREG;
1594
1595/** Current PDMDMACREG version number. */
1596#define PDM_DMACREG_VERSION 0xf5010000
1597
1598
1599/**
1600 * DMA Controller device helpers.
1601 */
1602typedef struct PDMDMACHLP
1603{
1604 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1605 uint32_t u32Version;
1606
1607 /* to-be-defined */
1608
1609} PDMDMACHLP;
1610/** Pointer to DMAC helpers. */
1611typedef PDMDMACHLP *PPDMDMACHLP;
1612/** Pointer to const DMAC helpers. */
1613typedef const PDMDMACHLP *PCPDMDMACHLP;
1614
1615/** Current PDMDMACHLP version number. */
1616#define PDM_DMACHLP_VERSION 0xf6010000
1617
1618#endif /* IN_RING3 */
1619
1620
1621
1622/**
1623 * RTC registration structure.
1624 */
1625typedef struct PDMRTCREG
1626{
1627 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1628 uint32_t u32Version;
1629 uint32_t u32Alignment; /**< structure size alignment. */
1630
1631 /**
1632 * Write to a CMOS register and update the checksum if necessary.
1633 *
1634 * @returns VBox status code.
1635 * @param pDevIns Device instance of the RTC.
1636 * @param iReg The CMOS register index.
1637 * @param u8Value The CMOS register value.
1638 */
1639 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1640
1641 /**
1642 * Read a CMOS register.
1643 *
1644 * @returns VBox status code.
1645 * @param pDevIns Device instance of the RTC.
1646 * @param iReg The CMOS register index.
1647 * @param pu8Value Where to store the CMOS register value.
1648 */
1649 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1650
1651} PDMRTCREG;
1652/** Pointer to a RTC registration structure. */
1653typedef PDMRTCREG *PPDMRTCREG;
1654/** Pointer to a const RTC registration structure. */
1655typedef const PDMRTCREG *PCPDMRTCREG;
1656
1657/** Current PDMRTCREG version number. */
1658#define PDM_RTCREG_VERSION 0xfa010000
1659
1660
1661/**
1662 * RTC device helpers.
1663 */
1664typedef struct PDMRTCHLP
1665{
1666 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1667 uint32_t u32Version;
1668
1669 /* to-be-defined */
1670
1671} PDMRTCHLP;
1672/** Pointer to RTC helpers. */
1673typedef PDMRTCHLP *PPDMRTCHLP;
1674/** Pointer to const RTC helpers. */
1675typedef const PDMRTCHLP *PCPDMRTCHLP;
1676
1677/** Current PDMRTCHLP version number. */
1678#define PDM_RTCHLP_VERSION 0xf6010000
1679
1680
1681
1682#ifdef IN_RING3
1683
1684/**
1685 * PDM Device API.
1686 */
1687typedef struct PDMDEVHLPR3
1688{
1689 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1690 uint32_t u32Version;
1691
1692 /**
1693 * Register a number of I/O ports with a device.
1694 *
1695 * These callbacks are of course for the host context (HC).
1696 * Register HC handlers before guest context (GC) handlers! There must be a
1697 * HC handler for every GC handler!
1698 *
1699 * @returns VBox status.
1700 * @param pDevIns The device instance to register the ports with.
1701 * @param Port First port number in the range.
1702 * @param cPorts Number of ports to register.
1703 * @param pvUser User argument.
1704 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1705 * @param pfnIn Pointer to function which is gonna handle IN operations.
1706 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1707 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1708 * @param pszDesc Pointer to description string. This must not be freed.
1709 */
1710 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1711 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1712 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1713
1714 /**
1715 * Register a number of I/O ports with a device for GC.
1716 *
1717 * These callbacks are for the host context (GC).
1718 * Register host context (HC) handlers before guest context handlers! There must be a
1719 * HC handler for every GC handler!
1720 *
1721 * @returns VBox status.
1722 * @param pDevIns The device instance to register the ports with and which GC module
1723 * to resolve the names against.
1724 * @param Port First port number in the range.
1725 * @param cPorts Number of ports to register.
1726 * @param pvUser User argument.
1727 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1728 * @param pszIn Name of the GC function which is gonna handle IN operations.
1729 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1730 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1731 * @param pszDesc Pointer to description string. This must not be freed.
1732 */
1733 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1734 const char *pszOut, const char *pszIn,
1735 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1736
1737 /**
1738 * Register a number of I/O ports with a device.
1739 *
1740 * These callbacks are of course for the ring-0 host context (R0).
1741 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1742 *
1743 * @returns VBox status.
1744 * @param pDevIns The device instance to register the ports with.
1745 * @param Port First port number in the range.
1746 * @param cPorts Number of ports to register.
1747 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1748 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1749 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1750 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1751 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1752 * @param pszDesc Pointer to description string. This must not be freed.
1753 */
1754 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1755 const char *pszOut, const char *pszIn,
1756 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1757
1758 /**
1759 * Deregister I/O ports.
1760 *
1761 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1762 *
1763 * @returns VBox status.
1764 * @param pDevIns The device instance owning the ports.
1765 * @param Port First port number in the range.
1766 * @param cPorts Number of ports to deregister.
1767 */
1768 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1769
1770 /**
1771 * Register a Memory Mapped I/O (MMIO) region.
1772 *
1773 * These callbacks are of course for the host context (HC).
1774 * Register HC handlers before guest context (GC) handlers! There must be a
1775 * HC handler for every GC handler!
1776 *
1777 * @returns VBox status.
1778 * @param pDevIns The device instance to register the MMIO with.
1779 * @param GCPhysStart First physical address in the range.
1780 * @param cbRange The size of the range (in bytes).
1781 * @param pvUser User argument.
1782 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1783 * @param pfnRead Pointer to function which is gonna handle Read operations.
1784 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1785 * @param pszDesc Pointer to description string. This must not be freed.
1786 */
1787 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1788 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1789 const char *pszDesc));
1790
1791 /**
1792 * Register a Memory Mapped I/O (MMIO) region for GC.
1793 *
1794 * These callbacks are for the guest context (GC).
1795 * Register host context (HC) handlers before guest context handlers! There must be a
1796 * HC handler for every GC handler!
1797 *
1798 * @returns VBox status.
1799 * @param pDevIns The device instance to register the MMIO with.
1800 * @param GCPhysStart First physical address in the range.
1801 * @param cbRange The size of the range (in bytes).
1802 * @param pvUser User argument.
1803 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1804 * @param pszRead Name of the GC function which is gonna handle Read operations.
1805 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1806 * @param pszDesc Obsolete. NULL is fine.
1807 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1808 */
1809 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1810 const char *pszWrite, const char *pszRead, const char *pszFill,
1811 const char *pszDesc));
1812
1813 /**
1814 * Register a Memory Mapped I/O (MMIO) region for R0.
1815 *
1816 * These callbacks are for the ring-0 host context (R0).
1817 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1818 *
1819 * @returns VBox status.
1820 * @param pDevIns The device instance to register the MMIO with.
1821 * @param GCPhysStart First physical address in the range.
1822 * @param cbRange The size of the range (in bytes).
1823 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1824 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1825 * @param pszRead Name of the GC function which is gonna handle Read operations.
1826 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1827 * @param pszDesc Obsolete. NULL is fine.
1828 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1829 */
1830 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1831 const char *pszWrite, const char *pszRead, const char *pszFill,
1832 const char *pszDesc));
1833
1834 /**
1835 * Deregister a Memory Mapped I/O (MMIO) region.
1836 *
1837 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1838 *
1839 * @returns VBox status.
1840 * @param pDevIns The device instance owning the MMIO region(s).
1841 * @param GCPhysStart First physical address in the range.
1842 * @param cbRange The size of the range (in bytes).
1843 */
1844 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1845
1846 /**
1847 * Register a ROM (BIOS) region.
1848 *
1849 * It goes without saying that this is read-only memory. The memory region must be
1850 * in unassigned memory. I.e. from the top of the address space or on the PC in
1851 * the 0xa0000-0xfffff range.
1852 *
1853 * @returns VBox status.
1854 * @param pDevIns The device instance owning the ROM region.
1855 * @param GCPhysStart First physical address in the range.
1856 * Must be page aligned!
1857 * @param cbRange The size of the range (in bytes).
1858 * Must be page aligned!
1859 * @param pvBinary Pointer to the binary data backing the ROM image.
1860 * This must be cbRange bytes big.
1861 * It will be copied and doesn't have to stick around if fShadow is clear.
1862 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1863 * the ROM writable for a while during the POST and refreshing
1864 * it at reset. When this flag is set, the memory pointed to by
1865 * pvBinary has to stick around for the lifespan of the VM.
1866 * @param pszDesc Pointer to description string. This must not be freed.
1867 *
1868 * @remark There is no way to remove the rom, automatically on device cleanup or
1869 * manually from the device yet. At present I doubt we need such features...
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1872
1873 /**
1874 * Register a save state data unit.
1875 *
1876 * @returns VBox status.
1877 * @param pDevIns Device instance.
1878 * @param pszName Data unit name.
1879 * @param u32Instance The instance identifier of the data unit.
1880 * This must together with the name be unique.
1881 * @param u32Version Data layout version number.
1882 * @param cbGuess The approximate amount of data in the unit.
1883 * Only for progress indicators.
1884 * @param pfnSavePrep Prepare save callback, optional.
1885 * @param pfnSaveExec Execute save callback, optional.
1886 * @param pfnSaveDone Done save callback, optional.
1887 * @param pfnLoadPrep Prepare load callback, optional.
1888 * @param pfnLoadExec Execute load callback, optional.
1889 * @param pfnLoadDone Done load callback, optional.
1890 */
1891 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1892 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1893 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1894
1895 /**
1896 * Creates a timer.
1897 *
1898 * @returns VBox status.
1899 * @param pDevIns Device instance.
1900 * @param enmClock The clock to use on this timer.
1901 * @param pfnCallback Callback function.
1902 * @param pszDesc Pointer to description string which must stay around
1903 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1904 * @param ppTimer Where to store the timer on success.
1905 */
1906 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1907
1908 /**
1909 * Creates an external timer.
1910 *
1911 * @returns timer pointer
1912 * @param pDevIns Device instance.
1913 * @param enmClock The clock to use on this timer.
1914 * @param pfnCallback Callback function.
1915 * @param pvUser User pointer
1916 * @param pszDesc Pointer to description string which must stay around
1917 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1918 */
1919 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1920
1921 /**
1922 * Registers the device with the default PCI bus.
1923 *
1924 * @returns VBox status code.
1925 * @param pDevIns Device instance.
1926 * @param pPciDev The PCI device structure.
1927 * Any PCI enabled device must keep this in it's instance data!
1928 * Fill in the PCI data config before registration, please.
1929 * @remark This is the simple interface, a Ex interface will be created if
1930 * more features are needed later.
1931 */
1932 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1933
1934 /**
1935 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1936 *
1937 * @returns VBox status code.
1938 * @param pDevIns Device instance.
1939 * @param iRegion The region number.
1940 * @param cbRegion Size of the region.
1941 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1942 * @param pfnCallback Callback for doing the mapping.
1943 */
1944 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1945
1946 /**
1947 * Register PCI configuration space read/write callbacks.
1948 *
1949 * @param pDevIns Device instance.
1950 * @param pPciDev The PCI device structure.
1951 * If NULL the default PCI device for this device instance is used.
1952 * @param pfnRead Pointer to the user defined PCI config read function.
1953 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1954 * PCI config read function. This way, user can decide when (and if)
1955 * to call default PCI config read function. Can be NULL.
1956 * @param pfnWrite Pointer to the user defined PCI config write function.
1957 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1958 * PCI config write function. This way, user can decide when (and if)
1959 * to call default PCI config write function. Can be NULL.
1960 * @thread EMT
1961 */
1962 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1963 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1964
1965 /**
1966 * Set the IRQ for a PCI device.
1967 *
1968 * @param pDevIns Device instance.
1969 * @param iIrq IRQ number to set.
1970 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1971 * @thread Any thread, but will involve the emulation thread.
1972 */
1973 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1974
1975 /**
1976 * Set the IRQ for a PCI device, but don't wait for EMT to process
1977 * the request when not called from EMT.
1978 *
1979 * @param pDevIns Device instance.
1980 * @param iIrq IRQ number to set.
1981 * @param iLevel IRQ level.
1982 * @thread Any thread, but will involve the emulation thread.
1983 */
1984 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1985
1986 /**
1987 * Set ISA IRQ for a device.
1988 *
1989 * @param pDevIns Device instance.
1990 * @param iIrq IRQ number to set.
1991 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1992 * @thread Any thread, but will involve the emulation thread.
1993 */
1994 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1995
1996 /**
1997 * Set the ISA IRQ for a device, but don't wait for EMT to process
1998 * the request when not called from EMT.
1999 *
2000 * @param pDevIns Device instance.
2001 * @param iIrq IRQ number to set.
2002 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2003 * @thread Any thread, but will involve the emulation thread.
2004 */
2005 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2006
2007 /**
2008 * Attaches a driver (chain) to the device.
2009 *
2010 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2011 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2012 *
2013 * @returns VBox status code.
2014 * @param pDevIns Device instance.
2015 * @param iLun The logical unit to attach.
2016 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2017 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2018 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2019 * for the live of the device instance.
2020 */
2021 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2022
2023 /**
2024 * Allocate memory which is associated with current VM instance
2025 * and automatically freed on it's destruction.
2026 *
2027 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2028 * @param pDevIns Device instance.
2029 * @param cb Number of bytes to allocate.
2030 */
2031 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2032
2033 /**
2034 * Allocate memory which is associated with current VM instance
2035 * and automatically freed on it's destruction. The memory is ZEROed.
2036 *
2037 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2038 * @param pDevIns Device instance.
2039 * @param cb Number of bytes to allocate.
2040 */
2041 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2042
2043 /**
2044 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2045 *
2046 * @param pDevIns Device instance.
2047 * @param pv Pointer to the memory to free.
2048 */
2049 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2050
2051 /**
2052 * Set the VM error message
2053 *
2054 * @returns rc.
2055 * @param pDevIns Device instance.
2056 * @param rc VBox status code.
2057 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2058 * @param pszFormat Error message format string.
2059 * @param ... Error message arguments.
2060 */
2061 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2062
2063 /**
2064 * Set the VM error message
2065 *
2066 * @returns rc.
2067 * @param pDevIns Device instance.
2068 * @param rc VBox status code.
2069 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2070 * @param pszFormat Error message format string.
2071 * @param va Error message arguments.
2072 */
2073 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2074
2075 /**
2076 * Set the VM runtime error message
2077 *
2078 * @returns VBox status code.
2079 * @param pDevIns Device instance.
2080 * @param fFatal Whether it is a fatal error or not.
2081 * @param pszErrorID Error ID string.
2082 * @param pszFormat Error message format string.
2083 * @param ... Error message arguments.
2084 */
2085 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2086
2087 /**
2088 * Set the VM runtime error message
2089 *
2090 * @returns VBox status code.
2091 * @param pDevIns Device instance.
2092 * @param fFatal Whether it is a fatal error or not.
2093 * @param pszErrorID Error ID string.
2094 * @param pszFormat Error message format string.
2095 * @param va Error message arguments.
2096 */
2097 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2098
2099 /**
2100 * Assert that the current thread is the emulation thread.
2101 *
2102 * @returns True if correct.
2103 * @returns False if wrong.
2104 * @param pDevIns Device instance.
2105 * @param pszFile Filename of the assertion location.
2106 * @param iLine The linenumber of the assertion location.
2107 * @param pszFunction Function of the assertion location.
2108 */
2109 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2110
2111 /**
2112 * Assert that the current thread is NOT the emulation thread.
2113 *
2114 * @returns True if correct.
2115 * @returns False if wrong.
2116 * @param pDevIns Device instance.
2117 * @param pszFile Filename of the assertion location.
2118 * @param iLine The linenumber of the assertion location.
2119 * @param pszFunction Function of the assertion location.
2120 */
2121 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2122
2123 /**
2124 * Stops the VM and enters the debugger to look at the guest state.
2125 *
2126 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2127 * invoking this function directly.
2128 *
2129 * @returns VBox status code which must be passed up to the VMM.
2130 * @param pDevIns Device instance.
2131 * @param pszFile Filename of the assertion location.
2132 * @param iLine The linenumber of the assertion location.
2133 * @param pszFunction Function of the assertion location.
2134 * @param pszFormat Message. (optional)
2135 * @param args Message parameters.
2136 */
2137 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2138
2139 /**
2140 * Register a info handler with DBGF,
2141 *
2142 * @returns VBox status code.
2143 * @param pDevIns Device instance.
2144 * @param pszName The identifier of the info.
2145 * @param pszDesc The description of the info and any arguments the handler may take.
2146 * @param pfnHandler The handler function to be called to display the info.
2147 */
2148 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2149
2150 /**
2151 * Registers a statistics sample if statistics are enabled.
2152 *
2153 * @param pDevIns Device instance of the DMA.
2154 * @param pvSample Pointer to the sample.
2155 * @param enmType Sample type. This indicates what pvSample is pointing at.
2156 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2157 * Further nesting is possible.
2158 * @param enmUnit Sample unit.
2159 * @param pszDesc Sample description.
2160 */
2161 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2162
2163 /**
2164 * Same as pfnSTAMRegister except that the name is specified in a
2165 * RTStrPrintf like fashion.
2166 *
2167 * @returns VBox status.
2168 * @param pDevIns Device instance of the DMA.
2169 * @param pvSample Pointer to the sample.
2170 * @param enmType Sample type. This indicates what pvSample is pointing at.
2171 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2172 * @param enmUnit Sample unit.
2173 * @param pszDesc Sample description.
2174 * @param pszName The sample name format string.
2175 * @param ... Arguments to the format string.
2176 */
2177 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2178 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2179
2180 /**
2181 * Same as pfnSTAMRegister except that the name is specified in a
2182 * RTStrPrintfV like fashion.
2183 *
2184 * @returns VBox status.
2185 * @param pDevIns Device instance of the DMA.
2186 * @param pvSample Pointer to the sample.
2187 * @param enmType Sample type. This indicates what pvSample is pointing at.
2188 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2189 * @param enmUnit Sample unit.
2190 * @param pszDesc Sample description.
2191 * @param pszName The sample name format string.
2192 * @param args Arguments to the format string.
2193 */
2194 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2195 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2196
2197 /**
2198 * Register the RTC device.
2199 *
2200 * @returns VBox status code.
2201 * @param pDevIns Device instance.
2202 * @param pRtcReg Pointer to a RTC registration structure.
2203 * @param ppRtcHlp Where to store the pointer to the helper functions.
2204 */
2205 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2206
2207 /**
2208 * Create a queue.
2209 *
2210 * @returns VBox status code.
2211 * @param pDevIns The device instance.
2212 * @param cbItem The size of a queue item.
2213 * @param cItems The number of items in the queue.
2214 * @param cMilliesInterval The number of milliseconds between polling the queue.
2215 * If 0 then the emulation thread will be notified whenever an item arrives.
2216 * @param pfnCallback The consumer function.
2217 * @param fGCEnabled Set if the queue should work in GC too.
2218 * @param ppQueue Where to store the queue handle on success.
2219 * @thread The emulation thread.
2220 */
2221 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2222 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2223
2224 /**
2225 * Initializes a PDM critical section.
2226 *
2227 * The PDM critical sections are derived from the IPRT critical sections, but
2228 * works in GC as well.
2229 *
2230 * @returns VBox status code.
2231 * @param pDevIns Device instance.
2232 * @param pCritSect Pointer to the critical section.
2233 * @param pszName The name of the critical section (for statistics).
2234 */
2235 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2236
2237 /**
2238 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2239 *
2240 * @returns pTime.
2241 * @param pDevIns Device instance.
2242 * @param pTime Where to store the time.
2243 */
2244 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2245
2246 /**
2247 * Creates a PDM thread.
2248 *
2249 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2250 * resuming, and destroying the thread as the VM state changes.
2251 *
2252 * @returns VBox status code.
2253 * @param pDevIns The device instance.
2254 * @param ppThread Where to store the thread 'handle'.
2255 * @param pvUser The user argument to the thread function.
2256 * @param pfnThread The thread function.
2257 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2258 * a state change is pending.
2259 * @param cbStack See RTThreadCreate.
2260 * @param enmType See RTThreadCreate.
2261 * @param pszName See RTThreadCreate.
2262 */
2263 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2264 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2265
2266 /**
2267 * Convert a guest virtual address to a guest physical address.
2268 *
2269 * @returns VBox status code.
2270 * @param pDevIns Device instance.
2271 * @param GCPtr Guest virtual address.
2272 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2273 * @thread The emulation thread.
2274 * @remark Careful with page boundraries.
2275 */
2276 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2277
2278 /**
2279 * Gets the VM state.
2280 *
2281 * @returns VM state.
2282 * @param pDevIns The device instance.
2283 * @thread Any thread (just keep in mind that it's volatile info).
2284 */
2285 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2286
2287 /** Space reserved for future members.
2288 * @{ */
2289 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2290 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2291 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2292 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2293 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2294 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2295 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2296 /** @} */
2297
2298
2299 /** API available to trusted devices only.
2300 *
2301 * These APIs are providing unrestricted access to the guest and the VM,
2302 * or they are interacting intimately with PDM.
2303 *
2304 * @{
2305 */
2306 /**
2307 * Gets the VM handle. Restricted API.
2308 *
2309 * @returns VM Handle.
2310 * @param pDevIns Device instance.
2311 */
2312 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2313
2314 /**
2315 * Register the PCI Bus.
2316 *
2317 * @returns VBox status code.
2318 * @param pDevIns Device instance.
2319 * @param pPciBusReg Pointer to PCI bus registration structure.
2320 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2321 */
2322 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2323
2324 /**
2325 * Register the PIC device.
2326 *
2327 * @returns VBox status code.
2328 * @param pDevIns Device instance.
2329 * @param pPicReg Pointer to a PIC registration structure.
2330 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2331 */
2332 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2333
2334 /**
2335 * Register the APIC device.
2336 *
2337 * @returns VBox status code.
2338 * @param pDevIns Device instance.
2339 * @param pApicReg Pointer to a APIC registration structure.
2340 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2341 */
2342 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2343
2344 /**
2345 * Register the I/O APIC device.
2346 *
2347 * @returns VBox status code.
2348 * @param pDevIns Device instance.
2349 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2350 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2351 */
2352 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2353
2354 /**
2355 * Register the DMA device.
2356 *
2357 * @returns VBox status code.
2358 * @param pDevIns Device instance.
2359 * @param pDmacReg Pointer to a DMAC registration structure.
2360 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2363
2364 /**
2365 * Read physical memory.
2366 *
2367 * @param pDevIns Device instance.
2368 * @param GCPhys Physical address start reading from.
2369 * @param pvBuf Where to put the read bits.
2370 * @param cbRead How many bytes to read.
2371 * @thread Any thread, but the call may involve the emulation thread.
2372 */
2373 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2374
2375 /**
2376 * Write to physical memory.
2377 *
2378 * @param pDevIns Device instance.
2379 * @param GCPhys Physical address to write to.
2380 * @param pvBuf What to write.
2381 * @param cbWrite How many bytes to write.
2382 * @thread Any thread, but the call may involve the emulation thread.
2383 */
2384 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2385
2386 /**
2387 * Read guest physical memory by virtual address.
2388 *
2389 * @param pDevIns Device instance.
2390 * @param pvDst Where to put the read bits.
2391 * @param GCVirtSrc Guest virtual address to start reading from.
2392 * @param cb How many bytes to read.
2393 * @thread The emulation thread.
2394 */
2395 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2396
2397 /**
2398 * Write to guest physical memory by virtual address.
2399 *
2400 * @param pDevIns Device instance.
2401 * @param GCVirtDst Guest virtual address to write to.
2402 * @param pvSrc What to write.
2403 * @param cb How many bytes to write.
2404 * @thread The emulation thread.
2405 */
2406 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2407
2408 /**
2409 * Reserve physical address space for ROM and MMIO ranges.
2410 *
2411 * @returns VBox status code.
2412 * @param pDevIns Device instance.
2413 * @param GCPhys Start physical address.
2414 * @param cbRange The size of the range.
2415 * @param pszDesc Description string.
2416 * @thread The emulation thread.
2417 */
2418 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2419
2420 /**
2421 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2422 *
2423 * @returns VBox status code.
2424 * @param pDevIns Device instance.
2425 * @param GCPhys Start physical address.
2426 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2427 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2428 * @thread The emulation thread.
2429 *
2430 * @remark Careful with page boundraries.
2431 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2432 */
2433 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2434
2435 /**
2436 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2437 *
2438 * @returns VBox status code.
2439 * @param pDevIns Device instance.
2440 * @param GCPtr Guest virtual address.
2441 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2442 * @thread The emulation thread.
2443 *
2444 * @remark Careful with page boundraries.
2445 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2448
2449 /**
2450 * Checks if the Gate A20 is enabled or not.
2451 *
2452 * @returns true if A20 is enabled.
2453 * @returns false if A20 is disabled.
2454 * @param pDevIns Device instance.
2455 * @thread The emulation thread.
2456 */
2457 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2458
2459 /**
2460 * Enables or disables the Gate A20.
2461 *
2462 * @param pDevIns Device instance.
2463 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2464 * @thread The emulation thread.
2465 */
2466 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2467
2468 /**
2469 * Resets the VM.
2470 *
2471 * @returns The appropriate VBox status code to pass around on reset.
2472 * @param pDevIns Device instance.
2473 * @thread The emulation thread.
2474 */
2475 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2476
2477 /**
2478 * Suspends the VM.
2479 *
2480 * @returns The appropriate VBox status code to pass around on suspend.
2481 * @param pDevIns Device instance.
2482 * @thread The emulation thread.
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2485
2486 /**
2487 * Power off the VM.
2488 *
2489 * @returns The appropriate VBox status code to pass around on power off.
2490 * @param pDevIns Device instance.
2491 * @thread The emulation thread.
2492 */
2493 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2494
2495 /**
2496 * Acquire global VM lock
2497 *
2498 * @returns VBox status code
2499 * @param pDevIns Device instance.
2500 */
2501 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2502
2503 /**
2504 * Release global VM lock
2505 *
2506 * @returns VBox status code
2507 * @param pDevIns Device instance.
2508 */
2509 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2510
2511 /**
2512 * Check that the current thread owns the global VM lock.
2513 *
2514 * @returns boolean
2515 * @param pDevIns Device instance.
2516 * @param pszFile Filename of the assertion location.
2517 * @param iLine Linenumber of the assertion location.
2518 * @param pszFunction Function of the assertion location.
2519 */
2520 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2521
2522 /**
2523 * Register transfer function for DMA channel.
2524 *
2525 * @returns VBox status code.
2526 * @param pDevIns Device instance.
2527 * @param uChannel Channel number.
2528 * @param pfnTransferHandler Device specific transfer callback function.
2529 * @param pvUser User pointer to pass to the callback.
2530 * @thread EMT
2531 */
2532 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2533
2534 /**
2535 * Read memory.
2536 *
2537 * @returns VBox status code.
2538 * @param pDevIns Device instance.
2539 * @param uChannel Channel number.
2540 * @param pvBuffer Pointer to target buffer.
2541 * @param off DMA position.
2542 * @param cbBlock Block size.
2543 * @param pcbRead Where to store the number of bytes which was read. optional.
2544 * @thread EMT
2545 */
2546 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2547
2548 /**
2549 * Write memory.
2550 *
2551 * @returns VBox status code.
2552 * @param pDevIns Device instance.
2553 * @param uChannel Channel number.
2554 * @param pvBuffer Memory to write.
2555 * @param off DMA position.
2556 * @param cbBlock Block size.
2557 * @param pcbWritten Where to store the number of bytes which was written. optional.
2558 * @thread EMT
2559 */
2560 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2561
2562 /**
2563 * Set the DREQ line.
2564 *
2565 * @returns VBox status code.
2566 * @param pDevIns Device instance.
2567 * @param uChannel Channel number.
2568 * @param uLevel Level of the line.
2569 * @thread EMT
2570 */
2571 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2572
2573 /**
2574 * Get channel mode.
2575 *
2576 * @returns Channel mode. See specs.
2577 * @param pDevIns Device instance.
2578 * @param uChannel Channel number.
2579 * @thread EMT
2580 */
2581 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2582
2583 /**
2584 * Schedule DMA execution.
2585 *
2586 * @param pDevIns Device instance.
2587 * @thread Any thread.
2588 */
2589 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2590
2591 /**
2592 * Write CMOS value and update the checksum(s).
2593 *
2594 * @returns VBox status code.
2595 * @param pDevIns Device instance.
2596 * @param iReg The CMOS register index.
2597 * @param u8Value The CMOS register value.
2598 * @thread EMT
2599 */
2600 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2601
2602 /**
2603 * Read CMOS value.
2604 *
2605 * @returns VBox status code.
2606 * @param pDevIns Device instance.
2607 * @param iReg The CMOS register index.
2608 * @param pu8Value Where to store the CMOS register value.
2609 * @thread EMT
2610 */
2611 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2612
2613 /**
2614 * Get CPUID.
2615 *
2616 * @param pDevIns Device instance.
2617 * @param iLeaf The CPUID leaf to get.
2618 * @param pEax Where to store the EAX value.
2619 * @param pEbx Where to store the EBX value.
2620 * @param pEcx Where to store the ECX value.
2621 * @param pEdx Where to store the EDX value.
2622 */
2623 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2624
2625 /**
2626 * Write protects a shadow ROM mapping.
2627 *
2628 * This is intented for use by the system BIOS or by the device that
2629 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2630 * write protected once the POST is over.
2631 *
2632 * @param pDevIns Device instance.
2633 * @param GCPhysStart Where the shadow ROM mapping starts.
2634 * @param cbRange The size of the shadow ROM mapping.
2635 */
2636 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2637
2638 /**
2639 * Allocate and register a MMIO2 region.
2640 *
2641 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2642 * RAM associated with a device. It is also non-shared memory with a
2643 * permanent ring-3 mapping and page backing (presently).
2644 *
2645 * @returns VBox status.
2646 * @param pDevIns The device instance.
2647 * @param iRegion The region number. Use the PCI region number as
2648 * this must be known to the PCI bus device too. If it's not associated
2649 * with the PCI device, then any number up to UINT8_MAX is fine.
2650 * @param cb The size (in bytes) of the region.
2651 * @param fFlags Reserved for future use, must be zero.
2652 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2653 * @param pszDesc Pointer to description string. This must not be freed.
2654 * @thread EMT.
2655 */
2656 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2657
2658 /**
2659 * Deregisters and frees a MMIO2 region.
2660 *
2661 * Any physical (and virtual) access handlers registered for the region must
2662 * be deregistered before calling this function.
2663 *
2664 * @returns VBox status code.
2665 * @param pDevIns The device instance.
2666 * @param iRegion The region number used during registration.
2667 * @thread EMT.
2668 */
2669 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2670
2671 /**
2672 * Maps a MMIO2 region into the physical memory space.
2673 *
2674 * A MMIO2 range may overlap with base memory if a lot of RAM
2675 * is configured for the VM, in which case we'll drop the base
2676 * memory pages. Presently we will make no attempt to preserve
2677 * anything that happens to be present in the base memory that
2678 * is replaced, this is of course incorrectly but it's too much
2679 * effort.
2680 *
2681 * @returns VBox status code.
2682 * @param pDevIns The device instance.
2683 * @param iRegion The region number used during registration.
2684 * @param GCPhys The physical address to map it at.
2685 * @thread EMT.
2686 */
2687 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2688
2689 /**
2690 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2691 *
2692 * @returns VBox status code.
2693 * @param pDevIns The device instance.
2694 * @param iRegion The region number used during registration.
2695 * @param GCPhys The physical address it's currently mapped at.
2696 * @thread EMT.
2697 */
2698 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2699
2700 /**
2701 * Maps a portion of an MMIO2 region into the hypervisor region.
2702 *
2703 * Callers of this API must never deregister the MMIO2 region before the
2704 * VM is powered off.
2705 *
2706 * @return VBox status code.
2707 * @param pDevIns The device owning the MMIO2 memory.
2708 * @param iRegion The region.
2709 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2710 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2711 * @param pszDesc Mapping description.
2712 * @param pRCPtr Where to store the RC address.
2713 */
2714 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2715 const char *pszDesc, PRTRCPTR pRCPtr));
2716
2717 /**
2718 * Registers the VMM device heap
2719 *
2720 * @returns VBox status code.
2721 * @param pDevIns The device instance.
2722 * @param GCPhys The physical address.
2723 * @param pvHeap Ring 3 heap pointer.
2724 * @param cbSize Size of the heap.
2725 * @thread EMT.
2726 */
2727 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2728
2729 /**
2730 * Unregisters the VMM device heap
2731 *
2732 * @returns VBox status code.
2733 * @param pDevIns The device instance.
2734 * @param GCPhys The physical address.
2735 * @thread EMT.
2736 */
2737 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2738
2739 /** @} */
2740
2741 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2742 uint32_t u32TheEnd;
2743} PDMDEVHLPR3;
2744#endif /* !IN_RING3 */
2745/** Pointer to the R3 PDM Device API. */
2746typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2747/** Pointer to the R3 PDM Device API, const variant. */
2748typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2749
2750/** Current PDMDEVHLP version number. */
2751#define PDM_DEVHLP_VERSION 0xf2060001
2752
2753
2754/**
2755 * PDM Device API - RC Variant.
2756 */
2757typedef struct PDMDEVHLPRC
2758{
2759 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2760 uint32_t u32Version;
2761
2762 /**
2763 * Set the IRQ for a PCI device.
2764 *
2765 * @param pDevIns Device instance.
2766 * @param iIrq IRQ number to set.
2767 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2768 * @thread Any thread, but will involve the emulation thread.
2769 */
2770 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2771
2772 /**
2773 * Set ISA IRQ for a device.
2774 *
2775 * @param pDevIns Device instance.
2776 * @param iIrq IRQ number to set.
2777 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2778 * @thread Any thread, but will involve the emulation thread.
2779 */
2780 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2781
2782 /**
2783 * Read physical memory.
2784 *
2785 * @param pDevIns Device instance.
2786 * @param GCPhys Physical address start reading from.
2787 * @param pvBuf Where to put the read bits.
2788 * @param cbRead How many bytes to read.
2789 */
2790 DECLRCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2791
2792 /**
2793 * Write to physical memory.
2794 *
2795 * @param pDevIns Device instance.
2796 * @param GCPhys Physical address to write to.
2797 * @param pvBuf What to write.
2798 * @param cbWrite How many bytes to write.
2799 */
2800 DECLRCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2801
2802 /**
2803 * Checks if the Gate A20 is enabled or not.
2804 *
2805 * @returns true if A20 is enabled.
2806 * @returns false if A20 is disabled.
2807 * @param pDevIns Device instance.
2808 * @thread The emulation thread.
2809 */
2810 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2811
2812 /**
2813 * Set the VM error message
2814 *
2815 * @returns rc.
2816 * @param pDrvIns Driver instance.
2817 * @param rc VBox status code.
2818 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2819 * @param pszFormat Error message format string.
2820 * @param ... Error message arguments.
2821 */
2822 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2823
2824 /**
2825 * Set the VM error message
2826 *
2827 * @returns rc.
2828 * @param pDrvIns Driver instance.
2829 * @param rc VBox status code.
2830 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2831 * @param pszFormat Error message format string.
2832 * @param va Error message arguments.
2833 */
2834 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2835
2836 /**
2837 * Set the VM runtime error message
2838 *
2839 * @returns VBox status code.
2840 * @param pDevIns Device instance.
2841 * @param fFatal Whether it is a fatal error or not.
2842 * @param pszErrorID Error ID string.
2843 * @param pszFormat Error message format string.
2844 * @param ... Error message arguments.
2845 */
2846 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2847
2848 /**
2849 * Set the VM runtime error message
2850 *
2851 * @returns VBox status code.
2852 * @param pDevIns Device instance.
2853 * @param fFatal Whether it is a fatal error or not.
2854 * @param pszErrorID Error ID string.
2855 * @param pszFormat Error message format string.
2856 * @param va Error message arguments.
2857 */
2858 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2859
2860 /**
2861 * Set parameters for pending MMIO patch operation
2862 *
2863 * @returns VBox status code.
2864 * @param pDevIns Device instance.
2865 * @param GCPhys MMIO physical address
2866 * @param pCachedData GC pointer to cached data
2867 */
2868 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2869
2870 /** Just a safety precaution. */
2871 uint32_t u32TheEnd;
2872} PDMDEVHLPRC;
2873/** Pointer PDM Device RC API. */
2874typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2875/** Pointer PDM Device RC API. */
2876typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2877
2878/** Current PDMDEVHLP version number. */
2879#define PDM_DEVHLPRC_VERSION 0xfb010000
2880
2881
2882/**
2883 * PDM Device API - R0 Variant.
2884 */
2885typedef struct PDMDEVHLPR0
2886{
2887 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2888 uint32_t u32Version;
2889
2890 /**
2891 * Set the IRQ for a PCI device.
2892 *
2893 * @param pDevIns Device instance.
2894 * @param iIrq IRQ number to set.
2895 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2896 * @thread Any thread, but will involve the emulation thread.
2897 */
2898 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2899
2900 /**
2901 * Set ISA IRQ for a device.
2902 *
2903 * @param pDevIns Device instance.
2904 * @param iIrq IRQ number to set.
2905 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2906 * @thread Any thread, but will involve the emulation thread.
2907 */
2908 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2909
2910 /**
2911 * Read physical memory.
2912 *
2913 * @param pDevIns Device instance.
2914 * @param GCPhys Physical address start reading from.
2915 * @param pvBuf Where to put the read bits.
2916 * @param cbRead How many bytes to read.
2917 */
2918 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2919
2920 /**
2921 * Write to physical memory.
2922 *
2923 * @param pDevIns Device instance.
2924 * @param GCPhys Physical address to write to.
2925 * @param pvBuf What to write.
2926 * @param cbWrite How many bytes to write.
2927 */
2928 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2929
2930 /**
2931 * Checks if the Gate A20 is enabled or not.
2932 *
2933 * @returns true if A20 is enabled.
2934 * @returns false if A20 is disabled.
2935 * @param pDevIns Device instance.
2936 * @thread The emulation thread.
2937 */
2938 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2939
2940 /**
2941 * Set the VM error message
2942 *
2943 * @returns rc.
2944 * @param pDrvIns Driver instance.
2945 * @param rc VBox status code.
2946 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2947 * @param pszFormat Error message format string.
2948 * @param ... Error message arguments.
2949 */
2950 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2951
2952 /**
2953 * Set the VM error message
2954 *
2955 * @returns rc.
2956 * @param pDrvIns Driver instance.
2957 * @param rc VBox status code.
2958 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2959 * @param pszFormat Error message format string.
2960 * @param va Error message arguments.
2961 */
2962 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2963
2964 /**
2965 * Set the VM runtime error message
2966 *
2967 * @returns VBox status code.
2968 * @param pDevIns Device instance.
2969 * @param fFatal Whether it is a fatal error or not.
2970 * @param pszErrorID Error ID string.
2971 * @param pszFormat Error message format string.
2972 * @param ... Error message arguments.
2973 */
2974 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2975
2976 /**
2977 * Set the VM runtime error message
2978 *
2979 * @returns VBox status code.
2980 * @param pDevIns Device instance.
2981 * @param fFatal Whether it is a fatal error or not.
2982 * @param pszErrorID Error ID string.
2983 * @param pszFormat Error message format string.
2984 * @param va Error message arguments.
2985 */
2986 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2987
2988 /**
2989 * Set parameters for pending MMIO patch operation
2990 *
2991 * @returns rc.
2992 * @param pDevIns Device instance.
2993 * @param GCPhys MMIO physical address
2994 * @param pCachedData GC pointer to cached data
2995 */
2996 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2997
2998 /** Just a safety precaution. */
2999 uint32_t u32TheEnd;
3000} PDMDEVHLPR0;
3001/** Pointer PDM Device R0 API. */
3002typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3003/** Pointer PDM Device GC API. */
3004typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3005
3006/** Current PDMDEVHLP version number. */
3007#define PDM_DEVHLPR0_VERSION 0xfb010000
3008
3009
3010
3011/**
3012 * PDM Device Instance.
3013 */
3014typedef struct PDMDEVINS
3015{
3016 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3017 uint32_t u32Version;
3018 /** Device instance number. */
3019 RTUINT iInstance;
3020
3021 /** Pointer the GC PDM Device API. */
3022 PCPDMDEVHLPRC pDevHlpRC;
3023 /** Pointer to device instance data. */
3024 RTRCPTR pvInstanceDataRC;
3025
3026 /** Pointer the R0 PDM Device API. */
3027 PCPDMDEVHLPR0 pDevHlpR0;
3028 /** Pointer to device instance data (R0). */
3029 RTR0PTR pvInstanceDataR0;
3030
3031 /** Pointer the HC PDM Device API. */
3032 PCPDMDEVHLPR3 pDevHlpR3;
3033 /** Pointer to device instance data. */
3034 RTR3PTR pvInstanceDataR3;
3035
3036 /** Pointer to device registration structure. */
3037 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3038 /** Configuration handle. */
3039 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3040
3041 /** The base interface of the device.
3042 * The device constructor initializes this if it has any
3043 * device level interfaces to export. To obtain this interface
3044 * call PDMR3QueryDevice(). */
3045 PDMIBASE IBase;
3046 /** Align the internal data more naturally. */
3047 RTR3PTR R3PtrPadding;
3048
3049 /** Internal data. */
3050 union
3051 {
3052#ifdef PDMDEVINSINT_DECLARED
3053 PDMDEVINSINT s;
3054#endif
3055 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3056 } Internal;
3057
3058 /** Device instance data. The size of this area is defined
3059 * in the PDMDEVREG::cbInstanceData field. */
3060 char achInstanceData[8];
3061} PDMDEVINS;
3062
3063/** Current PDMDEVINS version number. */
3064#define PDM_DEVINS_VERSION 0xf3020000
3065
3066/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3067#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3068
3069
3070/** @def PDMDEV_ASSERT_EMT
3071 * Assert that the current thread is the emulation thread.
3072 */
3073#ifdef VBOX_STRICT
3074# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3075#else
3076# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3077#endif
3078
3079/** @def PDMDEV_ASSERT_OTHER
3080 * Assert that the current thread is NOT the emulation thread.
3081 */
3082#ifdef VBOX_STRICT
3083# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3084#else
3085# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3086#endif
3087
3088/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3089 * Assert that the current thread is owner of the VM lock.
3090 */
3091#ifdef VBOX_STRICT
3092# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3093#else
3094# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3095#endif
3096
3097/** @def PDMDEV_SET_ERROR
3098 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3099 */
3100#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3101 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3102
3103/** @def PDMDEV_SET_RUNTIME_ERROR
3104 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3105 */
3106#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3107 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3108
3109/** @def PDMDEVINS_2_RCPTR
3110 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3111 */
3112#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3113
3114/** @def PDMDEVINS_2_R3PTR
3115 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3116 */
3117#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3118
3119/** @def PDMDEVINS_2_R0PTR
3120 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3121 */
3122#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3123
3124
3125/**
3126 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3127 *
3128 * @returns VBox status code which must be passed up to the VMM.
3129 * @param pDevIns Device instance.
3130 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3131 * @param pszFormat Message. (optional)
3132 * @param ... Message parameters.
3133 */
3134DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3135{
3136#ifdef VBOX_STRICT
3137# ifdef IN_RING3
3138 int rc;
3139 va_list args;
3140 va_start(args, pszFormat);
3141 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3142 va_end(args);
3143 return rc;
3144# else
3145 return VINF_EM_DBG_STOP;
3146# endif
3147#else
3148 NOREF(pDevIns);
3149 NOREF(pszFile);
3150 NOREF(iLine);
3151 NOREF(pszFunction);
3152 NOREF(pszFormat);
3153 return VINF_SUCCESS;
3154#endif
3155}
3156
3157
3158#ifdef IN_RING3
3159/**
3160 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3161 */
3162DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3163 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3164 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3165{
3166 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3167}
3168
3169/**
3170 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3171 */
3172DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3173 const char *pszOut, const char *pszIn, const char *pszOutStr,
3174 const char *pszInStr, const char *pszDesc)
3175{
3176 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3177}
3178
3179/**
3180 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3181 */
3182DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3183 const char *pszOut, const char *pszIn, const char *pszOutStr,
3184 const char *pszInStr, const char *pszDesc)
3185{
3186 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3187}
3188
3189/**
3190 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3191 */
3192DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3193 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3194 const char *pszDesc)
3195{
3196 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3197}
3198
3199/**
3200 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3201 */
3202DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3203 const char *pszWrite, const char *pszRead, const char *pszFill)
3204{
3205 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3206}
3207
3208/**
3209 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3210 */
3211DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3212 const char *pszWrite, const char *pszRead, const char *pszFill)
3213{
3214 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3215}
3216
3217/**
3218 * @copydoc PDMDEVHLPR3::pfnROMRegister
3219 */
3220DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3221{
3222 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3223}
3224/**
3225 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3226 */
3227DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3228{
3229 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3230}
3231
3232/**
3233 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3234 */
3235DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3236{
3237 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3238}
3239
3240/**
3241 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3242 */
3243DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3244{
3245 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3246}
3247
3248/**
3249 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3250 */
3251DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3252{
3253 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3254}
3255
3256/**
3257 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3258 */
3259DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3260{
3261 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3262}
3263
3264/**
3265 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3266 */
3267DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3268 const char *pszDesc, PRTRCPTR pRCPtr)
3269{
3270 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3271}
3272
3273/**
3274 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3275 */
3276DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3277{
3278 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3279}
3280
3281/**
3282 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3283 */
3284DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3285{
3286 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3287}
3288
3289/**
3290 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3291 */
3292DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3293 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3294 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3295{
3296 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3297 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3298 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3299}
3300
3301/**
3302 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3303 */
3304DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3305{
3306 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3307}
3308
3309/**
3310 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3311 */
3312DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3313{
3314 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3315}
3316
3317/**
3318 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3319 */
3320DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3321{
3322 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3323}
3324
3325/**
3326 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3327 */
3328DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3329 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3330{
3331 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3332}
3333
3334/**
3335 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3336 */
3337DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3338{
3339 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3340}
3341
3342/**
3343 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3344 */
3345DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3346{
3347 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3348}
3349
3350/**
3351 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3352 */
3353DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3354{
3355 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3356}
3357
3358/**
3359 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3360 */
3361DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3362{
3363 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3364}
3365
3366/**
3367 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3368 */
3369DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3370{
3371 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3372}
3373
3374/**
3375 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3376 */
3377DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3378{
3379 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3384 */
3385DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3386 const char *pszDesc, const char *pszName, ...)
3387{
3388 va_list va;
3389 va_start(va, pszName);
3390 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3391 va_end(va);
3392}
3393
3394/**
3395 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3396 */
3397DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3398 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3399{
3400 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3401}
3402
3403/**
3404 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3405 */
3406DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3407{
3408 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3409}
3410
3411/**
3412 * @copydoc PDMDEVHLPR3::pfnUTCNow
3413 */
3414DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3415{
3416 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3417}
3418
3419/**
3420 * @copydoc PDMDEVHLPR3::pfnGetVM
3421 */
3422DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3423{
3424 return pDevIns->pDevHlpR3->pfnGetVM(pDevIns);
3425}
3426
3427/**
3428 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3429 */
3430DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3431{
3432 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3433}
3434
3435/**
3436 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3437 */
3438DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3439{
3440 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3441}
3442
3443/**
3444 * @copydoc PDMDEVHLPR3::pfnPhysReserve
3445 */
3446DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3447{
3448 return pDevIns->pDevHlpR3->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3449}
3450
3451/**
3452 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3453 */
3454DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3455{
3456 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3457}
3458
3459/**
3460 * @copydoc PDMDEVHLPR3::pfnVMState
3461 */
3462DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3463{
3464 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3465}
3466
3467/**
3468 * @copydoc PDMDEVHLPR3::pfnA20Set
3469 */
3470DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3471{
3472 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3473}
3474
3475/**
3476 * @copydoc PDMDEVHLPR3::pfnVMReset
3477 */
3478DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3479{
3480 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3481}
3482
3483/**
3484 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3485 */
3486DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3487{
3488 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3489}
3490
3491/**
3492 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3493 */
3494DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3495{
3496 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3497}
3498
3499/**
3500 * @copydoc PDMDEVHLPR3::pfnDMARegister
3501 */
3502DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3503{
3504 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3505}
3506
3507/**
3508 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3509 */
3510DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3511{
3512 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3513}
3514
3515/**
3516 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3517 */
3518DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3519{
3520 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3521}
3522
3523/**
3524 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3525 */
3526DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3527{
3528 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3529}
3530
3531/**
3532 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3533 */
3534DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3535{
3536 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3537}
3538
3539/**
3540 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3541 */
3542DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3543{
3544 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3545}
3546
3547/**
3548 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3549 */
3550DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3551{
3552 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3553}
3554
3555/**
3556 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3557 */
3558DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3559{
3560 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3561}
3562
3563/**
3564 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3565 */
3566DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3567{
3568 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3569}
3570
3571/**
3572 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3573 */
3574DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3575 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3576{
3577 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3578}
3579#endif /* IN_RING3 */
3580
3581
3582/**
3583 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3584 */
3585DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3586{
3587 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3588}
3589
3590/**
3591 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3592 */
3593DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3594{
3595 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3596}
3597
3598/**
3599 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3600 */
3601DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3602{
3603 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3604}
3605
3606/**
3607 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3608 */
3609DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3610{
3611 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3612}
3613
3614/**
3615 * @copydoc PDMDEVHLPR3::pfnPhysRead
3616 */
3617DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3618{
3619 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3620}
3621
3622/**
3623 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3624 */
3625DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3626{
3627 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3628}
3629
3630/**
3631 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3632 */
3633DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3634{
3635 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3636}
3637
3638/**
3639 * @copydoc PDMDEVHLPR3::pfnVMSetError
3640 */
3641DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3642{
3643 va_list va;
3644 va_start(va, pszFormat);
3645 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3646 va_end(va);
3647 return rc;
3648}
3649
3650/**
3651 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3652 */
3653DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3654{
3655 va_list va;
3656 int rc;
3657 va_start(va, pszFormat);
3658 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3659 va_end(va);
3660 return rc;
3661}
3662
3663
3664
3665/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3666typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3667
3668/**
3669 * Callbacks for VBoxDeviceRegister().
3670 */
3671typedef struct PDMDEVREGCB
3672{
3673 /** Interface version.
3674 * This is set to PDM_DEVREG_CB_VERSION. */
3675 uint32_t u32Version;
3676
3677 /**
3678 * Registers a device with the current VM instance.
3679 *
3680 * @returns VBox status code.
3681 * @param pCallbacks Pointer to the callback table.
3682 * @param pDevReg Pointer to the device registration record.
3683 * This data must be permanent and readonly.
3684 */
3685 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3686
3687 /**
3688 * Allocate memory which is associated with current VM instance
3689 * and automatically freed on it's destruction.
3690 *
3691 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3692 * @param pCallbacks Pointer to the callback table.
3693 * @param cb Number of bytes to allocate.
3694 */
3695 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3696} PDMDEVREGCB;
3697
3698/** Current version of the PDMDEVREGCB structure. */
3699#define PDM_DEVREG_CB_VERSION 0xf4010000
3700
3701
3702/**
3703 * The VBoxDevicesRegister callback function.
3704 *
3705 * PDM will invoke this function after loading a device module and letting
3706 * the module decide which devices to register and how to handle conflicts.
3707 *
3708 * @returns VBox status code.
3709 * @param pCallbacks Pointer to the callback table.
3710 * @param u32Version VBox version number.
3711 */
3712typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3713
3714/** @} */
3715
3716__END_DECLS
3717
3718#endif
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