VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 17146

Last change on this file since 17146 was 16021, checked in by vboxsync, 16 years ago

PDM: Add new flags which will make the device notified first if the VM is suspended if set

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of the raw-mode context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
249 char szRCMod[32];
250 /** Name of the ring-0 module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292 /** @todo */
293 PFNRT pfnSoftReset;
294 /** Initialization safty marker. */
295 uint32_t u32VersionEnd;
296} PDMDEVREG;
297/** Pointer to a PDM Device Structure. */
298typedef PDMDEVREG *PPDMDEVREG;
299/** Const pointer to a PDM Device Structure. */
300typedef PDMDEVREG const *PCPDMDEVREG;
301
302/** Current DEVREG version number. */
303#define PDM_DEVREG_VERSION 0xc0020000
304
305/** PDM Device Flags.
306 * @{ */
307/** This flag is used to indicate that the device has a RC component. */
308#define PDM_DEVREG_FLAGS_RC 0x00000001
309/** This flag is used to indicate that the device has a R0 component. */
310#define PDM_DEVREG_FLAGS_R0 0x00000002
311
312/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
313 * The bit count for the current host. */
314#if HC_ARCH_BITS == 32
315# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
316#elif HC_ARCH_BITS == 64
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
318#else
319# error Unsupported HC_ARCH_BITS value.
320#endif
321/** The host bit count mask. */
322#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
323
324/** The device support only 32-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
326/** The device support only 64-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
328/** The device support both 32-bit & 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
330/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
331 * The guest bit count for the current compilation. */
332#if GC_ARCH_BITS == 32
333# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
334#elif GC_ARCH_BITS == 64
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
336#else
337# error Unsupported GC_ARCH_BITS value.
338#endif
339/** The guest bit count mask. */
340#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
341
342/** A convenience. */
343#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
344
345/** Indicates that the devices support PAE36 on a 32-bit guest. */
346#define PDM_DEVREG_FLAGS_PAE36 0x00001000
347
348/** Indicates that the device needs to be notified before the drivers when suspending. */
349#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
350
351/** Indicates that the device needs to be notified before the drivers when powering off. */
352#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
353/** @} */
354
355
356/** PDM Device Classes.
357 * The order is important, lower bit earlier instantiation.
358 * @{ */
359/** Architecture device. */
360#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
361/** Architecture BIOS device. */
362#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
363/** PCI bus brigde. */
364#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
365/** ISA bus brigde. */
366#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
367/** Input device (mouse, keyboard, joystick, HID, ...). */
368#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
369/** Interrupt controller (PIC). */
370#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
371/** Interval controoler (PIT). */
372#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
373/** RTC/CMOS. */
374#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
375/** DMA controller. */
376#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
377/** VMM Device. */
378#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
379/** Graphics device, like VGA. */
380#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
381/** Storage controller device. */
382#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
383/** Network interface controller. */
384#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
385/** Audio. */
386#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
387/** USB HIC. */
388#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
389/** ACPI. */
390#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
391/** Serial controller device. */
392#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
393/** Parallel controller device */
394#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
395/** Misc devices (always last). */
396#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
397/** @} */
398
399
400/** @name IRQ Level for use with the *SetIrq APIs.
401 * @{
402 */
403/** Assert the IRQ (can assume value 1). */
404#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
405/** Deassert the IRQ (can assume value 0). */
406#define PDM_IRQ_LEVEL_LOW 0
407/** flip-flop - assert and then deassert it again immediately. */
408#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
409/** @} */
410
411
412/**
413 * PCI Bus registration structure.
414 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
415 */
416typedef struct PDMPCIBUSREG
417{
418 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
419 uint32_t u32Version;
420
421 /**
422 * Registers the device with the default PCI bus.
423 *
424 * @returns VBox status code.
425 * @param pDevIns Device instance of the PCI Bus.
426 * @param pPciDev The PCI device structure.
427 * Any PCI enabled device must keep this in it's instance data!
428 * Fill in the PCI data config before registration, please.
429 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
430 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
431 * If negative, the pci bus device will assign one.
432 */
433 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
434
435 /**
436 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
437 *
438 * @returns VBox status code.
439 * @param pDevIns Device instance of the PCI Bus.
440 * @param pPciDev The PCI device structure.
441 * @param iRegion The region number.
442 * @param cbRegion Size of the region.
443 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
444 * @param pfnCallback Callback for doing the mapping.
445 */
446 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
447
448 /**
449 * Register PCI configuration space read/write callbacks.
450 *
451 * @param pDevIns Device instance of the PCI Bus.
452 * @param pPciDev The PCI device structure.
453 * @param pfnRead Pointer to the user defined PCI config read function.
454 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
455 * PCI config read function. This way, user can decide when (and if)
456 * to call default PCI config read function. Can be NULL.
457 * @param pfnWrite Pointer to the user defined PCI config write function.
458 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
459 * PCI config write function. This way, user can decide when (and if)
460 * to call default PCI config write function. Can be NULL.
461 * @thread EMT
462 */
463 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
464 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
465
466 /**
467 * Set the IRQ for a PCI device.
468 *
469 * @param pDevIns Device instance of the PCI Bus.
470 * @param pPciDev The PCI device structure.
471 * @param iIrq IRQ number to set.
472 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
473 */
474 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
475
476 /**
477 * Saves a state of the PCI device.
478 *
479 * @returns VBox status code.
480 * @param pDevIns Device instance of the PCI Bus.
481 * @param pPciDev Pointer to PCI device.
482 * @param pSSMHandle The handle to save the state to.
483 */
484 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
485
486 /**
487 * Loads a saved PCI device state.
488 *
489 * @returns VBox status code.
490 * @param pDevIns Device instance of the PCI Bus.
491 * @param pPciDev Pointer to PCI device.
492 * @param pSSMHandle The handle to the saved state.
493 */
494 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
495
496 /**
497 * Called to perform the job of the bios.
498 * This is only called for the first PCI Bus - it is expected to
499 * service all the PCI buses.
500 *
501 * @returns VBox status.
502 * @param pDevIns Device instance of the first bus.
503 */
504 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
505
506 /** The name of the SetIrq RC entry point. */
507 const char *pszSetIrqRC;
508
509 /** The name of the SetIrq R0 entry point. */
510 const char *pszSetIrqR0;
511
512} PDMPCIBUSREG;
513/** Pointer to a PCI bus registration structure. */
514typedef PDMPCIBUSREG *PPDMPCIBUSREG;
515
516/** Current PDMPCIBUSREG version number. */
517#define PDM_PCIBUSREG_VERSION 0xd0020000
518
519/**
520 * PCI Bus RC helpers.
521 */
522typedef struct PDMPCIHLPRC
523{
524 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
525 uint32_t u32Version;
526
527 /**
528 * Set an ISA IRQ.
529 *
530 * @param pDevIns PCI device instance.
531 * @param iIrq IRQ number to set.
532 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
533 * @thread EMT only.
534 */
535 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
536
537 /**
538 * Set an I/O-APIC IRQ.
539 *
540 * @param pDevIns PCI device instance.
541 * @param iIrq IRQ number to set.
542 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
543 * @thread EMT only.
544 */
545 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
546
547 /**
548 * Acquires the PDM lock.
549 *
550 * @returns VINF_SUCCESS on success.
551 * @returns rc if we failed to acquire the lock.
552 * @param pDevIns The PCI device instance.
553 * @param rc What to return if we fail to acquire the lock.
554 */
555 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
556
557 /**
558 * Releases the PDM lock.
559 *
560 * @param pDevIns The PCI device instance.
561 */
562 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
563
564 /** Just a safety precaution. */
565 uint32_t u32TheEnd;
566} PDMPCIHLPRC;
567/** Pointer to PCI helpers. */
568typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
569/** Pointer to const PCI helpers. */
570typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
571
572/** Current PDMPCIHLPR3 version number. */
573#define PDM_PCIHLPRC_VERSION 0xe1010000
574
575
576/**
577 * PCI Bus R0 helpers.
578 */
579typedef struct PDMPCIHLPR0
580{
581 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
582 uint32_t u32Version;
583
584 /**
585 * Set an ISA IRQ.
586 *
587 * @param pDevIns PCI device instance.
588 * @param iIrq IRQ number to set.
589 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
590 * @thread EMT only.
591 */
592 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
593
594 /**
595 * Set an I/O-APIC IRQ.
596 *
597 * @param pDevIns PCI device instance.
598 * @param iIrq IRQ number to set.
599 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
600 * @thread EMT only.
601 */
602 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
603
604 /**
605 * Acquires the PDM lock.
606 *
607 * @returns VINF_SUCCESS on success.
608 * @returns rc if we failed to acquire the lock.
609 * @param pDevIns The PCI device instance.
610 * @param rc What to return if we fail to acquire the lock.
611 */
612 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
613
614 /**
615 * Releases the PDM lock.
616 *
617 * @param pDevIns The PCI device instance.
618 */
619 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
620
621 /** Just a safety precaution. */
622 uint32_t u32TheEnd;
623} PDMPCIHLPR0;
624/** Pointer to PCI helpers. */
625typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
626/** Pointer to const PCI helpers. */
627typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
628
629/** Current PDMPCIHLPR0 version number. */
630#define PDM_PCIHLPR0_VERSION 0xe1010000
631
632/**
633 * PCI device helpers.
634 */
635typedef struct PDMPCIHLPR3
636{
637 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
638 uint32_t u32Version;
639
640 /**
641 * Set an ISA IRQ.
642 *
643 * @param pDevIns The PCI device instance.
644 * @param iIrq IRQ number to set.
645 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
646 * @thread EMT only.
647 */
648 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
649
650 /**
651 * Set an I/O-APIC IRQ.
652 *
653 * @param pDevIns The PCI device instance.
654 * @param iIrq IRQ number to set.
655 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
656 * @thread EMT only.
657 */
658 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
659
660 /**
661 * Checks if the given address is an MMIO2 base address or not.
662 *
663 * @returns true/false accordingly.
664 * @param pDevIns The PCI device instance.
665 * @param pOwner The owner of the memory, optional.
666 * @param GCPhys The address to check.
667 */
668 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
669
670 /**
671 * Gets the address of the RC PCI Bus helpers.
672 *
673 * This should be called at both construction and relocation time
674 * to obtain the correct address of the RC helpers.
675 *
676 * @returns RC pointer to the PCI Bus helpers.
677 * @param pDevIns Device instance of the PCI Bus.
678 * @thread EMT only.
679 */
680 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
681
682 /**
683 * Gets the address of the R0 PCI Bus helpers.
684 *
685 * This should be called at both construction and relocation time
686 * to obtain the correct address of the R0 helpers.
687 *
688 * @returns R0 pointer to the PCI Bus helpers.
689 * @param pDevIns Device instance of the PCI Bus.
690 * @thread EMT only.
691 */
692 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
693
694 /**
695 * Acquires the PDM lock.
696 *
697 * @returns VINF_SUCCESS on success.
698 * @returns Fatal error on failure.
699 * @param pDevIns The PCI device instance.
700 * @param rc Dummy for making the interface identical to the RC and R0 versions.
701 */
702 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
703
704 /**
705 * Releases the PDM lock.
706 *
707 * @param pDevIns The PCI device instance.
708 */
709 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
710
711 /** Just a safety precaution. */
712 uint32_t u32TheEnd;
713} PDMPCIHLPR3;
714/** Pointer to PCI helpers. */
715typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
716/** Pointer to const PCI helpers. */
717typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
718
719/** Current PDMPCIHLPR3 version number. */
720#define PDM_PCIHLPR3_VERSION 0xf1020000
721
722
723/**
724 * Programmable Interrupt Controller registration structure.
725 */
726typedef struct PDMPICREG
727{
728 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
729 uint32_t u32Version;
730
731 /**
732 * Set the an IRQ.
733 *
734 * @param pDevIns Device instance of the PIC.
735 * @param iIrq IRQ number to set.
736 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
737 */
738 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
739
740 /**
741 * Get a pending interrupt.
742 *
743 * @returns Pending interrupt number.
744 * @param pDevIns Device instance of the PIC.
745 */
746 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
747
748 /** The name of the RC SetIrq entry point. */
749 const char *pszSetIrqRC;
750 /** The name of the RC GetInterrupt entry point. */
751 const char *pszGetInterruptRC;
752
753 /** The name of the R0 SetIrq entry point. */
754 const char *pszSetIrqR0;
755 /** The name of the R0 GetInterrupt entry point. */
756 const char *pszGetInterruptR0;
757} PDMPICREG;
758/** Pointer to a PIC registration structure. */
759typedef PDMPICREG *PPDMPICREG;
760
761/** Current PDMPICREG version number. */
762#define PDM_PICREG_VERSION 0xe0020000
763
764/**
765 * PIC RC helpers.
766 */
767typedef struct PDMPICHLPRC
768{
769 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
770 uint32_t u32Version;
771
772 /**
773 * Set the interrupt force action flag.
774 *
775 * @param pDevIns Device instance of the PIC.
776 */
777 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
778
779 /**
780 * Clear the interrupt force action flag.
781 *
782 * @param pDevIns Device instance of the PIC.
783 */
784 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
785
786 /**
787 * Acquires the PDM lock.
788 *
789 * @returns VINF_SUCCESS on success.
790 * @returns rc if we failed to acquire the lock.
791 * @param pDevIns The PIC device instance.
792 * @param rc What to return if we fail to acquire the lock.
793 */
794 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
795
796 /**
797 * Releases the PDM lock.
798 *
799 * @param pDevIns The PIC device instance.
800 */
801 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
802
803 /** Just a safety precaution. */
804 uint32_t u32TheEnd;
805} PDMPICHLPRC;
806
807/** Pointer to PIC RC helpers. */
808typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
809/** Pointer to const PIC RC helpers. */
810typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
811
812/** Current PDMPICHLPRC version number. */
813#define PDM_PICHLPRC_VERSION 0xfc010000
814
815
816/**
817 * PIC R0 helpers.
818 */
819typedef struct PDMPICHLPR0
820{
821 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
822 uint32_t u32Version;
823
824 /**
825 * Set the interrupt force action flag.
826 *
827 * @param pDevIns Device instance of the PIC.
828 */
829 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
830
831 /**
832 * Clear the interrupt force action flag.
833 *
834 * @param pDevIns Device instance of the PIC.
835 */
836 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
837
838 /**
839 * Acquires the PDM lock.
840 *
841 * @returns VINF_SUCCESS on success.
842 * @returns rc if we failed to acquire the lock.
843 * @param pDevIns The PIC device instance.
844 * @param rc What to return if we fail to acquire the lock.
845 */
846 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
847
848 /**
849 * Releases the PDM lock.
850 *
851 * @param pDevIns The PCI device instance.
852 */
853 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
854
855 /** Just a safety precaution. */
856 uint32_t u32TheEnd;
857} PDMPICHLPR0;
858
859/** Pointer to PIC R0 helpers. */
860typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
861/** Pointer to const PIC R0 helpers. */
862typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
863
864/** Current PDMPICHLPR0 version number. */
865#define PDM_PICHLPR0_VERSION 0xfc010000
866
867/**
868 * PIC R3 helpers.
869 */
870typedef struct PDMPICHLPR3
871{
872 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
873 uint32_t u32Version;
874
875 /**
876 * Set the interrupt force action flag.
877 *
878 * @param pDevIns Device instance of the PIC.
879 */
880 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
881
882 /**
883 * Clear the interrupt force action flag.
884 *
885 * @param pDevIns Device instance of the PIC.
886 */
887 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
888
889 /**
890 * Acquires the PDM lock.
891 *
892 * @returns VINF_SUCCESS on success.
893 * @returns Fatal error on failure.
894 * @param pDevIns The PIC device instance.
895 * @param rc Dummy for making the interface identical to the RC and R0 versions.
896 */
897 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
898
899 /**
900 * Releases the PDM lock.
901 *
902 * @param pDevIns The PIC device instance.
903 */
904 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
905
906 /**
907 * Gets the address of the RC PIC helpers.
908 *
909 * This should be called at both construction and relocation time
910 * to obtain the correct address of the RC helpers.
911 *
912 * @returns RC pointer to the PIC helpers.
913 * @param pDevIns Device instance of the PIC.
914 */
915 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
916
917 /**
918 * Gets the address of the R0 PIC helpers.
919 *
920 * This should be called at both construction and relocation time
921 * to obtain the correct address of the R0 helpers.
922 *
923 * @returns R0 pointer to the PIC helpers.
924 * @param pDevIns Device instance of the PIC.
925 */
926 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
927
928 /** Just a safety precaution. */
929 uint32_t u32TheEnd;
930} PDMPICHLPR3;
931
932/** Pointer to PIC R3 helpers. */
933typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
934/** Pointer to const PIC R3 helpers. */
935typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
936
937/** Current PDMPICHLPR3 version number. */
938#define PDM_PICHLPR3_VERSION 0xf0010000
939
940
941
942/**
943 * Advanced Programmable Interrupt Controller registration structure.
944 */
945typedef struct PDMAPICREG
946{
947 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
948 uint32_t u32Version;
949
950 /**
951 * Get a pending interrupt.
952 *
953 * @returns Pending interrupt number.
954 * @param pDevIns Device instance of the APIC.
955 */
956 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
957
958 /**
959 * Check if the APIC has a pending interrupt/if a TPR change would active one
960 *
961 * @returns Pending interrupt yes/no
962 * @param pDevIns Device instance of the APIC.
963 */
964 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
965
966 /**
967 * Set the APIC base.
968 *
969 * @param pDevIns Device instance of the APIC.
970 * @param u64Base The new base.
971 */
972 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
973
974 /**
975 * Get the APIC base.
976 *
977 * @returns Current base.
978 * @param pDevIns Device instance of the APIC.
979 */
980 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
981
982 /**
983 * Set the TPR (task priority register).
984 *
985 * @param pDevIns Device instance of the APIC.
986 * @param u8TPR The new TPR.
987 */
988 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
989
990 /**
991 * Get the TPR (task priority register).
992 *
993 * @returns The current TPR.
994 * @param pDevIns Device instance of the APIC.
995 * @param pfPending Pending interrupt state (out).
996 */
997 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
998
999 /**
1000 * Write MSR in APIC range.
1001 *
1002 * @returns VBox status code.
1003 * @param pDevIns Device instance of the APIC.
1004 * @param idCpu Target CPU.
1005 * @param u32Reg MSR to write.
1006 * @param u64Value Value to write.
1007 */
1008 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1009
1010 /**
1011 * Read MSR in APIC range.
1012 *
1013 * @returns VBox status code.
1014 * @param pDevIns Device instance of the APIC.
1015 * @param idCpu Target CPU.
1016 * @param u32Reg MSR to read.
1017 * @param pu64Value Value read.
1018 */
1019 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1020
1021 /**
1022 * Private interface between the IOAPIC and APIC.
1023 *
1024 * This is a low-level, APIC/IOAPIC implementation specific interface
1025 * which is registered with PDM only because it makes life so much
1026 * simpler right now (GC bits). This is a bad bad hack! The correct
1027 * way of doing this would involve some way of querying GC interfaces
1028 * and relocating them. Perhaps doing some kind of device init in GC...
1029 *
1030 * @returns The current TPR.
1031 * @param pDevIns Device instance of the APIC.
1032 * @param u8Dest See APIC implementation.
1033 * @param u8DestMode See APIC implementation.
1034 * @param u8DeliveryMode See APIC implementation.
1035 * @param iVector See APIC implementation.
1036 * @param u8Polarity See APIC implementation.
1037 * @param u8TriggerMode See APIC implementation.
1038 */
1039 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1040 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1041
1042 /** The name of the RC GetInterrupt entry point. */
1043 const char *pszGetInterruptRC;
1044 /** The name of the RC HasPendingIrq entry point. */
1045 const char *pszHasPendingIrqRC;
1046 /** The name of the RC SetBase entry point. */
1047 const char *pszSetBaseRC;
1048 /** The name of the RC GetBase entry point. */
1049 const char *pszGetBaseRC;
1050 /** The name of the RC SetTPR entry point. */
1051 const char *pszSetTPRRC;
1052 /** The name of the RC GetTPR entry point. */
1053 const char *pszGetTPRRC;
1054 /** The name of the RC WriteMSR entry point. */
1055 const char *pszWriteMSRRC;
1056 /** The name of the RC ReadMSR entry point. */
1057 const char *pszReadMSRRC;
1058 /** The name of the RC BusDeliver entry point. */
1059 const char *pszBusDeliverRC;
1060
1061 /** The name of the R0 GetInterrupt entry point. */
1062 const char *pszGetInterruptR0;
1063 /** The name of the R0 HasPendingIrq entry point. */
1064 const char *pszHasPendingIrqR0;
1065 /** The name of the R0 SetBase entry point. */
1066 const char *pszSetBaseR0;
1067 /** The name of the R0 GetBase entry point. */
1068 const char *pszGetBaseR0;
1069 /** The name of the R0 SetTPR entry point. */
1070 const char *pszSetTPRR0;
1071 /** The name of the R0 GetTPR entry point. */
1072 const char *pszGetTPRR0;
1073 /** The name of the R0 WriteMSR entry point. */
1074 const char *pszWriteMSRR0;
1075 /** The name of the R0 ReadMSR entry point. */
1076 const char *pszReadMSRR0;
1077 /** The name of the R0 BusDeliver entry point. */
1078 const char *pszBusDeliverR0;
1079
1080} PDMAPICREG;
1081/** Pointer to an APIC registration structure. */
1082typedef PDMAPICREG *PPDMAPICREG;
1083
1084/** Current PDMAPICREG version number. */
1085#define PDM_APICREG_VERSION 0x70010000
1086
1087
1088/**
1089 * APIC version argument for pfnChangeFeature.
1090 */
1091typedef enum PDMAPICVERSION
1092{
1093 /** Invalid 0 entry. */
1094 PDMAPICVERSION_INVALID = 0,
1095 /** No APIC. */
1096 PDMAPICVERSION_NONE,
1097 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1098 PDMAPICVERSION_APIC,
1099 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1100 PDMAPICVERSION_X2APIC,
1101 /** The usual 32-bit paranoia. */
1102 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1103} PDMAPICVERSION;
1104
1105
1106/**
1107 * APIC RC helpers.
1108 */
1109typedef struct PDMAPICHLPRC
1110{
1111 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1112 uint32_t u32Version;
1113
1114 /**
1115 * Set the interrupt force action flag.
1116 *
1117 * @param pDevIns Device instance of the APIC.
1118 * @param idCpu Virtual CPU to set flag upon.
1119 */
1120 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1121
1122 /**
1123 * Clear the interrupt force action flag.
1124 *
1125 * @param pDevIns Device instance of the APIC.
1126 * @param idCpu Virtual CPU to clear flag upon.
1127 */
1128 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1129
1130 /**
1131 * Modifies APIC-related bits in the CPUID feature mask.
1132 *
1133 * @param pDevIns Device instance of the APIC.
1134 * @param enmVersion Supported APIC version.
1135 */
1136 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1137
1138 /**
1139 * Acquires the PDM lock.
1140 *
1141 * @returns VINF_SUCCESS on success.
1142 * @returns rc if we failed to acquire the lock.
1143 * @param pDevIns The APIC device instance.
1144 * @param rc What to return if we fail to acquire the lock.
1145 */
1146 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1147
1148 /**
1149 * Releases the PDM lock.
1150 *
1151 * @param pDevIns The APIC device instance.
1152 */
1153 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1154
1155 /**
1156 * Get the virtual CPU id corresponding to the current EMT.
1157 *
1158 * @param pDevIns The APIC device instance.
1159 */
1160 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1161
1162 /** Just a safety precaution. */
1163 uint32_t u32TheEnd;
1164} PDMAPICHLPRC;
1165/** Pointer to APIC GC helpers. */
1166typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1167/** Pointer to const APIC helpers. */
1168typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1169
1170/** Current PDMAPICHLPRC version number. */
1171#define PDM_APICHLPRC_VERSION 0x60010000
1172
1173
1174/**
1175 * APIC R0 helpers.
1176 */
1177typedef struct PDMAPICHLPR0
1178{
1179 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1180 uint32_t u32Version;
1181
1182 /**
1183 * Set the interrupt force action flag.
1184 *
1185 * @param pDevIns Device instance of the APIC.
1186 * @param idCpu Virtual CPU to set flag upon.
1187 */
1188 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1189
1190 /**
1191 * Clear the interrupt force action flag.
1192 *
1193 * @param pDevIns Device instance of the APIC.
1194 * @param idCpu Virtual CPU to clear flag upon.
1195 */
1196 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1197
1198 /**
1199 * Modifies APIC-related bits in the CPUID feature mask.
1200 *
1201 * @param pDevIns Device instance of the APIC.
1202 * @param enmVersion Supported APIC version.
1203 */
1204 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1205
1206 /**
1207 * Acquires the PDM lock.
1208 *
1209 * @returns VINF_SUCCESS on success.
1210 * @returns rc if we failed to acquire the lock.
1211 * @param pDevIns The APIC device instance.
1212 * @param rc What to return if we fail to acquire the lock.
1213 */
1214 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1215
1216 /**
1217 * Releases the PDM lock.
1218 *
1219 * @param pDevIns The APIC device instance.
1220 */
1221 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1222
1223 /**
1224 * Get the virtual CPU id corresponding to the current EMT.
1225 *
1226 * @param pDevIns The APIC device instance.
1227 */
1228 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1229
1230 /** Just a safety precaution. */
1231 uint32_t u32TheEnd;
1232} PDMAPICHLPR0;
1233/** Pointer to APIC GC helpers. */
1234typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1235/** Pointer to const APIC helpers. */
1236typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1237
1238/** Current PDMAPICHLPR0 version number. */
1239#define PDM_APICHLPR0_VERSION 0x60010000
1240
1241/**
1242 * APIC R3 helpers.
1243 */
1244typedef struct PDMAPICHLPR3
1245{
1246 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1247 uint32_t u32Version;
1248
1249 /**
1250 * Set the interrupt force action flag.
1251 *
1252 * @param pDevIns Device instance of the APIC.
1253 * @param idCpu Virtual CPU to set flag upon.
1254 */
1255 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1256
1257 /**
1258 * Clear the interrupt force action flag.
1259 *
1260 * @param pDevIns Device instance of the APIC.
1261 * @param idCpu Virtual CPU to clear flag upon.
1262 */
1263 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1264
1265 /**
1266 * Modifies APIC-related bits in the CPUID feature mask.
1267 *
1268 * @param pDevIns Device instance of the APIC.
1269 * @param enmVersion Supported APIC version.
1270 */
1271 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1272
1273 /**
1274 * Acquires the PDM lock.
1275 *
1276 * @returns VINF_SUCCESS on success.
1277 * @returns Fatal error on failure.
1278 * @param pDevIns The APIC device instance.
1279 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1280 */
1281 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1282
1283 /**
1284 * Releases the PDM lock.
1285 *
1286 * @param pDevIns The APIC device instance.
1287 */
1288 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1289
1290 /**
1291 * Get the virtual CPU id corresponding to the current EMT.
1292 *
1293 * @param pDevIns The APIC device instance.
1294 */
1295 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1296
1297 /**
1298 * Gets the address of the RC APIC helpers.
1299 *
1300 * This should be called at both construction and relocation time
1301 * to obtain the correct address of the RC helpers.
1302 *
1303 * @returns GC pointer to the APIC helpers.
1304 * @param pDevIns Device instance of the APIC.
1305 */
1306 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1307
1308 /**
1309 * Gets the address of the R0 APIC helpers.
1310 *
1311 * This should be called at both construction and relocation time
1312 * to obtain the correct address of the R0 helpers.
1313 *
1314 * @returns R0 pointer to the APIC helpers.
1315 * @param pDevIns Device instance of the APIC.
1316 */
1317 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1318
1319 /** Just a safety precaution. */
1320 uint32_t u32TheEnd;
1321} PDMAPICHLPR3;
1322/** Pointer to APIC helpers. */
1323typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1324/** Pointer to const APIC helpers. */
1325typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1326
1327/** Current PDMAPICHLP version number. */
1328#define PDM_APICHLPR3_VERSION 0xfd010000
1329
1330
1331/**
1332 * I/O APIC registration structure.
1333 */
1334typedef struct PDMIOAPICREG
1335{
1336 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1337 uint32_t u32Version;
1338
1339 /**
1340 * Set the an IRQ.
1341 *
1342 * @param pDevIns Device instance of the I/O APIC.
1343 * @param iIrq IRQ number to set.
1344 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1345 */
1346 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1347
1348 /** The name of the GC SetIrq entry point. */
1349 const char *pszSetIrqRC;
1350
1351 /** The name of the R0 SetIrq entry point. */
1352 const char *pszSetIrqR0;
1353} PDMIOAPICREG;
1354/** Pointer to an APIC registration structure. */
1355typedef PDMIOAPICREG *PPDMIOAPICREG;
1356
1357/** Current PDMAPICREG version number. */
1358#define PDM_IOAPICREG_VERSION 0x50010000
1359
1360
1361/**
1362 * IOAPIC RC helpers.
1363 */
1364typedef struct PDMIOAPICHLPRC
1365{
1366 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1367 uint32_t u32Version;
1368
1369 /**
1370 * Private interface between the IOAPIC and APIC.
1371 *
1372 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1373 *
1374 * @returns The current TPR.
1375 * @param pDevIns Device instance of the IOAPIC.
1376 * @param u8Dest See APIC implementation.
1377 * @param u8DestMode See APIC implementation.
1378 * @param u8DeliveryMode See APIC implementation.
1379 * @param iVector See APIC implementation.
1380 * @param u8Polarity See APIC implementation.
1381 * @param u8TriggerMode See APIC implementation.
1382 */
1383 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1384 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1385
1386 /**
1387 * Acquires the PDM lock.
1388 *
1389 * @returns VINF_SUCCESS on success.
1390 * @returns rc if we failed to acquire the lock.
1391 * @param pDevIns The IOAPIC device instance.
1392 * @param rc What to return if we fail to acquire the lock.
1393 */
1394 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1395
1396 /**
1397 * Releases the PDM lock.
1398 *
1399 * @param pDevIns The IOAPIC device instance.
1400 */
1401 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1402
1403 /** Just a safety precaution. */
1404 uint32_t u32TheEnd;
1405} PDMIOAPICHLPRC;
1406/** Pointer to IOAPIC RC helpers. */
1407typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1408/** Pointer to const IOAPIC helpers. */
1409typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1410
1411/** Current PDMIOAPICHLPRC version number. */
1412#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1413
1414
1415/**
1416 * IOAPIC R0 helpers.
1417 */
1418typedef struct PDMIOAPICHLPR0
1419{
1420 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1421 uint32_t u32Version;
1422
1423 /**
1424 * Private interface between the IOAPIC and APIC.
1425 *
1426 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1427 *
1428 * @returns The current TPR.
1429 * @param pDevIns Device instance of the IOAPIC.
1430 * @param u8Dest See APIC implementation.
1431 * @param u8DestMode See APIC implementation.
1432 * @param u8DeliveryMode See APIC implementation.
1433 * @param iVector See APIC implementation.
1434 * @param u8Polarity See APIC implementation.
1435 * @param u8TriggerMode See APIC implementation.
1436 */
1437 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1438 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1439
1440 /**
1441 * Acquires the PDM lock.
1442 *
1443 * @returns VINF_SUCCESS on success.
1444 * @returns rc if we failed to acquire the lock.
1445 * @param pDevIns The IOAPIC device instance.
1446 * @param rc What to return if we fail to acquire the lock.
1447 */
1448 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1449
1450 /**
1451 * Releases the PDM lock.
1452 *
1453 * @param pDevIns The IOAPIC device instance.
1454 */
1455 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1456
1457 /** Just a safety precaution. */
1458 uint32_t u32TheEnd;
1459} PDMIOAPICHLPR0;
1460/** Pointer to IOAPIC R0 helpers. */
1461typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1462/** Pointer to const IOAPIC helpers. */
1463typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1464
1465/** Current PDMIOAPICHLPR0 version number. */
1466#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1467
1468/**
1469 * IOAPIC R3 helpers.
1470 */
1471typedef struct PDMIOAPICHLPR3
1472{
1473 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1474 uint32_t u32Version;
1475
1476 /**
1477 * Private interface between the IOAPIC and APIC.
1478 *
1479 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1480 *
1481 * @returns The current TPR.
1482 * @param pDevIns Device instance of the IOAPIC.
1483 * @param u8Dest See APIC implementation.
1484 * @param u8DestMode See APIC implementation.
1485 * @param u8DeliveryMode See APIC implementation.
1486 * @param iVector See APIC implementation.
1487 * @param u8Polarity See APIC implementation.
1488 * @param u8TriggerMode See APIC implementation.
1489 */
1490 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1491 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1492
1493 /**
1494 * Acquires the PDM lock.
1495 *
1496 * @returns VINF_SUCCESS on success.
1497 * @returns Fatal error on failure.
1498 * @param pDevIns The IOAPIC device instance.
1499 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1500 */
1501 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1502
1503 /**
1504 * Releases the PDM lock.
1505 *
1506 * @param pDevIns The IOAPIC device instance.
1507 */
1508 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1509
1510 /**
1511 * Gets the address of the RC IOAPIC helpers.
1512 *
1513 * This should be called at both construction and relocation time
1514 * to obtain the correct address of the RC helpers.
1515 *
1516 * @returns RC pointer to the IOAPIC helpers.
1517 * @param pDevIns Device instance of the IOAPIC.
1518 */
1519 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1520
1521 /**
1522 * Gets the address of the R0 IOAPIC helpers.
1523 *
1524 * This should be called at both construction and relocation time
1525 * to obtain the correct address of the R0 helpers.
1526 *
1527 * @returns R0 pointer to the IOAPIC helpers.
1528 * @param pDevIns Device instance of the IOAPIC.
1529 */
1530 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1531
1532 /** Just a safety precaution. */
1533 uint32_t u32TheEnd;
1534} PDMIOAPICHLPR3;
1535/** Pointer to IOAPIC R3 helpers. */
1536typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1537/** Pointer to const IOAPIC helpers. */
1538typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1539
1540/** Current PDMIOAPICHLPR3 version number. */
1541#define PDM_IOAPICHLPR3_VERSION 0xff010000
1542
1543
1544
1545#ifdef IN_RING3
1546
1547/**
1548 * DMA Transfer Handler.
1549 *
1550 * @returns Number of bytes transferred.
1551 * @param pDevIns Device instance of the DMA.
1552 * @param pvUser User pointer.
1553 * @param uChannel Channel number.
1554 * @param off DMA position.
1555 * @param cb Block size.
1556 */
1557typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1558/** Pointer to a FNDMATRANSFERHANDLER(). */
1559typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1560
1561/**
1562 * DMA Controller registration structure.
1563 */
1564typedef struct PDMDMAREG
1565{
1566 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1567 uint32_t u32Version;
1568
1569 /**
1570 * Execute pending transfers.
1571 *
1572 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1573 * @param pDevIns Device instance of the DMAC.
1574 */
1575 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1576
1577 /**
1578 * Register transfer function for DMA channel.
1579 *
1580 * @param pDevIns Device instance of the DMAC.
1581 * @param uChannel Channel number.
1582 * @param pfnTransferHandler Device specific transfer function.
1583 * @param pvUSer User pointer to be passed to the callback.
1584 */
1585 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1586
1587 /**
1588 * Read memory
1589 *
1590 * @returns Number of bytes read.
1591 * @param pDevIns Device instance of the DMAC.
1592 * @param pvBuffer Pointer to target buffer.
1593 * @param off DMA position.
1594 * @param cbBlock Block size.
1595 */
1596 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1597
1598 /**
1599 * Write memory
1600 *
1601 * @returns Number of bytes written.
1602 * @param pDevIns Device instance of the DMAC.
1603 * @param pvBuffer Memory to write.
1604 * @param off DMA position.
1605 * @param cbBlock Block size.
1606 */
1607 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1608
1609 /**
1610 * Set the DREQ line.
1611 *
1612 * @param pDevIns Device instance of the DMAC.
1613 * @param uChannel Channel number.
1614 * @param uLevel Level of the line.
1615 */
1616 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1617
1618 /**
1619 * Get channel mode
1620 *
1621 * @returns Channel mode.
1622 * @param pDevIns Device instance of the DMAC.
1623 * @param uChannel Channel number.
1624 */
1625 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1626
1627} PDMDMACREG;
1628/** Pointer to a DMAC registration structure. */
1629typedef PDMDMACREG *PPDMDMACREG;
1630
1631/** Current PDMDMACREG version number. */
1632#define PDM_DMACREG_VERSION 0xf5010000
1633
1634
1635/**
1636 * DMA Controller device helpers.
1637 */
1638typedef struct PDMDMACHLP
1639{
1640 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1641 uint32_t u32Version;
1642
1643 /* to-be-defined */
1644
1645} PDMDMACHLP;
1646/** Pointer to DMAC helpers. */
1647typedef PDMDMACHLP *PPDMDMACHLP;
1648/** Pointer to const DMAC helpers. */
1649typedef const PDMDMACHLP *PCPDMDMACHLP;
1650
1651/** Current PDMDMACHLP version number. */
1652#define PDM_DMACHLP_VERSION 0xf6010000
1653
1654#endif /* IN_RING3 */
1655
1656
1657
1658/**
1659 * RTC registration structure.
1660 */
1661typedef struct PDMRTCREG
1662{
1663 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1664 uint32_t u32Version;
1665 uint32_t u32Alignment; /**< structure size alignment. */
1666
1667 /**
1668 * Write to a CMOS register and update the checksum if necessary.
1669 *
1670 * @returns VBox status code.
1671 * @param pDevIns Device instance of the RTC.
1672 * @param iReg The CMOS register index.
1673 * @param u8Value The CMOS register value.
1674 */
1675 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1676
1677 /**
1678 * Read a CMOS register.
1679 *
1680 * @returns VBox status code.
1681 * @param pDevIns Device instance of the RTC.
1682 * @param iReg The CMOS register index.
1683 * @param pu8Value Where to store the CMOS register value.
1684 */
1685 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1686
1687} PDMRTCREG;
1688/** Pointer to a RTC registration structure. */
1689typedef PDMRTCREG *PPDMRTCREG;
1690/** Pointer to a const RTC registration structure. */
1691typedef const PDMRTCREG *PCPDMRTCREG;
1692
1693/** Current PDMRTCREG version number. */
1694#define PDM_RTCREG_VERSION 0xfa010000
1695
1696
1697/**
1698 * RTC device helpers.
1699 */
1700typedef struct PDMRTCHLP
1701{
1702 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1703 uint32_t u32Version;
1704
1705 /* to-be-defined */
1706
1707} PDMRTCHLP;
1708/** Pointer to RTC helpers. */
1709typedef PDMRTCHLP *PPDMRTCHLP;
1710/** Pointer to const RTC helpers. */
1711typedef const PDMRTCHLP *PCPDMRTCHLP;
1712
1713/** Current PDMRTCHLP version number. */
1714#define PDM_RTCHLP_VERSION 0xf6010000
1715
1716
1717
1718#ifdef IN_RING3
1719
1720/**
1721 * PDM Device API.
1722 */
1723typedef struct PDMDEVHLPR3
1724{
1725 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1726 uint32_t u32Version;
1727
1728 /**
1729 * Register a number of I/O ports with a device.
1730 *
1731 * These callbacks are of course for the host context (HC).
1732 * Register HC handlers before guest context (GC) handlers! There must be a
1733 * HC handler for every GC handler!
1734 *
1735 * @returns VBox status.
1736 * @param pDevIns The device instance to register the ports with.
1737 * @param Port First port number in the range.
1738 * @param cPorts Number of ports to register.
1739 * @param pvUser User argument.
1740 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1741 * @param pfnIn Pointer to function which is gonna handle IN operations.
1742 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1743 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1744 * @param pszDesc Pointer to description string. This must not be freed.
1745 */
1746 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1747 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1748 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1749
1750 /**
1751 * Register a number of I/O ports with a device for GC.
1752 *
1753 * These callbacks are for the host context (GC).
1754 * Register host context (HC) handlers before guest context handlers! There must be a
1755 * HC handler for every GC handler!
1756 *
1757 * @returns VBox status.
1758 * @param pDevIns The device instance to register the ports with and which GC module
1759 * to resolve the names against.
1760 * @param Port First port number in the range.
1761 * @param cPorts Number of ports to register.
1762 * @param pvUser User argument.
1763 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1764 * @param pszIn Name of the GC function which is gonna handle IN operations.
1765 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1766 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1767 * @param pszDesc Pointer to description string. This must not be freed.
1768 */
1769 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1770 const char *pszOut, const char *pszIn,
1771 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1772
1773 /**
1774 * Register a number of I/O ports with a device.
1775 *
1776 * These callbacks are of course for the ring-0 host context (R0).
1777 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1778 *
1779 * @returns VBox status.
1780 * @param pDevIns The device instance to register the ports with.
1781 * @param Port First port number in the range.
1782 * @param cPorts Number of ports to register.
1783 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1784 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1785 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1786 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1787 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1788 * @param pszDesc Pointer to description string. This must not be freed.
1789 */
1790 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1791 const char *pszOut, const char *pszIn,
1792 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1793
1794 /**
1795 * Deregister I/O ports.
1796 *
1797 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1798 *
1799 * @returns VBox status.
1800 * @param pDevIns The device instance owning the ports.
1801 * @param Port First port number in the range.
1802 * @param cPorts Number of ports to deregister.
1803 */
1804 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1805
1806 /**
1807 * Register a Memory Mapped I/O (MMIO) region.
1808 *
1809 * These callbacks are of course for the host context (HC).
1810 * Register HC handlers before guest context (GC) handlers! There must be a
1811 * HC handler for every GC handler!
1812 *
1813 * @returns VBox status.
1814 * @param pDevIns The device instance to register the MMIO with.
1815 * @param GCPhysStart First physical address in the range.
1816 * @param cbRange The size of the range (in bytes).
1817 * @param pvUser User argument.
1818 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1819 * @param pfnRead Pointer to function which is gonna handle Read operations.
1820 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1821 * @param pszDesc Pointer to description string. This must not be freed.
1822 */
1823 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1824 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1825 const char *pszDesc));
1826
1827 /**
1828 * Register a Memory Mapped I/O (MMIO) region for GC.
1829 *
1830 * These callbacks are for the guest context (GC).
1831 * Register host context (HC) handlers before guest context handlers! There must be a
1832 * HC handler for every GC handler!
1833 *
1834 * @returns VBox status.
1835 * @param pDevIns The device instance to register the MMIO with.
1836 * @param GCPhysStart First physical address in the range.
1837 * @param cbRange The size of the range (in bytes).
1838 * @param pvUser User argument.
1839 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1840 * @param pszRead Name of the GC function which is gonna handle Read operations.
1841 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1842 * @param pszDesc Obsolete. NULL is fine.
1843 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1844 */
1845 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1846 const char *pszWrite, const char *pszRead, const char *pszFill,
1847 const char *pszDesc));
1848
1849 /**
1850 * Register a Memory Mapped I/O (MMIO) region for R0.
1851 *
1852 * These callbacks are for the ring-0 host context (R0).
1853 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1854 *
1855 * @returns VBox status.
1856 * @param pDevIns The device instance to register the MMIO with.
1857 * @param GCPhysStart First physical address in the range.
1858 * @param cbRange The size of the range (in bytes).
1859 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1860 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1861 * @param pszRead Name of the GC function which is gonna handle Read operations.
1862 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1863 * @param pszDesc Obsolete. NULL is fine.
1864 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1865 */
1866 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1867 const char *pszWrite, const char *pszRead, const char *pszFill,
1868 const char *pszDesc));
1869
1870 /**
1871 * Deregister a Memory Mapped I/O (MMIO) region.
1872 *
1873 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1874 *
1875 * @returns VBox status.
1876 * @param pDevIns The device instance owning the MMIO region(s).
1877 * @param GCPhysStart First physical address in the range.
1878 * @param cbRange The size of the range (in bytes).
1879 */
1880 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1881
1882 /**
1883 * Register a ROM (BIOS) region.
1884 *
1885 * It goes without saying that this is read-only memory. The memory region must be
1886 * in unassigned memory. I.e. from the top of the address space or on the PC in
1887 * the 0xa0000-0xfffff range.
1888 *
1889 * @returns VBox status.
1890 * @param pDevIns The device instance owning the ROM region.
1891 * @param GCPhysStart First physical address in the range.
1892 * Must be page aligned!
1893 * @param cbRange The size of the range (in bytes).
1894 * Must be page aligned!
1895 * @param pvBinary Pointer to the binary data backing the ROM image.
1896 * This must be cbRange bytes big.
1897 * It will be copied and doesn't have to stick around if fShadow is clear.
1898 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1899 * the ROM writable for a while during the POST and refreshing
1900 * it at reset. When this flag is set, the memory pointed to by
1901 * pvBinary has to stick around for the lifespan of the VM.
1902 * @param pszDesc Pointer to description string. This must not be freed.
1903 *
1904 * @remark There is no way to remove the rom, automatically on device cleanup or
1905 * manually from the device yet. At present I doubt we need such features...
1906 */
1907 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1908
1909 /**
1910 * Register a save state data unit.
1911 *
1912 * @returns VBox status.
1913 * @param pDevIns Device instance.
1914 * @param pszName Data unit name.
1915 * @param u32Instance The instance identifier of the data unit.
1916 * This must together with the name be unique.
1917 * @param u32Version Data layout version number.
1918 * @param cbGuess The approximate amount of data in the unit.
1919 * Only for progress indicators.
1920 * @param pfnSavePrep Prepare save callback, optional.
1921 * @param pfnSaveExec Execute save callback, optional.
1922 * @param pfnSaveDone Done save callback, optional.
1923 * @param pfnLoadPrep Prepare load callback, optional.
1924 * @param pfnLoadExec Execute load callback, optional.
1925 * @param pfnLoadDone Done load callback, optional.
1926 */
1927 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1928 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1929 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1930
1931 /**
1932 * Creates a timer.
1933 *
1934 * @returns VBox status.
1935 * @param pDevIns Device instance.
1936 * @param enmClock The clock to use on this timer.
1937 * @param pfnCallback Callback function.
1938 * @param pszDesc Pointer to description string which must stay around
1939 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1940 * @param ppTimer Where to store the timer on success.
1941 */
1942 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1943
1944 /**
1945 * Creates an external timer.
1946 *
1947 * @returns timer pointer
1948 * @param pDevIns Device instance.
1949 * @param enmClock The clock to use on this timer.
1950 * @param pfnCallback Callback function.
1951 * @param pvUser User pointer
1952 * @param pszDesc Pointer to description string which must stay around
1953 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1954 */
1955 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1956
1957 /**
1958 * Registers the device with the default PCI bus.
1959 *
1960 * @returns VBox status code.
1961 * @param pDevIns Device instance.
1962 * @param pPciDev The PCI device structure.
1963 * Any PCI enabled device must keep this in it's instance data!
1964 * Fill in the PCI data config before registration, please.
1965 * @remark This is the simple interface, a Ex interface will be created if
1966 * more features are needed later.
1967 */
1968 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1969
1970 /**
1971 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1972 *
1973 * @returns VBox status code.
1974 * @param pDevIns Device instance.
1975 * @param iRegion The region number.
1976 * @param cbRegion Size of the region.
1977 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1978 * @param pfnCallback Callback for doing the mapping.
1979 */
1980 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1981
1982 /**
1983 * Register PCI configuration space read/write callbacks.
1984 *
1985 * @param pDevIns Device instance.
1986 * @param pPciDev The PCI device structure.
1987 * If NULL the default PCI device for this device instance is used.
1988 * @param pfnRead Pointer to the user defined PCI config read function.
1989 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1990 * PCI config read function. This way, user can decide when (and if)
1991 * to call default PCI config read function. Can be NULL.
1992 * @param pfnWrite Pointer to the user defined PCI config write function.
1993 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1994 * PCI config write function. This way, user can decide when (and if)
1995 * to call default PCI config write function. Can be NULL.
1996 * @thread EMT
1997 */
1998 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1999 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2000
2001 /**
2002 * Set the IRQ for a PCI device.
2003 *
2004 * @param pDevIns Device instance.
2005 * @param iIrq IRQ number to set.
2006 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2007 * @thread Any thread, but will involve the emulation thread.
2008 */
2009 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2010
2011 /**
2012 * Set the IRQ for a PCI device, but don't wait for EMT to process
2013 * the request when not called from EMT.
2014 *
2015 * @param pDevIns Device instance.
2016 * @param iIrq IRQ number to set.
2017 * @param iLevel IRQ level.
2018 * @thread Any thread, but will involve the emulation thread.
2019 */
2020 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2021
2022 /**
2023 * Set ISA IRQ for a device.
2024 *
2025 * @param pDevIns Device instance.
2026 * @param iIrq IRQ number to set.
2027 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2028 * @thread Any thread, but will involve the emulation thread.
2029 */
2030 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2031
2032 /**
2033 * Set the ISA IRQ for a device, but don't wait for EMT to process
2034 * the request when not called from EMT.
2035 *
2036 * @param pDevIns Device instance.
2037 * @param iIrq IRQ number to set.
2038 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2039 * @thread Any thread, but will involve the emulation thread.
2040 */
2041 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2042
2043 /**
2044 * Attaches a driver (chain) to the device.
2045 *
2046 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2047 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2048 *
2049 * @returns VBox status code.
2050 * @param pDevIns Device instance.
2051 * @param iLun The logical unit to attach.
2052 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2053 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2054 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2055 * for the live of the device instance.
2056 */
2057 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2058
2059 /**
2060 * Allocate memory which is associated with current VM instance
2061 * and automatically freed on it's destruction.
2062 *
2063 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2064 * @param pDevIns Device instance.
2065 * @param cb Number of bytes to allocate.
2066 */
2067 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2068
2069 /**
2070 * Allocate memory which is associated with current VM instance
2071 * and automatically freed on it's destruction. The memory is ZEROed.
2072 *
2073 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2074 * @param pDevIns Device instance.
2075 * @param cb Number of bytes to allocate.
2076 */
2077 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2078
2079 /**
2080 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2081 *
2082 * @param pDevIns Device instance.
2083 * @param pv Pointer to the memory to free.
2084 */
2085 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2086
2087 /**
2088 * Set the VM error message
2089 *
2090 * @returns rc.
2091 * @param pDevIns Device instance.
2092 * @param rc VBox status code.
2093 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2094 * @param pszFormat Error message format string.
2095 * @param ... Error message arguments.
2096 */
2097 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2098
2099 /**
2100 * Set the VM error message
2101 *
2102 * @returns rc.
2103 * @param pDevIns Device instance.
2104 * @param rc VBox status code.
2105 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2106 * @param pszFormat Error message format string.
2107 * @param va Error message arguments.
2108 */
2109 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2110
2111 /**
2112 * Set the VM runtime error message
2113 *
2114 * @returns VBox status code.
2115 * @param pDevIns Device instance.
2116 * @param fFatal Whether it is a fatal error or not.
2117 * @param pszErrorID Error ID string.
2118 * @param pszFormat Error message format string.
2119 * @param ... Error message arguments.
2120 */
2121 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2122
2123 /**
2124 * Set the VM runtime error message
2125 *
2126 * @returns VBox status code.
2127 * @param pDevIns Device instance.
2128 * @param fFatal Whether it is a fatal error or not.
2129 * @param pszErrorID Error ID string.
2130 * @param pszFormat Error message format string.
2131 * @param va Error message arguments.
2132 */
2133 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2134
2135 /**
2136 * Assert that the current thread is the emulation thread.
2137 *
2138 * @returns True if correct.
2139 * @returns False if wrong.
2140 * @param pDevIns Device instance.
2141 * @param pszFile Filename of the assertion location.
2142 * @param iLine The linenumber of the assertion location.
2143 * @param pszFunction Function of the assertion location.
2144 */
2145 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2146
2147 /**
2148 * Assert that the current thread is NOT the emulation thread.
2149 *
2150 * @returns True if correct.
2151 * @returns False if wrong.
2152 * @param pDevIns Device instance.
2153 * @param pszFile Filename of the assertion location.
2154 * @param iLine The linenumber of the assertion location.
2155 * @param pszFunction Function of the assertion location.
2156 */
2157 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2158
2159 /**
2160 * Stops the VM and enters the debugger to look at the guest state.
2161 *
2162 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2163 * invoking this function directly.
2164 *
2165 * @returns VBox status code which must be passed up to the VMM.
2166 * @param pDevIns Device instance.
2167 * @param pszFile Filename of the assertion location.
2168 * @param iLine The linenumber of the assertion location.
2169 * @param pszFunction Function of the assertion location.
2170 * @param pszFormat Message. (optional)
2171 * @param args Message parameters.
2172 */
2173 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2174
2175 /**
2176 * Register a info handler with DBGF,
2177 *
2178 * @returns VBox status code.
2179 * @param pDevIns Device instance.
2180 * @param pszName The identifier of the info.
2181 * @param pszDesc The description of the info and any arguments the handler may take.
2182 * @param pfnHandler The handler function to be called to display the info.
2183 */
2184 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2185
2186 /**
2187 * Registers a statistics sample if statistics are enabled.
2188 *
2189 * @param pDevIns Device instance of the DMA.
2190 * @param pvSample Pointer to the sample.
2191 * @param enmType Sample type. This indicates what pvSample is pointing at.
2192 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2193 * Further nesting is possible.
2194 * @param enmUnit Sample unit.
2195 * @param pszDesc Sample description.
2196 */
2197 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2198
2199 /**
2200 * Same as pfnSTAMRegister except that the name is specified in a
2201 * RTStrPrintf like fashion.
2202 *
2203 * @returns VBox status.
2204 * @param pDevIns Device instance of the DMA.
2205 * @param pvSample Pointer to the sample.
2206 * @param enmType Sample type. This indicates what pvSample is pointing at.
2207 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2208 * @param enmUnit Sample unit.
2209 * @param pszDesc Sample description.
2210 * @param pszName The sample name format string.
2211 * @param ... Arguments to the format string.
2212 */
2213 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2214 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2215
2216 /**
2217 * Same as pfnSTAMRegister except that the name is specified in a
2218 * RTStrPrintfV like fashion.
2219 *
2220 * @returns VBox status.
2221 * @param pDevIns Device instance of the DMA.
2222 * @param pvSample Pointer to the sample.
2223 * @param enmType Sample type. This indicates what pvSample is pointing at.
2224 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2225 * @param enmUnit Sample unit.
2226 * @param pszDesc Sample description.
2227 * @param pszName The sample name format string.
2228 * @param args Arguments to the format string.
2229 */
2230 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2231 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2232
2233 /**
2234 * Register the RTC device.
2235 *
2236 * @returns VBox status code.
2237 * @param pDevIns Device instance.
2238 * @param pRtcReg Pointer to a RTC registration structure.
2239 * @param ppRtcHlp Where to store the pointer to the helper functions.
2240 */
2241 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2242
2243 /**
2244 * Create a queue.
2245 *
2246 * @returns VBox status code.
2247 * @param pDevIns The device instance.
2248 * @param cbItem The size of a queue item.
2249 * @param cItems The number of items in the queue.
2250 * @param cMilliesInterval The number of milliseconds between polling the queue.
2251 * If 0 then the emulation thread will be notified whenever an item arrives.
2252 * @param pfnCallback The consumer function.
2253 * @param fGCEnabled Set if the queue should work in GC too.
2254 * @param ppQueue Where to store the queue handle on success.
2255 * @thread The emulation thread.
2256 */
2257 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2258 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2259
2260 /**
2261 * Initializes a PDM critical section.
2262 *
2263 * The PDM critical sections are derived from the IPRT critical sections, but
2264 * works in GC as well.
2265 *
2266 * @returns VBox status code.
2267 * @param pDevIns Device instance.
2268 * @param pCritSect Pointer to the critical section.
2269 * @param pszName The name of the critical section (for statistics).
2270 */
2271 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2272
2273 /**
2274 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2275 *
2276 * @returns pTime.
2277 * @param pDevIns Device instance.
2278 * @param pTime Where to store the time.
2279 */
2280 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2281
2282 /**
2283 * Creates a PDM thread.
2284 *
2285 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2286 * resuming, and destroying the thread as the VM state changes.
2287 *
2288 * @returns VBox status code.
2289 * @param pDevIns The device instance.
2290 * @param ppThread Where to store the thread 'handle'.
2291 * @param pvUser The user argument to the thread function.
2292 * @param pfnThread The thread function.
2293 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2294 * a state change is pending.
2295 * @param cbStack See RTThreadCreate.
2296 * @param enmType See RTThreadCreate.
2297 * @param pszName See RTThreadCreate.
2298 */
2299 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2300 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2301
2302 /**
2303 * Convert a guest virtual address to a guest physical address.
2304 *
2305 * @returns VBox status code.
2306 * @param pDevIns Device instance.
2307 * @param GCPtr Guest virtual address.
2308 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2309 * @thread The emulation thread.
2310 * @remark Careful with page boundraries.
2311 */
2312 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2313
2314 /**
2315 * Gets the VM state.
2316 *
2317 * @returns VM state.
2318 * @param pDevIns The device instance.
2319 * @thread Any thread (just keep in mind that it's volatile info).
2320 */
2321 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2322
2323 /** Space reserved for future members.
2324 * @{ */
2325 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2326 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2327 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2328 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2329 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2330 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2331 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2332 /** @} */
2333
2334
2335 /** API available to trusted devices only.
2336 *
2337 * These APIs are providing unrestricted access to the guest and the VM,
2338 * or they are interacting intimately with PDM.
2339 *
2340 * @{
2341 */
2342 /**
2343 * Gets the VM handle. Restricted API.
2344 *
2345 * @returns VM Handle.
2346 * @param pDevIns Device instance.
2347 */
2348 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2349
2350 /**
2351 * Register the PCI Bus.
2352 *
2353 * @returns VBox status code.
2354 * @param pDevIns Device instance.
2355 * @param pPciBusReg Pointer to PCI bus registration structure.
2356 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2357 */
2358 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2359
2360 /**
2361 * Register the PIC device.
2362 *
2363 * @returns VBox status code.
2364 * @param pDevIns Device instance.
2365 * @param pPicReg Pointer to a PIC registration structure.
2366 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2367 */
2368 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2369
2370 /**
2371 * Register the APIC device.
2372 *
2373 * @returns VBox status code.
2374 * @param pDevIns Device instance.
2375 * @param pApicReg Pointer to a APIC registration structure.
2376 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2377 */
2378 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2379
2380 /**
2381 * Register the I/O APIC device.
2382 *
2383 * @returns VBox status code.
2384 * @param pDevIns Device instance.
2385 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2386 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2387 */
2388 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2389
2390 /**
2391 * Register the DMA device.
2392 *
2393 * @returns VBox status code.
2394 * @param pDevIns Device instance.
2395 * @param pDmacReg Pointer to a DMAC registration structure.
2396 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2397 */
2398 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2399
2400 /**
2401 * Read physical memory.
2402 *
2403 * @param pDevIns Device instance.
2404 * @param GCPhys Physical address start reading from.
2405 * @param pvBuf Where to put the read bits.
2406 * @param cbRead How many bytes to read.
2407 * @thread Any thread, but the call may involve the emulation thread.
2408 */
2409 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2410
2411 /**
2412 * Write to physical memory.
2413 *
2414 * @param pDevIns Device instance.
2415 * @param GCPhys Physical address to write to.
2416 * @param pvBuf What to write.
2417 * @param cbWrite How many bytes to write.
2418 * @thread Any thread, but the call may involve the emulation thread.
2419 */
2420 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2421
2422 /**
2423 * Read guest physical memory by virtual address.
2424 *
2425 * @param pDevIns Device instance.
2426 * @param pvDst Where to put the read bits.
2427 * @param GCVirtSrc Guest virtual address to start reading from.
2428 * @param cb How many bytes to read.
2429 * @thread The emulation thread.
2430 */
2431 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2432
2433 /**
2434 * Write to guest physical memory by virtual address.
2435 *
2436 * @param pDevIns Device instance.
2437 * @param GCVirtDst Guest virtual address to write to.
2438 * @param pvSrc What to write.
2439 * @param cb How many bytes to write.
2440 * @thread The emulation thread.
2441 */
2442 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2443
2444 /**
2445 * Reserve physical address space for ROM and MMIO ranges.
2446 *
2447 * @returns VBox status code.
2448 * @param pDevIns Device instance.
2449 * @param GCPhys Start physical address.
2450 * @param cbRange The size of the range.
2451 * @param pszDesc Description string.
2452 * @thread The emulation thread.
2453 */
2454 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2455
2456 /**
2457 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2458 *
2459 * @returns VBox status code.
2460 * @param pDevIns Device instance.
2461 * @param GCPhys Start physical address.
2462 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2463 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2464 * @thread The emulation thread.
2465 *
2466 * @remark Careful with page boundraries.
2467 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2468 */
2469 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2470
2471 /**
2472 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2473 *
2474 * @returns VBox status code.
2475 * @param pDevIns Device instance.
2476 * @param GCPtr Guest virtual address.
2477 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2478 * @thread The emulation thread.
2479 *
2480 * @remark Careful with page boundraries.
2481 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2482 */
2483 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2484
2485 /**
2486 * Checks if the Gate A20 is enabled or not.
2487 *
2488 * @returns true if A20 is enabled.
2489 * @returns false if A20 is disabled.
2490 * @param pDevIns Device instance.
2491 * @thread The emulation thread.
2492 */
2493 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2494
2495 /**
2496 * Enables or disables the Gate A20.
2497 *
2498 * @param pDevIns Device instance.
2499 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2500 * @thread The emulation thread.
2501 */
2502 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2503
2504 /**
2505 * Resets the VM.
2506 *
2507 * @returns The appropriate VBox status code to pass around on reset.
2508 * @param pDevIns Device instance.
2509 * @thread The emulation thread.
2510 */
2511 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2512
2513 /**
2514 * Suspends the VM.
2515 *
2516 * @returns The appropriate VBox status code to pass around on suspend.
2517 * @param pDevIns Device instance.
2518 * @thread The emulation thread.
2519 */
2520 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2521
2522 /**
2523 * Power off the VM.
2524 *
2525 * @returns The appropriate VBox status code to pass around on power off.
2526 * @param pDevIns Device instance.
2527 * @thread The emulation thread.
2528 */
2529 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2530
2531 /**
2532 * Acquire global VM lock
2533 *
2534 * @returns VBox status code
2535 * @param pDevIns Device instance.
2536 */
2537 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2538
2539 /**
2540 * Release global VM lock
2541 *
2542 * @returns VBox status code
2543 * @param pDevIns Device instance.
2544 */
2545 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2546
2547 /**
2548 * Check that the current thread owns the global VM lock.
2549 *
2550 * @returns boolean
2551 * @param pDevIns Device instance.
2552 * @param pszFile Filename of the assertion location.
2553 * @param iLine Linenumber of the assertion location.
2554 * @param pszFunction Function of the assertion location.
2555 */
2556 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2557
2558 /**
2559 * Register transfer function for DMA channel.
2560 *
2561 * @returns VBox status code.
2562 * @param pDevIns Device instance.
2563 * @param uChannel Channel number.
2564 * @param pfnTransferHandler Device specific transfer callback function.
2565 * @param pvUser User pointer to pass to the callback.
2566 * @thread EMT
2567 */
2568 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2569
2570 /**
2571 * Read memory.
2572 *
2573 * @returns VBox status code.
2574 * @param pDevIns Device instance.
2575 * @param uChannel Channel number.
2576 * @param pvBuffer Pointer to target buffer.
2577 * @param off DMA position.
2578 * @param cbBlock Block size.
2579 * @param pcbRead Where to store the number of bytes which was read. optional.
2580 * @thread EMT
2581 */
2582 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2583
2584 /**
2585 * Write memory.
2586 *
2587 * @returns VBox status code.
2588 * @param pDevIns Device instance.
2589 * @param uChannel Channel number.
2590 * @param pvBuffer Memory to write.
2591 * @param off DMA position.
2592 * @param cbBlock Block size.
2593 * @param pcbWritten Where to store the number of bytes which was written. optional.
2594 * @thread EMT
2595 */
2596 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2597
2598 /**
2599 * Set the DREQ line.
2600 *
2601 * @returns VBox status code.
2602 * @param pDevIns Device instance.
2603 * @param uChannel Channel number.
2604 * @param uLevel Level of the line.
2605 * @thread EMT
2606 */
2607 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2608
2609 /**
2610 * Get channel mode.
2611 *
2612 * @returns Channel mode. See specs.
2613 * @param pDevIns Device instance.
2614 * @param uChannel Channel number.
2615 * @thread EMT
2616 */
2617 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2618
2619 /**
2620 * Schedule DMA execution.
2621 *
2622 * @param pDevIns Device instance.
2623 * @thread Any thread.
2624 */
2625 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2626
2627 /**
2628 * Write CMOS value and update the checksum(s).
2629 *
2630 * @returns VBox status code.
2631 * @param pDevIns Device instance.
2632 * @param iReg The CMOS register index.
2633 * @param u8Value The CMOS register value.
2634 * @thread EMT
2635 */
2636 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2637
2638 /**
2639 * Read CMOS value.
2640 *
2641 * @returns VBox status code.
2642 * @param pDevIns Device instance.
2643 * @param iReg The CMOS register index.
2644 * @param pu8Value Where to store the CMOS register value.
2645 * @thread EMT
2646 */
2647 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2648
2649 /**
2650 * Get CPUID.
2651 *
2652 * @param pDevIns Device instance.
2653 * @param iLeaf The CPUID leaf to get.
2654 * @param pEax Where to store the EAX value.
2655 * @param pEbx Where to store the EBX value.
2656 * @param pEcx Where to store the ECX value.
2657 * @param pEdx Where to store the EDX value.
2658 */
2659 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2660
2661 /**
2662 * Write protects a shadow ROM mapping.
2663 *
2664 * This is intented for use by the system BIOS or by the device that
2665 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2666 * write protected once the POST is over.
2667 *
2668 * @param pDevIns Device instance.
2669 * @param GCPhysStart Where the shadow ROM mapping starts.
2670 * @param cbRange The size of the shadow ROM mapping.
2671 */
2672 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2673
2674 /**
2675 * Allocate and register a MMIO2 region.
2676 *
2677 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2678 * RAM associated with a device. It is also non-shared memory with a
2679 * permanent ring-3 mapping and page backing (presently).
2680 *
2681 * @returns VBox status.
2682 * @param pDevIns The device instance.
2683 * @param iRegion The region number. Use the PCI region number as
2684 * this must be known to the PCI bus device too. If it's not associated
2685 * with the PCI device, then any number up to UINT8_MAX is fine.
2686 * @param cb The size (in bytes) of the region.
2687 * @param fFlags Reserved for future use, must be zero.
2688 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2689 * @param pszDesc Pointer to description string. This must not be freed.
2690 * @thread EMT.
2691 */
2692 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2693
2694 /**
2695 * Deregisters and frees a MMIO2 region.
2696 *
2697 * Any physical (and virtual) access handlers registered for the region must
2698 * be deregistered before calling this function.
2699 *
2700 * @returns VBox status code.
2701 * @param pDevIns The device instance.
2702 * @param iRegion The region number used during registration.
2703 * @thread EMT.
2704 */
2705 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2706
2707 /**
2708 * Maps a MMIO2 region into the physical memory space.
2709 *
2710 * A MMIO2 range may overlap with base memory if a lot of RAM
2711 * is configured for the VM, in which case we'll drop the base
2712 * memory pages. Presently we will make no attempt to preserve
2713 * anything that happens to be present in the base memory that
2714 * is replaced, this is of course incorrectly but it's too much
2715 * effort.
2716 *
2717 * @returns VBox status code.
2718 * @param pDevIns The device instance.
2719 * @param iRegion The region number used during registration.
2720 * @param GCPhys The physical address to map it at.
2721 * @thread EMT.
2722 */
2723 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2724
2725 /**
2726 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2727 *
2728 * @returns VBox status code.
2729 * @param pDevIns The device instance.
2730 * @param iRegion The region number used during registration.
2731 * @param GCPhys The physical address it's currently mapped at.
2732 * @thread EMT.
2733 */
2734 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2735
2736 /**
2737 * Maps a portion of an MMIO2 region into the hypervisor region.
2738 *
2739 * Callers of this API must never deregister the MMIO2 region before the
2740 * VM is powered off.
2741 *
2742 * @return VBox status code.
2743 * @param pDevIns The device owning the MMIO2 memory.
2744 * @param iRegion The region.
2745 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2746 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2747 * @param pszDesc Mapping description.
2748 * @param pRCPtr Where to store the RC address.
2749 */
2750 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2751 const char *pszDesc, PRTRCPTR pRCPtr));
2752
2753 /**
2754 * Maps a portion of an MMIO2 region into kernel space (host).
2755 *
2756 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2757 * or the VM is terminated.
2758 *
2759 * @return VBox status code.
2760 * @param pDevIns The device owning the MMIO2 memory.
2761 * @param iRegion The region.
2762 * @param off The offset into the region. Must be page aligned.
2763 * @param cb The number of bytes to map. Must be page aligned.
2764 * @param pszDesc Mapping description.
2765 * @param pR0Ptr Where to store the R0 address.
2766 */
2767 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2768 const char *pszDesc, PRTR0PTR pR0Ptr));
2769
2770 /**
2771 * Registers the VMM device heap
2772 *
2773 * @returns VBox status code.
2774 * @param pDevIns The device instance.
2775 * @param GCPhys The physical address.
2776 * @param pvHeap Ring 3 heap pointer.
2777 * @param cbSize Size of the heap.
2778 * @thread EMT.
2779 */
2780 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2781
2782 /**
2783 * Unregisters the VMM device heap
2784 *
2785 * @returns VBox status code.
2786 * @param pDevIns The device instance.
2787 * @param GCPhys The physical address.
2788 * @thread EMT.
2789 */
2790 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2791
2792 /** @} */
2793
2794 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2795 uint32_t u32TheEnd;
2796} PDMDEVHLPR3;
2797#endif /* !IN_RING3 */
2798/** Pointer to the R3 PDM Device API. */
2799typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2800/** Pointer to the R3 PDM Device API, const variant. */
2801typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2802
2803/** Current PDMDEVHLP version number. */
2804#define PDM_DEVHLP_VERSION 0xf2070000
2805
2806
2807/**
2808 * PDM Device API - RC Variant.
2809 */
2810typedef struct PDMDEVHLPRC
2811{
2812 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2813 uint32_t u32Version;
2814
2815 /**
2816 * Set the IRQ for a PCI device.
2817 *
2818 * @param pDevIns Device instance.
2819 * @param iIrq IRQ number to set.
2820 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2821 * @thread Any thread, but will involve the emulation thread.
2822 */
2823 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2824
2825 /**
2826 * Set ISA IRQ for a device.
2827 *
2828 * @param pDevIns Device instance.
2829 * @param iIrq IRQ number to set.
2830 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2831 * @thread Any thread, but will involve the emulation thread.
2832 */
2833 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2834
2835 /**
2836 * Read physical memory.
2837 *
2838 * @param pDevIns Device instance.
2839 * @param GCPhys Physical address start reading from.
2840 * @param pvBuf Where to put the read bits.
2841 * @param cbRead How many bytes to read.
2842 */
2843 DECLRCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2844
2845 /**
2846 * Write to physical memory.
2847 *
2848 * @param pDevIns Device instance.
2849 * @param GCPhys Physical address to write to.
2850 * @param pvBuf What to write.
2851 * @param cbWrite How many bytes to write.
2852 */
2853 DECLRCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2854
2855 /**
2856 * Checks if the Gate A20 is enabled or not.
2857 *
2858 * @returns true if A20 is enabled.
2859 * @returns false if A20 is disabled.
2860 * @param pDevIns Device instance.
2861 * @thread The emulation thread.
2862 */
2863 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2864
2865 /**
2866 * Set the VM error message
2867 *
2868 * @returns rc.
2869 * @param pDrvIns Driver instance.
2870 * @param rc VBox status code.
2871 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2872 * @param pszFormat Error message format string.
2873 * @param ... Error message arguments.
2874 */
2875 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2876
2877 /**
2878 * Set the VM error message
2879 *
2880 * @returns rc.
2881 * @param pDrvIns Driver instance.
2882 * @param rc VBox status code.
2883 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2884 * @param pszFormat Error message format string.
2885 * @param va Error message arguments.
2886 */
2887 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2888
2889 /**
2890 * Set the VM runtime error message
2891 *
2892 * @returns VBox status code.
2893 * @param pDevIns Device instance.
2894 * @param fFatal Whether it is a fatal error or not.
2895 * @param pszErrorID Error ID string.
2896 * @param pszFormat Error message format string.
2897 * @param ... Error message arguments.
2898 */
2899 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2900
2901 /**
2902 * Set the VM runtime error message
2903 *
2904 * @returns VBox status code.
2905 * @param pDevIns Device instance.
2906 * @param fFatal Whether it is a fatal error or not.
2907 * @param pszErrorID Error ID string.
2908 * @param pszFormat Error message format string.
2909 * @param va Error message arguments.
2910 */
2911 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2912
2913 /**
2914 * Set parameters for pending MMIO patch operation
2915 *
2916 * @returns VBox status code.
2917 * @param pDevIns Device instance.
2918 * @param GCPhys MMIO physical address
2919 * @param pCachedData GC pointer to cached data
2920 */
2921 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2922
2923 /**
2924 * Gets the VM handle. Restricted API.
2925 *
2926 * @returns VM Handle.
2927 * @param pDevIns Device instance.
2928 */
2929 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2930
2931 /** Just a safety precaution. */
2932 uint32_t u32TheEnd;
2933} PDMDEVHLPRC;
2934/** Pointer PDM Device RC API. */
2935typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2936/** Pointer PDM Device RC API. */
2937typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2938
2939/** Current PDMDEVHLP version number. */
2940#define PDM_DEVHLPRC_VERSION 0xfb010000
2941
2942
2943/**
2944 * PDM Device API - R0 Variant.
2945 */
2946typedef struct PDMDEVHLPR0
2947{
2948 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2949 uint32_t u32Version;
2950
2951 /**
2952 * Set the IRQ for a PCI device.
2953 *
2954 * @param pDevIns Device instance.
2955 * @param iIrq IRQ number to set.
2956 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2957 * @thread Any thread, but will involve the emulation thread.
2958 */
2959 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2960
2961 /**
2962 * Set ISA IRQ for a device.
2963 *
2964 * @param pDevIns Device instance.
2965 * @param iIrq IRQ number to set.
2966 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2967 * @thread Any thread, but will involve the emulation thread.
2968 */
2969 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2970
2971 /**
2972 * Read physical memory.
2973 *
2974 * @param pDevIns Device instance.
2975 * @param GCPhys Physical address start reading from.
2976 * @param pvBuf Where to put the read bits.
2977 * @param cbRead How many bytes to read.
2978 */
2979 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2980
2981 /**
2982 * Write to physical memory.
2983 *
2984 * @param pDevIns Device instance.
2985 * @param GCPhys Physical address to write to.
2986 * @param pvBuf What to write.
2987 * @param cbWrite How many bytes to write.
2988 */
2989 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2990
2991 /**
2992 * Checks if the Gate A20 is enabled or not.
2993 *
2994 * @returns true if A20 is enabled.
2995 * @returns false if A20 is disabled.
2996 * @param pDevIns Device instance.
2997 * @thread The emulation thread.
2998 */
2999 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3000
3001 /**
3002 * Set the VM error message
3003 *
3004 * @returns rc.
3005 * @param pDrvIns Driver instance.
3006 * @param rc VBox status code.
3007 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3008 * @param pszFormat Error message format string.
3009 * @param ... Error message arguments.
3010 */
3011 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3012
3013 /**
3014 * Set the VM error message
3015 *
3016 * @returns rc.
3017 * @param pDrvIns Driver instance.
3018 * @param rc VBox status code.
3019 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3020 * @param pszFormat Error message format string.
3021 * @param va Error message arguments.
3022 */
3023 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3024
3025 /**
3026 * Set the VM runtime error message
3027 *
3028 * @returns VBox status code.
3029 * @param pDevIns Device instance.
3030 * @param fFatal Whether it is a fatal error or not.
3031 * @param pszErrorID Error ID string.
3032 * @param pszFormat Error message format string.
3033 * @param ... Error message arguments.
3034 */
3035 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
3036
3037 /**
3038 * Set the VM runtime error message
3039 *
3040 * @returns VBox status code.
3041 * @param pDevIns Device instance.
3042 * @param fFatal Whether it is a fatal error or not.
3043 * @param pszErrorID Error ID string.
3044 * @param pszFormat Error message format string.
3045 * @param va Error message arguments.
3046 */
3047 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
3048
3049 /**
3050 * Set parameters for pending MMIO patch operation
3051 *
3052 * @returns rc.
3053 * @param pDevIns Device instance.
3054 * @param GCPhys MMIO physical address
3055 * @param pCachedData GC pointer to cached data
3056 */
3057 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3058
3059 /**
3060 * Gets the VM handle. Restricted API.
3061 *
3062 * @returns VM Handle.
3063 * @param pDevIns Device instance.
3064 */
3065 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3066
3067 /** Just a safety precaution. */
3068 uint32_t u32TheEnd;
3069} PDMDEVHLPR0;
3070/** Pointer PDM Device R0 API. */
3071typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3072/** Pointer PDM Device GC API. */
3073typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3074
3075/** Current PDMDEVHLP version number. */
3076#define PDM_DEVHLPR0_VERSION 0xfb010000
3077
3078
3079
3080/**
3081 * PDM Device Instance.
3082 */
3083typedef struct PDMDEVINS
3084{
3085 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3086 uint32_t u32Version;
3087 /** Device instance number. */
3088 RTUINT iInstance;
3089
3090 /** Pointer the GC PDM Device API. */
3091 PCPDMDEVHLPRC pDevHlpRC;
3092 /** Pointer to device instance data. */
3093 RTRCPTR pvInstanceDataRC;
3094
3095 /** Pointer the R0 PDM Device API. */
3096 PCPDMDEVHLPR0 pDevHlpR0;
3097 /** Pointer to device instance data (R0). */
3098 RTR0PTR pvInstanceDataR0;
3099
3100 /** Pointer the HC PDM Device API. */
3101 PCPDMDEVHLPR3 pDevHlpR3;
3102 /** Pointer to device instance data. */
3103 RTR3PTR pvInstanceDataR3;
3104
3105 /** Pointer to device registration structure. */
3106 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3107 /** Configuration handle. */
3108 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3109
3110 /** The base interface of the device.
3111 * The device constructor initializes this if it has any
3112 * device level interfaces to export. To obtain this interface
3113 * call PDMR3QueryDevice(). */
3114 PDMIBASE IBase;
3115 /** Align the internal data more naturally. */
3116 RTR3PTR R3PtrPadding;
3117
3118 /** Internal data. */
3119 union
3120 {
3121#ifdef PDMDEVINSINT_DECLARED
3122 PDMDEVINSINT s;
3123#endif
3124 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3125 } Internal;
3126
3127 /** Device instance data. The size of this area is defined
3128 * in the PDMDEVREG::cbInstanceData field. */
3129 char achInstanceData[8];
3130} PDMDEVINS;
3131
3132/** Current PDMDEVINS version number. */
3133#define PDM_DEVINS_VERSION 0xf3020000
3134
3135/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3136#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3137
3138
3139/** @def PDMDEV_ASSERT_EMT
3140 * Assert that the current thread is the emulation thread.
3141 */
3142#ifdef VBOX_STRICT
3143# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3144#else
3145# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3146#endif
3147
3148/** @def PDMDEV_ASSERT_OTHER
3149 * Assert that the current thread is NOT the emulation thread.
3150 */
3151#ifdef VBOX_STRICT
3152# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3153#else
3154# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3155#endif
3156
3157/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3158 * Assert that the current thread is owner of the VM lock.
3159 */
3160#ifdef VBOX_STRICT
3161# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3162#else
3163# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3164#endif
3165
3166/** @def PDMDEV_SET_ERROR
3167 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3168 */
3169#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3170 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3171
3172/** @def PDMDEV_SET_RUNTIME_ERROR
3173 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3174 */
3175#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3176 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3177
3178/** @def PDMDEVINS_2_RCPTR
3179 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3180 */
3181#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3182
3183/** @def PDMDEVINS_2_R3PTR
3184 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3185 */
3186#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3187
3188/** @def PDMDEVINS_2_R0PTR
3189 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3190 */
3191#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3192
3193
3194/**
3195 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3196 *
3197 * @returns VBox status code which must be passed up to the VMM.
3198 * @param pDevIns Device instance.
3199 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3200 * @param pszFormat Message. (optional)
3201 * @param ... Message parameters.
3202 */
3203DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3204{
3205#ifdef VBOX_STRICT
3206# ifdef IN_RING3
3207 int rc;
3208 va_list args;
3209 va_start(args, pszFormat);
3210 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3211 va_end(args);
3212 return rc;
3213# else
3214 return VINF_EM_DBG_STOP;
3215# endif
3216#else
3217 NOREF(pDevIns);
3218 NOREF(pszFile);
3219 NOREF(iLine);
3220 NOREF(pszFunction);
3221 NOREF(pszFormat);
3222 return VINF_SUCCESS;
3223#endif
3224}
3225
3226
3227#ifdef IN_RING3
3228/**
3229 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3230 */
3231DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3232 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3233 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3234{
3235 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3236}
3237
3238/**
3239 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3240 */
3241DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3242 const char *pszOut, const char *pszIn, const char *pszOutStr,
3243 const char *pszInStr, const char *pszDesc)
3244{
3245 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3246}
3247
3248/**
3249 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3250 */
3251DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3252 const char *pszOut, const char *pszIn, const char *pszOutStr,
3253 const char *pszInStr, const char *pszDesc)
3254{
3255 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3256}
3257
3258/**
3259 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3260 */
3261DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3262 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3263 const char *pszDesc)
3264{
3265 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3266}
3267
3268/**
3269 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3270 */
3271DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3272 const char *pszWrite, const char *pszRead, const char *pszFill)
3273{
3274 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3275}
3276
3277/**
3278 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3279 */
3280DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3281 const char *pszWrite, const char *pszRead, const char *pszFill)
3282{
3283 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3284}
3285
3286/**
3287 * @copydoc PDMDEVHLPR3::pfnROMRegister
3288 */
3289DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3290{
3291 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3292}
3293/**
3294 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3295 */
3296DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3297{
3298 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3299}
3300
3301/**
3302 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3303 */
3304DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3305{
3306 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3307}
3308
3309/**
3310 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3311 */
3312DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3313{
3314 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3315}
3316
3317/**
3318 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3319 */
3320DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3321{
3322 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3323}
3324
3325/**
3326 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3327 */
3328DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3329{
3330 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3331}
3332
3333/**
3334 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3335 */
3336DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3337 const char *pszDesc, PRTRCPTR pRCPtr)
3338{
3339 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3340}
3341
3342/**
3343 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3344 */
3345DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3346 const char *pszDesc, PRTR0PTR pR0Ptr)
3347{
3348 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3349}
3350
3351/**
3352 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3353 */
3354DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3355{
3356 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3357}
3358
3359/**
3360 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3361 */
3362DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3363{
3364 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3365}
3366
3367/**
3368 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3369 */
3370DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3371 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3372 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3373{
3374 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3375 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3376 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3377}
3378
3379/**
3380 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3381 */
3382DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3383{
3384 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3385}
3386
3387/**
3388 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3389 */
3390DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3391{
3392 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3393}
3394
3395/**
3396 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3397 */
3398DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3399{
3400 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3401}
3402
3403/**
3404 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3405 */
3406DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3407 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3408{
3409 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3410}
3411
3412/**
3413 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3414 */
3415DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3416{
3417 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3418}
3419
3420/**
3421 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3422 */
3423DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3424{
3425 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3426}
3427
3428/**
3429 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3430 */
3431DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3432{
3433 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3434}
3435
3436/**
3437 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3438 */
3439DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3440{
3441 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3442}
3443
3444/**
3445 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3446 */
3447DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3448{
3449 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3450}
3451
3452/**
3453 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3454 */
3455DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3456{
3457 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3458}
3459
3460/**
3461 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3462 */
3463DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3464 const char *pszDesc, const char *pszName, ...)
3465{
3466 va_list va;
3467 va_start(va, pszName);
3468 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3469 va_end(va);
3470}
3471
3472/**
3473 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3474 */
3475DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3476 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3477{
3478 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3479}
3480
3481/**
3482 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3483 */
3484DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3485{
3486 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3487}
3488
3489/**
3490 * @copydoc PDMDEVHLPR3::pfnUTCNow
3491 */
3492DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3493{
3494 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3495}
3496
3497/**
3498 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3499 */
3500DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3501{
3502 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3503}
3504
3505/**
3506 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3507 */
3508DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3509{
3510 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3511}
3512
3513/**
3514 * @copydoc PDMDEVHLPR3::pfnPhysReserve
3515 */
3516DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3517{
3518 return pDevIns->pDevHlpR3->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3519}
3520
3521/**
3522 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3523 */
3524DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3525{
3526 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3527}
3528
3529/**
3530 * @copydoc PDMDEVHLPR3::pfnVMState
3531 */
3532DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3533{
3534 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3535}
3536
3537/**
3538 * @copydoc PDMDEVHLPR3::pfnA20Set
3539 */
3540DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3541{
3542 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3543}
3544
3545/**
3546 * @copydoc PDMDEVHLPR3::pfnVMReset
3547 */
3548DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3549{
3550 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3551}
3552
3553/**
3554 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3555 */
3556DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3557{
3558 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3559}
3560
3561/**
3562 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3563 */
3564DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3565{
3566 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3567}
3568
3569/**
3570 * @copydoc PDMDEVHLPR3::pfnDMARegister
3571 */
3572DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3573{
3574 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3575}
3576
3577/**
3578 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3579 */
3580DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3581{
3582 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3583}
3584
3585/**
3586 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3587 */
3588DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3589{
3590 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3591}
3592
3593/**
3594 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3595 */
3596DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3597{
3598 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3599}
3600
3601/**
3602 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3603 */
3604DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3605{
3606 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3607}
3608
3609/**
3610 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3611 */
3612DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3613{
3614 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3615}
3616
3617/**
3618 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3619 */
3620DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3621{
3622 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3623}
3624
3625/**
3626 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3627 */
3628DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3629{
3630 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3631}
3632
3633/**
3634 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3635 */
3636DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3637{
3638 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3639}
3640
3641/**
3642 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3643 */
3644DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3645 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3646{
3647 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3648}
3649#endif /* IN_RING3 */
3650
3651
3652/**
3653 * @copydoc PDMDEVHLPR3::pfnGetVM
3654 */
3655DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3656{
3657 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3658}
3659
3660/**
3661 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3662 */
3663DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3664{
3665 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3666}
3667
3668/**
3669 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3670 */
3671DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3672{
3673 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3674}
3675
3676/**
3677 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3678 */
3679DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3680{
3681 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3682}
3683
3684/**
3685 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3686 */
3687DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3688{
3689 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3690}
3691
3692/**
3693 * @copydoc PDMDEVHLPR3::pfnPhysRead
3694 */
3695DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3696{
3697 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3698}
3699
3700/**
3701 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3702 */
3703DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3704{
3705 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3706}
3707
3708/**
3709 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3710 */
3711DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3712{
3713 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3714}
3715
3716/**
3717 * @copydoc PDMDEVHLPR3::pfnVMSetError
3718 */
3719DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3720{
3721 va_list va;
3722 va_start(va, pszFormat);
3723 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3724 va_end(va);
3725 return rc;
3726}
3727
3728/**
3729 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3730 */
3731DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3732{
3733 va_list va;
3734 int rc;
3735 va_start(va, pszFormat);
3736 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3737 va_end(va);
3738 return rc;
3739}
3740
3741
3742
3743/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3744typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3745
3746/**
3747 * Callbacks for VBoxDeviceRegister().
3748 */
3749typedef struct PDMDEVREGCB
3750{
3751 /** Interface version.
3752 * This is set to PDM_DEVREG_CB_VERSION. */
3753 uint32_t u32Version;
3754
3755 /**
3756 * Registers a device with the current VM instance.
3757 *
3758 * @returns VBox status code.
3759 * @param pCallbacks Pointer to the callback table.
3760 * @param pDevReg Pointer to the device registration record.
3761 * This data must be permanent and readonly.
3762 */
3763 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3764
3765 /**
3766 * Allocate memory which is associated with current VM instance
3767 * and automatically freed on it's destruction.
3768 *
3769 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3770 * @param pCallbacks Pointer to the callback table.
3771 * @param cb Number of bytes to allocate.
3772 */
3773 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3774} PDMDEVREGCB;
3775
3776/** Current version of the PDMDEVREGCB structure. */
3777#define PDM_DEVREG_CB_VERSION 0xf4010000
3778
3779
3780/**
3781 * The VBoxDevicesRegister callback function.
3782 *
3783 * PDM will invoke this function after loading a device module and letting
3784 * the module decide which devices to register and how to handle conflicts.
3785 *
3786 * @returns VBox status code.
3787 * @param pCallbacks Pointer to the callback table.
3788 * @param u32Version VBox version number.
3789 */
3790typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3791
3792/** @} */
3793
3794__END_DECLS
3795
3796#endif
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