VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 19469

Last change on this file since 19469 was 19468, checked in by vboxsync, 16 years ago

VMM: better SIPI sending, reschedule to R3 as needed

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/err.h>
44#include <VBox/pci.h>
45#include <iprt/stdarg.h>
46
47__BEGIN_DECLS
48
49/** @defgroup grp_pdm_device The PDM Devices API
50 * @ingroup grp_pdm
51 * @{
52 */
53
54/**
55 * Construct a device instance for a VM.
56 *
57 * @returns VBox status.
58 * @param pDevIns The device instance data.
59 * If the registration structure is needed, pDevIns->pDevReg points to it.
60 * @param iInstance Instance number. Use this to figure out which registers and such to use.
61 * The instance number is also found in pDevIns->iInstance, but since it's
62 * likely to be freqently used PDM passes it as parameter.
63 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
64 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
65 * primary usage will in this function it's passed as a parameter.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 */
80typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
81/** Pointer to a FNPDMDEVDESTRUCT() function. */
82typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
83
84/**
85 * Device relocation callback.
86 *
87 * When this callback is called the device instance data, and if the
88 * device have a GC component, is being relocated, or/and the selectors
89 * have been changed. The device must use the chance to perform the
90 * necessary pointer relocations and data updates.
91 *
92 * Before the GC code is executed the first time, this function will be
93 * called with a 0 delta so GC pointer calculations can be one in one place.
94 *
95 * @param pDevIns Pointer to the device instance.
96 * @param offDelta The relocation delta relative to the old location.
97 *
98 * @remark A relocation CANNOT fail.
99 */
100typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
101/** Pointer to a FNPDMDEVRELOCATE() function. */
102typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
103
104
105/**
106 * Device I/O Control interface.
107 *
108 * This is used by external components, such as the COM interface, to
109 * communicate with devices using a class wide interface or a device
110 * specific interface.
111 *
112 * @returns VBox status code.
113 * @param pDevIns Pointer to the device instance.
114 * @param uFunction Function to perform.
115 * @param pvIn Pointer to input data.
116 * @param cbIn Size of input data.
117 * @param pvOut Pointer to output data.
118 * @param cbOut Size of output data.
119 * @param pcbOut Where to store the actual size of the output data.
120 */
121typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
122 void *pvIn, RTUINT cbIn,
123 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
124/** Pointer to a FNPDMDEVIOCTL() function. */
125typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
126
127/**
128 * Power On notification.
129 *
130 * @returns VBox status.
131 * @param pDevIns The device instance data.
132 */
133typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
134/** Pointer to a FNPDMDEVPOWERON() function. */
135typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
136
137/**
138 * Reset notification.
139 *
140 * @returns VBox status.
141 * @param pDevIns The device instance data.
142 */
143typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
144/** Pointer to a FNPDMDEVRESET() function. */
145typedef FNPDMDEVRESET *PFNPDMDEVRESET;
146
147/**
148 * Suspend notification.
149 *
150 * @returns VBox status.
151 * @param pDevIns The device instance data.
152 */
153typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
154/** Pointer to a FNPDMDEVSUSPEND() function. */
155typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
156
157/**
158 * Resume notification.
159 *
160 * @returns VBox status.
161 * @param pDevIns The device instance data.
162 */
163typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
164/** Pointer to a FNPDMDEVRESUME() function. */
165typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
166
167/**
168 * Power Off notification.
169 *
170 * @param pDevIns The device instance data.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 */
189typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
190/** Pointer to a FNPDMDEVATTACH() function. */
191typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
192
193/**
194 * Detach notification.
195 *
196 * This is called when a driver is detaching itself from a LUN of the device.
197 * The device should adjust it's state to reflect this.
198 *
199 * This is like unplugging the network cable to use it for the laptop or
200 * something while the PC is still running.
201 *
202 * @param pDevIns The device instance.
203 * @param iLUN The logical unit which is being detached.
204 */
205typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
206/** Pointer to a FNPDMDEVDETACH() function. */
207typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
208
209/**
210 * Query the base interface of a logical unit.
211 *
212 * @returns VBOX status code.
213 * @param pDevIns The device instance.
214 * @param iLUN The logicial unit to query.
215 * @param ppBase Where to store the pointer to the base interface of the LUN.
216 */
217typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
218/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
219typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
220
221/**
222 * Init complete notification.
223 * This can be done to do communication with other devices and other
224 * initialization which requires everything to be in place.
225 *
226 * @returns VBOX status code.
227 * @param pDevIns The device instance.
228 */
229typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
230/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
231typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
232
233
234
235/** PDM Device Registration Structure,
236 * This structure is used when registering a device from
237 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
238 * the VM is terminated.
239 */
240typedef struct PDMDEVREG
241{
242 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
243 uint32_t u32Version;
244 /** Device name. */
245 char szDeviceName[32];
246 /** Name of the raw-mode context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
248 char szRCMod[32];
249 /** Name of the ring-0 module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
251 char szR0Mod[32];
252 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
253 * remain unchanged from registration till VM destruction. */
254 const char *pszDescription;
255
256 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
257 RTUINT fFlags;
258 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
259 RTUINT fClass;
260 /** Maximum number of instances (per VM). */
261 RTUINT cMaxInstances;
262 /** Size of the instance data. */
263 RTUINT cbInstance;
264
265 /** Construct instance - required. */
266 PFNPDMDEVCONSTRUCT pfnConstruct;
267 /** Destruct instance - optional. */
268 PFNPDMDEVDESTRUCT pfnDestruct;
269 /** Relocation command - optional. */
270 PFNPDMDEVRELOCATE pfnRelocate;
271 /** I/O Control interface - optional. */
272 PFNPDMDEVIOCTL pfnIOCtl;
273 /** Power on notification - optional. */
274 PFNPDMDEVPOWERON pfnPowerOn;
275 /** Reset notification - optional. */
276 PFNPDMDEVRESET pfnReset;
277 /** Suspend notification - optional. */
278 PFNPDMDEVSUSPEND pfnSuspend;
279 /** Resume notification - optional. */
280 PFNPDMDEVRESUME pfnResume;
281 /** Attach command - optional. */
282 PFNPDMDEVATTACH pfnAttach;
283 /** Detach notification - optional. */
284 PFNPDMDEVDETACH pfnDetach;
285 /** Query a LUN base interface - optional. */
286 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
287 /** Init complete notification - optional. */
288 PFNPDMDEVINITCOMPLETE pfnInitComplete;
289 /** Power off notification - optional. */
290 PFNPDMDEVPOWEROFF pfnPowerOff;
291 /** @todo */
292 PFNRT pfnSoftReset;
293 /** Initialization safty marker. */
294 uint32_t u32VersionEnd;
295} PDMDEVREG;
296/** Pointer to a PDM Device Structure. */
297typedef PDMDEVREG *PPDMDEVREG;
298/** Const pointer to a PDM Device Structure. */
299typedef PDMDEVREG const *PCPDMDEVREG;
300
301/** Current DEVREG version number. */
302#define PDM_DEVREG_VERSION 0xc0020000
303
304/** PDM Device Flags.
305 * @{ */
306/** This flag is used to indicate that the device has a RC component. */
307#define PDM_DEVREG_FLAGS_RC 0x00000001
308/** This flag is used to indicate that the device has a R0 component. */
309#define PDM_DEVREG_FLAGS_R0 0x00000002
310
311/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
312 * The bit count for the current host. */
313#if HC_ARCH_BITS == 32
314# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
315#elif HC_ARCH_BITS == 64
316# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
317#else
318# error Unsupported HC_ARCH_BITS value.
319#endif
320/** The host bit count mask. */
321#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
322
323/** The device support only 32-bit guests. */
324#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
325/** The device support only 64-bit guests. */
326#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
327/** The device support both 32-bit & 64-bit guests. */
328#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
329/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
330 * The guest bit count for the current compilation. */
331#if GC_ARCH_BITS == 32
332# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
333#elif GC_ARCH_BITS == 64
334# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
335#else
336# error Unsupported GC_ARCH_BITS value.
337#endif
338/** The guest bit count mask. */
339#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
340
341/** A convenience. */
342#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
343
344/** Indicates that the devices support PAE36 on a 32-bit guest. */
345#define PDM_DEVREG_FLAGS_PAE36 0x00001000
346
347/** Indicates that the device needs to be notified before the drivers when suspending. */
348#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
349
350/** Indicates that the device needs to be notified before the drivers when powering off. */
351#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
352/** @} */
353
354
355/** PDM Device Classes.
356 * The order is important, lower bit earlier instantiation.
357 * @{ */
358/** Architecture device. */
359#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
360/** Architecture BIOS device. */
361#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
362/** PCI bus brigde. */
363#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
364/** ISA bus brigde. */
365#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
366/** Input device (mouse, keyboard, joystick, HID, ...). */
367#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
368/** Interrupt controller (PIC). */
369#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
370/** Interval controoler (PIT). */
371#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
372/** RTC/CMOS. */
373#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
374/** DMA controller. */
375#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
376/** VMM Device. */
377#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
378/** Graphics device, like VGA. */
379#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
380/** Storage controller device. */
381#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
382/** Network interface controller. */
383#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
384/** Audio. */
385#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
386/** USB HIC. */
387#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
388/** ACPI. */
389#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
390/** Serial controller device. */
391#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
392/** Parallel controller device */
393#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
394/** Misc devices (always last). */
395#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
396/** @} */
397
398
399/** @name IRQ Level for use with the *SetIrq APIs.
400 * @{
401 */
402/** Assert the IRQ (can assume value 1). */
403#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
404/** Deassert the IRQ (can assume value 0). */
405#define PDM_IRQ_LEVEL_LOW 0
406/** flip-flop - assert and then deassert it again immediately. */
407#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
408/** @} */
409
410
411/**
412 * PCI Bus registration structure.
413 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
414 */
415typedef struct PDMPCIBUSREG
416{
417 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
418 uint32_t u32Version;
419
420 /**
421 * Registers the device with the default PCI bus.
422 *
423 * @returns VBox status code.
424 * @param pDevIns Device instance of the PCI Bus.
425 * @param pPciDev The PCI device structure.
426 * Any PCI enabled device must keep this in it's instance data!
427 * Fill in the PCI data config before registration, please.
428 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
429 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
430 * If negative, the pci bus device will assign one.
431 */
432 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
433
434 /**
435 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
436 *
437 * @returns VBox status code.
438 * @param pDevIns Device instance of the PCI Bus.
439 * @param pPciDev The PCI device structure.
440 * @param iRegion The region number.
441 * @param cbRegion Size of the region.
442 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
443 * @param pfnCallback Callback for doing the mapping.
444 */
445 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
446
447 /**
448 * Register PCI configuration space read/write callbacks.
449 *
450 * @param pDevIns Device instance of the PCI Bus.
451 * @param pPciDev The PCI device structure.
452 * @param pfnRead Pointer to the user defined PCI config read function.
453 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
454 * PCI config read function. This way, user can decide when (and if)
455 * to call default PCI config read function. Can be NULL.
456 * @param pfnWrite Pointer to the user defined PCI config write function.
457 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
458 * PCI config write function. This way, user can decide when (and if)
459 * to call default PCI config write function. Can be NULL.
460 * @thread EMT
461 */
462 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
463 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
464
465 /**
466 * Set the IRQ for a PCI device.
467 *
468 * @param pDevIns Device instance of the PCI Bus.
469 * @param pPciDev The PCI device structure.
470 * @param iIrq IRQ number to set.
471 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
472 */
473 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
474
475 /**
476 * Saves a state of the PCI device.
477 *
478 * @returns VBox status code.
479 * @param pDevIns Device instance of the PCI Bus.
480 * @param pPciDev Pointer to PCI device.
481 * @param pSSMHandle The handle to save the state to.
482 */
483 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
484
485 /**
486 * Loads a saved PCI device state.
487 *
488 * @returns VBox status code.
489 * @param pDevIns Device instance of the PCI Bus.
490 * @param pPciDev Pointer to PCI device.
491 * @param pSSMHandle The handle to the saved state.
492 */
493 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
494
495 /**
496 * Called to perform the job of the bios.
497 * This is only called for the first PCI Bus - it is expected to
498 * service all the PCI buses.
499 *
500 * @returns VBox status.
501 * @param pDevIns Device instance of the first bus.
502 */
503 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
504
505 /** The name of the SetIrq RC entry point. */
506 const char *pszSetIrqRC;
507
508 /** The name of the SetIrq R0 entry point. */
509 const char *pszSetIrqR0;
510
511} PDMPCIBUSREG;
512/** Pointer to a PCI bus registration structure. */
513typedef PDMPCIBUSREG *PPDMPCIBUSREG;
514
515/** Current PDMPCIBUSREG version number. */
516#define PDM_PCIBUSREG_VERSION 0xd0020000
517
518/**
519 * PCI Bus RC helpers.
520 */
521typedef struct PDMPCIHLPRC
522{
523 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
524 uint32_t u32Version;
525
526 /**
527 * Set an ISA IRQ.
528 *
529 * @param pDevIns PCI device instance.
530 * @param iIrq IRQ number to set.
531 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
532 * @thread EMT only.
533 */
534 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
535
536 /**
537 * Set an I/O-APIC IRQ.
538 *
539 * @param pDevIns PCI device instance.
540 * @param iIrq IRQ number to set.
541 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
542 * @thread EMT only.
543 */
544 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
545
546 /**
547 * Acquires the PDM lock.
548 *
549 * @returns VINF_SUCCESS on success.
550 * @returns rc if we failed to acquire the lock.
551 * @param pDevIns The PCI device instance.
552 * @param rc What to return if we fail to acquire the lock.
553 */
554 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
555
556 /**
557 * Releases the PDM lock.
558 *
559 * @param pDevIns The PCI device instance.
560 */
561 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
562
563 /** Just a safety precaution. */
564 uint32_t u32TheEnd;
565} PDMPCIHLPRC;
566/** Pointer to PCI helpers. */
567typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
568/** Pointer to const PCI helpers. */
569typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
570
571/** Current PDMPCIHLPR3 version number. */
572#define PDM_PCIHLPRC_VERSION 0xe1010000
573
574
575/**
576 * PCI Bus R0 helpers.
577 */
578typedef struct PDMPCIHLPR0
579{
580 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
581 uint32_t u32Version;
582
583 /**
584 * Set an ISA IRQ.
585 *
586 * @param pDevIns PCI device instance.
587 * @param iIrq IRQ number to set.
588 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
589 * @thread EMT only.
590 */
591 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
592
593 /**
594 * Set an I/O-APIC IRQ.
595 *
596 * @param pDevIns PCI device instance.
597 * @param iIrq IRQ number to set.
598 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
599 * @thread EMT only.
600 */
601 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
602
603 /**
604 * Acquires the PDM lock.
605 *
606 * @returns VINF_SUCCESS on success.
607 * @returns rc if we failed to acquire the lock.
608 * @param pDevIns The PCI device instance.
609 * @param rc What to return if we fail to acquire the lock.
610 */
611 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
612
613 /**
614 * Releases the PDM lock.
615 *
616 * @param pDevIns The PCI device instance.
617 */
618 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
619
620 /** Just a safety precaution. */
621 uint32_t u32TheEnd;
622} PDMPCIHLPR0;
623/** Pointer to PCI helpers. */
624typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
625/** Pointer to const PCI helpers. */
626typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
627
628/** Current PDMPCIHLPR0 version number. */
629#define PDM_PCIHLPR0_VERSION 0xe1010000
630
631/**
632 * PCI device helpers.
633 */
634typedef struct PDMPCIHLPR3
635{
636 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
637 uint32_t u32Version;
638
639 /**
640 * Set an ISA IRQ.
641 *
642 * @param pDevIns The PCI device instance.
643 * @param iIrq IRQ number to set.
644 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
645 * @thread EMT only.
646 */
647 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
648
649 /**
650 * Set an I/O-APIC IRQ.
651 *
652 * @param pDevIns The PCI device instance.
653 * @param iIrq IRQ number to set.
654 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
655 * @thread EMT only.
656 */
657 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
658
659 /**
660 * Checks if the given address is an MMIO2 base address or not.
661 *
662 * @returns true/false accordingly.
663 * @param pDevIns The PCI device instance.
664 * @param pOwner The owner of the memory, optional.
665 * @param GCPhys The address to check.
666 */
667 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
668
669 /**
670 * Gets the address of the RC PCI Bus helpers.
671 *
672 * This should be called at both construction and relocation time
673 * to obtain the correct address of the RC helpers.
674 *
675 * @returns RC pointer to the PCI Bus helpers.
676 * @param pDevIns Device instance of the PCI Bus.
677 * @thread EMT only.
678 */
679 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
680
681 /**
682 * Gets the address of the R0 PCI Bus helpers.
683 *
684 * This should be called at both construction and relocation time
685 * to obtain the correct address of the R0 helpers.
686 *
687 * @returns R0 pointer to the PCI Bus helpers.
688 * @param pDevIns Device instance of the PCI Bus.
689 * @thread EMT only.
690 */
691 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
692
693 /**
694 * Acquires the PDM lock.
695 *
696 * @returns VINF_SUCCESS on success.
697 * @returns Fatal error on failure.
698 * @param pDevIns The PCI device instance.
699 * @param rc Dummy for making the interface identical to the RC and R0 versions.
700 */
701 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
702
703 /**
704 * Releases the PDM lock.
705 *
706 * @param pDevIns The PCI device instance.
707 */
708 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
709
710 /** Just a safety precaution. */
711 uint32_t u32TheEnd;
712} PDMPCIHLPR3;
713/** Pointer to PCI helpers. */
714typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
715/** Pointer to const PCI helpers. */
716typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
717
718/** Current PDMPCIHLPR3 version number. */
719#define PDM_PCIHLPR3_VERSION 0xf1020000
720
721
722/**
723 * Programmable Interrupt Controller registration structure.
724 */
725typedef struct PDMPICREG
726{
727 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
728 uint32_t u32Version;
729
730 /**
731 * Set the an IRQ.
732 *
733 * @param pDevIns Device instance of the PIC.
734 * @param iIrq IRQ number to set.
735 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
736 */
737 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
738
739 /**
740 * Get a pending interrupt.
741 *
742 * @returns Pending interrupt number.
743 * @param pDevIns Device instance of the PIC.
744 */
745 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
746
747 /** The name of the RC SetIrq entry point. */
748 const char *pszSetIrqRC;
749 /** The name of the RC GetInterrupt entry point. */
750 const char *pszGetInterruptRC;
751
752 /** The name of the R0 SetIrq entry point. */
753 const char *pszSetIrqR0;
754 /** The name of the R0 GetInterrupt entry point. */
755 const char *pszGetInterruptR0;
756} PDMPICREG;
757/** Pointer to a PIC registration structure. */
758typedef PDMPICREG *PPDMPICREG;
759
760/** Current PDMPICREG version number. */
761#define PDM_PICREG_VERSION 0xe0020000
762
763/**
764 * PIC RC helpers.
765 */
766typedef struct PDMPICHLPRC
767{
768 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
769 uint32_t u32Version;
770
771 /**
772 * Set the interrupt force action flag.
773 *
774 * @param pDevIns Device instance of the PIC.
775 */
776 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
777
778 /**
779 * Clear the interrupt force action flag.
780 *
781 * @param pDevIns Device instance of the PIC.
782 */
783 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
784
785 /**
786 * Acquires the PDM lock.
787 *
788 * @returns VINF_SUCCESS on success.
789 * @returns rc if we failed to acquire the lock.
790 * @param pDevIns The PIC device instance.
791 * @param rc What to return if we fail to acquire the lock.
792 */
793 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
794
795 /**
796 * Releases the PDM lock.
797 *
798 * @param pDevIns The PIC device instance.
799 */
800 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
801
802 /** Just a safety precaution. */
803 uint32_t u32TheEnd;
804} PDMPICHLPRC;
805
806/** Pointer to PIC RC helpers. */
807typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
808/** Pointer to const PIC RC helpers. */
809typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
810
811/** Current PDMPICHLPRC version number. */
812#define PDM_PICHLPRC_VERSION 0xfc010000
813
814
815/**
816 * PIC R0 helpers.
817 */
818typedef struct PDMPICHLPR0
819{
820 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
821 uint32_t u32Version;
822
823 /**
824 * Set the interrupt force action flag.
825 *
826 * @param pDevIns Device instance of the PIC.
827 */
828 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
829
830 /**
831 * Clear the interrupt force action flag.
832 *
833 * @param pDevIns Device instance of the PIC.
834 */
835 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
836
837 /**
838 * Acquires the PDM lock.
839 *
840 * @returns VINF_SUCCESS on success.
841 * @returns rc if we failed to acquire the lock.
842 * @param pDevIns The PIC device instance.
843 * @param rc What to return if we fail to acquire the lock.
844 */
845 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
846
847 /**
848 * Releases the PDM lock.
849 *
850 * @param pDevIns The PCI device instance.
851 */
852 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
853
854 /** Just a safety precaution. */
855 uint32_t u32TheEnd;
856} PDMPICHLPR0;
857
858/** Pointer to PIC R0 helpers. */
859typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
860/** Pointer to const PIC R0 helpers. */
861typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
862
863/** Current PDMPICHLPR0 version number. */
864#define PDM_PICHLPR0_VERSION 0xfc010000
865
866/**
867 * PIC R3 helpers.
868 */
869typedef struct PDMPICHLPR3
870{
871 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
872 uint32_t u32Version;
873
874 /**
875 * Set the interrupt force action flag.
876 *
877 * @param pDevIns Device instance of the PIC.
878 */
879 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
880
881 /**
882 * Clear the interrupt force action flag.
883 *
884 * @param pDevIns Device instance of the PIC.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
887
888 /**
889 * Acquires the PDM lock.
890 *
891 * @returns VINF_SUCCESS on success.
892 * @returns Fatal error on failure.
893 * @param pDevIns The PIC device instance.
894 * @param rc Dummy for making the interface identical to the RC and R0 versions.
895 */
896 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
897
898 /**
899 * Releases the PDM lock.
900 *
901 * @param pDevIns The PIC device instance.
902 */
903 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
904
905 /**
906 * Gets the address of the RC PIC helpers.
907 *
908 * This should be called at both construction and relocation time
909 * to obtain the correct address of the RC helpers.
910 *
911 * @returns RC pointer to the PIC helpers.
912 * @param pDevIns Device instance of the PIC.
913 */
914 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
915
916 /**
917 * Gets the address of the R0 PIC helpers.
918 *
919 * This should be called at both construction and relocation time
920 * to obtain the correct address of the R0 helpers.
921 *
922 * @returns R0 pointer to the PIC helpers.
923 * @param pDevIns Device instance of the PIC.
924 */
925 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
926
927 /** Just a safety precaution. */
928 uint32_t u32TheEnd;
929} PDMPICHLPR3;
930
931/** Pointer to PIC R3 helpers. */
932typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
933/** Pointer to const PIC R3 helpers. */
934typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
935
936/** Current PDMPICHLPR3 version number. */
937#define PDM_PICHLPR3_VERSION 0xf0010000
938
939
940
941/**
942 * Advanced Programmable Interrupt Controller registration structure.
943 */
944typedef struct PDMAPICREG
945{
946 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
947 uint32_t u32Version;
948
949 /**
950 * Get a pending interrupt.
951 *
952 * @returns Pending interrupt number.
953 * @param pDevIns Device instance of the APIC.
954 */
955 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
956
957 /**
958 * Check if the APIC has a pending interrupt/if a TPR change would active one
959 *
960 * @returns Pending interrupt yes/no
961 * @param pDevIns Device instance of the APIC.
962 */
963 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
964
965 /**
966 * Set the APIC base.
967 *
968 * @param pDevIns Device instance of the APIC.
969 * @param u64Base The new base.
970 */
971 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
972
973 /**
974 * Get the APIC base.
975 *
976 * @returns Current base.
977 * @param pDevIns Device instance of the APIC.
978 */
979 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
980
981 /**
982 * Set the TPR (task priority register).
983 *
984 * @param pDevIns Device instance of the APIC.
985 * @param u8TPR The new TPR.
986 */
987 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
988
989 /**
990 * Get the TPR (task priority register).
991 *
992 * @returns The current TPR.
993 * @param pDevIns Device instance of the APIC.
994 * @param pfPending Pending interrupt state (out).
995 */
996 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
997
998 /**
999 * Write MSR in APIC range.
1000 *
1001 * @returns VBox status code.
1002 * @param pDevIns Device instance of the APIC.
1003 * @param idCpu Target CPU.
1004 * @param u32Reg MSR to write.
1005 * @param u64Value Value to write.
1006 */
1007 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1008
1009 /**
1010 * Read MSR in APIC range.
1011 *
1012 * @returns VBox status code.
1013 * @param pDevIns Device instance of the APIC.
1014 * @param idCpu Target CPU.
1015 * @param u32Reg MSR to read.
1016 * @param pu64Value Value read.
1017 */
1018 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1019
1020 /**
1021 * Private interface between the IOAPIC and APIC.
1022 *
1023 * This is a low-level, APIC/IOAPIC implementation specific interface
1024 * which is registered with PDM only because it makes life so much
1025 * simpler right now (GC bits). This is a bad bad hack! The correct
1026 * way of doing this would involve some way of querying GC interfaces
1027 * and relocating them. Perhaps doing some kind of device init in GC...
1028 *
1029 * @returns The current TPR.
1030 * @param pDevIns Device instance of the APIC.
1031 * @param u8Dest See APIC implementation.
1032 * @param u8DestMode See APIC implementation.
1033 * @param u8DeliveryMode See APIC implementation.
1034 * @param iVector See APIC implementation.
1035 * @param u8Polarity See APIC implementation.
1036 * @param u8TriggerMode See APIC implementation.
1037 */
1038 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1039 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1040
1041 /** The name of the RC GetInterrupt entry point. */
1042 const char *pszGetInterruptRC;
1043 /** The name of the RC HasPendingIrq entry point. */
1044 const char *pszHasPendingIrqRC;
1045 /** The name of the RC SetBase entry point. */
1046 const char *pszSetBaseRC;
1047 /** The name of the RC GetBase entry point. */
1048 const char *pszGetBaseRC;
1049 /** The name of the RC SetTPR entry point. */
1050 const char *pszSetTPRRC;
1051 /** The name of the RC GetTPR entry point. */
1052 const char *pszGetTPRRC;
1053 /** The name of the RC WriteMSR entry point. */
1054 const char *pszWriteMSRRC;
1055 /** The name of the RC ReadMSR entry point. */
1056 const char *pszReadMSRRC;
1057 /** The name of the RC BusDeliver entry point. */
1058 const char *pszBusDeliverRC;
1059
1060 /** The name of the R0 GetInterrupt entry point. */
1061 const char *pszGetInterruptR0;
1062 /** The name of the R0 HasPendingIrq entry point. */
1063 const char *pszHasPendingIrqR0;
1064 /** The name of the R0 SetBase entry point. */
1065 const char *pszSetBaseR0;
1066 /** The name of the R0 GetBase entry point. */
1067 const char *pszGetBaseR0;
1068 /** The name of the R0 SetTPR entry point. */
1069 const char *pszSetTPRR0;
1070 /** The name of the R0 GetTPR entry point. */
1071 const char *pszGetTPRR0;
1072 /** The name of the R0 WriteMSR entry point. */
1073 const char *pszWriteMSRR0;
1074 /** The name of the R0 ReadMSR entry point. */
1075 const char *pszReadMSRR0;
1076 /** The name of the R0 BusDeliver entry point. */
1077 const char *pszBusDeliverR0;
1078
1079} PDMAPICREG;
1080/** Pointer to an APIC registration structure. */
1081typedef PDMAPICREG *PPDMAPICREG;
1082
1083/** Current PDMAPICREG version number. */
1084#define PDM_APICREG_VERSION 0x70010000
1085
1086
1087/**
1088 * APIC version argument for pfnChangeFeature.
1089 */
1090typedef enum PDMAPICVERSION
1091{
1092 /** Invalid 0 entry. */
1093 PDMAPICVERSION_INVALID = 0,
1094 /** No APIC. */
1095 PDMAPICVERSION_NONE,
1096 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1097 PDMAPICVERSION_APIC,
1098 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1099 PDMAPICVERSION_X2APIC,
1100 /** The usual 32-bit paranoia. */
1101 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1102} PDMAPICVERSION;
1103
1104
1105/**
1106 * APIC RC helpers.
1107 */
1108typedef struct PDMAPICHLPRC
1109{
1110 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1111 uint32_t u32Version;
1112
1113 /**
1114 * Set the interrupt force action flag.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 * @param idCpu Virtual CPU to set flag upon.
1118 */
1119 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1120
1121 /**
1122 * Clear the interrupt force action flag.
1123 *
1124 * @param pDevIns Device instance of the APIC.
1125 * @param idCpu Virtual CPU to clear flag upon.
1126 */
1127 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1128
1129 /**
1130 * Modifies APIC-related bits in the CPUID feature mask.
1131 *
1132 * @param pDevIns Device instance of the APIC.
1133 * @param enmVersion Supported APIC version.
1134 */
1135 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1136
1137 /**
1138 * Acquires the PDM lock.
1139 *
1140 * @returns VINF_SUCCESS on success.
1141 * @returns rc if we failed to acquire the lock.
1142 * @param pDevIns The APIC device instance.
1143 * @param rc What to return if we fail to acquire the lock.
1144 */
1145 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1146
1147 /**
1148 * Releases the PDM lock.
1149 *
1150 * @param pDevIns The APIC device instance.
1151 */
1152 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1153
1154 /**
1155 * Get the virtual CPU id corresponding to the current EMT.
1156 *
1157 * @param pDevIns The APIC device instance.
1158 */
1159 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1160
1161 /** Just a safety precaution. */
1162 uint32_t u32TheEnd;
1163} PDMAPICHLPRC;
1164/** Pointer to APIC GC helpers. */
1165typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1166/** Pointer to const APIC helpers. */
1167typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1168
1169/** Current PDMAPICHLPRC version number. */
1170#define PDM_APICHLPRC_VERSION 0x60010000
1171
1172
1173/**
1174 * APIC R0 helpers.
1175 */
1176typedef struct PDMAPICHLPR0
1177{
1178 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1179 uint32_t u32Version;
1180
1181 /**
1182 * Set the interrupt force action flag.
1183 *
1184 * @param pDevIns Device instance of the APIC.
1185 * @param idCpu Virtual CPU to set flag upon.
1186 */
1187 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1188
1189 /**
1190 * Clear the interrupt force action flag.
1191 *
1192 * @param pDevIns Device instance of the APIC.
1193 * @param idCpu Virtual CPU to clear flag upon.
1194 */
1195 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1196
1197 /**
1198 * Modifies APIC-related bits in the CPUID feature mask.
1199 *
1200 * @param pDevIns Device instance of the APIC.
1201 * @param enmVersion Supported APIC version.
1202 */
1203 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1204
1205 /**
1206 * Acquires the PDM lock.
1207 *
1208 * @returns VINF_SUCCESS on success.
1209 * @returns rc if we failed to acquire the lock.
1210 * @param pDevIns The APIC device instance.
1211 * @param rc What to return if we fail to acquire the lock.
1212 */
1213 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1214
1215 /**
1216 * Releases the PDM lock.
1217 *
1218 * @param pDevIns The APIC device instance.
1219 */
1220 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1221
1222 /**
1223 * Get the virtual CPU id corresponding to the current EMT.
1224 *
1225 * @param pDevIns The APIC device instance.
1226 */
1227 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1228
1229 /** Just a safety precaution. */
1230 uint32_t u32TheEnd;
1231} PDMAPICHLPR0;
1232/** Pointer to APIC GC helpers. */
1233typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1234/** Pointer to const APIC helpers. */
1235typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1236
1237/** Current PDMAPICHLPR0 version number. */
1238#define PDM_APICHLPR0_VERSION 0x60010000
1239
1240/**
1241 * APIC R3 helpers.
1242 */
1243typedef struct PDMAPICHLPR3
1244{
1245 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1246 uint32_t u32Version;
1247
1248 /**
1249 * Set the interrupt force action flag.
1250 *
1251 * @param pDevIns Device instance of the APIC.
1252 * @param idCpu Virtual CPU to set flag upon.
1253 */
1254 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1255
1256 /**
1257 * Clear the interrupt force action flag.
1258 *
1259 * @param pDevIns Device instance of the APIC.
1260 * @param idCpu Virtual CPU to clear flag upon.
1261 */
1262 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1263
1264 /**
1265 * Modifies APIC-related bits in the CPUID feature mask.
1266 *
1267 * @param pDevIns Device instance of the APIC.
1268 * @param enmVersion Supported APIC version.
1269 */
1270 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1271
1272 /**
1273 * Acquires the PDM lock.
1274 *
1275 * @returns VINF_SUCCESS on success.
1276 * @returns Fatal error on failure.
1277 * @param pDevIns The APIC device instance.
1278 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1279 */
1280 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1281
1282 /**
1283 * Releases the PDM lock.
1284 *
1285 * @param pDevIns The APIC device instance.
1286 */
1287 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1288
1289 /**
1290 * Get the virtual CPU id corresponding to the current EMT.
1291 *
1292 * @param pDevIns The APIC device instance.
1293 */
1294 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1295
1296 /**
1297 * Sends SIPI to given virtual CPU.
1298 *
1299 * @param pDevIns The APIC device instance.
1300 * @param idCpu Virtual CPU to perform SIPI on
1301 * @param iVector SIPI vector
1302 */
1303 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1304
1305 /**
1306 * Gets the address of the RC APIC helpers.
1307 *
1308 * This should be called at both construction and relocation time
1309 * to obtain the correct address of the RC helpers.
1310 *
1311 * @returns GC pointer to the APIC helpers.
1312 * @param pDevIns Device instance of the APIC.
1313 */
1314 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1315
1316 /**
1317 * Gets the address of the R0 APIC helpers.
1318 *
1319 * This should be called at both construction and relocation time
1320 * to obtain the correct address of the R0 helpers.
1321 *
1322 * @returns R0 pointer to the APIC helpers.
1323 * @param pDevIns Device instance of the APIC.
1324 */
1325 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1326
1327 /** Just a safety precaution. */
1328 uint32_t u32TheEnd;
1329} PDMAPICHLPR3;
1330/** Pointer to APIC helpers. */
1331typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1332/** Pointer to const APIC helpers. */
1333typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1334
1335/** Current PDMAPICHLP version number. */
1336#define PDM_APICHLPR3_VERSION 0xfd010000
1337
1338
1339/**
1340 * I/O APIC registration structure.
1341 */
1342typedef struct PDMIOAPICREG
1343{
1344 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1345 uint32_t u32Version;
1346
1347 /**
1348 * Set the an IRQ.
1349 *
1350 * @param pDevIns Device instance of the I/O APIC.
1351 * @param iIrq IRQ number to set.
1352 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1353 */
1354 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1355
1356 /** The name of the GC SetIrq entry point. */
1357 const char *pszSetIrqRC;
1358
1359 /** The name of the R0 SetIrq entry point. */
1360 const char *pszSetIrqR0;
1361} PDMIOAPICREG;
1362/** Pointer to an APIC registration structure. */
1363typedef PDMIOAPICREG *PPDMIOAPICREG;
1364
1365/** Current PDMAPICREG version number. */
1366#define PDM_IOAPICREG_VERSION 0x50010000
1367
1368
1369/**
1370 * IOAPIC RC helpers.
1371 */
1372typedef struct PDMIOAPICHLPRC
1373{
1374 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1375 uint32_t u32Version;
1376
1377 /**
1378 * Private interface between the IOAPIC and APIC.
1379 *
1380 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1381 *
1382 * @returns The current TPR.
1383 * @param pDevIns Device instance of the IOAPIC.
1384 * @param u8Dest See APIC implementation.
1385 * @param u8DestMode See APIC implementation.
1386 * @param u8DeliveryMode See APIC implementation.
1387 * @param iVector See APIC implementation.
1388 * @param u8Polarity See APIC implementation.
1389 * @param u8TriggerMode See APIC implementation.
1390 */
1391 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1392 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1393
1394 /**
1395 * Acquires the PDM lock.
1396 *
1397 * @returns VINF_SUCCESS on success.
1398 * @returns rc if we failed to acquire the lock.
1399 * @param pDevIns The IOAPIC device instance.
1400 * @param rc What to return if we fail to acquire the lock.
1401 */
1402 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1403
1404 /**
1405 * Releases the PDM lock.
1406 *
1407 * @param pDevIns The IOAPIC device instance.
1408 */
1409 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1410
1411 /** Just a safety precaution. */
1412 uint32_t u32TheEnd;
1413} PDMIOAPICHLPRC;
1414/** Pointer to IOAPIC RC helpers. */
1415typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1416/** Pointer to const IOAPIC helpers. */
1417typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1418
1419/** Current PDMIOAPICHLPRC version number. */
1420#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1421
1422
1423/**
1424 * IOAPIC R0 helpers.
1425 */
1426typedef struct PDMIOAPICHLPR0
1427{
1428 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1429 uint32_t u32Version;
1430
1431 /**
1432 * Private interface between the IOAPIC and APIC.
1433 *
1434 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1435 *
1436 * @returns The current TPR.
1437 * @param pDevIns Device instance of the IOAPIC.
1438 * @param u8Dest See APIC implementation.
1439 * @param u8DestMode See APIC implementation.
1440 * @param u8DeliveryMode See APIC implementation.
1441 * @param iVector See APIC implementation.
1442 * @param u8Polarity See APIC implementation.
1443 * @param u8TriggerMode See APIC implementation.
1444 */
1445 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1446 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1447
1448 /**
1449 * Acquires the PDM lock.
1450 *
1451 * @returns VINF_SUCCESS on success.
1452 * @returns rc if we failed to acquire the lock.
1453 * @param pDevIns The IOAPIC device instance.
1454 * @param rc What to return if we fail to acquire the lock.
1455 */
1456 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1457
1458 /**
1459 * Releases the PDM lock.
1460 *
1461 * @param pDevIns The IOAPIC device instance.
1462 */
1463 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1464
1465 /** Just a safety precaution. */
1466 uint32_t u32TheEnd;
1467} PDMIOAPICHLPR0;
1468/** Pointer to IOAPIC R0 helpers. */
1469typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1470/** Pointer to const IOAPIC helpers. */
1471typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1472
1473/** Current PDMIOAPICHLPR0 version number. */
1474#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1475
1476/**
1477 * IOAPIC R3 helpers.
1478 */
1479typedef struct PDMIOAPICHLPR3
1480{
1481 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1482 uint32_t u32Version;
1483
1484 /**
1485 * Private interface between the IOAPIC and APIC.
1486 *
1487 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1488 *
1489 * @returns The current TPR.
1490 * @param pDevIns Device instance of the IOAPIC.
1491 * @param u8Dest See APIC implementation.
1492 * @param u8DestMode See APIC implementation.
1493 * @param u8DeliveryMode See APIC implementation.
1494 * @param iVector See APIC implementation.
1495 * @param u8Polarity See APIC implementation.
1496 * @param u8TriggerMode See APIC implementation.
1497 */
1498 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1499 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1500
1501 /**
1502 * Acquires the PDM lock.
1503 *
1504 * @returns VINF_SUCCESS on success.
1505 * @returns Fatal error on failure.
1506 * @param pDevIns The IOAPIC device instance.
1507 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1508 */
1509 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1510
1511 /**
1512 * Releases the PDM lock.
1513 *
1514 * @param pDevIns The IOAPIC device instance.
1515 */
1516 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1517
1518 /**
1519 * Gets the address of the RC IOAPIC helpers.
1520 *
1521 * This should be called at both construction and relocation time
1522 * to obtain the correct address of the RC helpers.
1523 *
1524 * @returns RC pointer to the IOAPIC helpers.
1525 * @param pDevIns Device instance of the IOAPIC.
1526 */
1527 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1528
1529 /**
1530 * Gets the address of the R0 IOAPIC helpers.
1531 *
1532 * This should be called at both construction and relocation time
1533 * to obtain the correct address of the R0 helpers.
1534 *
1535 * @returns R0 pointer to the IOAPIC helpers.
1536 * @param pDevIns Device instance of the IOAPIC.
1537 */
1538 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1539
1540 /** Just a safety precaution. */
1541 uint32_t u32TheEnd;
1542} PDMIOAPICHLPR3;
1543/** Pointer to IOAPIC R3 helpers. */
1544typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1545/** Pointer to const IOAPIC helpers. */
1546typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1547
1548/** Current PDMIOAPICHLPR3 version number. */
1549#define PDM_IOAPICHLPR3_VERSION 0xff010000
1550
1551
1552
1553#ifdef IN_RING3
1554
1555/**
1556 * DMA Transfer Handler.
1557 *
1558 * @returns Number of bytes transferred.
1559 * @param pDevIns Device instance of the DMA.
1560 * @param pvUser User pointer.
1561 * @param uChannel Channel number.
1562 * @param off DMA position.
1563 * @param cb Block size.
1564 */
1565typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1566/** Pointer to a FNDMATRANSFERHANDLER(). */
1567typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1568
1569/**
1570 * DMA Controller registration structure.
1571 */
1572typedef struct PDMDMAREG
1573{
1574 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1575 uint32_t u32Version;
1576
1577 /**
1578 * Execute pending transfers.
1579 *
1580 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1581 * @param pDevIns Device instance of the DMAC.
1582 */
1583 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1584
1585 /**
1586 * Register transfer function for DMA channel.
1587 *
1588 * @param pDevIns Device instance of the DMAC.
1589 * @param uChannel Channel number.
1590 * @param pfnTransferHandler Device specific transfer function.
1591 * @param pvUSer User pointer to be passed to the callback.
1592 */
1593 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1594
1595 /**
1596 * Read memory
1597 *
1598 * @returns Number of bytes read.
1599 * @param pDevIns Device instance of the DMAC.
1600 * @param pvBuffer Pointer to target buffer.
1601 * @param off DMA position.
1602 * @param cbBlock Block size.
1603 */
1604 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1605
1606 /**
1607 * Write memory
1608 *
1609 * @returns Number of bytes written.
1610 * @param pDevIns Device instance of the DMAC.
1611 * @param pvBuffer Memory to write.
1612 * @param off DMA position.
1613 * @param cbBlock Block size.
1614 */
1615 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1616
1617 /**
1618 * Set the DREQ line.
1619 *
1620 * @param pDevIns Device instance of the DMAC.
1621 * @param uChannel Channel number.
1622 * @param uLevel Level of the line.
1623 */
1624 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1625
1626 /**
1627 * Get channel mode
1628 *
1629 * @returns Channel mode.
1630 * @param pDevIns Device instance of the DMAC.
1631 * @param uChannel Channel number.
1632 */
1633 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1634
1635} PDMDMACREG;
1636/** Pointer to a DMAC registration structure. */
1637typedef PDMDMACREG *PPDMDMACREG;
1638
1639/** Current PDMDMACREG version number. */
1640#define PDM_DMACREG_VERSION 0xf5010000
1641
1642
1643/**
1644 * DMA Controller device helpers.
1645 */
1646typedef struct PDMDMACHLP
1647{
1648 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1649 uint32_t u32Version;
1650
1651 /* to-be-defined */
1652
1653} PDMDMACHLP;
1654/** Pointer to DMAC helpers. */
1655typedef PDMDMACHLP *PPDMDMACHLP;
1656/** Pointer to const DMAC helpers. */
1657typedef const PDMDMACHLP *PCPDMDMACHLP;
1658
1659/** Current PDMDMACHLP version number. */
1660#define PDM_DMACHLP_VERSION 0xf6010000
1661
1662#endif /* IN_RING3 */
1663
1664
1665
1666/**
1667 * RTC registration structure.
1668 */
1669typedef struct PDMRTCREG
1670{
1671 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1672 uint32_t u32Version;
1673 uint32_t u32Alignment; /**< structure size alignment. */
1674
1675 /**
1676 * Write to a CMOS register and update the checksum if necessary.
1677 *
1678 * @returns VBox status code.
1679 * @param pDevIns Device instance of the RTC.
1680 * @param iReg The CMOS register index.
1681 * @param u8Value The CMOS register value.
1682 */
1683 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1684
1685 /**
1686 * Read a CMOS register.
1687 *
1688 * @returns VBox status code.
1689 * @param pDevIns Device instance of the RTC.
1690 * @param iReg The CMOS register index.
1691 * @param pu8Value Where to store the CMOS register value.
1692 */
1693 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1694
1695} PDMRTCREG;
1696/** Pointer to a RTC registration structure. */
1697typedef PDMRTCREG *PPDMRTCREG;
1698/** Pointer to a const RTC registration structure. */
1699typedef const PDMRTCREG *PCPDMRTCREG;
1700
1701/** Current PDMRTCREG version number. */
1702#define PDM_RTCREG_VERSION 0xfa010000
1703
1704
1705/**
1706 * RTC device helpers.
1707 */
1708typedef struct PDMRTCHLP
1709{
1710 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1711 uint32_t u32Version;
1712
1713 /* to-be-defined */
1714
1715} PDMRTCHLP;
1716/** Pointer to RTC helpers. */
1717typedef PDMRTCHLP *PPDMRTCHLP;
1718/** Pointer to const RTC helpers. */
1719typedef const PDMRTCHLP *PCPDMRTCHLP;
1720
1721/** Current PDMRTCHLP version number. */
1722#define PDM_RTCHLP_VERSION 0xf6010000
1723
1724
1725
1726#ifdef IN_RING3
1727
1728/**
1729 * PDM Device API.
1730 */
1731typedef struct PDMDEVHLPR3
1732{
1733 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1734 uint32_t u32Version;
1735
1736 /**
1737 * Register a number of I/O ports with a device.
1738 *
1739 * These callbacks are of course for the host context (HC).
1740 * Register HC handlers before guest context (GC) handlers! There must be a
1741 * HC handler for every GC handler!
1742 *
1743 * @returns VBox status.
1744 * @param pDevIns The device instance to register the ports with.
1745 * @param Port First port number in the range.
1746 * @param cPorts Number of ports to register.
1747 * @param pvUser User argument.
1748 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1749 * @param pfnIn Pointer to function which is gonna handle IN operations.
1750 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1751 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1752 * @param pszDesc Pointer to description string. This must not be freed.
1753 */
1754 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1755 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1756 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1757
1758 /**
1759 * Register a number of I/O ports with a device for GC.
1760 *
1761 * These callbacks are for the host context (GC).
1762 * Register host context (HC) handlers before guest context handlers! There must be a
1763 * HC handler for every GC handler!
1764 *
1765 * @returns VBox status.
1766 * @param pDevIns The device instance to register the ports with and which GC module
1767 * to resolve the names against.
1768 * @param Port First port number in the range.
1769 * @param cPorts Number of ports to register.
1770 * @param pvUser User argument.
1771 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1772 * @param pszIn Name of the GC function which is gonna handle IN operations.
1773 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1774 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1775 * @param pszDesc Pointer to description string. This must not be freed.
1776 */
1777 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1778 const char *pszOut, const char *pszIn,
1779 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1780
1781 /**
1782 * Register a number of I/O ports with a device.
1783 *
1784 * These callbacks are of course for the ring-0 host context (R0).
1785 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1786 *
1787 * @returns VBox status.
1788 * @param pDevIns The device instance to register the ports with.
1789 * @param Port First port number in the range.
1790 * @param cPorts Number of ports to register.
1791 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1792 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1793 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1794 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1795 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1796 * @param pszDesc Pointer to description string. This must not be freed.
1797 */
1798 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1799 const char *pszOut, const char *pszIn,
1800 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1801
1802 /**
1803 * Deregister I/O ports.
1804 *
1805 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1806 *
1807 * @returns VBox status.
1808 * @param pDevIns The device instance owning the ports.
1809 * @param Port First port number in the range.
1810 * @param cPorts Number of ports to deregister.
1811 */
1812 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1813
1814 /**
1815 * Register a Memory Mapped I/O (MMIO) region.
1816 *
1817 * These callbacks are of course for the host context (HC).
1818 * Register HC handlers before guest context (GC) handlers! There must be a
1819 * HC handler for every GC handler!
1820 *
1821 * @returns VBox status.
1822 * @param pDevIns The device instance to register the MMIO with.
1823 * @param GCPhysStart First physical address in the range.
1824 * @param cbRange The size of the range (in bytes).
1825 * @param pvUser User argument.
1826 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1827 * @param pfnRead Pointer to function which is gonna handle Read operations.
1828 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1829 * @param pszDesc Pointer to description string. This must not be freed.
1830 */
1831 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1832 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1833 const char *pszDesc));
1834
1835 /**
1836 * Register a Memory Mapped I/O (MMIO) region for GC.
1837 *
1838 * These callbacks are for the guest context (GC).
1839 * Register host context (HC) handlers before guest context handlers! There must be a
1840 * HC handler for every GC handler!
1841 *
1842 * @returns VBox status.
1843 * @param pDevIns The device instance to register the MMIO with.
1844 * @param GCPhysStart First physical address in the range.
1845 * @param cbRange The size of the range (in bytes).
1846 * @param pvUser User argument.
1847 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1848 * @param pszRead Name of the GC function which is gonna handle Read operations.
1849 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1850 * @param pszDesc Obsolete. NULL is fine.
1851 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1852 */
1853 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1854 const char *pszWrite, const char *pszRead, const char *pszFill,
1855 const char *pszDesc));
1856
1857 /**
1858 * Register a Memory Mapped I/O (MMIO) region for R0.
1859 *
1860 * These callbacks are for the ring-0 host context (R0).
1861 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1862 *
1863 * @returns VBox status.
1864 * @param pDevIns The device instance to register the MMIO with.
1865 * @param GCPhysStart First physical address in the range.
1866 * @param cbRange The size of the range (in bytes).
1867 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1868 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1869 * @param pszRead Name of the GC function which is gonna handle Read operations.
1870 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1871 * @param pszDesc Obsolete. NULL is fine.
1872 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1873 */
1874 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1875 const char *pszWrite, const char *pszRead, const char *pszFill,
1876 const char *pszDesc));
1877
1878 /**
1879 * Deregister a Memory Mapped I/O (MMIO) region.
1880 *
1881 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1882 *
1883 * @returns VBox status.
1884 * @param pDevIns The device instance owning the MMIO region(s).
1885 * @param GCPhysStart First physical address in the range.
1886 * @param cbRange The size of the range (in bytes).
1887 */
1888 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1889
1890 /**
1891 * Register a ROM (BIOS) region.
1892 *
1893 * It goes without saying that this is read-only memory. The memory region must be
1894 * in unassigned memory. I.e. from the top of the address space or on the PC in
1895 * the 0xa0000-0xfffff range.
1896 *
1897 * @returns VBox status.
1898 * @param pDevIns The device instance owning the ROM region.
1899 * @param GCPhysStart First physical address in the range.
1900 * Must be page aligned!
1901 * @param cbRange The size of the range (in bytes).
1902 * Must be page aligned!
1903 * @param pvBinary Pointer to the binary data backing the ROM image.
1904 * This must be cbRange bytes big.
1905 * It will be copied and doesn't have to stick around if fShadow is clear.
1906 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1907 * @param pszDesc Pointer to description string. This must not be freed.
1908 *
1909 * @remark There is no way to remove the rom, automatically on device cleanup or
1910 * manually from the device yet. At present I doubt we need such features...
1911 */
1912 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1913
1914 /**
1915 * Register a save state data unit.
1916 *
1917 * @returns VBox status.
1918 * @param pDevIns Device instance.
1919 * @param pszName Data unit name.
1920 * @param u32Instance The instance identifier of the data unit.
1921 * This must together with the name be unique.
1922 * @param u32Version Data layout version number.
1923 * @param cbGuess The approximate amount of data in the unit.
1924 * Only for progress indicators.
1925 * @param pfnSavePrep Prepare save callback, optional.
1926 * @param pfnSaveExec Execute save callback, optional.
1927 * @param pfnSaveDone Done save callback, optional.
1928 * @param pfnLoadPrep Prepare load callback, optional.
1929 * @param pfnLoadExec Execute load callback, optional.
1930 * @param pfnLoadDone Done load callback, optional.
1931 */
1932 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1933 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1934 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1935
1936 /**
1937 * Creates a timer.
1938 *
1939 * @returns VBox status.
1940 * @param pDevIns Device instance.
1941 * @param enmClock The clock to use on this timer.
1942 * @param pfnCallback Callback function.
1943 * @param pszDesc Pointer to description string which must stay around
1944 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1945 * @param ppTimer Where to store the timer on success.
1946 */
1947 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1948
1949 /**
1950 * Creates an external timer.
1951 *
1952 * @returns timer pointer
1953 * @param pDevIns Device instance.
1954 * @param enmClock The clock to use on this timer.
1955 * @param pfnCallback Callback function.
1956 * @param pvUser User pointer
1957 * @param pszDesc Pointer to description string which must stay around
1958 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1959 */
1960 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1961
1962 /**
1963 * Registers the device with the default PCI bus.
1964 *
1965 * @returns VBox status code.
1966 * @param pDevIns Device instance.
1967 * @param pPciDev The PCI device structure.
1968 * Any PCI enabled device must keep this in it's instance data!
1969 * Fill in the PCI data config before registration, please.
1970 * @remark This is the simple interface, a Ex interface will be created if
1971 * more features are needed later.
1972 */
1973 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1974
1975 /**
1976 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1977 *
1978 * @returns VBox status code.
1979 * @param pDevIns Device instance.
1980 * @param iRegion The region number.
1981 * @param cbRegion Size of the region.
1982 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1983 * @param pfnCallback Callback for doing the mapping.
1984 */
1985 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1986
1987 /**
1988 * Register PCI configuration space read/write callbacks.
1989 *
1990 * @param pDevIns Device instance.
1991 * @param pPciDev The PCI device structure.
1992 * If NULL the default PCI device for this device instance is used.
1993 * @param pfnRead Pointer to the user defined PCI config read function.
1994 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1995 * PCI config read function. This way, user can decide when (and if)
1996 * to call default PCI config read function. Can be NULL.
1997 * @param pfnWrite Pointer to the user defined PCI config write function.
1998 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1999 * PCI config write function. This way, user can decide when (and if)
2000 * to call default PCI config write function. Can be NULL.
2001 * @thread EMT
2002 */
2003 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2004 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2005
2006 /**
2007 * Set the IRQ for a PCI device.
2008 *
2009 * @param pDevIns Device instance.
2010 * @param iIrq IRQ number to set.
2011 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2012 * @thread Any thread, but will involve the emulation thread.
2013 */
2014 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2015
2016 /**
2017 * Set the IRQ for a PCI device, but don't wait for EMT to process
2018 * the request when not called from EMT.
2019 *
2020 * @param pDevIns Device instance.
2021 * @param iIrq IRQ number to set.
2022 * @param iLevel IRQ level.
2023 * @thread Any thread, but will involve the emulation thread.
2024 */
2025 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2026
2027 /**
2028 * Set ISA IRQ for a device.
2029 *
2030 * @param pDevIns Device instance.
2031 * @param iIrq IRQ number to set.
2032 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2033 * @thread Any thread, but will involve the emulation thread.
2034 */
2035 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2036
2037 /**
2038 * Set the ISA IRQ for a device, but don't wait for EMT to process
2039 * the request when not called from EMT.
2040 *
2041 * @param pDevIns Device instance.
2042 * @param iIrq IRQ number to set.
2043 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2044 * @thread Any thread, but will involve the emulation thread.
2045 */
2046 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2047
2048 /**
2049 * Attaches a driver (chain) to the device.
2050 *
2051 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2052 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2053 *
2054 * @returns VBox status code.
2055 * @param pDevIns Device instance.
2056 * @param iLun The logical unit to attach.
2057 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2058 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2059 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2060 * for the live of the device instance.
2061 */
2062 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2063
2064 /**
2065 * Allocate memory which is associated with current VM instance
2066 * and automatically freed on it's destruction.
2067 *
2068 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2069 * @param pDevIns Device instance.
2070 * @param cb Number of bytes to allocate.
2071 */
2072 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2073
2074 /**
2075 * Allocate memory which is associated with current VM instance
2076 * and automatically freed on it's destruction. The memory is ZEROed.
2077 *
2078 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2079 * @param pDevIns Device instance.
2080 * @param cb Number of bytes to allocate.
2081 */
2082 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2083
2084 /**
2085 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2086 *
2087 * @param pDevIns Device instance.
2088 * @param pv Pointer to the memory to free.
2089 */
2090 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2091
2092 /**
2093 * Set the VM error message
2094 *
2095 * @returns rc.
2096 * @param pDevIns Device instance.
2097 * @param rc VBox status code.
2098 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2099 * @param pszFormat Error message format string.
2100 * @param ... Error message arguments.
2101 */
2102 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2103
2104 /**
2105 * Set the VM error message
2106 *
2107 * @returns rc.
2108 * @param pDevIns Device instance.
2109 * @param rc VBox status code.
2110 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2111 * @param pszFormat Error message format string.
2112 * @param va Error message arguments.
2113 */
2114 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2115
2116 /**
2117 * Set the VM runtime error message
2118 *
2119 * @returns VBox status code.
2120 * @param pDevIns Device instance.
2121 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2122 * @param pszErrorId Error ID string.
2123 * @param pszFormat Error message format string.
2124 * @param ... Error message arguments.
2125 */
2126 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2127
2128 /**
2129 * Set the VM runtime error message
2130 *
2131 * @returns VBox status code.
2132 * @param pDevIns Device instance.
2133 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2134 * @param pszErrorId Error ID string.
2135 * @param pszFormat Error message format string.
2136 * @param va Error message arguments.
2137 */
2138 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2139
2140 /**
2141 * Assert that the current thread is the emulation thread.
2142 *
2143 * @returns True if correct.
2144 * @returns False if wrong.
2145 * @param pDevIns Device instance.
2146 * @param pszFile Filename of the assertion location.
2147 * @param iLine The linenumber of the assertion location.
2148 * @param pszFunction Function of the assertion location.
2149 */
2150 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2151
2152 /**
2153 * Assert that the current thread is NOT the emulation thread.
2154 *
2155 * @returns True if correct.
2156 * @returns False if wrong.
2157 * @param pDevIns Device instance.
2158 * @param pszFile Filename of the assertion location.
2159 * @param iLine The linenumber of the assertion location.
2160 * @param pszFunction Function of the assertion location.
2161 */
2162 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2163
2164 /**
2165 * Stops the VM and enters the debugger to look at the guest state.
2166 *
2167 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2168 * invoking this function directly.
2169 *
2170 * @returns VBox status code which must be passed up to the VMM.
2171 * @param pDevIns Device instance.
2172 * @param pszFile Filename of the assertion location.
2173 * @param iLine The linenumber of the assertion location.
2174 * @param pszFunction Function of the assertion location.
2175 * @param pszFormat Message. (optional)
2176 * @param args Message parameters.
2177 */
2178 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2179
2180 /**
2181 * Register a info handler with DBGF,
2182 *
2183 * @returns VBox status code.
2184 * @param pDevIns Device instance.
2185 * @param pszName The identifier of the info.
2186 * @param pszDesc The description of the info and any arguments
2187 * the handler may take.
2188 * @param pfnHandler The handler function to be called to display the
2189 * info.
2190 */
2191 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2192
2193 /**
2194 * Registers a statistics sample if statistics are enabled.
2195 *
2196 * @param pDevIns Device instance of the DMA.
2197 * @param pvSample Pointer to the sample.
2198 * @param enmType Sample type. This indicates what pvSample is
2199 * pointing at.
2200 * @param pszName Sample name. The name is on this form
2201 * "/<component>/<sample>". Further nesting is
2202 * possible.
2203 * @param enmUnit Sample unit.
2204 * @param pszDesc Sample description.
2205 */
2206 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2207
2208 /**
2209 * Same as pfnSTAMRegister except that the name is specified in a
2210 * RTStrPrintf like fashion.
2211 *
2212 * @returns VBox status.
2213 * @param pDevIns Device instance of the DMA.
2214 * @param pvSample Pointer to the sample.
2215 * @param enmType Sample type. This indicates what pvSample is
2216 * pointing at.
2217 * @param enmVisibility Visibility type specifying whether unused
2218 * statistics should be visible or not.
2219 * @param enmUnit Sample unit.
2220 * @param pszDesc Sample description.
2221 * @param pszName The sample name format string.
2222 * @param ... Arguments to the format string.
2223 */
2224 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2225 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2226
2227 /**
2228 * Same as pfnSTAMRegister except that the name is specified in a
2229 * RTStrPrintfV like fashion.
2230 *
2231 * @returns VBox status.
2232 * @param pDevIns Device instance of the DMA.
2233 * @param pvSample Pointer to the sample.
2234 * @param enmType Sample type. This indicates what pvSample is
2235 * pointing at.
2236 * @param enmVisibility Visibility type specifying whether unused
2237 * statistics should be visible or not.
2238 * @param enmUnit Sample unit.
2239 * @param pszDesc Sample description.
2240 * @param pszName The sample name format string.
2241 * @param args Arguments to the format string.
2242 */
2243 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2244 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2245
2246 /**
2247 * Register the RTC device.
2248 *
2249 * @returns VBox status code.
2250 * @param pDevIns Device instance.
2251 * @param pRtcReg Pointer to a RTC registration structure.
2252 * @param ppRtcHlp Where to store the pointer to the helper
2253 * functions.
2254 */
2255 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2256
2257 /**
2258 * Create a queue.
2259 *
2260 * @returns VBox status code.
2261 * @param pDevIns The device instance.
2262 * @param cbItem The size of a queue item.
2263 * @param cItems The number of items in the queue.
2264 * @param cMilliesInterval The number of milliseconds between polling the queue.
2265 * If 0 then the emulation thread will be notified whenever an item arrives.
2266 * @param pfnCallback The consumer function.
2267 * @param fGCEnabled Set if the queue should work in GC too.
2268 * @param ppQueue Where to store the queue handle on success.
2269 * @thread The emulation thread.
2270 */
2271 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2272 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2273
2274 /**
2275 * Initializes a PDM critical section.
2276 *
2277 * The PDM critical sections are derived from the IPRT critical sections, but
2278 * works in GC as well.
2279 *
2280 * @returns VBox status code.
2281 * @param pDevIns Device instance.
2282 * @param pCritSect Pointer to the critical section.
2283 * @param pszName The name of the critical section (for
2284 * statistics).
2285 */
2286 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2287
2288 /**
2289 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2290 *
2291 * @returns pTime.
2292 * @param pDevIns Device instance.
2293 * @param pTime Where to store the time.
2294 */
2295 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2296
2297 /**
2298 * Creates a PDM thread.
2299 *
2300 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2301 * resuming, and destroying the thread as the VM state changes.
2302 *
2303 * @returns VBox status code.
2304 * @param pDevIns The device instance.
2305 * @param ppThread Where to store the thread 'handle'.
2306 * @param pvUser The user argument to the thread function.
2307 * @param pfnThread The thread function.
2308 * @param pfnWakeup The wakup callback. This is called on the EMT
2309 * thread when a state change is pending.
2310 * @param cbStack See RTThreadCreate.
2311 * @param enmType See RTThreadCreate.
2312 * @param pszName See RTThreadCreate.
2313 */
2314 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2315 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2316
2317 /**
2318 * Convert a guest virtual address to a guest physical address.
2319 *
2320 * @returns VBox status code.
2321 * @param pDevIns Device instance.
2322 * @param GCPtr Guest virtual address.
2323 * @param pGCPhys Where to store the GC physical address
2324 * corresponding to GCPtr.
2325 * @thread The emulation thread.
2326 * @remark Careful with page boundraries.
2327 */
2328 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2329
2330 /**
2331 * Gets the VM state.
2332 *
2333 * @returns VM state.
2334 * @param pDevIns The device instance.
2335 * @thread Any thread (just keep in mind that it's volatile info).
2336 */
2337 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2338
2339 /** Space reserved for future members.
2340 * @{ */
2341 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2342 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2343 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2344 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2345 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2346 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2347 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2348 /** @} */
2349
2350
2351 /** API available to trusted devices only.
2352 *
2353 * These APIs are providing unrestricted access to the guest and the VM,
2354 * or they are interacting intimately with PDM.
2355 *
2356 * @{
2357 */
2358 /**
2359 * Gets the VM handle. Restricted API.
2360 *
2361 * @returns VM Handle.
2362 * @param pDevIns Device instance.
2363 */
2364 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2365
2366 /**
2367 * Register the PCI Bus.
2368 *
2369 * @returns VBox status code.
2370 * @param pDevIns Device instance.
2371 * @param pPciBusReg Pointer to PCI bus registration structure.
2372 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2373 * helpers.
2374 */
2375 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2376
2377 /**
2378 * Register the PIC device.
2379 *
2380 * @returns VBox status code.
2381 * @param pDevIns Device instance.
2382 * @param pPicReg Pointer to a PIC registration structure.
2383 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2384 * helpers.
2385 */
2386 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2387
2388 /**
2389 * Register the APIC device.
2390 *
2391 * @returns VBox status code.
2392 * @param pDevIns Device instance.
2393 * @param pApicReg Pointer to a APIC registration structure.
2394 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2395 */
2396 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2397
2398 /**
2399 * Register the I/O APIC device.
2400 *
2401 * @returns VBox status code.
2402 * @param pDevIns Device instance.
2403 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2404 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2405 * helpers.
2406 */
2407 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2408
2409 /**
2410 * Register the DMA device.
2411 *
2412 * @returns VBox status code.
2413 * @param pDevIns Device instance.
2414 * @param pDmacReg Pointer to a DMAC registration structure.
2415 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2416 */
2417 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2418
2419 /**
2420 * Read physical memory.
2421 *
2422 * @returns VINF_SUCCESS (for now).
2423 * @param pDevIns Device instance.
2424 * @param GCPhys Physical address start reading from.
2425 * @param pvBuf Where to put the read bits.
2426 * @param cbRead How many bytes to read.
2427 * @thread Any thread, but the call may involve the emulation thread.
2428 */
2429 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2430
2431 /**
2432 * Write to physical memory.
2433 *
2434 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2435 * @param pDevIns Device instance.
2436 * @param GCPhys Physical address to write to.
2437 * @param pvBuf What to write.
2438 * @param cbWrite How many bytes to write.
2439 * @thread Any thread, but the call may involve the emulation thread.
2440 */
2441 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2442
2443 /**
2444 * Requests the mapping of a guest page into ring-3.
2445 *
2446 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2447 * release it.
2448 *
2449 * This API will assume your intention is to write to the page, and will
2450 * therefore replace shared and zero pages. If you do not intend to modify the
2451 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2452 *
2453 * @returns VBox status code.
2454 * @retval VINF_SUCCESS on success.
2455 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2456 * backing or if the page has any active access handlers. The caller
2457 * must fall back on using PGMR3PhysWriteExternal.
2458 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2459 *
2460 * @param pVM The VM handle.
2461 * @param GCPhys The guest physical address of the page that
2462 * should be mapped.
2463 * @param fFlags Flags reserved for future use, MBZ.
2464 * @param ppv Where to store the address corresponding to
2465 * GCPhys.
2466 * @param pLock Where to store the lock information that
2467 * pfnPhysReleasePageMappingLock needs.
2468 *
2469 * @remark Avoid calling this API from within critical sections (other than the
2470 * PGM one) because of the deadlock risk when we have to delegating the
2471 * task to an EMT.
2472 * @thread Any.
2473 */
2474 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2475
2476 /**
2477 * Requests the mapping of a guest page into ring-3, external threads.
2478 *
2479 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2480 * release it.
2481 *
2482 * @returns VBox status code.
2483 * @retval VINF_SUCCESS on success.
2484 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2485 * backing or if the page as an active ALL access handler. The caller
2486 * must fall back on using PGMPhysRead.
2487 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2488 *
2489 * @param pDevIns Device instance.
2490 * @param GCPhys The guest physical address of the page that
2491 * should be mapped.
2492 * @param fFlags Flags reserved for future use, MBZ.
2493 * @param ppv Where to store the address corresponding to
2494 * GCPhys.
2495 * @param pLock Where to store the lock information that
2496 * pfnPhysReleasePageMappingLock needs.
2497 *
2498 * @remark Avoid calling this API from within critical sections.
2499 * @thread Any.
2500 */
2501 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2502
2503 /**
2504 * Release the mapping of a guest page.
2505 *
2506 * This is the counter part of pfnPhysGCPhys2CCPtr and
2507 * pfnPhysGCPhys2CCPtrReadOnly.
2508 *
2509 * @param pDevIns Device instance.
2510 * @param pLock The lock structure initialized by the mapping
2511 * function.
2512 */
2513 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2514
2515 /**
2516 * Read guest physical memory by virtual address.
2517 *
2518 * @param pDevIns Device instance.
2519 * @param pvDst Where to put the read bits.
2520 * @param GCVirtSrc Guest virtual address to start reading from.
2521 * @param cb How many bytes to read.
2522 * @thread The emulation thread.
2523 */
2524 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2525
2526 /**
2527 * Write to guest physical memory by virtual address.
2528 *
2529 * @param pDevIns Device instance.
2530 * @param GCVirtDst Guest virtual address to write to.
2531 * @param pvSrc What to write.
2532 * @param cb How many bytes to write.
2533 * @thread The emulation thread.
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2536
2537 /**
2538 * Checks if the Gate A20 is enabled or not.
2539 *
2540 * @returns true if A20 is enabled.
2541 * @returns false if A20 is disabled.
2542 * @param pDevIns Device instance.
2543 * @thread The emulation thread.
2544 */
2545 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2546
2547 /**
2548 * Enables or disables the Gate A20.
2549 *
2550 * @param pDevIns Device instance.
2551 * @param fEnable Set this flag to enable the Gate A20; clear it
2552 * to disable.
2553 * @thread The emulation thread.
2554 */
2555 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2556
2557 /**
2558 * Resets the VM.
2559 *
2560 * @returns The appropriate VBox status code to pass around on reset.
2561 * @param pDevIns Device instance.
2562 * @thread The emulation thread.
2563 */
2564 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2565
2566 /**
2567 * Suspends the VM.
2568 *
2569 * @returns The appropriate VBox status code to pass around on suspend.
2570 * @param pDevIns Device instance.
2571 * @thread The emulation thread.
2572 */
2573 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2574
2575 /**
2576 * Power off the VM.
2577 *
2578 * @returns The appropriate VBox status code to pass around on power off.
2579 * @param pDevIns Device instance.
2580 * @thread The emulation thread.
2581 */
2582 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2583
2584 /**
2585 * Register transfer function for DMA channel.
2586 *
2587 * @returns VBox status code.
2588 * @param pDevIns Device instance.
2589 * @param uChannel Channel number.
2590 * @param pfnTransferHandler Device specific transfer callback function.
2591 * @param pvUser User pointer to pass to the callback.
2592 * @thread EMT
2593 */
2594 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2595
2596 /**
2597 * Read memory.
2598 *
2599 * @returns VBox status code.
2600 * @param pDevIns Device instance.
2601 * @param uChannel Channel number.
2602 * @param pvBuffer Pointer to target buffer.
2603 * @param off DMA position.
2604 * @param cbBlock Block size.
2605 * @param pcbRead Where to store the number of bytes which was
2606 * read. optional.
2607 * @thread EMT
2608 */
2609 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2610
2611 /**
2612 * Write memory.
2613 *
2614 * @returns VBox status code.
2615 * @param pDevIns Device instance.
2616 * @param uChannel Channel number.
2617 * @param pvBuffer Memory to write.
2618 * @param off DMA position.
2619 * @param cbBlock Block size.
2620 * @param pcbWritten Where to store the number of bytes which was
2621 * written. optional.
2622 * @thread EMT
2623 */
2624 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2625
2626 /**
2627 * Set the DREQ line.
2628 *
2629 * @returns VBox status code.
2630 * @param pDevIns Device instance.
2631 * @param uChannel Channel number.
2632 * @param uLevel Level of the line.
2633 * @thread EMT
2634 */
2635 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2636
2637 /**
2638 * Get channel mode.
2639 *
2640 * @returns Channel mode. See specs.
2641 * @param pDevIns Device instance.
2642 * @param uChannel Channel number.
2643 * @thread EMT
2644 */
2645 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2646
2647 /**
2648 * Schedule DMA execution.
2649 *
2650 * @param pDevIns Device instance.
2651 * @thread Any thread.
2652 */
2653 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2654
2655 /**
2656 * Write CMOS value and update the checksum(s).
2657 *
2658 * @returns VBox status code.
2659 * @param pDevIns Device instance.
2660 * @param iReg The CMOS register index.
2661 * @param u8Value The CMOS register value.
2662 * @thread EMT
2663 */
2664 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2665
2666 /**
2667 * Read CMOS value.
2668 *
2669 * @returns VBox status code.
2670 * @param pDevIns Device instance.
2671 * @param iReg The CMOS register index.
2672 * @param pu8Value Where to store the CMOS register value.
2673 * @thread EMT
2674 */
2675 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2676
2677 /**
2678 * Get the specified CPUID leaf for the virtual CPU associated with the calling
2679 * thread.
2680 *
2681 * @param pDevIns Device instance.
2682 * @param iLeaf The CPUID leaf to get.
2683 * @param pEax Where to store the EAX value.
2684 * @param pEbx Where to store the EBX value.
2685 * @param pEcx Where to store the ECX value.
2686 * @param pEdx Where to store the EDX value.
2687 * @thread EMT.
2688 */
2689 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2690
2691 /**
2692 * Changes the protection of shadowed ROM mapping.
2693 *
2694 * This is intented for use by the system BIOS, chipset or device in question to
2695 * change the protection of shadowed ROM code after init and on reset.
2696 *
2697 * @param pDevIns Device instance.
2698 * @param GCPhysStart Where the mapping starts.
2699 * @param cbRange The size of the mapping.
2700 * @param enmProt The new protection type.
2701 */
2702 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2703
2704 /**
2705 * Allocate and register a MMIO2 region.
2706 *
2707 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2708 * RAM associated with a device. It is also non-shared memory with a
2709 * permanent ring-3 mapping and page backing (presently).
2710 *
2711 * @returns VBox status.
2712 * @param pDevIns The device instance.
2713 * @param iRegion The region number. Use the PCI region number as
2714 * this must be known to the PCI bus device too. If
2715 * it's not associated with the PCI device, then
2716 * any number up to UINT8_MAX is fine.
2717 * @param cb The size (in bytes) of the region.
2718 * @param fFlags Reserved for future use, must be zero.
2719 * @param ppv Where to store the address of the ring-3 mapping
2720 * of the memory.
2721 * @param pszDesc Pointer to description string. This must not be
2722 * freed.
2723 * @thread EMT.
2724 */
2725 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2726
2727 /**
2728 * Deregisters and frees a MMIO2 region.
2729 *
2730 * Any physical (and virtual) access handlers registered for the region must
2731 * be deregistered before calling this function.
2732 *
2733 * @returns VBox status code.
2734 * @param pDevIns The device instance.
2735 * @param iRegion The region number used during registration.
2736 * @thread EMT.
2737 */
2738 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2739
2740 /**
2741 * Maps a MMIO2 region into the physical memory space.
2742 *
2743 * A MMIO2 range may overlap with base memory if a lot of RAM
2744 * is configured for the VM, in which case we'll drop the base
2745 * memory pages. Presently we will make no attempt to preserve
2746 * anything that happens to be present in the base memory that
2747 * is replaced, this is of course incorrectly but it's too much
2748 * effort.
2749 *
2750 * @returns VBox status code.
2751 * @param pDevIns The device instance.
2752 * @param iRegion The region number used during registration.
2753 * @param GCPhys The physical address to map it at.
2754 * @thread EMT.
2755 */
2756 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2757
2758 /**
2759 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2760 *
2761 * @returns VBox status code.
2762 * @param pDevIns The device instance.
2763 * @param iRegion The region number used during registration.
2764 * @param GCPhys The physical address it's currently mapped at.
2765 * @thread EMT.
2766 */
2767 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2768
2769 /**
2770 * Maps a portion of an MMIO2 region into the hypervisor region.
2771 *
2772 * Callers of this API must never deregister the MMIO2 region before the
2773 * VM is powered off.
2774 *
2775 * @return VBox status code.
2776 * @param pDevIns The device owning the MMIO2 memory.
2777 * @param iRegion The region.
2778 * @param off The offset into the region. Will be rounded down
2779 * to closest page boundrary.
2780 * @param cb The number of bytes to map. Will be rounded up
2781 * to the closest page boundrary.
2782 * @param pszDesc Mapping description.
2783 * @param pRCPtr Where to store the RC address.
2784 */
2785 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2786 const char *pszDesc, PRTRCPTR pRCPtr));
2787
2788 /**
2789 * Maps a portion of an MMIO2 region into kernel space (host).
2790 *
2791 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2792 * or the VM is terminated.
2793 *
2794 * @return VBox status code.
2795 * @param pDevIns The device owning the MMIO2 memory.
2796 * @param iRegion The region.
2797 * @param off The offset into the region. Must be page
2798 * aligned.
2799 * @param cb The number of bytes to map. Must be page
2800 * aligned.
2801 * @param pszDesc Mapping description.
2802 * @param pR0Ptr Where to store the R0 address.
2803 */
2804 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2805 const char *pszDesc, PRTR0PTR pR0Ptr));
2806
2807 /**
2808 * Registers the VMM device heap
2809 *
2810 * @returns VBox status code.
2811 * @param pDevIns The device instance.
2812 * @param GCPhys The physical address.
2813 * @param pvHeap Ring 3 heap pointer.
2814 * @param cbSize Size of the heap.
2815 * @thread EMT.
2816 */
2817 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2818
2819 /**
2820 * Unregisters the VMM device heap
2821 *
2822 * @returns VBox status code.
2823 * @param pDevIns The device instance.
2824 * @param GCPhys The physical address.
2825 * @thread EMT.
2826 */
2827 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2828
2829 /**
2830 * Gets the VMCPU handle. Restricted API.
2831 *
2832 * @returns VMCPU Handle.
2833 * @param pDevIns Device instance.
2834 */
2835 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2836
2837 /** @} */
2838
2839 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2840 uint32_t u32TheEnd;
2841} PDMDEVHLPR3;
2842#endif /* !IN_RING3 */
2843/** Pointer to the R3 PDM Device API. */
2844typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2845/** Pointer to the R3 PDM Device API, const variant. */
2846typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2847
2848/** Current PDMDEVHLP version number. */
2849#define PDM_DEVHLP_VERSION 0xf2090000
2850
2851
2852/**
2853 * PDM Device API - RC Variant.
2854 */
2855typedef struct PDMDEVHLPRC
2856{
2857 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2858 uint32_t u32Version;
2859
2860 /**
2861 * Set the IRQ for a PCI device.
2862 *
2863 * @param pDevIns Device instance.
2864 * @param iIrq IRQ number to set.
2865 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2866 * @thread Any thread, but will involve the emulation thread.
2867 */
2868 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2869
2870 /**
2871 * Set ISA IRQ for a device.
2872 *
2873 * @param pDevIns Device instance.
2874 * @param iIrq IRQ number to set.
2875 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2876 * @thread Any thread, but will involve the emulation thread.
2877 */
2878 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2879
2880 /**
2881 * Read physical memory.
2882 *
2883 * @returns VINF_SUCCESS (for now).
2884 * @param pDevIns Device instance.
2885 * @param GCPhys Physical address start reading from.
2886 * @param pvBuf Where to put the read bits.
2887 * @param cbRead How many bytes to read.
2888 */
2889 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2890
2891 /**
2892 * Write to physical memory.
2893 *
2894 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2895 * @param pDevIns Device instance.
2896 * @param GCPhys Physical address to write to.
2897 * @param pvBuf What to write.
2898 * @param cbWrite How many bytes to write.
2899 */
2900 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2901
2902 /**
2903 * Checks if the Gate A20 is enabled or not.
2904 *
2905 * @returns true if A20 is enabled.
2906 * @returns false if A20 is disabled.
2907 * @param pDevIns Device instance.
2908 * @thread The emulation thread.
2909 */
2910 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2911
2912 /**
2913 * Set the VM error message
2914 *
2915 * @returns rc.
2916 * @param pDrvIns Driver instance.
2917 * @param rc VBox status code.
2918 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2919 * @param pszFormat Error message format string.
2920 * @param ... Error message arguments.
2921 */
2922 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2923
2924 /**
2925 * Set the VM error message
2926 *
2927 * @returns rc.
2928 * @param pDrvIns Driver instance.
2929 * @param rc VBox status code.
2930 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2931 * @param pszFormat Error message format string.
2932 * @param va Error message arguments.
2933 */
2934 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2935
2936 /**
2937 * Set the VM runtime error message
2938 *
2939 * @returns VBox status code.
2940 * @param pDevIns Device instance.
2941 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2942 * @param pszErrorId Error ID string.
2943 * @param pszFormat Error message format string.
2944 * @param ... Error message arguments.
2945 */
2946 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2947
2948 /**
2949 * Set the VM runtime error message
2950 *
2951 * @returns VBox status code.
2952 * @param pDevIns Device instance.
2953 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2954 * @param pszErrorId Error ID string.
2955 * @param pszFormat Error message format string.
2956 * @param va Error message arguments.
2957 */
2958 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2959
2960 /**
2961 * Set parameters for pending MMIO patch operation
2962 *
2963 * @returns VBox status code.
2964 * @param pDevIns Device instance.
2965 * @param GCPhys MMIO physical address
2966 * @param pCachedData GC pointer to cached data
2967 */
2968 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2969
2970 /**
2971 * Gets the VM handle. Restricted API.
2972 *
2973 * @returns VM Handle.
2974 * @param pDevIns Device instance.
2975 */
2976 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2977
2978 /**
2979 * Gets the VMCPU handle. Restricted API.
2980 *
2981 * @returns VMCPU Handle.
2982 * @param pDevIns Device instance.
2983 */
2984 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2985
2986 /** Just a safety precaution. */
2987 uint32_t u32TheEnd;
2988} PDMDEVHLPRC;
2989/** Pointer PDM Device RC API. */
2990typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2991/** Pointer PDM Device RC API. */
2992typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2993
2994/** Current PDMDEVHLP version number. */
2995#define PDM_DEVHLPRC_VERSION 0xfb020000
2996
2997
2998/**
2999 * PDM Device API - R0 Variant.
3000 */
3001typedef struct PDMDEVHLPR0
3002{
3003 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3004 uint32_t u32Version;
3005
3006 /**
3007 * Set the IRQ for a PCI device.
3008 *
3009 * @param pDevIns Device instance.
3010 * @param iIrq IRQ number to set.
3011 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3012 * @thread Any thread, but will involve the emulation thread.
3013 */
3014 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3015
3016 /**
3017 * Set ISA IRQ for a device.
3018 *
3019 * @param pDevIns Device instance.
3020 * @param iIrq IRQ number to set.
3021 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3022 * @thread Any thread, but will involve the emulation thread.
3023 */
3024 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3025
3026 /**
3027 * Read physical memory.
3028 *
3029 * @returns VINF_SUCCESS (for now).
3030 * @param pDevIns Device instance.
3031 * @param GCPhys Physical address start reading from.
3032 * @param pvBuf Where to put the read bits.
3033 * @param cbRead How many bytes to read.
3034 */
3035 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3036
3037 /**
3038 * Write to physical memory.
3039 *
3040 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3041 * @param pDevIns Device instance.
3042 * @param GCPhys Physical address to write to.
3043 * @param pvBuf What to write.
3044 * @param cbWrite How many bytes to write.
3045 */
3046 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3047
3048 /**
3049 * Checks if the Gate A20 is enabled or not.
3050 *
3051 * @returns true if A20 is enabled.
3052 * @returns false if A20 is disabled.
3053 * @param pDevIns Device instance.
3054 * @thread The emulation thread.
3055 */
3056 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3057
3058 /**
3059 * Set the VM error message
3060 *
3061 * @returns rc.
3062 * @param pDrvIns Driver instance.
3063 * @param rc VBox status code.
3064 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3065 * @param pszFormat Error message format string.
3066 * @param ... Error message arguments.
3067 */
3068 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3069
3070 /**
3071 * Set the VM error message
3072 *
3073 * @returns rc.
3074 * @param pDrvIns Driver instance.
3075 * @param rc VBox status code.
3076 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3077 * @param pszFormat Error message format string.
3078 * @param va Error message arguments.
3079 */
3080 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3081
3082 /**
3083 * Set the VM runtime error message
3084 *
3085 * @returns VBox status code.
3086 * @param pDevIns Device instance.
3087 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3088 * @param pszErrorId Error ID string.
3089 * @param pszFormat Error message format string.
3090 * @param ... Error message arguments.
3091 */
3092 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3093
3094 /**
3095 * Set the VM runtime error message
3096 *
3097 * @returns VBox status code.
3098 * @param pDevIns Device instance.
3099 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3100 * @param pszErrorId Error ID string.
3101 * @param pszFormat Error message format string.
3102 * @param va Error message arguments.
3103 */
3104 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3105
3106 /**
3107 * Set parameters for pending MMIO patch operation
3108 *
3109 * @returns rc.
3110 * @param pDevIns Device instance.
3111 * @param GCPhys MMIO physical address
3112 * @param pCachedData GC pointer to cached data
3113 */
3114 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3115
3116 /**
3117 * Gets the VM handle. Restricted API.
3118 *
3119 * @returns VM Handle.
3120 * @param pDevIns Device instance.
3121 */
3122 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3123
3124 /**
3125 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3126 *
3127 * @returns true = yes, false = no
3128 * @param pDevIns Device instance.
3129 */
3130 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3131
3132 /**
3133 * Gets the VMCPU handle. Restricted API.
3134 *
3135 * @returns VMCPU Handle.
3136 * @param pDevIns Device instance.
3137 */
3138 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3139
3140 /** Just a safety precaution. */
3141 uint32_t u32TheEnd;
3142} PDMDEVHLPR0;
3143/** Pointer PDM Device R0 API. */
3144typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3145/** Pointer PDM Device GC API. */
3146typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3147
3148/** Current PDMDEVHLP version number. */
3149#define PDM_DEVHLPR0_VERSION 0xfb030000
3150
3151
3152
3153/**
3154 * PDM Device Instance.
3155 */
3156typedef struct PDMDEVINS
3157{
3158 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3159 uint32_t u32Version;
3160 /** Device instance number. */
3161 RTUINT iInstance;
3162
3163 /** Pointer the GC PDM Device API. */
3164 PCPDMDEVHLPRC pDevHlpRC;
3165 /** Pointer to device instance data. */
3166 RTRCPTR pvInstanceDataRC;
3167
3168 /** Pointer the R0 PDM Device API. */
3169 PCPDMDEVHLPR0 pDevHlpR0;
3170 /** Pointer to device instance data (R0). */
3171 RTR0PTR pvInstanceDataR0;
3172
3173 /** Pointer the HC PDM Device API. */
3174 PCPDMDEVHLPR3 pDevHlpR3;
3175 /** Pointer to device instance data. */
3176 RTR3PTR pvInstanceDataR3;
3177
3178 /** Pointer to device registration structure. */
3179 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3180 /** Configuration handle. */
3181 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3182
3183 /** The base interface of the device.
3184 * The device constructor initializes this if it has any
3185 * device level interfaces to export. To obtain this interface
3186 * call PDMR3QueryDevice(). */
3187 PDMIBASE IBase;
3188 /** Align the internal data more naturally. */
3189 RTR3PTR R3PtrPadding;
3190
3191 /** Internal data. */
3192 union
3193 {
3194#ifdef PDMDEVINSINT_DECLARED
3195 PDMDEVINSINT s;
3196#endif
3197 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3198 } Internal;
3199
3200 /** Device instance data. The size of this area is defined
3201 * in the PDMDEVREG::cbInstanceData field. */
3202 char achInstanceData[8];
3203} PDMDEVINS;
3204
3205/** Current PDMDEVINS version number. */
3206#define PDM_DEVINS_VERSION 0xf3020000
3207
3208/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3209#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3210
3211
3212/** @def PDMDEV_ASSERT_EMT
3213 * Assert that the current thread is the emulation thread.
3214 */
3215#ifdef VBOX_STRICT
3216# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3217#else
3218# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3219#endif
3220
3221/** @def PDMDEV_ASSERT_OTHER
3222 * Assert that the current thread is NOT the emulation thread.
3223 */
3224#ifdef VBOX_STRICT
3225# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3226#else
3227# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3228#endif
3229
3230/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3231 * Assert that the current thread is owner of the VM lock.
3232 */
3233#ifdef VBOX_STRICT
3234# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3235#else
3236# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3237#endif
3238
3239/** @def PDMDEV_SET_ERROR
3240 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3241 */
3242#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3243 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3244
3245/** @def PDMDEV_SET_RUNTIME_ERROR
3246 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3247 */
3248#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3249 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3250
3251/** @def PDMDEVINS_2_RCPTR
3252 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3253 */
3254#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3255
3256/** @def PDMDEVINS_2_R3PTR
3257 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3258 */
3259#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3260
3261/** @def PDMDEVINS_2_R0PTR
3262 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3263 */
3264#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3265
3266
3267/**
3268 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3269 *
3270 * @returns VBox status code which must be passed up to the VMM.
3271 * @param pDevIns Device instance.
3272 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3273 * @param pszFormat Message. (optional)
3274 * @param ... Message parameters.
3275 */
3276DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3277{
3278#ifdef VBOX_STRICT
3279# ifdef IN_RING3
3280 int rc;
3281 va_list args;
3282 va_start(args, pszFormat);
3283 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3284 va_end(args);
3285 return rc;
3286# else
3287 return VINF_EM_DBG_STOP;
3288# endif
3289#else
3290 NOREF(pDevIns);
3291 NOREF(pszFile);
3292 NOREF(iLine);
3293 NOREF(pszFunction);
3294 NOREF(pszFormat);
3295 return VINF_SUCCESS;
3296#endif
3297}
3298
3299
3300#ifdef IN_RING3
3301/**
3302 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3303 */
3304DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3305 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3306 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3307{
3308 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3309}
3310
3311/**
3312 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3313 */
3314DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3315 const char *pszOut, const char *pszIn, const char *pszOutStr,
3316 const char *pszInStr, const char *pszDesc)
3317{
3318 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3319}
3320
3321/**
3322 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3323 */
3324DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3325 const char *pszOut, const char *pszIn, const char *pszOutStr,
3326 const char *pszInStr, const char *pszDesc)
3327{
3328 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3329}
3330
3331/**
3332 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3333 */
3334DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3335 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3336 const char *pszDesc)
3337{
3338 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3339}
3340
3341/**
3342 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3343 */
3344DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3345 const char *pszWrite, const char *pszRead, const char *pszFill)
3346{
3347 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3348}
3349
3350/**
3351 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3352 */
3353DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3354 const char *pszWrite, const char *pszRead, const char *pszFill)
3355{
3356 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3357}
3358
3359/**
3360 * @copydoc PDMDEVHLPR3::pfnROMRegister
3361 */
3362DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3363{
3364 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3365}
3366/**
3367 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3368 */
3369DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3370{
3371 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3372}
3373
3374/**
3375 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3376 */
3377DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3378{
3379 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3384 */
3385DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3386{
3387 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3388}
3389
3390/**
3391 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3392 */
3393DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3394{
3395 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3396}
3397
3398/**
3399 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3400 */
3401DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3402{
3403 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3404}
3405
3406/**
3407 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3408 */
3409DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3410 const char *pszDesc, PRTRCPTR pRCPtr)
3411{
3412 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3413}
3414
3415/**
3416 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3417 */
3418DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3419 const char *pszDesc, PRTR0PTR pR0Ptr)
3420{
3421 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3422}
3423
3424/**
3425 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3426 */
3427DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3428{
3429 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3430}
3431
3432/**
3433 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3434 */
3435DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3436{
3437 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3438}
3439
3440/**
3441 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3442 */
3443DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3444 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3445 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3446{
3447 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3448 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3449 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3450}
3451
3452/**
3453 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3454 */
3455DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3456{
3457 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3458}
3459
3460/**
3461 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3462 */
3463DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3464{
3465 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3466}
3467
3468/**
3469 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3470 */
3471DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3472{
3473 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3474}
3475
3476/**
3477 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3478 */
3479DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3480 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3481{
3482 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3483}
3484
3485/**
3486 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3487 */
3488DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3489{
3490 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3491}
3492
3493/**
3494 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3495 */
3496DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3497{
3498 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3499}
3500
3501/**
3502 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3503 */
3504DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3505{
3506 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3507}
3508
3509/**
3510 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3511 */
3512DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3513{
3514 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3515}
3516
3517/**
3518 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3519 */
3520DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3521{
3522 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3523}
3524
3525/**
3526 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3527 */
3528DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3529{
3530 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3531}
3532
3533/**
3534 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3535 */
3536DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3537 const char *pszDesc, const char *pszName, ...)
3538{
3539 va_list va;
3540 va_start(va, pszName);
3541 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3542 va_end(va);
3543}
3544
3545/**
3546 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3547 */
3548DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3549 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3550{
3551 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3552}
3553
3554/**
3555 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3556 */
3557DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3558{
3559 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3560}
3561
3562/**
3563 * @copydoc PDMDEVHLPR3::pfnUTCNow
3564 */
3565DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3566{
3567 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3568}
3569
3570/**
3571 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3572 */
3573DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3574{
3575 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3576}
3577
3578/**
3579 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3580 */
3581DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3582{
3583 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3584}
3585
3586/**
3587 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3588 */
3589DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3590{
3591 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3592}
3593
3594/**
3595 * @copydoc PDMDEVHLPR3::pfnVMState
3596 */
3597DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3598{
3599 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3600}
3601
3602/**
3603 * @copydoc PDMDEVHLPR3::pfnA20Set
3604 */
3605DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3606{
3607 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3608}
3609
3610/**
3611 * @copydoc PDMDEVHLPR3::pfnVMReset
3612 */
3613DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3614{
3615 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3616}
3617
3618/**
3619 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3620 */
3621DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3622{
3623 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3624}
3625
3626/**
3627 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3628 */
3629DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3630{
3631 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3632}
3633
3634/**
3635 * @copydoc PDMDEVHLPR3::pfnDMARegister
3636 */
3637DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3638{
3639 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3640}
3641
3642/**
3643 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3644 */
3645DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3646{
3647 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3648}
3649
3650/**
3651 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3652 */
3653DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3654{
3655 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3656}
3657
3658/**
3659 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3660 */
3661DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3662{
3663 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3664}
3665
3666/**
3667 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3668 */
3669DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3670{
3671 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3672}
3673
3674/**
3675 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3676 */
3677DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3678{
3679 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3680}
3681
3682/**
3683 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3684 */
3685DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3686{
3687 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3688}
3689
3690/**
3691 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3692 */
3693DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3694{
3695 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3696}
3697
3698/**
3699 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3700 */
3701DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3702{
3703 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3704}
3705
3706/**
3707 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3708 */
3709DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3710 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3711{
3712 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3713}
3714#endif /* IN_RING3 */
3715
3716
3717/**
3718 * @copydoc PDMDEVHLPR3::pfnGetVM
3719 */
3720DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3721{
3722 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3723}
3724
3725/**
3726 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
3727 */
3728DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
3729{
3730 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
3731}
3732
3733#ifdef IN_RING0
3734/**
3735 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3736 */
3737DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3738{
3739 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3740}
3741#endif
3742
3743/**
3744 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3745 */
3746DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3747{
3748 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3749}
3750
3751/**
3752 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3753 */
3754DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3755{
3756 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3757}
3758
3759/**
3760 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3761 */
3762DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3763{
3764 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3765}
3766
3767/**
3768 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3769 */
3770DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3771{
3772 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3773}
3774
3775/**
3776 * @copydoc PDMDEVHLPR3::pfnPhysRead
3777 */
3778DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3779{
3780 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3781}
3782
3783/**
3784 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3785 */
3786DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3787{
3788 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3789}
3790
3791#ifdef IN_RING3
3792
3793/**
3794 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3795 */
3796DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3797{
3798 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3799}
3800
3801/**
3802 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3803 */
3804DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3805{
3806 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3807}
3808
3809/**
3810 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3811 */
3812DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3813{
3814 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3815}
3816
3817#endif /* IN_RING3 */
3818
3819/**
3820 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3821 */
3822DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3823{
3824 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3825}
3826
3827/**
3828 * @copydoc PDMDEVHLPR3::pfnVMSetError
3829 */
3830DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3831{
3832 va_list va;
3833 va_start(va, pszFormat);
3834 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3835 va_end(va);
3836 return rc;
3837}
3838
3839/**
3840 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3841 */
3842DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3843{
3844 va_list va;
3845 int rc;
3846 va_start(va, pszFormat);
3847 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3848 va_end(va);
3849 return rc;
3850}
3851
3852
3853
3854/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3855typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3856
3857/**
3858 * Callbacks for VBoxDeviceRegister().
3859 */
3860typedef struct PDMDEVREGCB
3861{
3862 /** Interface version.
3863 * This is set to PDM_DEVREG_CB_VERSION. */
3864 uint32_t u32Version;
3865
3866 /**
3867 * Registers a device with the current VM instance.
3868 *
3869 * @returns VBox status code.
3870 * @param pCallbacks Pointer to the callback table.
3871 * @param pDevReg Pointer to the device registration record.
3872 * This data must be permanent and readonly.
3873 */
3874 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3875
3876 /**
3877 * Allocate memory which is associated with current VM instance
3878 * and automatically freed on it's destruction.
3879 *
3880 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3881 * @param pCallbacks Pointer to the callback table.
3882 * @param cb Number of bytes to allocate.
3883 */
3884 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3885} PDMDEVREGCB;
3886
3887/** Current version of the PDMDEVREGCB structure. */
3888#define PDM_DEVREG_CB_VERSION 0xf4010000
3889
3890
3891/**
3892 * The VBoxDevicesRegister callback function.
3893 *
3894 * PDM will invoke this function after loading a device module and letting
3895 * the module decide which devices to register and how to handle conflicts.
3896 *
3897 * @returns VBox status code.
3898 * @param pCallbacks Pointer to the callback table.
3899 * @param u32Version VBox version number.
3900 */
3901typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3902
3903/** @} */
3904
3905__END_DECLS
3906
3907#endif
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