VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 24642

Last change on this file since 24642 was 24125, checked in by vboxsync, 15 years ago

DevAPIC/PDM: Properly route PIC interrupts through local APIC (fixes double time interrupt delivery in some Linux kernels).

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File size: 151.3 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/pdmdevdrv.h>
39#include <VBox/iom.h>
40#include <VBox/tm.h>
41#include <VBox/ssm.h>
42#include <VBox/cfgm.h>
43#include <VBox/dbgf.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48RT_C_DECLS_BEGIN
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust it's state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 */
208typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
209/** Pointer to a FNPDMDEVDETACH() function. */
210typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
211
212/**
213 * Query the base interface of a logical unit.
214 *
215 * @returns VBOX status code.
216 * @param pDevIns The device instance.
217 * @param iLUN The logicial unit to query.
218 * @param ppBase Where to store the pointer to the base interface of the LUN.
219 */
220typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
221/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
222typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
223
224/**
225 * Init complete notification.
226 * This can be done to do communication with other devices and other
227 * initialization which requires everything to be in place.
228 *
229 * @returns VBOX status code.
230 * @param pDevIns The device instance.
231 */
232typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
233/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
234typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
235
236
237
238/** PDM Device Registration Structure,
239 * This structure is used when registering a device from
240 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
241 * the VM is terminated.
242 */
243typedef struct PDMDEVREG
244{
245 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
246 uint32_t u32Version;
247 /** Device name. */
248 char szDeviceName[32];
249 /** Name of the raw-mode context module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
251 char szRCMod[32];
252 /** Name of the ring-0 module (no path).
253 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
254 char szR0Mod[32];
255 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
256 * remain unchanged from registration till VM destruction. */
257 const char *pszDescription;
258
259 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
260 RTUINT fFlags;
261 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
262 RTUINT fClass;
263 /** Maximum number of instances (per VM). */
264 RTUINT cMaxInstances;
265 /** Size of the instance data. */
266 RTUINT cbInstance;
267
268 /** Construct instance - required. */
269 PFNPDMDEVCONSTRUCT pfnConstruct;
270 /** Destruct instance - optional. */
271 PFNPDMDEVDESTRUCT pfnDestruct;
272 /** Relocation command - optional. */
273 PFNPDMDEVRELOCATE pfnRelocate;
274 /** I/O Control interface - optional. */
275 PFNPDMDEVIOCTL pfnIOCtl;
276 /** Power on notification - optional. */
277 PFNPDMDEVPOWERON pfnPowerOn;
278 /** Reset notification - optional. */
279 PFNPDMDEVRESET pfnReset;
280 /** Suspend notification - optional. */
281 PFNPDMDEVSUSPEND pfnSuspend;
282 /** Resume notification - optional. */
283 PFNPDMDEVRESUME pfnResume;
284 /** Attach command - optional. */
285 PFNPDMDEVATTACH pfnAttach;
286 /** Detach notification - optional. */
287 PFNPDMDEVDETACH pfnDetach;
288 /** Query a LUN base interface - optional. */
289 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
290 /** Init complete notification - optional. */
291 PFNPDMDEVINITCOMPLETE pfnInitComplete;
292 /** Power off notification - optional. */
293 PFNPDMDEVPOWEROFF pfnPowerOff;
294 /** @todo */
295 PFNRT pfnSoftReset;
296 /** Initialization safty marker. */
297 uint32_t u32VersionEnd;
298} PDMDEVREG;
299/** Pointer to a PDM Device Structure. */
300typedef PDMDEVREG *PPDMDEVREG;
301/** Const pointer to a PDM Device Structure. */
302typedef PDMDEVREG const *PCPDMDEVREG;
303
304/** Current DEVREG version number. */
305#define PDM_DEVREG_VERSION 0xc0020000
306
307/** PDM Device Flags.
308 * @{ */
309/** This flag is used to indicate that the device has a RC component. */
310#define PDM_DEVREG_FLAGS_RC 0x00000001
311/** This flag is used to indicate that the device has a R0 component. */
312#define PDM_DEVREG_FLAGS_R0 0x00000002
313
314/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
315 * The bit count for the current host. */
316#if HC_ARCH_BITS == 32
317# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
318#elif HC_ARCH_BITS == 64
319# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
320#else
321# error Unsupported HC_ARCH_BITS value.
322#endif
323/** The host bit count mask. */
324#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
325
326/** The device support only 32-bit guests. */
327#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
328/** The device support only 64-bit guests. */
329#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
330/** The device support both 32-bit & 64-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
332/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
333 * The guest bit count for the current compilation. */
334#if GC_ARCH_BITS == 32
335# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
336#elif GC_ARCH_BITS == 64
337# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
338#else
339# error Unsupported GC_ARCH_BITS value.
340#endif
341/** The guest bit count mask. */
342#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
343
344/** A convenience. */
345#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
346
347/** Indicates that the devices support PAE36 on a 32-bit guest. */
348#define PDM_DEVREG_FLAGS_PAE36 0x00001000
349
350/** Indicates that the device needs to be notified before the drivers when suspending. */
351#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
352
353/** Indicates that the device needs to be notified before the drivers when powering off. */
354#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
355/** @} */
356
357
358/** PDM Device Classes.
359 * The order is important, lower bit earlier instantiation.
360 * @{ */
361/** Architecture device. */
362#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
363/** Architecture BIOS device. */
364#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
365/** PCI bus brigde. */
366#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
367/** ISA bus brigde. */
368#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
369/** Input device (mouse, keyboard, joystick, HID, ...). */
370#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
371/** Interrupt controller (PIC). */
372#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
373/** Interval controoler (PIT). */
374#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
375/** RTC/CMOS. */
376#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
377/** DMA controller. */
378#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
379/** VMM Device. */
380#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
381/** Graphics device, like VGA. */
382#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
383/** Storage controller device. */
384#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
385/** Network interface controller. */
386#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
387/** Audio. */
388#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
389/** USB HIC. */
390#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
391/** ACPI. */
392#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
393/** Serial controller device. */
394#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
395/** Parallel controller device */
396#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
397/** Misc devices (always last). */
398#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
399/** @} */
400
401
402/** @name IRQ Level for use with the *SetIrq APIs.
403 * @{
404 */
405/** Assert the IRQ (can assume value 1). */
406#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
407/** Deassert the IRQ (can assume value 0). */
408#define PDM_IRQ_LEVEL_LOW 0
409/** flip-flop - assert and then deassert it again immediately. */
410#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
411/** @} */
412
413
414/**
415 * PCI Bus registration structure.
416 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
417 */
418typedef struct PDMPCIBUSREG
419{
420 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
421 uint32_t u32Version;
422
423 /**
424 * Registers the device with the default PCI bus.
425 *
426 * @returns VBox status code.
427 * @param pDevIns Device instance of the PCI Bus.
428 * @param pPciDev The PCI device structure.
429 * Any PCI enabled device must keep this in it's instance data!
430 * Fill in the PCI data config before registration, please.
431 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
432 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
433 * If negative, the pci bus device will assign one.
434 */
435 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
436
437 /**
438 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
439 *
440 * @returns VBox status code.
441 * @param pDevIns Device instance of the PCI Bus.
442 * @param pPciDev The PCI device structure.
443 * @param iRegion The region number.
444 * @param cbRegion Size of the region.
445 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
446 * @param pfnCallback Callback for doing the mapping.
447 */
448 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
449
450 /**
451 * Register PCI configuration space read/write callbacks.
452 *
453 * @param pDevIns Device instance of the PCI Bus.
454 * @param pPciDev The PCI device structure.
455 * @param pfnRead Pointer to the user defined PCI config read function.
456 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
457 * PCI config read function. This way, user can decide when (and if)
458 * to call default PCI config read function. Can be NULL.
459 * @param pfnWrite Pointer to the user defined PCI config write function.
460 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
461 * PCI config write function. This way, user can decide when (and if)
462 * to call default PCI config write function. Can be NULL.
463 * @thread EMT
464 */
465 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
466 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
467
468 /**
469 * Set the IRQ for a PCI device.
470 *
471 * @param pDevIns Device instance of the PCI Bus.
472 * @param pPciDev The PCI device structure.
473 * @param iIrq IRQ number to set.
474 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
475 */
476 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
477
478 /**
479 * Saves a state of the PCI device.
480 *
481 * @returns VBox status code.
482 * @param pDevIns Device instance of the PCI Bus.
483 * @param pPciDev Pointer to PCI device.
484 * @param pSSMHandle The handle to save the state to.
485 */
486 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
487
488 /**
489 * Loads a saved PCI device state.
490 *
491 * @returns VBox status code.
492 * @param pDevIns Device instance of the PCI Bus.
493 * @param pPciDev Pointer to PCI device.
494 * @param pSSMHandle The handle to the saved state.
495 */
496 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
497
498 /**
499 * Called to perform the job of the bios.
500 * This is only called for the first PCI Bus - it is expected to
501 * service all the PCI buses.
502 *
503 * @returns VBox status.
504 * @param pDevIns Device instance of the first bus.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
507
508 /** The name of the SetIrq RC entry point. */
509 const char *pszSetIrqRC;
510
511 /** The name of the SetIrq R0 entry point. */
512 const char *pszSetIrqR0;
513
514} PDMPCIBUSREG;
515/** Pointer to a PCI bus registration structure. */
516typedef PDMPCIBUSREG *PPDMPCIBUSREG;
517
518/** Current PDMPCIBUSREG version number. */
519#define PDM_PCIBUSREG_VERSION 0xd0020000
520
521/**
522 * PCI Bus RC helpers.
523 */
524typedef struct PDMPCIHLPRC
525{
526 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
527 uint32_t u32Version;
528
529 /**
530 * Set an ISA IRQ.
531 *
532 * @param pDevIns PCI device instance.
533 * @param iIrq IRQ number to set.
534 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
535 * @thread EMT only.
536 */
537 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
538
539 /**
540 * Set an I/O-APIC IRQ.
541 *
542 * @param pDevIns PCI device instance.
543 * @param iIrq IRQ number to set.
544 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
545 * @thread EMT only.
546 */
547 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
548
549 /**
550 * Acquires the PDM lock.
551 *
552 * @returns VINF_SUCCESS on success.
553 * @returns rc if we failed to acquire the lock.
554 * @param pDevIns The PCI device instance.
555 * @param rc What to return if we fail to acquire the lock.
556 */
557 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
558
559 /**
560 * Releases the PDM lock.
561 *
562 * @param pDevIns The PCI device instance.
563 */
564 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
565
566 /** Just a safety precaution. */
567 uint32_t u32TheEnd;
568} PDMPCIHLPRC;
569/** Pointer to PCI helpers. */
570typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
571/** Pointer to const PCI helpers. */
572typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
573
574/** Current PDMPCIHLPR3 version number. */
575#define PDM_PCIHLPRC_VERSION 0xe1010000
576
577
578/**
579 * PCI Bus R0 helpers.
580 */
581typedef struct PDMPCIHLPR0
582{
583 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
584 uint32_t u32Version;
585
586 /**
587 * Set an ISA IRQ.
588 *
589 * @param pDevIns PCI device instance.
590 * @param iIrq IRQ number to set.
591 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
592 * @thread EMT only.
593 */
594 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
595
596 /**
597 * Set an I/O-APIC IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @thread EMT only.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
605
606 /**
607 * Acquires the PDM lock.
608 *
609 * @returns VINF_SUCCESS on success.
610 * @returns rc if we failed to acquire the lock.
611 * @param pDevIns The PCI device instance.
612 * @param rc What to return if we fail to acquire the lock.
613 */
614 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
615
616 /**
617 * Releases the PDM lock.
618 *
619 * @param pDevIns The PCI device instance.
620 */
621 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
622
623 /** Just a safety precaution. */
624 uint32_t u32TheEnd;
625} PDMPCIHLPR0;
626/** Pointer to PCI helpers. */
627typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
628/** Pointer to const PCI helpers. */
629typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
630
631/** Current PDMPCIHLPR0 version number. */
632#define PDM_PCIHLPR0_VERSION 0xe1010000
633
634/**
635 * PCI device helpers.
636 */
637typedef struct PDMPCIHLPR3
638{
639 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
640 uint32_t u32Version;
641
642 /**
643 * Set an ISA IRQ.
644 *
645 * @param pDevIns The PCI device instance.
646 * @param iIrq IRQ number to set.
647 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
648 * @thread EMT only.
649 */
650 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
651
652 /**
653 * Set an I/O-APIC IRQ.
654 *
655 * @param pDevIns The PCI device instance.
656 * @param iIrq IRQ number to set.
657 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
658 * @thread EMT only.
659 */
660 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
661
662 /**
663 * Checks if the given address is an MMIO2 base address or not.
664 *
665 * @returns true/false accordingly.
666 * @param pDevIns The PCI device instance.
667 * @param pOwner The owner of the memory, optional.
668 * @param GCPhys The address to check.
669 */
670 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
671
672 /**
673 * Gets the address of the RC PCI Bus helpers.
674 *
675 * This should be called at both construction and relocation time
676 * to obtain the correct address of the RC helpers.
677 *
678 * @returns RC pointer to the PCI Bus helpers.
679 * @param pDevIns Device instance of the PCI Bus.
680 * @thread EMT only.
681 */
682 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
683
684 /**
685 * Gets the address of the R0 PCI Bus helpers.
686 *
687 * This should be called at both construction and relocation time
688 * to obtain the correct address of the R0 helpers.
689 *
690 * @returns R0 pointer to the PCI Bus helpers.
691 * @param pDevIns Device instance of the PCI Bus.
692 * @thread EMT only.
693 */
694 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
695
696 /**
697 * Acquires the PDM lock.
698 *
699 * @returns VINF_SUCCESS on success.
700 * @returns Fatal error on failure.
701 * @param pDevIns The PCI device instance.
702 * @param rc Dummy for making the interface identical to the RC and R0 versions.
703 */
704 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
705
706 /**
707 * Releases the PDM lock.
708 *
709 * @param pDevIns The PCI device instance.
710 */
711 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
712
713 /** Just a safety precaution. */
714 uint32_t u32TheEnd;
715} PDMPCIHLPR3;
716/** Pointer to PCI helpers. */
717typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
718/** Pointer to const PCI helpers. */
719typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
720
721/** Current PDMPCIHLPR3 version number. */
722#define PDM_PCIHLPR3_VERSION 0xf1020000
723
724
725/**
726 * Programmable Interrupt Controller registration structure.
727 */
728typedef struct PDMPICREG
729{
730 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
731 uint32_t u32Version;
732
733 /**
734 * Set the an IRQ.
735 *
736 * @param pDevIns Device instance of the PIC.
737 * @param iIrq IRQ number to set.
738 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
739 */
740 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
741
742 /**
743 * Get a pending interrupt.
744 *
745 * @returns Pending interrupt number.
746 * @param pDevIns Device instance of the PIC.
747 */
748 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
749
750 /** The name of the RC SetIrq entry point. */
751 const char *pszSetIrqRC;
752 /** The name of the RC GetInterrupt entry point. */
753 const char *pszGetInterruptRC;
754
755 /** The name of the R0 SetIrq entry point. */
756 const char *pszSetIrqR0;
757 /** The name of the R0 GetInterrupt entry point. */
758 const char *pszGetInterruptR0;
759} PDMPICREG;
760/** Pointer to a PIC registration structure. */
761typedef PDMPICREG *PPDMPICREG;
762
763/** Current PDMPICREG version number. */
764#define PDM_PICREG_VERSION 0xe0020000
765
766/**
767 * PIC RC helpers.
768 */
769typedef struct PDMPICHLPRC
770{
771 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
772 uint32_t u32Version;
773
774 /**
775 * Set the interrupt force action flag.
776 *
777 * @param pDevIns Device instance of the PIC.
778 */
779 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
780
781 /**
782 * Clear the interrupt force action flag.
783 *
784 * @param pDevIns Device instance of the PIC.
785 */
786 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
787
788 /**
789 * Acquires the PDM lock.
790 *
791 * @returns VINF_SUCCESS on success.
792 * @returns rc if we failed to acquire the lock.
793 * @param pDevIns The PIC device instance.
794 * @param rc What to return if we fail to acquire the lock.
795 */
796 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
797
798 /**
799 * Releases the PDM lock.
800 *
801 * @param pDevIns The PIC device instance.
802 */
803 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
804
805 /** Just a safety precaution. */
806 uint32_t u32TheEnd;
807} PDMPICHLPRC;
808
809/** Pointer to PIC RC helpers. */
810typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
811/** Pointer to const PIC RC helpers. */
812typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
813
814/** Current PDMPICHLPRC version number. */
815#define PDM_PICHLPRC_VERSION 0xfc010000
816
817
818/**
819 * PIC R0 helpers.
820 */
821typedef struct PDMPICHLPR0
822{
823 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
824 uint32_t u32Version;
825
826 /**
827 * Set the interrupt force action flag.
828 *
829 * @param pDevIns Device instance of the PIC.
830 */
831 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
832
833 /**
834 * Clear the interrupt force action flag.
835 *
836 * @param pDevIns Device instance of the PIC.
837 */
838 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
839
840 /**
841 * Acquires the PDM lock.
842 *
843 * @returns VINF_SUCCESS on success.
844 * @returns rc if we failed to acquire the lock.
845 * @param pDevIns The PIC device instance.
846 * @param rc What to return if we fail to acquire the lock.
847 */
848 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
849
850 /**
851 * Releases the PDM lock.
852 *
853 * @param pDevIns The PCI device instance.
854 */
855 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
856
857 /** Just a safety precaution. */
858 uint32_t u32TheEnd;
859} PDMPICHLPR0;
860
861/** Pointer to PIC R0 helpers. */
862typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
863/** Pointer to const PIC R0 helpers. */
864typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
865
866/** Current PDMPICHLPR0 version number. */
867#define PDM_PICHLPR0_VERSION 0xfc010000
868
869/**
870 * PIC R3 helpers.
871 */
872typedef struct PDMPICHLPR3
873{
874 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
875 uint32_t u32Version;
876
877 /**
878 * Set the interrupt force action flag.
879 *
880 * @param pDevIns Device instance of the PIC.
881 */
882 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
883
884 /**
885 * Clear the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Acquires the PDM lock.
893 *
894 * @returns VINF_SUCCESS on success.
895 * @returns Fatal error on failure.
896 * @param pDevIns The PIC device instance.
897 * @param rc Dummy for making the interface identical to the RC and R0 versions.
898 */
899 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
900
901 /**
902 * Releases the PDM lock.
903 *
904 * @param pDevIns The PIC device instance.
905 */
906 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
907
908 /**
909 * Gets the address of the RC PIC helpers.
910 *
911 * This should be called at both construction and relocation time
912 * to obtain the correct address of the RC helpers.
913 *
914 * @returns RC pointer to the PIC helpers.
915 * @param pDevIns Device instance of the PIC.
916 */
917 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
918
919 /**
920 * Gets the address of the R0 PIC helpers.
921 *
922 * This should be called at both construction and relocation time
923 * to obtain the correct address of the R0 helpers.
924 *
925 * @returns R0 pointer to the PIC helpers.
926 * @param pDevIns Device instance of the PIC.
927 */
928 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
929
930 /** Just a safety precaution. */
931 uint32_t u32TheEnd;
932} PDMPICHLPR3;
933
934/** Pointer to PIC R3 helpers. */
935typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
936/** Pointer to const PIC R3 helpers. */
937typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
938
939/** Current PDMPICHLPR3 version number. */
940#define PDM_PICHLPR3_VERSION 0xf0010000
941
942
943
944/**
945 * Advanced Programmable Interrupt Controller registration structure.
946 */
947typedef struct PDMAPICREG
948{
949 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
950 uint32_t u32Version;
951
952 /**
953 * Get a pending interrupt.
954 *
955 * @returns Pending interrupt number.
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
959
960 /**
961 * Check if the APIC has a pending interrupt/if a TPR change would active one
962 *
963 * @returns Pending interrupt yes/no
964 * @param pDevIns Device instance of the APIC.
965 */
966 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
967
968 /**
969 * Set the APIC base.
970 *
971 * @param pDevIns Device instance of the APIC.
972 * @param u64Base The new base.
973 */
974 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
975
976 /**
977 * Get the APIC base.
978 *
979 * @returns Current base.
980 * @param pDevIns Device instance of the APIC.
981 */
982 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
983
984 /**
985 * Set the TPR (task priority register).
986 *
987 * @param pDevIns Device instance of the APIC.
988 * @param idCpu VCPU id
989 * @param u8TPR The new TPR.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
992
993 /**
994 * Get the TPR (task priority register).
995 *
996 * @returns The current TPR.
997 * @param pDevIns Device instance of the APIC.
998 * @param idCpu VCPU id
999 */
1000 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1001
1002 /**
1003 * Write MSR in APIC range.
1004 *
1005 * @returns VBox status code.
1006 * @param pDevIns Device instance of the APIC.
1007 * @param idCpu Target CPU.
1008 * @param u32Reg MSR to write.
1009 * @param u64Value Value to write.
1010 */
1011 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1012
1013 /**
1014 * Read MSR in APIC range.
1015 *
1016 * @returns VBox status code.
1017 * @param pDevIns Device instance of the APIC.
1018 * @param idCpu Target CPU.
1019 * @param u32Reg MSR to read.
1020 * @param pu64Value Value read.
1021 */
1022 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1023
1024 /**
1025 * Private interface between the IOAPIC and APIC.
1026 *
1027 * This is a low-level, APIC/IOAPIC implementation specific interface
1028 * which is registered with PDM only because it makes life so much
1029 * simpler right now (GC bits). This is a bad bad hack! The correct
1030 * way of doing this would involve some way of querying GC interfaces
1031 * and relocating them. Perhaps doing some kind of device init in GC...
1032 *
1033 * @returns status code.
1034 * @param pDevIns Device instance of the APIC.
1035 * @param u8Dest See APIC implementation.
1036 * @param u8DestMode See APIC implementation.
1037 * @param u8DeliveryMode See APIC implementation.
1038 * @param iVector See APIC implementation.
1039 * @param u8Polarity See APIC implementation.
1040 * @param u8TriggerMode See APIC implementation.
1041 */
1042 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1043 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1044
1045 /**
1046 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1047 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1048 *
1049 * @returns status code.
1050 * @param pDevIns Device instance of the APIC.
1051 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1052 */
1053 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1054
1055 /** The name of the RC GetInterrupt entry point. */
1056 const char *pszGetInterruptRC;
1057 /** The name of the RC HasPendingIrq entry point. */
1058 const char *pszHasPendingIrqRC;
1059 /** The name of the RC SetBase entry point. */
1060 const char *pszSetBaseRC;
1061 /** The name of the RC GetBase entry point. */
1062 const char *pszGetBaseRC;
1063 /** The name of the RC SetTPR entry point. */
1064 const char *pszSetTPRRC;
1065 /** The name of the RC GetTPR entry point. */
1066 const char *pszGetTPRRC;
1067 /** The name of the RC WriteMSR entry point. */
1068 const char *pszWriteMSRRC;
1069 /** The name of the RC ReadMSR entry point. */
1070 const char *pszReadMSRRC;
1071 /** The name of the RC BusDeliver entry point. */
1072 const char *pszBusDeliverRC;
1073 /** The name of the RC LocalInterrupt entry point. */
1074 const char *pszLocalInterruptRC;
1075
1076 /** The name of the R0 GetInterrupt entry point. */
1077 const char *pszGetInterruptR0;
1078 /** The name of the R0 HasPendingIrq entry point. */
1079 const char *pszHasPendingIrqR0;
1080 /** The name of the R0 SetBase entry point. */
1081 const char *pszSetBaseR0;
1082 /** The name of the R0 GetBase entry point. */
1083 const char *pszGetBaseR0;
1084 /** The name of the R0 SetTPR entry point. */
1085 const char *pszSetTPRR0;
1086 /** The name of the R0 GetTPR entry point. */
1087 const char *pszGetTPRR0;
1088 /** The name of the R0 WriteMSR entry point. */
1089 const char *pszWriteMSRR0;
1090 /** The name of the R0 ReadMSR entry point. */
1091 const char *pszReadMSRR0;
1092 /** The name of the R0 BusDeliver entry point. */
1093 const char *pszBusDeliverR0;
1094 /** The name of the R0 LocalInterrupt entry point. */
1095 const char *pszLocalInterruptR0;
1096
1097} PDMAPICREG;
1098/** Pointer to an APIC registration structure. */
1099typedef PDMAPICREG *PPDMAPICREG;
1100
1101/** Current PDMAPICREG version number. */
1102#define PDM_APICREG_VERSION 0x70010000
1103
1104
1105/**
1106 * APIC version argument for pfnChangeFeature.
1107 */
1108typedef enum PDMAPICVERSION
1109{
1110 /** Invalid 0 entry. */
1111 PDMAPICVERSION_INVALID = 0,
1112 /** No APIC. */
1113 PDMAPICVERSION_NONE,
1114 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1115 PDMAPICVERSION_APIC,
1116 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1117 PDMAPICVERSION_X2APIC,
1118 /** The usual 32-bit paranoia. */
1119 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1120} PDMAPICVERSION;
1121
1122/**
1123 * APIC irq argument for SetInterruptFF.
1124 */
1125typedef enum PDMAPICIRQ
1126{
1127 /** Invalid 0 entry. */
1128 PDMAPICIRQ_INVALID = 0,
1129 /** Normal hardware interrupt. */
1130 PDMAPICIRQ_HARDWARE,
1131 /** NMI. */
1132 PDMAPICIRQ_NMI,
1133 /** SMI. */
1134 PDMAPICIRQ_SMI,
1135 /** ExtINT (HW interrupt via PIC). */
1136 PDMAPICIRQ_EXTINT,
1137 /** The usual 32-bit paranoia. */
1138 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1139} PDMAPICIRQ;
1140
1141
1142/**
1143 * APIC RC helpers.
1144 */
1145typedef struct PDMAPICHLPRC
1146{
1147 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1148 uint32_t u32Version;
1149
1150 /**
1151 * Set the interrupt force action flag.
1152 *
1153 * @param pDevIns Device instance of the APIC.
1154 * @param enmType IRQ type.
1155 * @param idCpu Virtual CPU to set flag upon.
1156 */
1157 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1158
1159 /**
1160 * Clear the interrupt force action flag.
1161 *
1162 * @param pDevIns Device instance of the APIC.
1163 * @param enmType IRQ type.
1164 * @param idCpu Virtual CPU to clear flag upon.
1165 */
1166 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1167
1168 /**
1169 * Modifies APIC-related bits in the CPUID feature mask.
1170 *
1171 * @param pDevIns Device instance of the APIC.
1172 * @param enmVersion Supported APIC version.
1173 */
1174 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1175
1176 /**
1177 * Acquires the PDM lock.
1178 *
1179 * @returns VINF_SUCCESS on success.
1180 * @returns rc if we failed to acquire the lock.
1181 * @param pDevIns The APIC device instance.
1182 * @param rc What to return if we fail to acquire the lock.
1183 */
1184 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1185
1186 /**
1187 * Releases the PDM lock.
1188 *
1189 * @param pDevIns The APIC device instance.
1190 */
1191 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1192
1193 /**
1194 * Get the virtual CPU id corresponding to the current EMT.
1195 *
1196 * @param pDevIns The APIC device instance.
1197 */
1198 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1199
1200 /** Just a safety precaution. */
1201 uint32_t u32TheEnd;
1202} PDMAPICHLPRC;
1203/** Pointer to APIC GC helpers. */
1204typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1205/** Pointer to const APIC helpers. */
1206typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1207
1208/** Current PDMAPICHLPRC version number. */
1209#define PDM_APICHLPRC_VERSION 0x60020000
1210
1211
1212/**
1213 * APIC R0 helpers.
1214 */
1215typedef struct PDMAPICHLPR0
1216{
1217 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1218 uint32_t u32Version;
1219
1220 /**
1221 * Set the interrupt force action flag.
1222 *
1223 * @param pDevIns Device instance of the APIC.
1224 * @param enmType IRQ type.
1225 * @param idCpu Virtual CPU to set flag upon.
1226 */
1227 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1228
1229 /**
1230 * Clear the interrupt force action flag.
1231 *
1232 * @param pDevIns Device instance of the APIC.
1233 * @param enmType IRQ type.
1234 * @param idCpu Virtual CPU to clear flag upon.
1235 */
1236 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1237
1238 /**
1239 * Modifies APIC-related bits in the CPUID feature mask.
1240 *
1241 * @param pDevIns Device instance of the APIC.
1242 * @param enmVersion Supported APIC version.
1243 */
1244 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1245
1246 /**
1247 * Acquires the PDM lock.
1248 *
1249 * @returns VINF_SUCCESS on success.
1250 * @returns rc if we failed to acquire the lock.
1251 * @param pDevIns The APIC device instance.
1252 * @param rc What to return if we fail to acquire the lock.
1253 */
1254 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1255
1256 /**
1257 * Releases the PDM lock.
1258 *
1259 * @param pDevIns The APIC device instance.
1260 */
1261 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1262
1263 /**
1264 * Get the virtual CPU id corresponding to the current EMT.
1265 *
1266 * @param pDevIns The APIC device instance.
1267 */
1268 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1269
1270 /** Just a safety precaution. */
1271 uint32_t u32TheEnd;
1272} PDMAPICHLPR0;
1273/** Pointer to APIC GC helpers. */
1274typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1275/** Pointer to const APIC helpers. */
1276typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1277
1278/** Current PDMAPICHLPR0 version number. */
1279#define PDM_APICHLPR0_VERSION 0x60020000
1280
1281/**
1282 * APIC R3 helpers.
1283 */
1284typedef struct PDMAPICHLPR3
1285{
1286 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1287 uint32_t u32Version;
1288
1289 /**
1290 * Set the interrupt force action flag.
1291 *
1292 * @param pDevIns Device instance of the APIC.
1293 * @param enmType IRQ type.
1294 * @param idCpu Virtual CPU to set flag upon.
1295 */
1296 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1297
1298 /**
1299 * Clear the interrupt force action flag.
1300 *
1301 * @param pDevIns Device instance of the APIC.
1302 * @param enmType IRQ type.
1303 * @param idCpu Virtual CPU to clear flag upon.
1304 */
1305 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1306
1307 /**
1308 * Modifies APIC-related bits in the CPUID feature mask.
1309 *
1310 * @param pDevIns Device instance of the APIC.
1311 * @param enmVersion Supported APIC version.
1312 */
1313 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1314
1315 /**
1316 * Get the virtual CPU id corresponding to the current EMT.
1317 *
1318 * @param pDevIns The APIC device instance.
1319 */
1320 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1321
1322 /**
1323 * Sends SIPI to given virtual CPU.
1324 *
1325 * @param pDevIns The APIC device instance.
1326 * @param idCpu Virtual CPU to perform SIPI on
1327 * @param iVector SIPI vector
1328 */
1329 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1330
1331 /**
1332 * Sends init IPI to given virtual CPU, should result in reset and
1333 * halting till SIPI.
1334 *
1335 * @param pDevIns The APIC device instance.
1336 * @param idCpu Virtual CPU to perform SIPI on
1337 */
1338 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1339
1340 /**
1341 * Gets the address of the RC APIC helpers.
1342 *
1343 * This should be called at both construction and relocation time
1344 * to obtain the correct address of the RC helpers.
1345 *
1346 * @returns GC pointer to the APIC helpers.
1347 * @param pDevIns Device instance of the APIC.
1348 */
1349 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1350
1351 /**
1352 * Gets the address of the R0 APIC helpers.
1353 *
1354 * This should be called at both construction and relocation time
1355 * to obtain the correct address of the R0 helpers.
1356 *
1357 * @returns R0 pointer to the APIC helpers.
1358 * @param pDevIns Device instance of the APIC.
1359 */
1360 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1361
1362 /**
1363 * Get the critical section used to synchronize the PICs, PCI and stuff.
1364 *
1365 * @returns Ring-3 pointer to the critical section.
1366 * @param pDevIns The APIC device instance.
1367 */
1368 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1369
1370 /**
1371 * Get the critical section used to synchronize the PICs, PCI and stuff.
1372 *
1373 * @returns Raw-mode context pointer to the critical section.
1374 * @param pDevIns The APIC device instance.
1375 */
1376 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1377
1378 /**
1379 * Get the critical section used to synchronize the PICs, PCI and stuff.
1380 *
1381 * @returns Ring-0 pointer to the critical section.
1382 * @param pDevIns The APIC device instance.
1383 */
1384 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1385
1386 /** Just a safety precaution. */
1387 uint32_t u32TheEnd;
1388} PDMAPICHLPR3;
1389/** Pointer to APIC helpers. */
1390typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1391/** Pointer to const APIC helpers. */
1392typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1393
1394/** Current PDMAPICHLP version number. */
1395#define PDM_APICHLPR3_VERSION 0xfd030000
1396
1397
1398/**
1399 * I/O APIC registration structure.
1400 */
1401typedef struct PDMIOAPICREG
1402{
1403 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1404 uint32_t u32Version;
1405
1406 /**
1407 * Set the an IRQ.
1408 *
1409 * @param pDevIns Device instance of the I/O APIC.
1410 * @param iIrq IRQ number to set.
1411 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1412 */
1413 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1414
1415 /** The name of the GC SetIrq entry point. */
1416 const char *pszSetIrqRC;
1417
1418 /** The name of the R0 SetIrq entry point. */
1419 const char *pszSetIrqR0;
1420} PDMIOAPICREG;
1421/** Pointer to an APIC registration structure. */
1422typedef PDMIOAPICREG *PPDMIOAPICREG;
1423
1424/** Current PDMAPICREG version number. */
1425#define PDM_IOAPICREG_VERSION 0x50010000
1426
1427
1428/**
1429 * IOAPIC RC helpers.
1430 */
1431typedef struct PDMIOAPICHLPRC
1432{
1433 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1434 uint32_t u32Version;
1435
1436 /**
1437 * Private interface between the IOAPIC and APIC.
1438 *
1439 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1440 *
1441 * @returns status code.
1442 * @param pDevIns Device instance of the IOAPIC.
1443 * @param u8Dest See APIC implementation.
1444 * @param u8DestMode See APIC implementation.
1445 * @param u8DeliveryMode See APIC implementation.
1446 * @param iVector See APIC implementation.
1447 * @param u8Polarity See APIC implementation.
1448 * @param u8TriggerMode See APIC implementation.
1449 */
1450 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1451 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1452
1453 /**
1454 * Acquires the PDM lock.
1455 *
1456 * @returns VINF_SUCCESS on success.
1457 * @returns rc if we failed to acquire the lock.
1458 * @param pDevIns The IOAPIC device instance.
1459 * @param rc What to return if we fail to acquire the lock.
1460 */
1461 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1462
1463 /**
1464 * Releases the PDM lock.
1465 *
1466 * @param pDevIns The IOAPIC device instance.
1467 */
1468 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1469
1470 /** Just a safety precaution. */
1471 uint32_t u32TheEnd;
1472} PDMIOAPICHLPRC;
1473/** Pointer to IOAPIC RC helpers. */
1474typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1475/** Pointer to const IOAPIC helpers. */
1476typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1477
1478/** Current PDMIOAPICHLPRC version number. */
1479#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1480
1481
1482/**
1483 * IOAPIC R0 helpers.
1484 */
1485typedef struct PDMIOAPICHLPR0
1486{
1487 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1488 uint32_t u32Version;
1489
1490 /**
1491 * Private interface between the IOAPIC and APIC.
1492 *
1493 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1494 *
1495 * @returns status code.
1496 * @param pDevIns Device instance of the IOAPIC.
1497 * @param u8Dest See APIC implementation.
1498 * @param u8DestMode See APIC implementation.
1499 * @param u8DeliveryMode See APIC implementation.
1500 * @param iVector See APIC implementation.
1501 * @param u8Polarity See APIC implementation.
1502 * @param u8TriggerMode See APIC implementation.
1503 */
1504 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1505 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1506
1507 /**
1508 * Acquires the PDM lock.
1509 *
1510 * @returns VINF_SUCCESS on success.
1511 * @returns rc if we failed to acquire the lock.
1512 * @param pDevIns The IOAPIC device instance.
1513 * @param rc What to return if we fail to acquire the lock.
1514 */
1515 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1516
1517 /**
1518 * Releases the PDM lock.
1519 *
1520 * @param pDevIns The IOAPIC device instance.
1521 */
1522 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1523
1524 /** Just a safety precaution. */
1525 uint32_t u32TheEnd;
1526} PDMIOAPICHLPR0;
1527/** Pointer to IOAPIC R0 helpers. */
1528typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1529/** Pointer to const IOAPIC helpers. */
1530typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1531
1532/** Current PDMIOAPICHLPR0 version number. */
1533#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1534
1535/**
1536 * IOAPIC R3 helpers.
1537 */
1538typedef struct PDMIOAPICHLPR3
1539{
1540 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1541 uint32_t u32Version;
1542
1543 /**
1544 * Private interface between the IOAPIC and APIC.
1545 *
1546 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1547 *
1548 * @returns status code
1549 * @param pDevIns Device instance of the IOAPIC.
1550 * @param u8Dest See APIC implementation.
1551 * @param u8DestMode See APIC implementation.
1552 * @param u8DeliveryMode See APIC implementation.
1553 * @param iVector See APIC implementation.
1554 * @param u8Polarity See APIC implementation.
1555 * @param u8TriggerMode See APIC implementation.
1556 */
1557 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1558 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1559
1560 /**
1561 * Acquires the PDM lock.
1562 *
1563 * @returns VINF_SUCCESS on success.
1564 * @returns Fatal error on failure.
1565 * @param pDevIns The IOAPIC device instance.
1566 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1567 */
1568 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1569
1570 /**
1571 * Releases the PDM lock.
1572 *
1573 * @param pDevIns The IOAPIC device instance.
1574 */
1575 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1576
1577 /**
1578 * Gets the address of the RC IOAPIC helpers.
1579 *
1580 * This should be called at both construction and relocation time
1581 * to obtain the correct address of the RC helpers.
1582 *
1583 * @returns RC pointer to the IOAPIC helpers.
1584 * @param pDevIns Device instance of the IOAPIC.
1585 */
1586 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1587
1588 /**
1589 * Gets the address of the R0 IOAPIC helpers.
1590 *
1591 * This should be called at both construction and relocation time
1592 * to obtain the correct address of the R0 helpers.
1593 *
1594 * @returns R0 pointer to the IOAPIC helpers.
1595 * @param pDevIns Device instance of the IOAPIC.
1596 */
1597 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1598
1599 /** Just a safety precaution. */
1600 uint32_t u32TheEnd;
1601} PDMIOAPICHLPR3;
1602/** Pointer to IOAPIC R3 helpers. */
1603typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1604/** Pointer to const IOAPIC helpers. */
1605typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1606
1607/** Current PDMIOAPICHLPR3 version number. */
1608#define PDM_IOAPICHLPR3_VERSION 0xff010000
1609
1610
1611
1612#ifdef IN_RING3
1613
1614/**
1615 * DMA Transfer Handler.
1616 *
1617 * @returns Number of bytes transferred.
1618 * @param pDevIns Device instance of the DMA.
1619 * @param pvUser User pointer.
1620 * @param uChannel Channel number.
1621 * @param off DMA position.
1622 * @param cb Block size.
1623 */
1624typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1625/** Pointer to a FNDMATRANSFERHANDLER(). */
1626typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1627
1628/**
1629 * DMA Controller registration structure.
1630 */
1631typedef struct PDMDMAREG
1632{
1633 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1634 uint32_t u32Version;
1635
1636 /**
1637 * Execute pending transfers.
1638 *
1639 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1640 * @param pDevIns Device instance of the DMAC.
1641 */
1642 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1643
1644 /**
1645 * Register transfer function for DMA channel.
1646 *
1647 * @param pDevIns Device instance of the DMAC.
1648 * @param uChannel Channel number.
1649 * @param pfnTransferHandler Device specific transfer function.
1650 * @param pvUSer User pointer to be passed to the callback.
1651 */
1652 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1653
1654 /**
1655 * Read memory
1656 *
1657 * @returns Number of bytes read.
1658 * @param pDevIns Device instance of the DMAC.
1659 * @param pvBuffer Pointer to target buffer.
1660 * @param off DMA position.
1661 * @param cbBlock Block size.
1662 */
1663 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1664
1665 /**
1666 * Write memory
1667 *
1668 * @returns Number of bytes written.
1669 * @param pDevIns Device instance of the DMAC.
1670 * @param pvBuffer Memory to write.
1671 * @param off DMA position.
1672 * @param cbBlock Block size.
1673 */
1674 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1675
1676 /**
1677 * Set the DREQ line.
1678 *
1679 * @param pDevIns Device instance of the DMAC.
1680 * @param uChannel Channel number.
1681 * @param uLevel Level of the line.
1682 */
1683 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1684
1685 /**
1686 * Get channel mode
1687 *
1688 * @returns Channel mode.
1689 * @param pDevIns Device instance of the DMAC.
1690 * @param uChannel Channel number.
1691 */
1692 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1693
1694} PDMDMACREG;
1695/** Pointer to a DMAC registration structure. */
1696typedef PDMDMACREG *PPDMDMACREG;
1697
1698/** Current PDMDMACREG version number. */
1699#define PDM_DMACREG_VERSION 0xf5010000
1700
1701
1702/**
1703 * DMA Controller device helpers.
1704 */
1705typedef struct PDMDMACHLP
1706{
1707 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1708 uint32_t u32Version;
1709
1710 /* to-be-defined */
1711
1712} PDMDMACHLP;
1713/** Pointer to DMAC helpers. */
1714typedef PDMDMACHLP *PPDMDMACHLP;
1715/** Pointer to const DMAC helpers. */
1716typedef const PDMDMACHLP *PCPDMDMACHLP;
1717
1718/** Current PDMDMACHLP version number. */
1719#define PDM_DMACHLP_VERSION 0xf6010000
1720
1721#endif /* IN_RING3 */
1722
1723
1724
1725/**
1726 * RTC registration structure.
1727 */
1728typedef struct PDMRTCREG
1729{
1730 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1731 uint32_t u32Version;
1732 uint32_t u32Alignment; /**< structure size alignment. */
1733
1734 /**
1735 * Write to a CMOS register and update the checksum if necessary.
1736 *
1737 * @returns VBox status code.
1738 * @param pDevIns Device instance of the RTC.
1739 * @param iReg The CMOS register index.
1740 * @param u8Value The CMOS register value.
1741 */
1742 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1743
1744 /**
1745 * Read a CMOS register.
1746 *
1747 * @returns VBox status code.
1748 * @param pDevIns Device instance of the RTC.
1749 * @param iReg The CMOS register index.
1750 * @param pu8Value Where to store the CMOS register value.
1751 */
1752 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1753
1754} PDMRTCREG;
1755/** Pointer to a RTC registration structure. */
1756typedef PDMRTCREG *PPDMRTCREG;
1757/** Pointer to a const RTC registration structure. */
1758typedef const PDMRTCREG *PCPDMRTCREG;
1759
1760/** Current PDMRTCREG version number. */
1761#define PDM_RTCREG_VERSION 0xfa010000
1762
1763
1764/**
1765 * RTC device helpers.
1766 */
1767typedef struct PDMRTCHLP
1768{
1769 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1770 uint32_t u32Version;
1771
1772 /* to-be-defined */
1773
1774} PDMRTCHLP;
1775/** Pointer to RTC helpers. */
1776typedef PDMRTCHLP *PPDMRTCHLP;
1777/** Pointer to const RTC helpers. */
1778typedef const PDMRTCHLP *PCPDMRTCHLP;
1779
1780/** Current PDMRTCHLP version number. */
1781#define PDM_RTCHLP_VERSION 0xf6010000
1782
1783
1784
1785#ifdef IN_RING3
1786
1787/**
1788 * PDM Device API.
1789 */
1790typedef struct PDMDEVHLPR3
1791{
1792 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1793 uint32_t u32Version;
1794
1795 /**
1796 * Register a number of I/O ports with a device.
1797 *
1798 * These callbacks are of course for the host context (HC).
1799 * Register HC handlers before guest context (GC) handlers! There must be a
1800 * HC handler for every GC handler!
1801 *
1802 * @returns VBox status.
1803 * @param pDevIns The device instance to register the ports with.
1804 * @param Port First port number in the range.
1805 * @param cPorts Number of ports to register.
1806 * @param pvUser User argument.
1807 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1808 * @param pfnIn Pointer to function which is gonna handle IN operations.
1809 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1810 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1811 * @param pszDesc Pointer to description string. This must not be freed.
1812 */
1813 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1814 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1815 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1816
1817 /**
1818 * Register a number of I/O ports with a device for GC.
1819 *
1820 * These callbacks are for the host context (GC).
1821 * Register host context (HC) handlers before guest context handlers! There must be a
1822 * HC handler for every GC handler!
1823 *
1824 * @returns VBox status.
1825 * @param pDevIns The device instance to register the ports with and which GC module
1826 * to resolve the names against.
1827 * @param Port First port number in the range.
1828 * @param cPorts Number of ports to register.
1829 * @param pvUser User argument.
1830 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1831 * @param pszIn Name of the GC function which is gonna handle IN operations.
1832 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1833 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1834 * @param pszDesc Pointer to description string. This must not be freed.
1835 */
1836 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1837 const char *pszOut, const char *pszIn,
1838 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1839
1840 /**
1841 * Register a number of I/O ports with a device.
1842 *
1843 * These callbacks are of course for the ring-0 host context (R0).
1844 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1845 *
1846 * @returns VBox status.
1847 * @param pDevIns The device instance to register the ports with.
1848 * @param Port First port number in the range.
1849 * @param cPorts Number of ports to register.
1850 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1851 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1852 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1853 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1854 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1855 * @param pszDesc Pointer to description string. This must not be freed.
1856 */
1857 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1858 const char *pszOut, const char *pszIn,
1859 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1860
1861 /**
1862 * Deregister I/O ports.
1863 *
1864 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1865 *
1866 * @returns VBox status.
1867 * @param pDevIns The device instance owning the ports.
1868 * @param Port First port number in the range.
1869 * @param cPorts Number of ports to deregister.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1872
1873 /**
1874 * Register a Memory Mapped I/O (MMIO) region.
1875 *
1876 * These callbacks are of course for the host context (HC).
1877 * Register HC handlers before guest context (GC) handlers! There must be a
1878 * HC handler for every GC handler!
1879 *
1880 * @returns VBox status.
1881 * @param pDevIns The device instance to register the MMIO with.
1882 * @param GCPhysStart First physical address in the range.
1883 * @param cbRange The size of the range (in bytes).
1884 * @param pvUser User argument.
1885 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1886 * @param pfnRead Pointer to function which is gonna handle Read operations.
1887 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1888 * @param pszDesc Pointer to description string. This must not be freed.
1889 */
1890 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1891 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1892 const char *pszDesc));
1893
1894 /**
1895 * Register a Memory Mapped I/O (MMIO) region for GC.
1896 *
1897 * These callbacks are for the guest context (GC).
1898 * Register host context (HC) handlers before guest context handlers! There must be a
1899 * HC handler for every GC handler!
1900 *
1901 * @returns VBox status.
1902 * @param pDevIns The device instance to register the MMIO with.
1903 * @param GCPhysStart First physical address in the range.
1904 * @param cbRange The size of the range (in bytes).
1905 * @param pvUser User argument.
1906 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1907 * @param pszRead Name of the GC function which is gonna handle Read operations.
1908 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1909 * @param pszDesc Obsolete. NULL is fine.
1910 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1911 */
1912 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1913 const char *pszWrite, const char *pszRead, const char *pszFill,
1914 const char *pszDesc));
1915
1916 /**
1917 * Register a Memory Mapped I/O (MMIO) region for R0.
1918 *
1919 * These callbacks are for the ring-0 host context (R0).
1920 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1921 *
1922 * @returns VBox status.
1923 * @param pDevIns The device instance to register the MMIO with.
1924 * @param GCPhysStart First physical address in the range.
1925 * @param cbRange The size of the range (in bytes).
1926 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1927 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1928 * @param pszRead Name of the GC function which is gonna handle Read operations.
1929 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1930 * @param pszDesc Obsolete. NULL is fine.
1931 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1932 */
1933 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1934 const char *pszWrite, const char *pszRead, const char *pszFill,
1935 const char *pszDesc));
1936
1937 /**
1938 * Deregister a Memory Mapped I/O (MMIO) region.
1939 *
1940 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1941 *
1942 * @returns VBox status.
1943 * @param pDevIns The device instance owning the MMIO region(s).
1944 * @param GCPhysStart First physical address in the range.
1945 * @param cbRange The size of the range (in bytes).
1946 */
1947 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1948
1949 /**
1950 * Register a ROM (BIOS) region.
1951 *
1952 * It goes without saying that this is read-only memory. The memory region must be
1953 * in unassigned memory. I.e. from the top of the address space or on the PC in
1954 * the 0xa0000-0xfffff range.
1955 *
1956 * @returns VBox status.
1957 * @param pDevIns The device instance owning the ROM region.
1958 * @param GCPhysStart First physical address in the range.
1959 * Must be page aligned!
1960 * @param cbRange The size of the range (in bytes).
1961 * Must be page aligned!
1962 * @param pvBinary Pointer to the binary data backing the ROM image.
1963 * This must be cbRange bytes big.
1964 * It will be copied and doesn't have to stick around if fShadow is clear.
1965 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
1966 * @param pszDesc Pointer to description string. This must not be freed.
1967 *
1968 * @remark There is no way to remove the rom, automatically on device cleanup or
1969 * manually from the device yet. At present I doubt we need such features...
1970 */
1971 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
1972
1973 /**
1974 * Register a save state data unit.
1975 *
1976 * @returns VBox status.
1977 * @param pDevIns Device instance.
1978 * @param pszName Data unit name.
1979 * @param uInstance The instance identifier of the data unit.
1980 * This must together with the name be unique.
1981 * @param uVersion Data layout version number.
1982 * @param cbGuess The approximate amount of data in the unit.
1983 * Only for progress indicators.
1984 * @param pszBefore Name of data unit which we should be put in
1985 * front of. Optional (NULL).
1986 *
1987 * @param pfnLivePrep Prepare live save callback, optional.
1988 * @param pfnLiveExec Execute live save callback, optional.
1989 * @param pfnLiveVote Vote live save callback, optional.
1990 *
1991 * @param pfnSavePrep Prepare save callback, optional.
1992 * @param pfnSaveExec Execute save callback, optional.
1993 * @param pfnSaveDone Done save callback, optional.
1994 *
1995 * @param pfnLoadPrep Prepare load callback, optional.
1996 * @param pfnLoadExec Execute load callback, optional.
1997 * @param pfnLoadDone Done load callback, optional.
1998 */
1999 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2000 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2001 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2002 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2003
2004 /**
2005 * Creates a timer.
2006 *
2007 * @returns VBox status.
2008 * @param pDevIns Device instance.
2009 * @param enmClock The clock to use on this timer.
2010 * @param pfnCallback Callback function.
2011 * @param pvUser User argument for the callback.
2012 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2013 * @param pszDesc Pointer to description string which must stay around
2014 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2015 * @param ppTimer Where to store the timer on success.
2016 */
2017 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2018
2019 /**
2020 * Registers the device with the default PCI bus.
2021 *
2022 * @returns VBox status code.
2023 * @param pDevIns Device instance.
2024 * @param pPciDev The PCI device structure.
2025 * Any PCI enabled device must keep this in it's instance data!
2026 * Fill in the PCI data config before registration, please.
2027 * @remark This is the simple interface, a Ex interface will be created if
2028 * more features are needed later.
2029 */
2030 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2031
2032 /**
2033 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2034 *
2035 * @returns VBox status code.
2036 * @param pDevIns Device instance.
2037 * @param iRegion The region number.
2038 * @param cbRegion Size of the region.
2039 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2040 * @param pfnCallback Callback for doing the mapping.
2041 */
2042 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2043
2044 /**
2045 * Register PCI configuration space read/write callbacks.
2046 *
2047 * @param pDevIns Device instance.
2048 * @param pPciDev The PCI device structure.
2049 * If NULL the default PCI device for this device instance is used.
2050 * @param pfnRead Pointer to the user defined PCI config read function.
2051 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2052 * PCI config read function. This way, user can decide when (and if)
2053 * to call default PCI config read function. Can be NULL.
2054 * @param pfnWrite Pointer to the user defined PCI config write function.
2055 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2056 * PCI config write function. This way, user can decide when (and if)
2057 * to call default PCI config write function. Can be NULL.
2058 * @thread EMT
2059 */
2060 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2061 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2062
2063 /**
2064 * Set the IRQ for a PCI device.
2065 *
2066 * @param pDevIns Device instance.
2067 * @param iIrq IRQ number to set.
2068 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2069 * @thread Any thread, but will involve the emulation thread.
2070 */
2071 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2072
2073 /**
2074 * Set the IRQ for a PCI device, but don't wait for EMT to process
2075 * the request when not called from EMT.
2076 *
2077 * @param pDevIns Device instance.
2078 * @param iIrq IRQ number to set.
2079 * @param iLevel IRQ level.
2080 * @thread Any thread, but will involve the emulation thread.
2081 */
2082 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2083
2084 /**
2085 * Set ISA IRQ for a device.
2086 *
2087 * @param pDevIns Device instance.
2088 * @param iIrq IRQ number to set.
2089 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2090 * @thread Any thread, but will involve the emulation thread.
2091 */
2092 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2093
2094 /**
2095 * Set the ISA IRQ for a device, but don't wait for EMT to process
2096 * the request when not called from EMT.
2097 *
2098 * @param pDevIns Device instance.
2099 * @param iIrq IRQ number to set.
2100 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2101 * @thread Any thread, but will involve the emulation thread.
2102 */
2103 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2104
2105 /**
2106 * Attaches a driver (chain) to the device.
2107 *
2108 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2109 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2110 *
2111 * @returns VBox status code.
2112 * @param pDevIns Device instance.
2113 * @param iLun The logical unit to attach.
2114 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2115 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2116 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2117 * for the live of the device instance.
2118 */
2119 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2120
2121 /**
2122 * Allocate memory which is associated with current VM instance
2123 * and automatically freed on it's destruction.
2124 *
2125 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2126 * @param pDevIns Device instance.
2127 * @param cb Number of bytes to allocate.
2128 */
2129 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2130
2131 /**
2132 * Allocate memory which is associated with current VM instance
2133 * and automatically freed on it's destruction. The memory is ZEROed.
2134 *
2135 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2136 * @param pDevIns Device instance.
2137 * @param cb Number of bytes to allocate.
2138 */
2139 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2140
2141 /**
2142 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2143 *
2144 * @param pDevIns Device instance.
2145 * @param pv Pointer to the memory to free.
2146 */
2147 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2148
2149 /**
2150 * Set the VM error message
2151 *
2152 * @returns rc.
2153 * @param pDevIns Device instance.
2154 * @param rc VBox status code.
2155 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2156 * @param pszFormat Error message format string.
2157 * @param ... Error message arguments.
2158 */
2159 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2160
2161 /**
2162 * Set the VM error message
2163 *
2164 * @returns rc.
2165 * @param pDevIns Device instance.
2166 * @param rc VBox status code.
2167 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2168 * @param pszFormat Error message format string.
2169 * @param va Error message arguments.
2170 */
2171 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2172
2173 /**
2174 * Set the VM runtime error message
2175 *
2176 * @returns VBox status code.
2177 * @param pDevIns Device instance.
2178 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2179 * @param pszErrorId Error ID string.
2180 * @param pszFormat Error message format string.
2181 * @param ... Error message arguments.
2182 */
2183 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2184
2185 /**
2186 * Set the VM runtime error message
2187 *
2188 * @returns VBox status code.
2189 * @param pDevIns Device instance.
2190 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2191 * @param pszErrorId Error ID string.
2192 * @param pszFormat Error message format string.
2193 * @param va Error message arguments.
2194 */
2195 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2196
2197 /**
2198 * Gets the VM state.
2199 *
2200 * @returns VM state.
2201 * @param pDevIns The device instance.
2202 * @thread Any thread (just keep in mind that it's volatile info).
2203 */
2204 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2205
2206 /**
2207 * Checks if the VM was teleported and hasn't been fully resumed yet.
2208 *
2209 * @returns true / false.
2210 * @param pDevIns The device instance.
2211 * @thread Any thread.
2212 */
2213 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2214
2215 /**
2216 * Assert that the current thread is the emulation thread.
2217 *
2218 * @returns True if correct.
2219 * @returns False if wrong.
2220 * @param pDevIns Device instance.
2221 * @param pszFile Filename of the assertion location.
2222 * @param iLine The linenumber of the assertion location.
2223 * @param pszFunction Function of the assertion location.
2224 */
2225 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2226
2227 /**
2228 * Assert that the current thread is NOT the emulation thread.
2229 *
2230 * @returns True if correct.
2231 * @returns False if wrong.
2232 * @param pDevIns Device instance.
2233 * @param pszFile Filename of the assertion location.
2234 * @param iLine The linenumber of the assertion location.
2235 * @param pszFunction Function of the assertion location.
2236 */
2237 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2238
2239 /**
2240 * Stops the VM and enters the debugger to look at the guest state.
2241 *
2242 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2243 * invoking this function directly.
2244 *
2245 * @returns VBox status code which must be passed up to the VMM.
2246 * @param pDevIns Device instance.
2247 * @param pszFile Filename of the assertion location.
2248 * @param iLine The linenumber of the assertion location.
2249 * @param pszFunction Function of the assertion location.
2250 * @param pszFormat Message. (optional)
2251 * @param args Message parameters.
2252 */
2253 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2254
2255 /**
2256 * Register a info handler with DBGF,
2257 *
2258 * @returns VBox status code.
2259 * @param pDevIns Device instance.
2260 * @param pszName The identifier of the info.
2261 * @param pszDesc The description of the info and any arguments
2262 * the handler may take.
2263 * @param pfnHandler The handler function to be called to display the
2264 * info.
2265 */
2266 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2267
2268 /**
2269 * Registers a statistics sample if statistics are enabled.
2270 *
2271 * @param pDevIns Device instance of the DMA.
2272 * @param pvSample Pointer to the sample.
2273 * @param enmType Sample type. This indicates what pvSample is
2274 * pointing at.
2275 * @param pszName Sample name. The name is on this form
2276 * "/<component>/<sample>". Further nesting is
2277 * possible.
2278 * @param enmUnit Sample unit.
2279 * @param pszDesc Sample description.
2280 */
2281 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2282
2283 /**
2284 * Same as pfnSTAMRegister except that the name is specified in a
2285 * RTStrPrintf like fashion.
2286 *
2287 * @returns VBox status.
2288 * @param pDevIns Device instance of the DMA.
2289 * @param pvSample Pointer to the sample.
2290 * @param enmType Sample type. This indicates what pvSample is
2291 * pointing at.
2292 * @param enmVisibility Visibility type specifying whether unused
2293 * statistics should be visible or not.
2294 * @param enmUnit Sample unit.
2295 * @param pszDesc Sample description.
2296 * @param pszName The sample name format string.
2297 * @param ... Arguments to the format string.
2298 */
2299 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2300 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2301
2302 /**
2303 * Same as pfnSTAMRegister except that the name is specified in a
2304 * RTStrPrintfV like fashion.
2305 *
2306 * @returns VBox status.
2307 * @param pDevIns Device instance of the DMA.
2308 * @param pvSample Pointer to the sample.
2309 * @param enmType Sample type. This indicates what pvSample is
2310 * pointing at.
2311 * @param enmVisibility Visibility type specifying whether unused
2312 * statistics should be visible or not.
2313 * @param enmUnit Sample unit.
2314 * @param pszDesc Sample description.
2315 * @param pszName The sample name format string.
2316 * @param args Arguments to the format string.
2317 */
2318 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2319 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2320
2321 /**
2322 * Register the RTC device.
2323 *
2324 * @returns VBox status code.
2325 * @param pDevIns Device instance.
2326 * @param pRtcReg Pointer to a RTC registration structure.
2327 * @param ppRtcHlp Where to store the pointer to the helper
2328 * functions.
2329 */
2330 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2331
2332 /**
2333 * Create a queue.
2334 *
2335 * @returns VBox status code.
2336 * @param pDevIns The device instance.
2337 * @param cbItem The size of a queue item.
2338 * @param cItems The number of items in the queue.
2339 * @param cMilliesInterval The number of milliseconds between polling the queue.
2340 * If 0 then the emulation thread will be notified whenever an item arrives.
2341 * @param pfnCallback The consumer function.
2342 * @param fRZEnabled Set if the queue should work in RC and R0.
2343 * @param pszName The queue base name. The instance number will be
2344 * appended automatically.
2345 * @param ppQueue Where to store the queue handle on success.
2346 * @thread The emulation thread.
2347 */
2348 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2349 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2350
2351 /**
2352 * Initializes a PDM critical section.
2353 *
2354 * The PDM critical sections are derived from the IPRT critical sections, but
2355 * works in GC as well.
2356 *
2357 * @returns VBox status code.
2358 * @param pDevIns Device instance.
2359 * @param pCritSect Pointer to the critical section.
2360 * @param pszName The name of the critical section (for
2361 * statistics).
2362 */
2363 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2364
2365 /**
2366 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2367 *
2368 * @returns pTime.
2369 * @param pDevIns Device instance.
2370 * @param pTime Where to store the time.
2371 */
2372 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2373
2374 /**
2375 * Creates a PDM thread.
2376 *
2377 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2378 * resuming, and destroying the thread as the VM state changes.
2379 *
2380 * @returns VBox status code.
2381 * @param pDevIns The device instance.
2382 * @param ppThread Where to store the thread 'handle'.
2383 * @param pvUser The user argument to the thread function.
2384 * @param pfnThread The thread function.
2385 * @param pfnWakeup The wakup callback. This is called on the EMT
2386 * thread when a state change is pending.
2387 * @param cbStack See RTThreadCreate.
2388 * @param enmType See RTThreadCreate.
2389 * @param pszName See RTThreadCreate.
2390 */
2391 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2392 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2393
2394 /**
2395 * Convert a guest virtual address to a guest physical address.
2396 *
2397 * @returns VBox status code.
2398 * @param pDevIns Device instance.
2399 * @param GCPtr Guest virtual address.
2400 * @param pGCPhys Where to store the GC physical address
2401 * corresponding to GCPtr.
2402 * @thread The emulation thread.
2403 * @remark Careful with page boundraries.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2406
2407 /** Space reserved for future members.
2408 * @{ */
2409 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
2410 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2411 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2412 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2413 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2414 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2415 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2416 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2417 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2418 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2419 /** @} */
2420
2421
2422 /** API available to trusted devices only.
2423 *
2424 * These APIs are providing unrestricted access to the guest and the VM,
2425 * or they are interacting intimately with PDM.
2426 *
2427 * @{
2428 */
2429 /**
2430 * Gets the VM handle. Restricted API.
2431 *
2432 * @returns VM Handle.
2433 * @param pDevIns Device instance.
2434 */
2435 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2436
2437 /**
2438 * Register the PCI Bus.
2439 *
2440 * @returns VBox status code.
2441 * @param pDevIns Device instance.
2442 * @param pPciBusReg Pointer to PCI bus registration structure.
2443 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2444 * helpers.
2445 */
2446 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2447
2448 /**
2449 * Register the PIC device.
2450 *
2451 * @returns VBox status code.
2452 * @param pDevIns Device instance.
2453 * @param pPicReg Pointer to a PIC registration structure.
2454 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2455 * helpers.
2456 */
2457 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2458
2459 /**
2460 * Register the APIC device.
2461 *
2462 * @returns VBox status code.
2463 * @param pDevIns Device instance.
2464 * @param pApicReg Pointer to a APIC registration structure.
2465 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2466 */
2467 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2468
2469 /**
2470 * Register the I/O APIC device.
2471 *
2472 * @returns VBox status code.
2473 * @param pDevIns Device instance.
2474 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2475 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2476 * helpers.
2477 */
2478 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2479
2480 /**
2481 * Register the DMA device.
2482 *
2483 * @returns VBox status code.
2484 * @param pDevIns Device instance.
2485 * @param pDmacReg Pointer to a DMAC registration structure.
2486 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2487 */
2488 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2489
2490 /**
2491 * Read physical memory.
2492 *
2493 * @returns VINF_SUCCESS (for now).
2494 * @param pDevIns Device instance.
2495 * @param GCPhys Physical address start reading from.
2496 * @param pvBuf Where to put the read bits.
2497 * @param cbRead How many bytes to read.
2498 * @thread Any thread, but the call may involve the emulation thread.
2499 */
2500 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2501
2502 /**
2503 * Write to physical memory.
2504 *
2505 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2506 * @param pDevIns Device instance.
2507 * @param GCPhys Physical address to write to.
2508 * @param pvBuf What to write.
2509 * @param cbWrite How many bytes to write.
2510 * @thread Any thread, but the call may involve the emulation thread.
2511 */
2512 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2513
2514 /**
2515 * Requests the mapping of a guest page into ring-3.
2516 *
2517 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2518 * release it.
2519 *
2520 * This API will assume your intention is to write to the page, and will
2521 * therefore replace shared and zero pages. If you do not intend to modify the
2522 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2523 *
2524 * @returns VBox status code.
2525 * @retval VINF_SUCCESS on success.
2526 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2527 * backing or if the page has any active access handlers. The caller
2528 * must fall back on using PGMR3PhysWriteExternal.
2529 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2530 *
2531 * @param pVM The VM handle.
2532 * @param GCPhys The guest physical address of the page that
2533 * should be mapped.
2534 * @param fFlags Flags reserved for future use, MBZ.
2535 * @param ppv Where to store the address corresponding to
2536 * GCPhys.
2537 * @param pLock Where to store the lock information that
2538 * pfnPhysReleasePageMappingLock needs.
2539 *
2540 * @remark Avoid calling this API from within critical sections (other than the
2541 * PGM one) because of the deadlock risk when we have to delegating the
2542 * task to an EMT.
2543 * @thread Any.
2544 */
2545 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2546
2547 /**
2548 * Requests the mapping of a guest page into ring-3, external threads.
2549 *
2550 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2551 * release it.
2552 *
2553 * @returns VBox status code.
2554 * @retval VINF_SUCCESS on success.
2555 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2556 * backing or if the page as an active ALL access handler. The caller
2557 * must fall back on using PGMPhysRead.
2558 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2559 *
2560 * @param pDevIns Device instance.
2561 * @param GCPhys The guest physical address of the page that
2562 * should be mapped.
2563 * @param fFlags Flags reserved for future use, MBZ.
2564 * @param ppv Where to store the address corresponding to
2565 * GCPhys.
2566 * @param pLock Where to store the lock information that
2567 * pfnPhysReleasePageMappingLock needs.
2568 *
2569 * @remark Avoid calling this API from within critical sections.
2570 * @thread Any.
2571 */
2572 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2573
2574 /**
2575 * Release the mapping of a guest page.
2576 *
2577 * This is the counter part of pfnPhysGCPhys2CCPtr and
2578 * pfnPhysGCPhys2CCPtrReadOnly.
2579 *
2580 * @param pDevIns Device instance.
2581 * @param pLock The lock structure initialized by the mapping
2582 * function.
2583 */
2584 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2585
2586 /**
2587 * Read guest physical memory by virtual address.
2588 *
2589 * @param pDevIns Device instance.
2590 * @param pvDst Where to put the read bits.
2591 * @param GCVirtSrc Guest virtual address to start reading from.
2592 * @param cb How many bytes to read.
2593 * @thread The emulation thread.
2594 */
2595 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2596
2597 /**
2598 * Write to guest physical memory by virtual address.
2599 *
2600 * @param pDevIns Device instance.
2601 * @param GCVirtDst Guest virtual address to write to.
2602 * @param pvSrc What to write.
2603 * @param cb How many bytes to write.
2604 * @thread The emulation thread.
2605 */
2606 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2607
2608 /**
2609 * Checks if the Gate A20 is enabled or not.
2610 *
2611 * @returns true if A20 is enabled.
2612 * @returns false if A20 is disabled.
2613 * @param pDevIns Device instance.
2614 * @thread The emulation thread.
2615 */
2616 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2617
2618 /**
2619 * Enables or disables the Gate A20.
2620 *
2621 * @param pDevIns Device instance.
2622 * @param fEnable Set this flag to enable the Gate A20; clear it
2623 * to disable.
2624 * @thread The emulation thread.
2625 */
2626 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2627
2628 /**
2629 * Resets the VM.
2630 *
2631 * @returns The appropriate VBox status code to pass around on reset.
2632 * @param pDevIns Device instance.
2633 * @thread The emulation thread.
2634 */
2635 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2636
2637 /**
2638 * Suspends the VM.
2639 *
2640 * @returns The appropriate VBox status code to pass around on suspend.
2641 * @param pDevIns Device instance.
2642 * @thread The emulation thread.
2643 */
2644 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2645
2646 /**
2647 * Power off the VM.
2648 *
2649 * @returns The appropriate VBox status code to pass around on power off.
2650 * @param pDevIns Device instance.
2651 * @thread The emulation thread.
2652 */
2653 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2654
2655 /**
2656 * Register transfer function for DMA channel.
2657 *
2658 * @returns VBox status code.
2659 * @param pDevIns Device instance.
2660 * @param uChannel Channel number.
2661 * @param pfnTransferHandler Device specific transfer callback function.
2662 * @param pvUser User pointer to pass to the callback.
2663 * @thread EMT
2664 */
2665 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2666
2667 /**
2668 * Read memory.
2669 *
2670 * @returns VBox status code.
2671 * @param pDevIns Device instance.
2672 * @param uChannel Channel number.
2673 * @param pvBuffer Pointer to target buffer.
2674 * @param off DMA position.
2675 * @param cbBlock Block size.
2676 * @param pcbRead Where to store the number of bytes which was
2677 * read. optional.
2678 * @thread EMT
2679 */
2680 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2681
2682 /**
2683 * Write memory.
2684 *
2685 * @returns VBox status code.
2686 * @param pDevIns Device instance.
2687 * @param uChannel Channel number.
2688 * @param pvBuffer Memory to write.
2689 * @param off DMA position.
2690 * @param cbBlock Block size.
2691 * @param pcbWritten Where to store the number of bytes which was
2692 * written. optional.
2693 * @thread EMT
2694 */
2695 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2696
2697 /**
2698 * Set the DREQ line.
2699 *
2700 * @returns VBox status code.
2701 * @param pDevIns Device instance.
2702 * @param uChannel Channel number.
2703 * @param uLevel Level of the line.
2704 * @thread EMT
2705 */
2706 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2707
2708 /**
2709 * Get channel mode.
2710 *
2711 * @returns Channel mode. See specs.
2712 * @param pDevIns Device instance.
2713 * @param uChannel Channel number.
2714 * @thread EMT
2715 */
2716 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2717
2718 /**
2719 * Schedule DMA execution.
2720 *
2721 * @param pDevIns Device instance.
2722 * @thread Any thread.
2723 */
2724 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2725
2726 /**
2727 * Write CMOS value and update the checksum(s).
2728 *
2729 * @returns VBox status code.
2730 * @param pDevIns Device instance.
2731 * @param iReg The CMOS register index.
2732 * @param u8Value The CMOS register value.
2733 * @thread EMT
2734 */
2735 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2736
2737 /**
2738 * Read CMOS value.
2739 *
2740 * @returns VBox status code.
2741 * @param pDevIns Device instance.
2742 * @param iReg The CMOS register index.
2743 * @param pu8Value Where to store the CMOS register value.
2744 * @thread EMT
2745 */
2746 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2747
2748 /**
2749 * Get the specified CPUID leaf for the virtual CPU associated with the calling
2750 * thread.
2751 *
2752 * @param pDevIns Device instance.
2753 * @param iLeaf The CPUID leaf to get.
2754 * @param pEax Where to store the EAX value.
2755 * @param pEbx Where to store the EBX value.
2756 * @param pEcx Where to store the ECX value.
2757 * @param pEdx Where to store the EDX value.
2758 * @thread EMT.
2759 */
2760 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2761
2762 /**
2763 * Changes the protection of shadowed ROM mapping.
2764 *
2765 * This is intented for use by the system BIOS, chipset or device in question to
2766 * change the protection of shadowed ROM code after init and on reset.
2767 *
2768 * @param pDevIns Device instance.
2769 * @param GCPhysStart Where the mapping starts.
2770 * @param cbRange The size of the mapping.
2771 * @param enmProt The new protection type.
2772 */
2773 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2774
2775 /**
2776 * Allocate and register a MMIO2 region.
2777 *
2778 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2779 * RAM associated with a device. It is also non-shared memory with a
2780 * permanent ring-3 mapping and page backing (presently).
2781 *
2782 * @returns VBox status.
2783 * @param pDevIns The device instance.
2784 * @param iRegion The region number. Use the PCI region number as
2785 * this must be known to the PCI bus device too. If
2786 * it's not associated with the PCI device, then
2787 * any number up to UINT8_MAX is fine.
2788 * @param cb The size (in bytes) of the region.
2789 * @param fFlags Reserved for future use, must be zero.
2790 * @param ppv Where to store the address of the ring-3 mapping
2791 * of the memory.
2792 * @param pszDesc Pointer to description string. This must not be
2793 * freed.
2794 * @thread EMT.
2795 */
2796 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2797
2798 /**
2799 * Deregisters and frees a MMIO2 region.
2800 *
2801 * Any physical (and virtual) access handlers registered for the region must
2802 * be deregistered before calling this function.
2803 *
2804 * @returns VBox status code.
2805 * @param pDevIns The device instance.
2806 * @param iRegion The region number used during registration.
2807 * @thread EMT.
2808 */
2809 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2810
2811 /**
2812 * Maps a MMIO2 region into the physical memory space.
2813 *
2814 * A MMIO2 range may overlap with base memory if a lot of RAM
2815 * is configured for the VM, in which case we'll drop the base
2816 * memory pages. Presently we will make no attempt to preserve
2817 * anything that happens to be present in the base memory that
2818 * is replaced, this is of course incorrectly but it's too much
2819 * effort.
2820 *
2821 * @returns VBox status code.
2822 * @param pDevIns The device instance.
2823 * @param iRegion The region number used during registration.
2824 * @param GCPhys The physical address to map it at.
2825 * @thread EMT.
2826 */
2827 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2828
2829 /**
2830 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2831 *
2832 * @returns VBox status code.
2833 * @param pDevIns The device instance.
2834 * @param iRegion The region number used during registration.
2835 * @param GCPhys The physical address it's currently mapped at.
2836 * @thread EMT.
2837 */
2838 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2839
2840 /**
2841 * Maps a portion of an MMIO2 region into the hypervisor region.
2842 *
2843 * Callers of this API must never deregister the MMIO2 region before the
2844 * VM is powered off.
2845 *
2846 * @return VBox status code.
2847 * @param pDevIns The device owning the MMIO2 memory.
2848 * @param iRegion The region.
2849 * @param off The offset into the region. Will be rounded down
2850 * to closest page boundrary.
2851 * @param cb The number of bytes to map. Will be rounded up
2852 * to the closest page boundrary.
2853 * @param pszDesc Mapping description.
2854 * @param pRCPtr Where to store the RC address.
2855 */
2856 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2857 const char *pszDesc, PRTRCPTR pRCPtr));
2858
2859 /**
2860 * Maps a portion of an MMIO2 region into kernel space (host).
2861 *
2862 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2863 * or the VM is terminated.
2864 *
2865 * @return VBox status code.
2866 * @param pDevIns The device owning the MMIO2 memory.
2867 * @param iRegion The region.
2868 * @param off The offset into the region. Must be page
2869 * aligned.
2870 * @param cb The number of bytes to map. Must be page
2871 * aligned.
2872 * @param pszDesc Mapping description.
2873 * @param pR0Ptr Where to store the R0 address.
2874 */
2875 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2876 const char *pszDesc, PRTR0PTR pR0Ptr));
2877
2878 /**
2879 * Registers the VMM device heap
2880 *
2881 * @returns VBox status code.
2882 * @param pDevIns The device instance.
2883 * @param GCPhys The physical address.
2884 * @param pvHeap Ring 3 heap pointer.
2885 * @param cbSize Size of the heap.
2886 * @thread EMT.
2887 */
2888 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2889
2890 /**
2891 * Unregisters the VMM device heap
2892 *
2893 * @returns VBox status code.
2894 * @param pDevIns The device instance.
2895 * @param GCPhys The physical address.
2896 * @thread EMT.
2897 */
2898 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2899
2900 /**
2901 * Gets the VMCPU handle. Restricted API.
2902 *
2903 * @returns VMCPU Handle.
2904 * @param pDevIns Device instance.
2905 */
2906 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
2907
2908 /** @} */
2909
2910 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2911 uint32_t u32TheEnd;
2912} PDMDEVHLPR3;
2913#endif /* !IN_RING3 */
2914/** Pointer to the R3 PDM Device API. */
2915typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2916/** Pointer to the R3 PDM Device API, const variant. */
2917typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2918
2919/** Current PDMDEVHLP version number. */
2920#define PDM_DEVHLP_VERSION 0xf20c0000
2921
2922
2923/**
2924 * PDM Device API - RC Variant.
2925 */
2926typedef struct PDMDEVHLPRC
2927{
2928 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2929 uint32_t u32Version;
2930
2931 /**
2932 * Set the IRQ for a PCI device.
2933 *
2934 * @param pDevIns Device instance.
2935 * @param iIrq IRQ number to set.
2936 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2937 * @thread Any thread, but will involve the emulation thread.
2938 */
2939 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2940
2941 /**
2942 * Set ISA IRQ for a device.
2943 *
2944 * @param pDevIns Device instance.
2945 * @param iIrq IRQ number to set.
2946 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2947 * @thread Any thread, but will involve the emulation thread.
2948 */
2949 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2950
2951 /**
2952 * Read physical memory.
2953 *
2954 * @returns VINF_SUCCESS (for now).
2955 * @param pDevIns Device instance.
2956 * @param GCPhys Physical address start reading from.
2957 * @param pvBuf Where to put the read bits.
2958 * @param cbRead How many bytes to read.
2959 */
2960 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2961
2962 /**
2963 * Write to physical memory.
2964 *
2965 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2966 * @param pDevIns Device instance.
2967 * @param GCPhys Physical address to write to.
2968 * @param pvBuf What to write.
2969 * @param cbWrite How many bytes to write.
2970 */
2971 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2972
2973 /**
2974 * Checks if the Gate A20 is enabled or not.
2975 *
2976 * @returns true if A20 is enabled.
2977 * @returns false if A20 is disabled.
2978 * @param pDevIns Device instance.
2979 * @thread The emulation thread.
2980 */
2981 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2982
2983 /**
2984 * Set the VM error message
2985 *
2986 * @returns rc.
2987 * @param pDrvIns Driver instance.
2988 * @param rc VBox status code.
2989 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2990 * @param pszFormat Error message format string.
2991 * @param ... Error message arguments.
2992 */
2993 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2994
2995 /**
2996 * Set the VM error message
2997 *
2998 * @returns rc.
2999 * @param pDrvIns Driver instance.
3000 * @param rc VBox status code.
3001 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3002 * @param pszFormat Error message format string.
3003 * @param va Error message arguments.
3004 */
3005 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3006
3007 /**
3008 * Set the VM runtime error message
3009 *
3010 * @returns VBox status code.
3011 * @param pDevIns Device instance.
3012 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3013 * @param pszErrorId Error ID string.
3014 * @param pszFormat Error message format string.
3015 * @param ... Error message arguments.
3016 */
3017 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3018
3019 /**
3020 * Set the VM runtime error message
3021 *
3022 * @returns VBox status code.
3023 * @param pDevIns Device instance.
3024 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3025 * @param pszErrorId Error ID string.
3026 * @param pszFormat Error message format string.
3027 * @param va Error message arguments.
3028 */
3029 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3030
3031 /**
3032 * Set parameters for pending MMIO patch operation
3033 *
3034 * @returns VBox status code.
3035 * @param pDevIns Device instance.
3036 * @param GCPhys MMIO physical address
3037 * @param pCachedData GC pointer to cached data
3038 */
3039 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3040
3041 /**
3042 * Gets the VM handle. Restricted API.
3043 *
3044 * @returns VM Handle.
3045 * @param pDevIns Device instance.
3046 */
3047 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3048
3049 /**
3050 * Gets the VMCPU handle. Restricted API.
3051 *
3052 * @returns VMCPU Handle.
3053 * @param pDevIns Device instance.
3054 */
3055 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3056
3057 /** Just a safety precaution. */
3058 uint32_t u32TheEnd;
3059} PDMDEVHLPRC;
3060/** Pointer PDM Device RC API. */
3061typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3062/** Pointer PDM Device RC API. */
3063typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3064
3065/** Current PDMDEVHLP version number. */
3066#define PDM_DEVHLPRC_VERSION 0xfb020000
3067
3068
3069/**
3070 * PDM Device API - R0 Variant.
3071 */
3072typedef struct PDMDEVHLPR0
3073{
3074 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3075 uint32_t u32Version;
3076
3077 /**
3078 * Set the IRQ for a PCI device.
3079 *
3080 * @param pDevIns Device instance.
3081 * @param iIrq IRQ number to set.
3082 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3083 * @thread Any thread, but will involve the emulation thread.
3084 */
3085 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3086
3087 /**
3088 * Set ISA IRQ for a device.
3089 *
3090 * @param pDevIns Device instance.
3091 * @param iIrq IRQ number to set.
3092 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3093 * @thread Any thread, but will involve the emulation thread.
3094 */
3095 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3096
3097 /**
3098 * Read physical memory.
3099 *
3100 * @returns VINF_SUCCESS (for now).
3101 * @param pDevIns Device instance.
3102 * @param GCPhys Physical address start reading from.
3103 * @param pvBuf Where to put the read bits.
3104 * @param cbRead How many bytes to read.
3105 */
3106 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3107
3108 /**
3109 * Write to physical memory.
3110 *
3111 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3112 * @param pDevIns Device instance.
3113 * @param GCPhys Physical address to write to.
3114 * @param pvBuf What to write.
3115 * @param cbWrite How many bytes to write.
3116 */
3117 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3118
3119 /**
3120 * Checks if the Gate A20 is enabled or not.
3121 *
3122 * @returns true if A20 is enabled.
3123 * @returns false if A20 is disabled.
3124 * @param pDevIns Device instance.
3125 * @thread The emulation thread.
3126 */
3127 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3128
3129 /**
3130 * Set the VM error message
3131 *
3132 * @returns rc.
3133 * @param pDrvIns Driver instance.
3134 * @param rc VBox status code.
3135 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3136 * @param pszFormat Error message format string.
3137 * @param ... Error message arguments.
3138 */
3139 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3140
3141 /**
3142 * Set the VM error message
3143 *
3144 * @returns rc.
3145 * @param pDrvIns Driver instance.
3146 * @param rc VBox status code.
3147 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3148 * @param pszFormat Error message format string.
3149 * @param va Error message arguments.
3150 */
3151 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3152
3153 /**
3154 * Set the VM runtime error message
3155 *
3156 * @returns VBox status code.
3157 * @param pDevIns Device instance.
3158 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3159 * @param pszErrorId Error ID string.
3160 * @param pszFormat Error message format string.
3161 * @param ... Error message arguments.
3162 */
3163 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3164
3165 /**
3166 * Set the VM runtime error message
3167 *
3168 * @returns VBox status code.
3169 * @param pDevIns Device instance.
3170 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3171 * @param pszErrorId Error ID string.
3172 * @param pszFormat Error message format string.
3173 * @param va Error message arguments.
3174 */
3175 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3176
3177 /**
3178 * Set parameters for pending MMIO patch operation
3179 *
3180 * @returns rc.
3181 * @param pDevIns Device instance.
3182 * @param GCPhys MMIO physical address
3183 * @param pCachedData GC pointer to cached data
3184 */
3185 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3186
3187 /**
3188 * Gets the VM handle. Restricted API.
3189 *
3190 * @returns VM Handle.
3191 * @param pDevIns Device instance.
3192 */
3193 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3194
3195 /**
3196 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3197 *
3198 * @returns true = yes, false = no
3199 * @param pDevIns Device instance.
3200 */
3201 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3202
3203 /**
3204 * Gets the VMCPU handle. Restricted API.
3205 *
3206 * @returns VMCPU Handle.
3207 * @param pDevIns Device instance.
3208 */
3209 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3210
3211 /** Just a safety precaution. */
3212 uint32_t u32TheEnd;
3213} PDMDEVHLPR0;
3214/** Pointer PDM Device R0 API. */
3215typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3216/** Pointer PDM Device GC API. */
3217typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3218
3219/** Current PDMDEVHLP version number. */
3220#define PDM_DEVHLPR0_VERSION 0xfb030000
3221
3222
3223
3224/**
3225 * PDM Device Instance.
3226 */
3227typedef struct PDMDEVINS
3228{
3229 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3230 uint32_t u32Version;
3231 /** Device instance number. */
3232 RTUINT iInstance;
3233
3234 /** Pointer the GC PDM Device API. */
3235 PCPDMDEVHLPRC pDevHlpRC;
3236 /** Pointer to device instance data. */
3237 RTRCPTR pvInstanceDataRC;
3238
3239 /** Pointer the R0 PDM Device API. */
3240 PCPDMDEVHLPR0 pDevHlpR0;
3241 /** Pointer to device instance data (R0). */
3242 RTR0PTR pvInstanceDataR0;
3243
3244 /** Pointer the HC PDM Device API. */
3245 PCPDMDEVHLPR3 pDevHlpR3;
3246 /** Pointer to device instance data. */
3247 RTR3PTR pvInstanceDataR3;
3248
3249 /** Pointer to device registration structure. */
3250 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3251 /** Configuration handle. */
3252 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3253
3254 /** The base interface of the device.
3255 * The device constructor initializes this if it has any
3256 * device level interfaces to export. To obtain this interface
3257 * call PDMR3QueryDevice(). */
3258 PDMIBASE IBase;
3259 /** Align the internal data more naturally. */
3260 RTR3PTR R3PtrPadding;
3261
3262 /** Internal data. */
3263 union
3264 {
3265#ifdef PDMDEVINSINT_DECLARED
3266 PDMDEVINSINT s;
3267#endif
3268 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3269 } Internal;
3270
3271 /** Device instance data. The size of this area is defined
3272 * in the PDMDEVREG::cbInstanceData field. */
3273 char achInstanceData[8];
3274} PDMDEVINS;
3275
3276/** Current PDMDEVINS version number. */
3277#define PDM_DEVINS_VERSION 0xf3020000
3278
3279/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3280#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3281
3282
3283/** @def PDMDEV_ASSERT_EMT
3284 * Assert that the current thread is the emulation thread.
3285 */
3286#ifdef VBOX_STRICT
3287# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3288#else
3289# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3290#endif
3291
3292/** @def PDMDEV_ASSERT_OTHER
3293 * Assert that the current thread is NOT the emulation thread.
3294 */
3295#ifdef VBOX_STRICT
3296# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3297#else
3298# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3299#endif
3300
3301/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3302 * Assert that the current thread is owner of the VM lock.
3303 */
3304#ifdef VBOX_STRICT
3305# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3306#else
3307# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3308#endif
3309
3310/** @def PDMDEV_SET_ERROR
3311 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3312 */
3313#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3314 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3315
3316/** @def PDMDEV_SET_RUNTIME_ERROR
3317 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3318 */
3319#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3320 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3321
3322/** @def PDMDEVINS_2_RCPTR
3323 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3324 */
3325#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3326
3327/** @def PDMDEVINS_2_R3PTR
3328 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3329 */
3330#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3331
3332/** @def PDMDEVINS_2_R0PTR
3333 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3334 */
3335#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3336
3337
3338/**
3339 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3340 *
3341 * @returns VBox status code which must be passed up to the VMM.
3342 * @param pDevIns Device instance.
3343 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3344 * @param pszFormat Message. (optional)
3345 * @param ... Message parameters.
3346 */
3347DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3348{
3349#ifdef VBOX_STRICT
3350# ifdef IN_RING3
3351 int rc;
3352 va_list args;
3353 va_start(args, pszFormat);
3354 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3355 va_end(args);
3356 return rc;
3357# else
3358 return VINF_EM_DBG_STOP;
3359# endif
3360#else
3361 NOREF(pDevIns);
3362 NOREF(pszFile);
3363 NOREF(iLine);
3364 NOREF(pszFunction);
3365 NOREF(pszFormat);
3366 return VINF_SUCCESS;
3367#endif
3368}
3369
3370
3371#ifdef IN_RING3
3372/**
3373 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3374 */
3375DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3376 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3377 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3378{
3379 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3384 */
3385DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3386 const char *pszOut, const char *pszIn, const char *pszOutStr,
3387 const char *pszInStr, const char *pszDesc)
3388{
3389 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3390}
3391
3392/**
3393 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3394 */
3395DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3396 const char *pszOut, const char *pszIn, const char *pszOutStr,
3397 const char *pszInStr, const char *pszDesc)
3398{
3399 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3400}
3401
3402/**
3403 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3404 */
3405DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3406{
3407 return pDevIns->pDevHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3408}
3409
3410/**
3411 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3412 */
3413DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3414 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3415 const char *pszDesc)
3416{
3417 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3418}
3419
3420/**
3421 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3422 */
3423DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3424 const char *pszWrite, const char *pszRead, const char *pszFill)
3425{
3426 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3427}
3428
3429/**
3430 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3431 */
3432DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3433 const char *pszWrite, const char *pszRead, const char *pszFill)
3434{
3435 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3436}
3437
3438/**
3439 * @copydoc PDMDEVHLPR3::pfnROMRegister
3440 */
3441DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3442{
3443 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3444}
3445/**
3446 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3447 */
3448DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3449{
3450 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3451}
3452
3453/**
3454 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3455 */
3456DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3457{
3458 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3459}
3460
3461/**
3462 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3463 */
3464DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3465{
3466 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3467}
3468
3469/**
3470 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3471 */
3472DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3473{
3474 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3475}
3476
3477/**
3478 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3479 */
3480DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3481{
3482 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3483}
3484
3485/**
3486 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3487 */
3488DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3489 const char *pszDesc, PRTRCPTR pRCPtr)
3490{
3491 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3492}
3493
3494/**
3495 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3496 */
3497DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3498 const char *pszDesc, PRTR0PTR pR0Ptr)
3499{
3500 return pDevIns->pDevHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3501}
3502
3503/**
3504 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3505 */
3506DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3507{
3508 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3509}
3510
3511/**
3512 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3513 */
3514DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3515{
3516 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3517}
3518
3519/**
3520 * Register a save state data unit.
3521 *
3522 * @returns VBox status.
3523 * @param pDevIns Device instance.
3524 * @param uVersion Data layout version number.
3525 * @param cbGuess The approximate amount of data in the unit.
3526 * Only for progress indicators.
3527 * @param pfnSaveExec Execute save callback, optional.
3528 * @param pfnLoadExec Execute load callback, optional.
3529 */
3530DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3531 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3532{
3533 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3534 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3535 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3536 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3537}
3538
3539/**
3540 * Register a save state data unit with a live save callback as well.
3541 *
3542 * @returns VBox status.
3543 * @param pDevIns Device instance.
3544 * @param uVersion Data layout version number.
3545 * @param cbGuess The approximate amount of data in the unit.
3546 * Only for progress indicators.
3547 * @param pfnLiveExec Execute live callback, optional.
3548 * @param pfnSaveExec Execute save callback, optional.
3549 * @param pfnLoadExec Execute load callback, optional.
3550 */
3551DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3552 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3553{
3554 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3555 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3556 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3557 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3558}
3559
3560/**
3561 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3562 */
3563DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3564 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3565 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3566 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3567{
3568 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3569 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3570 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3571 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3572}
3573
3574/**
3575 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3576 */
3577DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3578 const char *pszDesc, PPTMTIMERR3 ppTimer)
3579{
3580 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3581}
3582
3583/**
3584 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3585 */
3586DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3587{
3588 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3589}
3590
3591/**
3592 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3593 */
3594DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3595{
3596 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3597}
3598
3599/**
3600 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3601 */
3602DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3603 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3604{
3605 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3606}
3607
3608/**
3609 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3610 */
3611DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3612{
3613 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3614}
3615
3616/**
3617 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3618 */
3619DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3620{
3621 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3622}
3623
3624/**
3625 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3626 */
3627DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3628{
3629 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3630}
3631
3632/**
3633 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3634 */
3635DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3636{
3637 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3638}
3639
3640/**
3641 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3642 */
3643DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3644{
3645 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3646}
3647
3648/**
3649 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3650 */
3651DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3652{
3653 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3654}
3655
3656/**
3657 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3658 */
3659DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3660 const char *pszDesc, const char *pszName, ...)
3661{
3662 va_list va;
3663 va_start(va, pszName);
3664 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3665 va_end(va);
3666}
3667
3668/**
3669 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3670 */
3671DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3672 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
3673{
3674 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
3675}
3676
3677/**
3678 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3679 */
3680DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3681{
3682 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3683}
3684
3685/**
3686 * @copydoc PDMDEVHLPR3::pfnUTCNow
3687 */
3688DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3689{
3690 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3691}
3692
3693/**
3694 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3695 */
3696DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3697{
3698 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3699}
3700
3701/**
3702 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3703 */
3704DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3705{
3706 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3707}
3708
3709/**
3710 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3711 */
3712DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3713{
3714 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3715}
3716
3717/**
3718 * @copydoc PDMDEVHLPR3::pfnVMState
3719 */
3720DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3721{
3722 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3723}
3724
3725/**
3726 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
3727 */
3728DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
3729{
3730 return pDevIns->pDevHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
3731}
3732
3733/**
3734 * @copydoc PDMDEVHLPR3::pfnA20Set
3735 */
3736DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3737{
3738 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3739}
3740
3741/**
3742 * @copydoc PDMDEVHLPR3::pfnVMReset
3743 */
3744DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3745{
3746 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3747}
3748
3749/**
3750 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3751 */
3752DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3753{
3754 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3755}
3756
3757/**
3758 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3759 */
3760DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3761{
3762 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3763}
3764
3765/**
3766 * @copydoc PDMDEVHLPR3::pfnDMARegister
3767 */
3768DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3769{
3770 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3771}
3772
3773/**
3774 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3775 */
3776DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3777{
3778 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3779}
3780
3781/**
3782 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3783 */
3784DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3785{
3786 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3787}
3788
3789/**
3790 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3791 */
3792DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3793{
3794 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3795}
3796
3797/**
3798 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3799 */
3800DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3801{
3802 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3803}
3804
3805/**
3806 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3807 */
3808DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3809{
3810 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3811}
3812
3813/**
3814 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3815 */
3816DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3817{
3818 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3819}
3820
3821/**
3822 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3823 */
3824DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3825{
3826 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3827}
3828
3829/**
3830 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3831 */
3832DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3833{
3834 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3835}
3836
3837/**
3838 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3839 */
3840DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3841 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3842{
3843 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3844}
3845#endif /* IN_RING3 */
3846
3847
3848/**
3849 * @copydoc PDMDEVHLPR3::pfnGetVM
3850 */
3851DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3852{
3853 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVM(pDevIns);
3854}
3855
3856/**
3857 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
3858 */
3859DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
3860{
3861 return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
3862}
3863
3864#ifdef IN_RING0
3865/**
3866 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
3867 */
3868DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
3869{
3870 return pDevIns->CTX_SUFF(pDevHlp)->pfnCanEmulateIoBlock(pDevIns);
3871}
3872#endif
3873
3874/**
3875 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3876 */
3877DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3878{
3879 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3880}
3881
3882/**
3883 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3884 */
3885DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3886{
3887 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3888}
3889
3890/**
3891 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3892 */
3893DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3894{
3895 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3896}
3897
3898/**
3899 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3900 */
3901DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3902{
3903 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3904}
3905
3906/**
3907 * @copydoc PDMDEVHLPR3::pfnPhysRead
3908 */
3909DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3910{
3911 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3912}
3913
3914/**
3915 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3916 */
3917DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3918{
3919 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3920}
3921
3922#ifdef IN_RING3
3923
3924/**
3925 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3926 */
3927DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3928{
3929 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3930}
3931
3932/**
3933 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3934 */
3935DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3936{
3937 return pDevIns->CTX_SUFF(pDevHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3938}
3939
3940/**
3941 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3942 */
3943DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3944{
3945 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3946}
3947
3948#endif /* IN_RING3 */
3949
3950/**
3951 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3952 */
3953DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3954{
3955 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3956}
3957
3958/**
3959 * @copydoc PDMDEVHLPR3::pfnVMSetError
3960 */
3961DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3962{
3963 va_list va;
3964 va_start(va, pszFormat);
3965 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3966 va_end(va);
3967 return rc;
3968}
3969
3970/**
3971 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3972 */
3973DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3974{
3975 va_list va;
3976 int rc;
3977 va_start(va, pszFormat);
3978 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3979 va_end(va);
3980 return rc;
3981}
3982
3983
3984
3985/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3986typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3987
3988/**
3989 * Callbacks for VBoxDeviceRegister().
3990 */
3991typedef struct PDMDEVREGCB
3992{
3993 /** Interface version.
3994 * This is set to PDM_DEVREG_CB_VERSION. */
3995 uint32_t u32Version;
3996
3997 /**
3998 * Registers a device with the current VM instance.
3999 *
4000 * @returns VBox status code.
4001 * @param pCallbacks Pointer to the callback table.
4002 * @param pDevReg Pointer to the device registration record.
4003 * This data must be permanent and readonly.
4004 */
4005 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
4006
4007 /**
4008 * Allocate memory which is associated with current VM instance
4009 * and automatically freed on it's destruction.
4010 *
4011 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
4012 * @param pCallbacks Pointer to the callback table.
4013 * @param cb Number of bytes to allocate.
4014 */
4015 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
4016} PDMDEVREGCB;
4017
4018/** Current version of the PDMDEVREGCB structure. */
4019#define PDM_DEVREG_CB_VERSION 0xf4010000
4020
4021
4022/**
4023 * The VBoxDevicesRegister callback function.
4024 *
4025 * PDM will invoke this function after loading a device module and letting
4026 * the module decide which devices to register and how to handle conflicts.
4027 *
4028 * @returns VBox status code.
4029 * @param pCallbacks Pointer to the callback table.
4030 * @param u32Version VBox version number.
4031 */
4032typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4033
4034/** @} */
4035
4036RT_C_DECLS_END
4037
4038#endif
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