VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 26239

Last change on this file since 26239 was 26172, checked in by vboxsync, 15 years ago

PDM: s/pCfgHandle/pCfg/g - part 1.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/pdmcommon.h>
39#include <VBox/iom.h>
40#include <VBox/tm.h>
41#include <VBox/ssm.h>
42#include <VBox/cfgm.h>
43#include <VBox/dbgf.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48RT_C_DECLS_BEGIN
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data. If the registration structure
60 * is needed, it can be accessed thru pDevIns->pReg.
61 * @param iInstance Instance number. Use this to figure out which registers
62 * and such to use. The instance number is also found in
63 * pDevIns->iInstance, but since it's likely to be
64 * freqently used PDM passes it as parameter.
65 * @param pCfg Configuration node handle for the driver. This is
66 * expected to be in high demand in the constructor and is
67 * therefore passed as an argument. When using it at other
68 * times, it can be found in pDrvIns->pCfg.
69 */
70typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
71/** Pointer to a FNPDMDEVCONSTRUCT() function. */
72typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
73
74/**
75 * Destruct a device instance.
76 *
77 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
78 * resources can be freed correctly.
79 *
80 * @returns VBox status.
81 * @param pDevIns The device instance data.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remark A relocation CANNOT fail.
102 */
103typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
104/** Pointer to a FNPDMDEVRELOCATE() function. */
105typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
106
107/**
108 * Device I/O Control interface.
109 *
110 * This is used by external components, such as the COM interface, to
111 * communicate with devices using a class wide interface or a device
112 * specific interface.
113 *
114 * @returns VBox status code.
115 * @param pDevIns Pointer to the device instance.
116 * @param uFunction Function to perform.
117 * @param pvIn Pointer to input data.
118 * @param cbIn Size of input data.
119 * @param pvOut Pointer to output data.
120 * @param cbOut Size of output data.
121 * @param pcbOut Where to store the actual size of the output data.
122 */
123typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
124 void *pvIn, RTUINT cbIn,
125 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
126/** Pointer to a FNPDMDEVIOCTL() function. */
127typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
128
129/**
130 * Power On notification.
131 *
132 * @returns VBox status.
133 * @param pDevIns The device instance data.
134 */
135typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
136/** Pointer to a FNPDMDEVPOWERON() function. */
137typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
138
139/**
140 * Reset notification.
141 *
142 * @returns VBox status.
143 * @param pDevIns The device instance data.
144 */
145typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
146/** Pointer to a FNPDMDEVRESET() function. */
147typedef FNPDMDEVRESET *PFNPDMDEVRESET;
148
149/**
150 * Suspend notification.
151 *
152 * @returns VBox status.
153 * @param pDevIns The device instance data.
154 * @thread EMT(0)
155 */
156typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVSUSPEND() function. */
158typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
159
160/**
161 * Resume notification.
162 *
163 * @returns VBox status.
164 * @param pDevIns The device instance data.
165 */
166typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
167/** Pointer to a FNPDMDEVRESUME() function. */
168typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
169
170/**
171 * Power Off notification.
172 *
173 * @param pDevIns The device instance data.
174 * @thread EMT(0)
175 */
176typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
177/** Pointer to a FNPDMDEVPOWEROFF() function. */
178typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
179
180/**
181 * Attach command.
182 *
183 * This is called to let the device attach to a driver for a specified LUN
184 * at runtime. This is not called during VM construction, the device
185 * constructor have to attach to all the available drivers.
186 *
187 * This is like plugging in the keyboard or mouse after turning on the PC.
188 *
189 * @returns VBox status code.
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
193 */
194typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
195/** Pointer to a FNPDMDEVATTACH() function. */
196typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
197
198/**
199 * Detach notification.
200 *
201 * This is called when a driver is detaching itself from a LUN of the device.
202 * The device should adjust it's state to reflect this.
203 *
204 * This is like unplugging the network cable to use it for the laptop or
205 * something while the PC is still running.
206 *
207 * @param pDevIns The device instance.
208 * @param iLUN The logical unit which is being detached.
209 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 */
223typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
224/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
225typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
226
227/**
228 * Init complete notification.
229 * This can be done to do communication with other devices and other
230 * initialization which requires everything to be in place.
231 *
232 * @returns VBOX status code.
233 * @param pDevIns The device instance.
234 */
235typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
236/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
237typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
238
239
240
241/**
242 * PDM Device Registration Structure.
243 *
244 * This structure is used when registering a device from VBoxInitDevices() in HC
245 * Ring-3. PDM will continue use till the VM is terminated.
246 */
247typedef struct PDMDEVREG
248{
249 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
250 uint32_t u32Version;
251 /** Device name. */
252 char szName[32];
253 /** Name of the raw-mode context module (no path).
254 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
255 char szRCMod[32];
256 /** Name of the ring-0 module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
258 char szR0Mod[32];
259 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
260 * remain unchanged from registration till VM destruction. */
261 const char *pszDescription;
262
263 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
264 uint32_t fFlags;
265 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
266 uint32_t fClass;
267 /** Maximum number of instances (per VM). */
268 uint32_t cMaxInstances;
269 /** Size of the instance data. */
270 uint32_t cbInstance;
271
272 /** Construct instance - required. */
273 PFNPDMDEVCONSTRUCT pfnConstruct;
274 /** Destruct instance - optional. */
275 PFNPDMDEVDESTRUCT pfnDestruct;
276 /** Relocation command - optional. */
277 PFNPDMDEVRELOCATE pfnRelocate;
278 /** I/O Control interface - optional. */
279 PFNPDMDEVIOCTL pfnIOCtl;
280 /** Power on notification - optional. */
281 PFNPDMDEVPOWERON pfnPowerOn;
282 /** Reset notification - optional. */
283 PFNPDMDEVRESET pfnReset;
284 /** Suspend notification - optional. */
285 PFNPDMDEVSUSPEND pfnSuspend;
286 /** Resume notification - optional. */
287 PFNPDMDEVRESUME pfnResume;
288 /** Attach command - optional. */
289 PFNPDMDEVATTACH pfnAttach;
290 /** Detach notification - optional. */
291 PFNPDMDEVDETACH pfnDetach;
292 /** Query a LUN base interface - optional. */
293 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
294 /** Init complete notification - optional. */
295 PFNPDMDEVINITCOMPLETE pfnInitComplete;
296 /** Power off notification - optional. */
297 PFNPDMDEVPOWEROFF pfnPowerOff;
298 /** @todo */
299 PFNRT pfnSoftReset;
300 /** Initialization safty marker. */
301 uint32_t u32VersionEnd;
302} PDMDEVREG;
303/** Pointer to a PDM Device Structure. */
304typedef PDMDEVREG *PPDMDEVREG;
305/** Const pointer to a PDM Device Structure. */
306typedef PDMDEVREG const *PCPDMDEVREG;
307
308/** Current DEVREG version number. */
309#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
310
311/** PDM Device Flags.
312 * @{ */
313/** This flag is used to indicate that the device has a RC component. */
314#define PDM_DEVREG_FLAGS_RC 0x00000001
315/** This flag is used to indicate that the device has a R0 component. */
316#define PDM_DEVREG_FLAGS_R0 0x00000002
317
318/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
319 * The bit count for the current host. */
320#if HC_ARCH_BITS == 32
321# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
322#elif HC_ARCH_BITS == 64
323# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
324#else
325# error Unsupported HC_ARCH_BITS value.
326#endif
327/** The host bit count mask. */
328#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
329
330/** The device support only 32-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
332/** The device support only 64-bit guests. */
333#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
334/** The device support both 32-bit & 64-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
336/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
337 * The guest bit count for the current compilation. */
338#if GC_ARCH_BITS == 32
339# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
340#elif GC_ARCH_BITS == 64
341# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
342#else
343# error Unsupported GC_ARCH_BITS value.
344#endif
345/** The guest bit count mask. */
346#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
347
348/** A convenience. */
349#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
350
351/** Indicates that the devices support PAE36 on a 32-bit guest. */
352#define PDM_DEVREG_FLAGS_PAE36 0x00001000
353
354/** Indicates that the device needs to be notified before the drivers when suspending. */
355#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
356
357/** Indicates that the device needs to be notified before the drivers when powering off. */
358#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
359/** @} */
360
361
362/** PDM Device Classes.
363 * The order is important, lower bit earlier instantiation.
364 * @{ */
365/** Architecture device. */
366#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
367/** Architecture BIOS device. */
368#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
369/** PCI bus brigde. */
370#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
371/** ISA bus brigde. */
372#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
373/** Input device (mouse, keyboard, joystick, HID, ...). */
374#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
375/** Interrupt controller (PIC). */
376#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
377/** Interval controoler (PIT). */
378#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
379/** RTC/CMOS. */
380#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
381/** DMA controller. */
382#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
383/** VMM Device. */
384#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
385/** Graphics device, like VGA. */
386#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
387/** Storage controller device. */
388#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
389/** Network interface controller. */
390#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
391/** Audio. */
392#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
393/** USB HIC. */
394#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
395/** ACPI. */
396#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
397/** Serial controller device. */
398#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
399/** Parallel controller device */
400#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
401/** Misc devices (always last). */
402#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
403/** @} */
404
405
406/** @name IRQ Level for use with the *SetIrq APIs.
407 * @{
408 */
409/** Assert the IRQ (can assume value 1). */
410#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
411/** Deassert the IRQ (can assume value 0). */
412#define PDM_IRQ_LEVEL_LOW 0
413/** flip-flop - assert and then deassert it again immediately. */
414#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
415/** @} */
416
417
418/**
419 * PCI Bus registration structure.
420 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
421 */
422typedef struct PDMPCIBUSREG
423{
424 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
425 uint32_t u32Version;
426
427 /**
428 * Registers the device with the default PCI bus.
429 *
430 * @returns VBox status code.
431 * @param pDevIns Device instance of the PCI Bus.
432 * @param pPciDev The PCI device structure.
433 * Any PCI enabled device must keep this in it's instance data!
434 * Fill in the PCI data config before registration, please.
435 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
436 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
437 * If negative, the pci bus device will assign one.
438 */
439 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
440
441 /**
442 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
443 *
444 * @returns VBox status code.
445 * @param pDevIns Device instance of the PCI Bus.
446 * @param pPciDev The PCI device structure.
447 * @param iRegion The region number.
448 * @param cbRegion Size of the region.
449 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
450 * @param pfnCallback Callback for doing the mapping.
451 */
452 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
453
454 /**
455 * Register PCI configuration space read/write callbacks.
456 *
457 * @param pDevIns Device instance of the PCI Bus.
458 * @param pPciDev The PCI device structure.
459 * @param pfnRead Pointer to the user defined PCI config read function.
460 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
461 * PCI config read function. This way, user can decide when (and if)
462 * to call default PCI config read function. Can be NULL.
463 * @param pfnWrite Pointer to the user defined PCI config write function.
464 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
465 * PCI config write function. This way, user can decide when (and if)
466 * to call default PCI config write function. Can be NULL.
467 * @thread EMT
468 */
469 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
470 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
471
472 /**
473 * Set the IRQ for a PCI device.
474 *
475 * @param pDevIns Device instance of the PCI Bus.
476 * @param pPciDev The PCI device structure.
477 * @param iIrq IRQ number to set.
478 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
479 */
480 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
481
482 /**
483 * Saves a state of the PCI device.
484 *
485 * @returns VBox status code.
486 * @param pDevIns Device instance of the PCI Bus.
487 * @param pPciDev Pointer to PCI device.
488 * @param pSSMHandle The handle to save the state to.
489 */
490 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
491
492 /**
493 * Loads a saved PCI device state.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev Pointer to PCI device.
498 * @param pSSMHandle The handle to the saved state.
499 */
500 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
501
502 /**
503 * Called to perform the job of the bios.
504 * This is only called for the first PCI Bus - it is expected to
505 * service all the PCI buses.
506 *
507 * @returns VBox status.
508 * @param pDevIns Device instance of the first bus.
509 */
510 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
511
512 /** The name of the SetIrq RC entry point. */
513 const char *pszSetIrqRC;
514
515 /** The name of the SetIrq R0 entry point. */
516 const char *pszSetIrqR0;
517
518} PDMPCIBUSREG;
519/** Pointer to a PCI bus registration structure. */
520typedef PDMPCIBUSREG *PPDMPCIBUSREG;
521
522/** Current PDMPCIBUSREG version number. */
523#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 1, 0)
524
525/**
526 * PCI Bus RC helpers.
527 */
528typedef struct PDMPCIHLPRC
529{
530 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
531 uint32_t u32Version;
532
533 /**
534 * Set an ISA IRQ.
535 *
536 * @param pDevIns PCI device instance.
537 * @param iIrq IRQ number to set.
538 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
539 * @thread EMT only.
540 */
541 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
542
543 /**
544 * Set an I/O-APIC IRQ.
545 *
546 * @param pDevIns PCI device instance.
547 * @param iIrq IRQ number to set.
548 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
549 * @thread EMT only.
550 */
551 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
552
553 /**
554 * Acquires the PDM lock.
555 *
556 * @returns VINF_SUCCESS on success.
557 * @returns rc if we failed to acquire the lock.
558 * @param pDevIns The PCI device instance.
559 * @param rc What to return if we fail to acquire the lock.
560 */
561 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
562
563 /**
564 * Releases the PDM lock.
565 *
566 * @param pDevIns The PCI device instance.
567 */
568 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
569
570 /** Just a safety precaution. */
571 uint32_t u32TheEnd;
572} PDMPCIHLPRC;
573/** Pointer to PCI helpers. */
574typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
575/** Pointer to const PCI helpers. */
576typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
577
578/** Current PDMPCIHLPR3 version number. */
579#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 1, 0)
580
581
582/**
583 * PCI Bus R0 helpers.
584 */
585typedef struct PDMPCIHLPR0
586{
587 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
588 uint32_t u32Version;
589
590 /**
591 * Set an ISA IRQ.
592 *
593 * @param pDevIns PCI device instance.
594 * @param iIrq IRQ number to set.
595 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
596 * @thread EMT only.
597 */
598 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
599
600 /**
601 * Set an I/O-APIC IRQ.
602 *
603 * @param pDevIns PCI device instance.
604 * @param iIrq IRQ number to set.
605 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
606 * @thread EMT only.
607 */
608 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
609
610 /**
611 * Acquires the PDM lock.
612 *
613 * @returns VINF_SUCCESS on success.
614 * @returns rc if we failed to acquire the lock.
615 * @param pDevIns The PCI device instance.
616 * @param rc What to return if we fail to acquire the lock.
617 */
618 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
619
620 /**
621 * Releases the PDM lock.
622 *
623 * @param pDevIns The PCI device instance.
624 */
625 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
626
627 /** Just a safety precaution. */
628 uint32_t u32TheEnd;
629} PDMPCIHLPR0;
630/** Pointer to PCI helpers. */
631typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
632/** Pointer to const PCI helpers. */
633typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
634
635/** Current PDMPCIHLPR0 version number. */
636#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 1, 0)
637
638/**
639 * PCI device helpers.
640 */
641typedef struct PDMPCIHLPR3
642{
643 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
644 uint32_t u32Version;
645
646 /**
647 * Set an ISA IRQ.
648 *
649 * @param pDevIns The PCI device instance.
650 * @param iIrq IRQ number to set.
651 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
652 * @thread EMT only.
653 */
654 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
655
656 /**
657 * Set an I/O-APIC IRQ.
658 *
659 * @param pDevIns The PCI device instance.
660 * @param iIrq IRQ number to set.
661 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
662 * @thread EMT only.
663 */
664 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
665
666 /**
667 * Checks if the given address is an MMIO2 base address or not.
668 *
669 * @returns true/false accordingly.
670 * @param pDevIns The PCI device instance.
671 * @param pOwner The owner of the memory, optional.
672 * @param GCPhys The address to check.
673 */
674 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
675
676 /**
677 * Gets the address of the RC PCI Bus helpers.
678 *
679 * This should be called at both construction and relocation time
680 * to obtain the correct address of the RC helpers.
681 *
682 * @returns RC pointer to the PCI Bus helpers.
683 * @param pDevIns Device instance of the PCI Bus.
684 * @thread EMT only.
685 */
686 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
687
688 /**
689 * Gets the address of the R0 PCI Bus helpers.
690 *
691 * This should be called at both construction and relocation time
692 * to obtain the correct address of the R0 helpers.
693 *
694 * @returns R0 pointer to the PCI Bus helpers.
695 * @param pDevIns Device instance of the PCI Bus.
696 * @thread EMT only.
697 */
698 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
699
700 /**
701 * Acquires the PDM lock.
702 *
703 * @returns VINF_SUCCESS on success.
704 * @returns Fatal error on failure.
705 * @param pDevIns The PCI device instance.
706 * @param rc Dummy for making the interface identical to the RC and R0 versions.
707 */
708 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
709
710 /**
711 * Releases the PDM lock.
712 *
713 * @param pDevIns The PCI device instance.
714 */
715 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
716
717 /** Just a safety precaution. */
718 uint32_t u32TheEnd;
719} PDMPCIHLPR3;
720/** Pointer to PCI helpers. */
721typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
722/** Pointer to const PCI helpers. */
723typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
724
725/** Current PDMPCIHLPR3 version number. */
726#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 1, 0)
727
728
729/**
730 * Programmable Interrupt Controller registration structure.
731 */
732typedef struct PDMPICREG
733{
734 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set the an IRQ.
739 *
740 * @param pDevIns Device instance of the PIC.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 */
744 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
745
746 /**
747 * Get a pending interrupt.
748 *
749 * @returns Pending interrupt number.
750 * @param pDevIns Device instance of the PIC.
751 */
752 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
753
754 /** The name of the RC SetIrq entry point. */
755 const char *pszSetIrqRC;
756 /** The name of the RC GetInterrupt entry point. */
757 const char *pszGetInterruptRC;
758
759 /** The name of the R0 SetIrq entry point. */
760 const char *pszSetIrqR0;
761 /** The name of the R0 GetInterrupt entry point. */
762 const char *pszGetInterruptR0;
763} PDMPICREG;
764/** Pointer to a PIC registration structure. */
765typedef PDMPICREG *PPDMPICREG;
766
767/** Current PDMPICREG version number. */
768#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
769
770/**
771 * PIC RC helpers.
772 */
773typedef struct PDMPICHLPRC
774{
775 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
776 uint32_t u32Version;
777
778 /**
779 * Set the interrupt force action flag.
780 *
781 * @param pDevIns Device instance of the PIC.
782 */
783 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
784
785 /**
786 * Clear the interrupt force action flag.
787 *
788 * @param pDevIns Device instance of the PIC.
789 */
790 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
791
792 /**
793 * Acquires the PDM lock.
794 *
795 * @returns VINF_SUCCESS on success.
796 * @returns rc if we failed to acquire the lock.
797 * @param pDevIns The PIC device instance.
798 * @param rc What to return if we fail to acquire the lock.
799 */
800 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
801
802 /**
803 * Releases the PDM lock.
804 *
805 * @param pDevIns The PIC device instance.
806 */
807 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
808
809 /** Just a safety precaution. */
810 uint32_t u32TheEnd;
811} PDMPICHLPRC;
812
813/** Pointer to PIC RC helpers. */
814typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
815/** Pointer to const PIC RC helpers. */
816typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
817
818/** Current PDMPICHLPRC version number. */
819#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
820
821
822/**
823 * PIC R0 helpers.
824 */
825typedef struct PDMPICHLPR0
826{
827 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
828 uint32_t u32Version;
829
830 /**
831 * Set the interrupt force action flag.
832 *
833 * @param pDevIns Device instance of the PIC.
834 */
835 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
836
837 /**
838 * Clear the interrupt force action flag.
839 *
840 * @param pDevIns Device instance of the PIC.
841 */
842 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
843
844 /**
845 * Acquires the PDM lock.
846 *
847 * @returns VINF_SUCCESS on success.
848 * @returns rc if we failed to acquire the lock.
849 * @param pDevIns The PIC device instance.
850 * @param rc What to return if we fail to acquire the lock.
851 */
852 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
853
854 /**
855 * Releases the PDM lock.
856 *
857 * @param pDevIns The PCI device instance.
858 */
859 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
860
861 /** Just a safety precaution. */
862 uint32_t u32TheEnd;
863} PDMPICHLPR0;
864
865/** Pointer to PIC R0 helpers. */
866typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
867/** Pointer to const PIC R0 helpers. */
868typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
869
870/** Current PDMPICHLPR0 version number. */
871#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
872
873/**
874 * PIC R3 helpers.
875 */
876typedef struct PDMPICHLPR3
877{
878 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
879 uint32_t u32Version;
880
881 /**
882 * Set the interrupt force action flag.
883 *
884 * @param pDevIns Device instance of the PIC.
885 */
886 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
887
888 /**
889 * Clear the interrupt force action flag.
890 *
891 * @param pDevIns Device instance of the PIC.
892 */
893 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
894
895 /**
896 * Acquires the PDM lock.
897 *
898 * @returns VINF_SUCCESS on success.
899 * @returns Fatal error on failure.
900 * @param pDevIns The PIC device instance.
901 * @param rc Dummy for making the interface identical to the RC and R0 versions.
902 */
903 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
904
905 /**
906 * Releases the PDM lock.
907 *
908 * @param pDevIns The PIC device instance.
909 */
910 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
911
912 /**
913 * Gets the address of the RC PIC helpers.
914 *
915 * This should be called at both construction and relocation time
916 * to obtain the correct address of the RC helpers.
917 *
918 * @returns RC pointer to the PIC helpers.
919 * @param pDevIns Device instance of the PIC.
920 */
921 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
922
923 /**
924 * Gets the address of the R0 PIC helpers.
925 *
926 * This should be called at both construction and relocation time
927 * to obtain the correct address of the R0 helpers.
928 *
929 * @returns R0 pointer to the PIC helpers.
930 * @param pDevIns Device instance of the PIC.
931 */
932 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
933
934 /** Just a safety precaution. */
935 uint32_t u32TheEnd;
936} PDMPICHLPR3;
937
938/** Pointer to PIC R3 helpers. */
939typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
940/** Pointer to const PIC R3 helpers. */
941typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
942
943/** Current PDMPICHLPR3 version number. */
944#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
945
946
947
948/**
949 * Advanced Programmable Interrupt Controller registration structure.
950 */
951typedef struct PDMAPICREG
952{
953 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
954 uint32_t u32Version;
955
956 /**
957 * Get a pending interrupt.
958 *
959 * @returns Pending interrupt number.
960 * @param pDevIns Device instance of the APIC.
961 */
962 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
963
964 /**
965 * Check if the APIC has a pending interrupt/if a TPR change would active one
966 *
967 * @returns Pending interrupt yes/no
968 * @param pDevIns Device instance of the APIC.
969 */
970 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
971
972 /**
973 * Set the APIC base.
974 *
975 * @param pDevIns Device instance of the APIC.
976 * @param u64Base The new base.
977 */
978 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
979
980 /**
981 * Get the APIC base.
982 *
983 * @returns Current base.
984 * @param pDevIns Device instance of the APIC.
985 */
986 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
987
988 /**
989 * Set the TPR (task priority register).
990 *
991 * @param pDevIns Device instance of the APIC.
992 * @param idCpu VCPU id
993 * @param u8TPR The new TPR.
994 */
995 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
996
997 /**
998 * Get the TPR (task priority register).
999 *
1000 * @returns The current TPR.
1001 * @param pDevIns Device instance of the APIC.
1002 * @param idCpu VCPU id
1003 */
1004 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1005
1006 /**
1007 * Write MSR in APIC range.
1008 *
1009 * @returns VBox status code.
1010 * @param pDevIns Device instance of the APIC.
1011 * @param idCpu Target CPU.
1012 * @param u32Reg MSR to write.
1013 * @param u64Value Value to write.
1014 */
1015 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1016
1017 /**
1018 * Read MSR in APIC range.
1019 *
1020 * @returns VBox status code.
1021 * @param pDevIns Device instance of the APIC.
1022 * @param idCpu Target CPU.
1023 * @param u32Reg MSR to read.
1024 * @param pu64Value Value read.
1025 */
1026 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1027
1028 /**
1029 * Private interface between the IOAPIC and APIC.
1030 *
1031 * This is a low-level, APIC/IOAPIC implementation specific interface
1032 * which is registered with PDM only because it makes life so much
1033 * simpler right now (GC bits). This is a bad bad hack! The correct
1034 * way of doing this would involve some way of querying GC interfaces
1035 * and relocating them. Perhaps doing some kind of device init in GC...
1036 *
1037 * @returns status code.
1038 * @param pDevIns Device instance of the APIC.
1039 * @param u8Dest See APIC implementation.
1040 * @param u8DestMode See APIC implementation.
1041 * @param u8DeliveryMode See APIC implementation.
1042 * @param iVector See APIC implementation.
1043 * @param u8Polarity See APIC implementation.
1044 * @param u8TriggerMode See APIC implementation.
1045 */
1046 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1047 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1048
1049 /**
1050 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1051 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1052 *
1053 * @returns status code.
1054 * @param pDevIns Device instance of the APIC.
1055 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1056 */
1057 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1058
1059 /** The name of the RC GetInterrupt entry point. */
1060 const char *pszGetInterruptRC;
1061 /** The name of the RC HasPendingIrq entry point. */
1062 const char *pszHasPendingIrqRC;
1063 /** The name of the RC SetBase entry point. */
1064 const char *pszSetBaseRC;
1065 /** The name of the RC GetBase entry point. */
1066 const char *pszGetBaseRC;
1067 /** The name of the RC SetTPR entry point. */
1068 const char *pszSetTPRRC;
1069 /** The name of the RC GetTPR entry point. */
1070 const char *pszGetTPRRC;
1071 /** The name of the RC WriteMSR entry point. */
1072 const char *pszWriteMSRRC;
1073 /** The name of the RC ReadMSR entry point. */
1074 const char *pszReadMSRRC;
1075 /** The name of the RC BusDeliver entry point. */
1076 const char *pszBusDeliverRC;
1077 /** The name of the RC LocalInterrupt entry point. */
1078 const char *pszLocalInterruptRC;
1079
1080 /** The name of the R0 GetInterrupt entry point. */
1081 const char *pszGetInterruptR0;
1082 /** The name of the R0 HasPendingIrq entry point. */
1083 const char *pszHasPendingIrqR0;
1084 /** The name of the R0 SetBase entry point. */
1085 const char *pszSetBaseR0;
1086 /** The name of the R0 GetBase entry point. */
1087 const char *pszGetBaseR0;
1088 /** The name of the R0 SetTPR entry point. */
1089 const char *pszSetTPRR0;
1090 /** The name of the R0 GetTPR entry point. */
1091 const char *pszGetTPRR0;
1092 /** The name of the R0 WriteMSR entry point. */
1093 const char *pszWriteMSRR0;
1094 /** The name of the R0 ReadMSR entry point. */
1095 const char *pszReadMSRR0;
1096 /** The name of the R0 BusDeliver entry point. */
1097 const char *pszBusDeliverR0;
1098 /** The name of the R0 LocalInterrupt entry point. */
1099 const char *pszLocalInterruptR0;
1100
1101} PDMAPICREG;
1102/** Pointer to an APIC registration structure. */
1103typedef PDMAPICREG *PPDMAPICREG;
1104
1105/** Current PDMAPICREG version number. */
1106#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1107
1108
1109/**
1110 * APIC version argument for pfnChangeFeature.
1111 */
1112typedef enum PDMAPICVERSION
1113{
1114 /** Invalid 0 entry. */
1115 PDMAPICVERSION_INVALID = 0,
1116 /** No APIC. */
1117 PDMAPICVERSION_NONE,
1118 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1119 PDMAPICVERSION_APIC,
1120 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1121 PDMAPICVERSION_X2APIC,
1122 /** The usual 32-bit paranoia. */
1123 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1124} PDMAPICVERSION;
1125
1126/**
1127 * APIC irq argument for SetInterruptFF.
1128 */
1129typedef enum PDMAPICIRQ
1130{
1131 /** Invalid 0 entry. */
1132 PDMAPICIRQ_INVALID = 0,
1133 /** Normal hardware interrupt. */
1134 PDMAPICIRQ_HARDWARE,
1135 /** NMI. */
1136 PDMAPICIRQ_NMI,
1137 /** SMI. */
1138 PDMAPICIRQ_SMI,
1139 /** ExtINT (HW interrupt via PIC). */
1140 PDMAPICIRQ_EXTINT,
1141 /** The usual 32-bit paranoia. */
1142 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1143} PDMAPICIRQ;
1144
1145
1146/**
1147 * APIC RC helpers.
1148 */
1149typedef struct PDMAPICHLPRC
1150{
1151 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1152 uint32_t u32Version;
1153
1154 /**
1155 * Set the interrupt force action flag.
1156 *
1157 * @param pDevIns Device instance of the APIC.
1158 * @param enmType IRQ type.
1159 * @param idCpu Virtual CPU to set flag upon.
1160 */
1161 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1162
1163 /**
1164 * Clear the interrupt force action flag.
1165 *
1166 * @param pDevIns Device instance of the APIC.
1167 * @param enmType IRQ type.
1168 * @param idCpu Virtual CPU to clear flag upon.
1169 */
1170 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1171
1172 /**
1173 * Modifies APIC-related bits in the CPUID feature mask.
1174 *
1175 * @param pDevIns Device instance of the APIC.
1176 * @param enmVersion Supported APIC version.
1177 */
1178 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1179
1180 /**
1181 * Acquires the PDM lock.
1182 *
1183 * @returns VINF_SUCCESS on success.
1184 * @returns rc if we failed to acquire the lock.
1185 * @param pDevIns The APIC device instance.
1186 * @param rc What to return if we fail to acquire the lock.
1187 */
1188 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1189
1190 /**
1191 * Releases the PDM lock.
1192 *
1193 * @param pDevIns The APIC device instance.
1194 */
1195 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1196
1197 /**
1198 * Get the virtual CPU id corresponding to the current EMT.
1199 *
1200 * @param pDevIns The APIC device instance.
1201 */
1202 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1203
1204 /** Just a safety precaution. */
1205 uint32_t u32TheEnd;
1206} PDMAPICHLPRC;
1207/** Pointer to APIC GC helpers. */
1208typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1209/** Pointer to const APIC helpers. */
1210typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1211
1212/** Current PDMAPICHLPRC version number. */
1213#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1214
1215
1216/**
1217 * APIC R0 helpers.
1218 */
1219typedef struct PDMAPICHLPR0
1220{
1221 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1222 uint32_t u32Version;
1223
1224 /**
1225 * Set the interrupt force action flag.
1226 *
1227 * @param pDevIns Device instance of the APIC.
1228 * @param enmType IRQ type.
1229 * @param idCpu Virtual CPU to set flag upon.
1230 */
1231 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1232
1233 /**
1234 * Clear the interrupt force action flag.
1235 *
1236 * @param pDevIns Device instance of the APIC.
1237 * @param enmType IRQ type.
1238 * @param idCpu Virtual CPU to clear flag upon.
1239 */
1240 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1241
1242 /**
1243 * Modifies APIC-related bits in the CPUID feature mask.
1244 *
1245 * @param pDevIns Device instance of the APIC.
1246 * @param enmVersion Supported APIC version.
1247 */
1248 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1249
1250 /**
1251 * Acquires the PDM lock.
1252 *
1253 * @returns VINF_SUCCESS on success.
1254 * @returns rc if we failed to acquire the lock.
1255 * @param pDevIns The APIC device instance.
1256 * @param rc What to return if we fail to acquire the lock.
1257 */
1258 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1259
1260 /**
1261 * Releases the PDM lock.
1262 *
1263 * @param pDevIns The APIC device instance.
1264 */
1265 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1266
1267 /**
1268 * Get the virtual CPU id corresponding to the current EMT.
1269 *
1270 * @param pDevIns The APIC device instance.
1271 */
1272 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1273
1274 /** Just a safety precaution. */
1275 uint32_t u32TheEnd;
1276} PDMAPICHLPR0;
1277/** Pointer to APIC GC helpers. */
1278typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1279/** Pointer to const APIC helpers. */
1280typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1281
1282/** Current PDMAPICHLPR0 version number. */
1283#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1284
1285/**
1286 * APIC R3 helpers.
1287 */
1288typedef struct PDMAPICHLPR3
1289{
1290 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1291 uint32_t u32Version;
1292
1293 /**
1294 * Set the interrupt force action flag.
1295 *
1296 * @param pDevIns Device instance of the APIC.
1297 * @param enmType IRQ type.
1298 * @param idCpu Virtual CPU to set flag upon.
1299 */
1300 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1301
1302 /**
1303 * Clear the interrupt force action flag.
1304 *
1305 * @param pDevIns Device instance of the APIC.
1306 * @param enmType IRQ type.
1307 * @param idCpu Virtual CPU to clear flag upon.
1308 */
1309 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1310
1311 /**
1312 * Modifies APIC-related bits in the CPUID feature mask.
1313 *
1314 * @param pDevIns Device instance of the APIC.
1315 * @param enmVersion Supported APIC version.
1316 */
1317 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1318
1319 /**
1320 * Get the virtual CPU id corresponding to the current EMT.
1321 *
1322 * @param pDevIns The APIC device instance.
1323 */
1324 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1325
1326 /**
1327 * Sends SIPI to given virtual CPU.
1328 *
1329 * @param pDevIns The APIC device instance.
1330 * @param idCpu Virtual CPU to perform SIPI on
1331 * @param iVector SIPI vector
1332 */
1333 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1334
1335 /**
1336 * Sends init IPI to given virtual CPU, should result in reset and
1337 * halting till SIPI.
1338 *
1339 * @param pDevIns The APIC device instance.
1340 * @param idCpu Virtual CPU to perform SIPI on
1341 */
1342 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1343
1344 /**
1345 * Gets the address of the RC APIC helpers.
1346 *
1347 * This should be called at both construction and relocation time
1348 * to obtain the correct address of the RC helpers.
1349 *
1350 * @returns GC pointer to the APIC helpers.
1351 * @param pDevIns Device instance of the APIC.
1352 */
1353 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1354
1355 /**
1356 * Gets the address of the R0 APIC helpers.
1357 *
1358 * This should be called at both construction and relocation time
1359 * to obtain the correct address of the R0 helpers.
1360 *
1361 * @returns R0 pointer to the APIC helpers.
1362 * @param pDevIns Device instance of the APIC.
1363 */
1364 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1365
1366 /**
1367 * Get the critical section used to synchronize the PICs, PCI and stuff.
1368 *
1369 * @returns Ring-3 pointer to the critical section.
1370 * @param pDevIns The APIC device instance.
1371 */
1372 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1373
1374 /**
1375 * Get the critical section used to synchronize the PICs, PCI and stuff.
1376 *
1377 * @returns Raw-mode context pointer to the critical section.
1378 * @param pDevIns The APIC device instance.
1379 */
1380 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1381
1382 /**
1383 * Get the critical section used to synchronize the PICs, PCI and stuff.
1384 *
1385 * @returns Ring-0 pointer to the critical section.
1386 * @param pDevIns The APIC device instance.
1387 */
1388 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1389
1390 /** Just a safety precaution. */
1391 uint32_t u32TheEnd;
1392} PDMAPICHLPR3;
1393/** Pointer to APIC helpers. */
1394typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1395/** Pointer to const APIC helpers. */
1396typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1397
1398/** Current PDMAPICHLP version number. */
1399#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1400
1401
1402/**
1403 * I/O APIC registration structure.
1404 */
1405typedef struct PDMIOAPICREG
1406{
1407 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1408 uint32_t u32Version;
1409
1410 /**
1411 * Set the an IRQ.
1412 *
1413 * @param pDevIns Device instance of the I/O APIC.
1414 * @param iIrq IRQ number to set.
1415 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1416 */
1417 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1418
1419 /** The name of the GC SetIrq entry point. */
1420 const char *pszSetIrqRC;
1421
1422 /** The name of the R0 SetIrq entry point. */
1423 const char *pszSetIrqR0;
1424} PDMIOAPICREG;
1425/** Pointer to an APIC registration structure. */
1426typedef PDMIOAPICREG *PPDMIOAPICREG;
1427
1428/** Current PDMAPICREG version number. */
1429#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
1430
1431
1432/**
1433 * IOAPIC RC helpers.
1434 */
1435typedef struct PDMIOAPICHLPRC
1436{
1437 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1438 uint32_t u32Version;
1439
1440 /**
1441 * Private interface between the IOAPIC and APIC.
1442 *
1443 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1444 *
1445 * @returns status code.
1446 * @param pDevIns Device instance of the IOAPIC.
1447 * @param u8Dest See APIC implementation.
1448 * @param u8DestMode See APIC implementation.
1449 * @param u8DeliveryMode See APIC implementation.
1450 * @param iVector See APIC implementation.
1451 * @param u8Polarity See APIC implementation.
1452 * @param u8TriggerMode See APIC implementation.
1453 */
1454 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1456
1457 /**
1458 * Acquires the PDM lock.
1459 *
1460 * @returns VINF_SUCCESS on success.
1461 * @returns rc if we failed to acquire the lock.
1462 * @param pDevIns The IOAPIC device instance.
1463 * @param rc What to return if we fail to acquire the lock.
1464 */
1465 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1466
1467 /**
1468 * Releases the PDM lock.
1469 *
1470 * @param pDevIns The IOAPIC device instance.
1471 */
1472 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1473
1474 /** Just a safety precaution. */
1475 uint32_t u32TheEnd;
1476} PDMIOAPICHLPRC;
1477/** Pointer to IOAPIC RC helpers. */
1478typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1479/** Pointer to const IOAPIC helpers. */
1480typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1481
1482/** Current PDMIOAPICHLPRC version number. */
1483#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1484
1485
1486/**
1487 * IOAPIC R0 helpers.
1488 */
1489typedef struct PDMIOAPICHLPR0
1490{
1491 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1492 uint32_t u32Version;
1493
1494 /**
1495 * Private interface between the IOAPIC and APIC.
1496 *
1497 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1498 *
1499 * @returns status code.
1500 * @param pDevIns Device instance of the IOAPIC.
1501 * @param u8Dest See APIC implementation.
1502 * @param u8DestMode See APIC implementation.
1503 * @param u8DeliveryMode See APIC implementation.
1504 * @param iVector See APIC implementation.
1505 * @param u8Polarity See APIC implementation.
1506 * @param u8TriggerMode See APIC implementation.
1507 */
1508 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1509 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1510
1511 /**
1512 * Acquires the PDM lock.
1513 *
1514 * @returns VINF_SUCCESS on success.
1515 * @returns rc if we failed to acquire the lock.
1516 * @param pDevIns The IOAPIC device instance.
1517 * @param rc What to return if we fail to acquire the lock.
1518 */
1519 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1520
1521 /**
1522 * Releases the PDM lock.
1523 *
1524 * @param pDevIns The IOAPIC device instance.
1525 */
1526 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1527
1528 /** Just a safety precaution. */
1529 uint32_t u32TheEnd;
1530} PDMIOAPICHLPR0;
1531/** Pointer to IOAPIC R0 helpers. */
1532typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1533/** Pointer to const IOAPIC helpers. */
1534typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1535
1536/** Current PDMIOAPICHLPR0 version number. */
1537#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1538
1539/**
1540 * IOAPIC R3 helpers.
1541 */
1542typedef struct PDMIOAPICHLPR3
1543{
1544 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1545 uint32_t u32Version;
1546
1547 /**
1548 * Private interface between the IOAPIC and APIC.
1549 *
1550 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1551 *
1552 * @returns status code
1553 * @param pDevIns Device instance of the IOAPIC.
1554 * @param u8Dest See APIC implementation.
1555 * @param u8DestMode See APIC implementation.
1556 * @param u8DeliveryMode See APIC implementation.
1557 * @param iVector See APIC implementation.
1558 * @param u8Polarity See APIC implementation.
1559 * @param u8TriggerMode See APIC implementation.
1560 */
1561 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1562 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1563
1564 /**
1565 * Acquires the PDM lock.
1566 *
1567 * @returns VINF_SUCCESS on success.
1568 * @returns Fatal error on failure.
1569 * @param pDevIns The IOAPIC device instance.
1570 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1571 */
1572 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1573
1574 /**
1575 * Releases the PDM lock.
1576 *
1577 * @param pDevIns The IOAPIC device instance.
1578 */
1579 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1580
1581 /**
1582 * Gets the address of the RC IOAPIC helpers.
1583 *
1584 * This should be called at both construction and relocation time
1585 * to obtain the correct address of the RC helpers.
1586 *
1587 * @returns RC pointer to the IOAPIC helpers.
1588 * @param pDevIns Device instance of the IOAPIC.
1589 */
1590 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1591
1592 /**
1593 * Gets the address of the R0 IOAPIC helpers.
1594 *
1595 * This should be called at both construction and relocation time
1596 * to obtain the correct address of the R0 helpers.
1597 *
1598 * @returns R0 pointer to the IOAPIC helpers.
1599 * @param pDevIns Device instance of the IOAPIC.
1600 */
1601 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1602
1603 /** Just a safety precaution. */
1604 uint32_t u32TheEnd;
1605} PDMIOAPICHLPR3;
1606/** Pointer to IOAPIC R3 helpers. */
1607typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1608/** Pointer to const IOAPIC helpers. */
1609typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1610
1611/** Current PDMIOAPICHLPR3 version number. */
1612#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1613
1614
1615/**
1616 * HPET registration structure.
1617 */
1618typedef struct PDMHPETREG
1619{
1620 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1621 uint32_t u32Version;
1622
1623} PDMHPETREG;
1624/** Pointer to an HPET registration structure. */
1625typedef PDMHPETREG *PPDMHPETREG;
1626
1627/** Current PDMHPETREG version number. */
1628#define PDM_HPETREG_VERSION 0x1f010000
1629
1630/**
1631 * HPET RC helpers.
1632 */
1633typedef struct PDMHPETHLPRC
1634{
1635 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1636 uint32_t u32Version;
1637
1638 /**
1639 * Acquires the PDM lock.
1640 *
1641 * @returns VINF_SUCCESS on success.
1642 * @returns rc if we failed to acquire the lock.
1643 * @param pDevIns The HPET device instance.
1644 * @param rc What to return if we fail to acquire the lock.
1645 */
1646 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1647
1648 /**
1649 * Releases the PDM lock.
1650 *
1651 * @param pDevIns The HPET device instance.
1652 */
1653 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1654
1655 /** Just a safety precaution. */
1656 uint32_t u32TheEnd;
1657} PDMHPETHLPRC;
1658
1659/** Pointer to HPET RC helpers. */
1660typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1661/** Pointer to const HPET RC helpers. */
1662typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1663
1664/** Current PDMHPETHLPRC version number. */
1665#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 1, 0)
1666
1667
1668/**
1669 * HPET R0 helpers.
1670 */
1671typedef struct PDMHPETHLPR0
1672{
1673 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1674 uint32_t u32Version;
1675
1676 /**
1677 * Acquires the PDM lock.
1678 *
1679 * @returns VINF_SUCCESS on success.
1680 * @returns rc if we failed to acquire the lock.
1681 * @param pDevIns The HPET device instance.
1682 * @param rc What to return if we fail to acquire the lock.
1683 */
1684 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1685
1686 /**
1687 * Releases the PDM lock.
1688 *
1689 * @param pDevIns The HPET device instance.
1690 */
1691 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1692
1693 /** Just a safety precaution. */
1694 uint32_t u32TheEnd;
1695} PDMHPETHLPR0;
1696
1697/** Pointer to HPET R0 helpers. */
1698typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1699/** Pointer to const HPET R0 helpers. */
1700typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1701
1702/** Current PDMHPETHLPR0 version number. */
1703#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 1, 0)
1704
1705/**
1706 * HPET R3 helpers.
1707 */
1708typedef struct PDMHPETHLPR3
1709{
1710 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1711 uint32_t u32Version;
1712
1713 /**
1714 * Set the interrupt force action flag.
1715 *
1716 * @returns VINF_SUCCESS on success.
1717 * @returns rc if we failed to set legacy mode.
1718 * @param pDevIns Device instance of the HPET.
1719 * @param fActivate Activate or deactivate legacy mode.
1720 */
1721 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivate));
1722
1723 /**
1724 * Acquires the PDM lock.
1725 *
1726 * @returns VINF_SUCCESS on success.
1727 * @returns rc if we failed to acquire the lock.
1728 * @param pDevIns The HPET device instance.
1729 * @param rc What to return if we fail to acquire the lock.
1730 */
1731 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1732
1733 /**
1734 * Releases the PDM lock.
1735 *
1736 * @param pDevIns The HPET device instance.
1737 */
1738 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1739
1740 /**
1741 * Gets the address of the RC HPET helpers.
1742 *
1743 * This should be called at both construction and relocation time
1744 * to obtain the correct address of the RC helpers.
1745 *
1746 * @returns RC pointer to the HPET helpers.
1747 * @param pDevIns Device instance of the HPET.
1748 */
1749 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1750
1751 /**
1752 * Gets the address of the R0 HPET helpers.
1753 *
1754 * This should be called at both construction and relocation time
1755 * to obtain the correct address of the R0 helpers.
1756 *
1757 * @returns R0 pointer to the HPET helpers.
1758 * @param pDevIns Device instance of the HPET.
1759 */
1760 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1761
1762 /** Just a safety precaution. */
1763 uint32_t u32TheEnd;
1764} PDMHPETHLPR3;
1765
1766/** Pointer to HPET R3 helpers. */
1767typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1768/** Pointer to const HPET R3 helpers. */
1769typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1770
1771/** Current PDMHPETHLPR3 version number. */
1772#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 1, 0)
1773
1774
1775
1776#ifdef IN_RING3
1777
1778/**
1779 * DMA Transfer Handler.
1780 *
1781 * @returns Number of bytes transferred.
1782 * @param pDevIns Device instance of the DMA.
1783 * @param pvUser User pointer.
1784 * @param uChannel Channel number.
1785 * @param off DMA position.
1786 * @param cb Block size.
1787 */
1788typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1789/** Pointer to a FNDMATRANSFERHANDLER(). */
1790typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1791
1792/**
1793 * DMA Controller registration structure.
1794 */
1795typedef struct PDMDMAREG
1796{
1797 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1798 uint32_t u32Version;
1799
1800 /**
1801 * Execute pending transfers.
1802 *
1803 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1804 * @param pDevIns Device instance of the DMAC.
1805 */
1806 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1807
1808 /**
1809 * Register transfer function for DMA channel.
1810 *
1811 * @param pDevIns Device instance of the DMAC.
1812 * @param uChannel Channel number.
1813 * @param pfnTransferHandler Device specific transfer function.
1814 * @param pvUSer User pointer to be passed to the callback.
1815 */
1816 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1817
1818 /**
1819 * Read memory
1820 *
1821 * @returns Number of bytes read.
1822 * @param pDevIns Device instance of the DMAC.
1823 * @param pvBuffer Pointer to target buffer.
1824 * @param off DMA position.
1825 * @param cbBlock Block size.
1826 */
1827 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1828
1829 /**
1830 * Write memory
1831 *
1832 * @returns Number of bytes written.
1833 * @param pDevIns Device instance of the DMAC.
1834 * @param pvBuffer Memory to write.
1835 * @param off DMA position.
1836 * @param cbBlock Block size.
1837 */
1838 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1839
1840 /**
1841 * Set the DREQ line.
1842 *
1843 * @param pDevIns Device instance of the DMAC.
1844 * @param uChannel Channel number.
1845 * @param uLevel Level of the line.
1846 */
1847 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1848
1849 /**
1850 * Get channel mode
1851 *
1852 * @returns Channel mode.
1853 * @param pDevIns Device instance of the DMAC.
1854 * @param uChannel Channel number.
1855 */
1856 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1857
1858} PDMDMACREG;
1859/** Pointer to a DMAC registration structure. */
1860typedef PDMDMACREG *PPDMDMACREG;
1861
1862/** Current PDMDMACREG version number. */
1863#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1864
1865
1866/**
1867 * DMA Controller device helpers.
1868 */
1869typedef struct PDMDMACHLP
1870{
1871 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1872 uint32_t u32Version;
1873
1874 /* to-be-defined */
1875
1876} PDMDMACHLP;
1877/** Pointer to DMAC helpers. */
1878typedef PDMDMACHLP *PPDMDMACHLP;
1879/** Pointer to const DMAC helpers. */
1880typedef const PDMDMACHLP *PCPDMDMACHLP;
1881
1882/** Current PDMDMACHLP version number. */
1883#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1884
1885#endif /* IN_RING3 */
1886
1887
1888
1889/**
1890 * RTC registration structure.
1891 */
1892typedef struct PDMRTCREG
1893{
1894 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1895 uint32_t u32Version;
1896 uint32_t u32Alignment; /**< structure size alignment. */
1897
1898 /**
1899 * Write to a CMOS register and update the checksum if necessary.
1900 *
1901 * @returns VBox status code.
1902 * @param pDevIns Device instance of the RTC.
1903 * @param iReg The CMOS register index.
1904 * @param u8Value The CMOS register value.
1905 */
1906 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1907
1908 /**
1909 * Read a CMOS register.
1910 *
1911 * @returns VBox status code.
1912 * @param pDevIns Device instance of the RTC.
1913 * @param iReg The CMOS register index.
1914 * @param pu8Value Where to store the CMOS register value.
1915 */
1916 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1917
1918} PDMRTCREG;
1919/** Pointer to a RTC registration structure. */
1920typedef PDMRTCREG *PPDMRTCREG;
1921/** Pointer to a const RTC registration structure. */
1922typedef const PDMRTCREG *PCPDMRTCREG;
1923
1924/** Current PDMRTCREG version number. */
1925#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1926
1927
1928/**
1929 * RTC device helpers.
1930 */
1931typedef struct PDMRTCHLP
1932{
1933 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1934 uint32_t u32Version;
1935
1936 /* to-be-defined */
1937
1938} PDMRTCHLP;
1939/** Pointer to RTC helpers. */
1940typedef PDMRTCHLP *PPDMRTCHLP;
1941/** Pointer to const RTC helpers. */
1942typedef const PDMRTCHLP *PCPDMRTCHLP;
1943
1944/** Current PDMRTCHLP version number. */
1945#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1946
1947
1948
1949#ifdef IN_RING3
1950
1951/**
1952 * PDM Device API.
1953 */
1954typedef struct PDMDEVHLPR3
1955{
1956 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1957 uint32_t u32Version;
1958
1959 /**
1960 * Register a number of I/O ports with a device.
1961 *
1962 * These callbacks are of course for the host context (HC).
1963 * Register HC handlers before guest context (GC) handlers! There must be a
1964 * HC handler for every GC handler!
1965 *
1966 * @returns VBox status.
1967 * @param pDevIns The device instance to register the ports with.
1968 * @param Port First port number in the range.
1969 * @param cPorts Number of ports to register.
1970 * @param pvUser User argument.
1971 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1972 * @param pfnIn Pointer to function which is gonna handle IN operations.
1973 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1974 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1975 * @param pszDesc Pointer to description string. This must not be freed.
1976 */
1977 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1978 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1979 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1980
1981 /**
1982 * Register a number of I/O ports with a device for RC.
1983 *
1984 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1985 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1986 * for every RC handler!
1987 *
1988 * @returns VBox status.
1989 * @param pDevIns The device instance to register the ports with
1990 * and which RC module to resolve the names
1991 * against.
1992 * @param Port First port number in the range.
1993 * @param cPorts Number of ports to register.
1994 * @param pvUser User argument.
1995 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1996 * @param pszIn Name of the RC function which is gonna handle IN operations.
1997 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1998 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1999 * @param pszDesc Pointer to description string. This must not be freed.
2000 */
2001 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
2002 const char *pszOut, const char *pszIn,
2003 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2004
2005 /**
2006 * Register a number of I/O ports with a device.
2007 *
2008 * These callbacks are of course for the ring-0 host context (R0).
2009 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2010 *
2011 * @returns VBox status.
2012 * @param pDevIns The device instance to register the ports with.
2013 * @param Port First port number in the range.
2014 * @param cPorts Number of ports to register.
2015 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2016 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2017 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2018 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2019 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2020 * @param pszDesc Pointer to description string. This must not be freed.
2021 */
2022 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2023 const char *pszOut, const char *pszIn,
2024 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2025
2026 /**
2027 * Deregister I/O ports.
2028 *
2029 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2030 *
2031 * @returns VBox status.
2032 * @param pDevIns The device instance owning the ports.
2033 * @param Port First port number in the range.
2034 * @param cPorts Number of ports to deregister.
2035 */
2036 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2037
2038 /**
2039 * Register a Memory Mapped I/O (MMIO) region.
2040 *
2041 * These callbacks are of course for the ring-3 context (R3). Register HC
2042 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2043 * must be a R3 handler for every RC and R0 handler!
2044 *
2045 * @returns VBox status.
2046 * @param pDevIns The device instance to register the MMIO with.
2047 * @param GCPhysStart First physical address in the range.
2048 * @param cbRange The size of the range (in bytes).
2049 * @param pvUser User argument.
2050 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2051 * @param pfnRead Pointer to function which is gonna handle Read operations.
2052 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2053 * @param pszDesc Pointer to description string. This must not be freed.
2054 */
2055 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2056 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2057 const char *pszDesc));
2058
2059 /**
2060 * Register a Memory Mapped I/O (MMIO) region for GC.
2061 *
2062 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2063 * (R3) handlers before guest context handlers! There must be a R3 handler for
2064 * every RC handler!
2065 *
2066 * @returns VBox status.
2067 * @param pDevIns The device instance to register the MMIO with.
2068 * @param GCPhysStart First physical address in the range.
2069 * @param cbRange The size of the range (in bytes).
2070 * @param pvUser User argument.
2071 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2072 * @param pszRead Name of the RC function which is gonna handle Read operations.
2073 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2074 * @param pszDesc Obsolete. NULL is fine.
2075 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2076 */
2077 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2078 const char *pszWrite, const char *pszRead, const char *pszFill,
2079 const char *pszDesc));
2080
2081 /**
2082 * Register a Memory Mapped I/O (MMIO) region for R0.
2083 *
2084 * These callbacks are for the ring-0 host context (R0). Register ring-3
2085 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2086 * every R0 handler!
2087 *
2088 * @returns VBox status.
2089 * @param pDevIns The device instance to register the MMIO with.
2090 * @param GCPhysStart First physical address in the range.
2091 * @param cbRange The size of the range (in bytes).
2092 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2093 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2094 * @param pszRead Name of the RC function which is gonna handle Read operations.
2095 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2096 * @param pszDesc Obsolete. NULL is fine.
2097 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2098 */
2099 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2100 const char *pszWrite, const char *pszRead, const char *pszFill,
2101 const char *pszDesc));
2102
2103 /**
2104 * Deregister a Memory Mapped I/O (MMIO) region.
2105 *
2106 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2107 *
2108 * @returns VBox status.
2109 * @param pDevIns The device instance owning the MMIO region(s).
2110 * @param GCPhysStart First physical address in the range.
2111 * @param cbRange The size of the range (in bytes).
2112 */
2113 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2114
2115 /**
2116 * Allocate and register a MMIO2 region.
2117 *
2118 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2119 * RAM associated with a device. It is also non-shared memory with a
2120 * permanent ring-3 mapping and page backing (presently).
2121 *
2122 * @returns VBox status.
2123 * @param pDevIns The device instance.
2124 * @param iRegion The region number. Use the PCI region number as
2125 * this must be known to the PCI bus device too. If
2126 * it's not associated with the PCI device, then
2127 * any number up to UINT8_MAX is fine.
2128 * @param cb The size (in bytes) of the region.
2129 * @param fFlags Reserved for future use, must be zero.
2130 * @param ppv Where to store the address of the ring-3 mapping
2131 * of the memory.
2132 * @param pszDesc Pointer to description string. This must not be
2133 * freed.
2134 * @thread EMT.
2135 */
2136 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2137
2138 /**
2139 * Deregisters and frees a MMIO2 region.
2140 *
2141 * Any physical (and virtual) access handlers registered for the region must
2142 * be deregistered before calling this function.
2143 *
2144 * @returns VBox status code.
2145 * @param pDevIns The device instance.
2146 * @param iRegion The region number used during registration.
2147 * @thread EMT.
2148 */
2149 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2150
2151 /**
2152 * Maps a MMIO2 region into the physical memory space.
2153 *
2154 * A MMIO2 range may overlap with base memory if a lot of RAM
2155 * is configured for the VM, in which case we'll drop the base
2156 * memory pages. Presently we will make no attempt to preserve
2157 * anything that happens to be present in the base memory that
2158 * is replaced, this is of course incorrectly but it's too much
2159 * effort.
2160 *
2161 * @returns VBox status code.
2162 * @param pDevIns The device instance.
2163 * @param iRegion The region number used during registration.
2164 * @param GCPhys The physical address to map it at.
2165 * @thread EMT.
2166 */
2167 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2168
2169 /**
2170 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2171 *
2172 * @returns VBox status code.
2173 * @param pDevIns The device instance.
2174 * @param iRegion The region number used during registration.
2175 * @param GCPhys The physical address it's currently mapped at.
2176 * @thread EMT.
2177 */
2178 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2179
2180 /**
2181 * Maps a portion of an MMIO2 region into the hypervisor region.
2182 *
2183 * Callers of this API must never deregister the MMIO2 region before the
2184 * VM is powered off.
2185 *
2186 * @return VBox status code.
2187 * @param pDevIns The device owning the MMIO2 memory.
2188 * @param iRegion The region.
2189 * @param off The offset into the region. Will be rounded down
2190 * to closest page boundrary.
2191 * @param cb The number of bytes to map. Will be rounded up
2192 * to the closest page boundrary.
2193 * @param pszDesc Mapping description.
2194 * @param pRCPtr Where to store the RC address.
2195 */
2196 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2197 const char *pszDesc, PRTRCPTR pRCPtr));
2198
2199 /**
2200 * Maps a portion of an MMIO2 region into kernel space (host).
2201 *
2202 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2203 * or the VM is terminated.
2204 *
2205 * @return VBox status code.
2206 * @param pDevIns The device owning the MMIO2 memory.
2207 * @param iRegion The region.
2208 * @param off The offset into the region. Must be page
2209 * aligned.
2210 * @param cb The number of bytes to map. Must be page
2211 * aligned.
2212 * @param pszDesc Mapping description.
2213 * @param pR0Ptr Where to store the R0 address.
2214 */
2215 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2216 const char *pszDesc, PRTR0PTR pR0Ptr));
2217
2218 /**
2219 * Register a ROM (BIOS) region.
2220 *
2221 * It goes without saying that this is read-only memory. The memory region must be
2222 * in unassigned memory. I.e. from the top of the address space or on the PC in
2223 * the 0xa0000-0xfffff range.
2224 *
2225 * @returns VBox status.
2226 * @param pDevIns The device instance owning the ROM region.
2227 * @param GCPhysStart First physical address in the range.
2228 * Must be page aligned!
2229 * @param cbRange The size of the range (in bytes).
2230 * Must be page aligned!
2231 * @param pvBinary Pointer to the binary data backing the ROM image.
2232 * This must be cbRange bytes big.
2233 * It will be copied and doesn't have to stick around if fShadow is clear.
2234 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2235 * @param pszDesc Pointer to description string. This must not be freed.
2236 *
2237 * @remark There is no way to remove the rom, automatically on device cleanup or
2238 * manually from the device yet. At present I doubt we need such features...
2239 */
2240 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2241
2242 /**
2243 * Changes the protection of shadowed ROM mapping.
2244 *
2245 * This is intented for use by the system BIOS, chipset or device in question to
2246 * change the protection of shadowed ROM code after init and on reset.
2247 *
2248 * @param pDevIns The device instance.
2249 * @param GCPhysStart Where the mapping starts.
2250 * @param cbRange The size of the mapping.
2251 * @param enmProt The new protection type.
2252 */
2253 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2254
2255 /**
2256 * Register a save state data unit.
2257 *
2258 * @returns VBox status.
2259 * @param pDevIns The device instance.
2260 * @param pszName Data unit name.
2261 * @param uInstance The instance identifier of the data unit.
2262 * This must together with the name be unique.
2263 * @param uVersion Data layout version number.
2264 * @param cbGuess The approximate amount of data in the unit.
2265 * Only for progress indicators.
2266 * @param pszBefore Name of data unit which we should be put in
2267 * front of. Optional (NULL).
2268 *
2269 * @param pfnLivePrep Prepare live save callback, optional.
2270 * @param pfnLiveExec Execute live save callback, optional.
2271 * @param pfnLiveVote Vote live save callback, optional.
2272 *
2273 * @param pfnSavePrep Prepare save callback, optional.
2274 * @param pfnSaveExec Execute save callback, optional.
2275 * @param pfnSaveDone Done save callback, optional.
2276 *
2277 * @param pfnLoadPrep Prepare load callback, optional.
2278 * @param pfnLoadExec Execute load callback, optional.
2279 * @param pfnLoadDone Done load callback, optional.
2280 */
2281 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2282 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2283 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2284 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2285
2286 /**
2287 * Creates a timer.
2288 *
2289 * @returns VBox status.
2290 * @param pDevIns The device instance.
2291 * @param enmClock The clock to use on this timer.
2292 * @param pfnCallback Callback function.
2293 * @param pvUser User argument for the callback.
2294 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2295 * @param pszDesc Pointer to description string which must stay around
2296 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2297 * @param ppTimer Where to store the timer on success.
2298 */
2299 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2300
2301 /**
2302 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2303 *
2304 * @returns pTime.
2305 * @param pDevIns The device instance.
2306 * @param pTime Where to store the time.
2307 */
2308 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2309
2310 /**
2311 * Read physical memory.
2312 *
2313 * @returns VINF_SUCCESS (for now).
2314 * @param pDevIns The device instance.
2315 * @param GCPhys Physical address start reading from.
2316 * @param pvBuf Where to put the read bits.
2317 * @param cbRead How many bytes to read.
2318 * @thread Any thread, but the call may involve the emulation thread.
2319 */
2320 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2321
2322 /**
2323 * Write to physical memory.
2324 *
2325 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2326 * @param pDevIns The device instance.
2327 * @param GCPhys Physical address to write to.
2328 * @param pvBuf What to write.
2329 * @param cbWrite How many bytes to write.
2330 * @thread Any thread, but the call may involve the emulation thread.
2331 */
2332 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2333
2334 /**
2335 * Requests the mapping of a guest page into ring-3.
2336 *
2337 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2338 * release it.
2339 *
2340 * This API will assume your intention is to write to the page, and will
2341 * therefore replace shared and zero pages. If you do not intend to modify the
2342 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2343 *
2344 * @returns VBox status code.
2345 * @retval VINF_SUCCESS on success.
2346 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2347 * backing or if the page has any active access handlers. The caller
2348 * must fall back on using PGMR3PhysWriteExternal.
2349 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2350 *
2351 * @param pVM The VM handle.
2352 * @param GCPhys The guest physical address of the page that
2353 * should be mapped.
2354 * @param fFlags Flags reserved for future use, MBZ.
2355 * @param ppv Where to store the address corresponding to
2356 * GCPhys.
2357 * @param pLock Where to store the lock information that
2358 * pfnPhysReleasePageMappingLock needs.
2359 *
2360 * @remark Avoid calling this API from within critical sections (other than the
2361 * PGM one) because of the deadlock risk when we have to delegating the
2362 * task to an EMT.
2363 * @thread Any.
2364 */
2365 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2366
2367 /**
2368 * Requests the mapping of a guest page into ring-3, external threads.
2369 *
2370 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2371 * release it.
2372 *
2373 * @returns VBox status code.
2374 * @retval VINF_SUCCESS on success.
2375 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2376 * backing or if the page as an active ALL access handler. The caller
2377 * must fall back on using PGMPhysRead.
2378 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2379 *
2380 * @param pDevIns The device instance.
2381 * @param GCPhys The guest physical address of the page that
2382 * should be mapped.
2383 * @param fFlags Flags reserved for future use, MBZ.
2384 * @param ppv Where to store the address corresponding to
2385 * GCPhys.
2386 * @param pLock Where to store the lock information that
2387 * pfnPhysReleasePageMappingLock needs.
2388 *
2389 * @remark Avoid calling this API from within critical sections.
2390 * @thread Any.
2391 */
2392 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2393
2394 /**
2395 * Release the mapping of a guest page.
2396 *
2397 * This is the counter part of pfnPhysGCPhys2CCPtr and
2398 * pfnPhysGCPhys2CCPtrReadOnly.
2399 *
2400 * @param pDevIns The device instance.
2401 * @param pLock The lock structure initialized by the mapping
2402 * function.
2403 */
2404 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2405
2406 /**
2407 * Read guest physical memory by virtual address.
2408 *
2409 * @param pDevIns The device instance.
2410 * @param pvDst Where to put the read bits.
2411 * @param GCVirtSrc Guest virtual address to start reading from.
2412 * @param cb How many bytes to read.
2413 * @thread The emulation thread.
2414 */
2415 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2416
2417 /**
2418 * Write to guest physical memory by virtual address.
2419 *
2420 * @param pDevIns The device instance.
2421 * @param GCVirtDst Guest virtual address to write to.
2422 * @param pvSrc What to write.
2423 * @param cb How many bytes to write.
2424 * @thread The emulation thread.
2425 */
2426 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2427
2428 /**
2429 * Convert a guest virtual address to a guest physical address.
2430 *
2431 * @returns VBox status code.
2432 * @param pDevIns The device instance.
2433 * @param GCPtr Guest virtual address.
2434 * @param pGCPhys Where to store the GC physical address
2435 * corresponding to GCPtr.
2436 * @thread The emulation thread.
2437 * @remark Careful with page boundraries.
2438 */
2439 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2440
2441 /**
2442 * Allocate memory which is associated with current VM instance
2443 * and automatically freed on it's destruction.
2444 *
2445 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2446 * @param pDevIns The device instance.
2447 * @param cb Number of bytes to allocate.
2448 */
2449 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2450
2451 /**
2452 * Allocate memory which is associated with current VM instance
2453 * and automatically freed on it's destruction. The memory is ZEROed.
2454 *
2455 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2456 * @param pDevIns The device instance.
2457 * @param cb Number of bytes to allocate.
2458 */
2459 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2460
2461 /**
2462 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2463 *
2464 * @param pDevIns The device instance.
2465 * @param pv Pointer to the memory to free.
2466 */
2467 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2468
2469 /**
2470 * Gets the VM state.
2471 *
2472 * @returns VM state.
2473 * @param pDevIns The device instance.
2474 * @thread Any thread (just keep in mind that it's volatile info).
2475 */
2476 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2477
2478 /**
2479 * Checks if the VM was teleported and hasn't been fully resumed yet.
2480 *
2481 * @returns true / false.
2482 * @param pDevIns The device instance.
2483 * @thread Any thread.
2484 */
2485 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2486
2487 /**
2488 * Set the VM error message
2489 *
2490 * @returns rc.
2491 * @param pDevIns The device instance.
2492 * @param rc VBox status code.
2493 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2494 * @param pszFormat Error message format string.
2495 * @param ... Error message arguments.
2496 */
2497 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2498
2499 /**
2500 * Set the VM error message
2501 *
2502 * @returns rc.
2503 * @param pDevIns The device instance.
2504 * @param rc VBox status code.
2505 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2506 * @param pszFormat Error message format string.
2507 * @param va Error message arguments.
2508 */
2509 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2510
2511 /**
2512 * Set the VM runtime error message
2513 *
2514 * @returns VBox status code.
2515 * @param pDevIns The device instance.
2516 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2517 * @param pszErrorId Error ID string.
2518 * @param pszFormat Error message format string.
2519 * @param ... Error message arguments.
2520 */
2521 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2522
2523 /**
2524 * Set the VM runtime error message
2525 *
2526 * @returns VBox status code.
2527 * @param pDevIns The device instance.
2528 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2529 * @param pszErrorId Error ID string.
2530 * @param pszFormat Error message format string.
2531 * @param va Error message arguments.
2532 */
2533 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2534
2535 /**
2536 * Stops the VM and enters the debugger to look at the guest state.
2537 *
2538 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2539 * invoking this function directly.
2540 *
2541 * @returns VBox status code which must be passed up to the VMM.
2542 * @param pDevIns The device instance.
2543 * @param pszFile Filename of the assertion location.
2544 * @param iLine The linenumber of the assertion location.
2545 * @param pszFunction Function of the assertion location.
2546 * @param pszFormat Message. (optional)
2547 * @param args Message parameters.
2548 */
2549 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2550
2551 /**
2552 * Register a info handler with DBGF,
2553 *
2554 * @returns VBox status code.
2555 * @param pDevIns The device instance.
2556 * @param pszName The identifier of the info.
2557 * @param pszDesc The description of the info and any arguments
2558 * the handler may take.
2559 * @param pfnHandler The handler function to be called to display the
2560 * info.
2561 */
2562 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2563
2564 /**
2565 * Registers a statistics sample if statistics are enabled.
2566 *
2567 * @param pDevIns Device instance of the DMA.
2568 * @param pvSample Pointer to the sample.
2569 * @param enmType Sample type. This indicates what pvSample is
2570 * pointing at.
2571 * @param pszName Sample name. The name is on this form
2572 * "/<component>/<sample>". Further nesting is
2573 * possible.
2574 * @param enmUnit Sample unit.
2575 * @param pszDesc Sample description.
2576 */
2577 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2578
2579 /**
2580 * Same as pfnSTAMRegister except that the name is specified in a
2581 * RTStrPrintf like fashion.
2582 *
2583 * @returns VBox status.
2584 * @param pDevIns Device instance of the DMA.
2585 * @param pvSample Pointer to the sample.
2586 * @param enmType Sample type. This indicates what pvSample is
2587 * pointing at.
2588 * @param enmVisibility Visibility type specifying whether unused
2589 * statistics should be visible or not.
2590 * @param enmUnit Sample unit.
2591 * @param pszDesc Sample description.
2592 * @param pszName The sample name format string.
2593 * @param ... Arguments to the format string.
2594 */
2595 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2596 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2597
2598 /**
2599 * Same as pfnSTAMRegister except that the name is specified in a
2600 * RTStrPrintfV like fashion.
2601 *
2602 * @returns VBox status.
2603 * @param pDevIns Device instance of the DMA.
2604 * @param pvSample Pointer to the sample.
2605 * @param enmType Sample type. This indicates what pvSample is
2606 * pointing at.
2607 * @param enmVisibility Visibility type specifying whether unused
2608 * statistics should be visible or not.
2609 * @param enmUnit Sample unit.
2610 * @param pszDesc Sample description.
2611 * @param pszName The sample name format string.
2612 * @param args Arguments to the format string.
2613 */
2614 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2615 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2616
2617 /**
2618 * Registers the device with the default PCI bus.
2619 *
2620 * @returns VBox status code.
2621 * @param pDevIns The device instance.
2622 * @param pPciDev The PCI device structure.
2623 * Any PCI enabled device must keep this in it's instance data!
2624 * Fill in the PCI data config before registration, please.
2625 * @remark This is the simple interface, a Ex interface will be created if
2626 * more features are needed later.
2627 */
2628 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2629
2630 /**
2631 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns The device instance.
2635 * @param iRegion The region number.
2636 * @param cbRegion Size of the region.
2637 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2638 * @param pfnCallback Callback for doing the mapping.
2639 */
2640 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2641
2642 /**
2643 * Register PCI configuration space read/write callbacks.
2644 *
2645 * @param pDevIns The device instance.
2646 * @param pPciDev The PCI device structure.
2647 * If NULL the default PCI device for this device instance is used.
2648 * @param pfnRead Pointer to the user defined PCI config read function.
2649 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2650 * PCI config read function. This way, user can decide when (and if)
2651 * to call default PCI config read function. Can be NULL.
2652 * @param pfnWrite Pointer to the user defined PCI config write function.
2653 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2654 * PCI config write function. This way, user can decide when (and if)
2655 * to call default PCI config write function. Can be NULL.
2656 * @thread EMT
2657 */
2658 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2659 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2660
2661 /**
2662 * Set the IRQ for a PCI device.
2663 *
2664 * @param pDevIns The device instance.
2665 * @param iIrq IRQ number to set.
2666 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2667 * @thread Any thread, but will involve the emulation thread.
2668 */
2669 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2670
2671 /**
2672 * Set the IRQ for a PCI device, but don't wait for EMT to process
2673 * the request when not called from EMT.
2674 *
2675 * @param pDevIns The device instance.
2676 * @param iIrq IRQ number to set.
2677 * @param iLevel IRQ level.
2678 * @thread Any thread, but will involve the emulation thread.
2679 */
2680 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2681
2682 /**
2683 * Set ISA IRQ for a device.
2684 *
2685 * @param pDevIns The device instance.
2686 * @param iIrq IRQ number to set.
2687 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2688 * @thread Any thread, but will involve the emulation thread.
2689 */
2690 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2691
2692 /**
2693 * Set the ISA IRQ for a device, but don't wait for EMT to process
2694 * the request when not called from EMT.
2695 *
2696 * @param pDevIns The device instance.
2697 * @param iIrq IRQ number to set.
2698 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2699 * @thread Any thread, but will involve the emulation thread.
2700 */
2701 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2702
2703 /**
2704 * Attaches a driver (chain) to the device.
2705 *
2706 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2707 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2708 *
2709 * @returns VBox status code.
2710 * @param pDevIns The device instance.
2711 * @param iLun The logical unit to attach.
2712 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2713 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2714 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2715 * for the live of the device instance.
2716 */
2717 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2718
2719 /**
2720 * Create a queue.
2721 *
2722 * @returns VBox status code.
2723 * @param pDevIns The device instance.
2724 * @param cbItem The size of a queue item.
2725 * @param cItems The number of items in the queue.
2726 * @param cMilliesInterval The number of milliseconds between polling the queue.
2727 * If 0 then the emulation thread will be notified whenever an item arrives.
2728 * @param pfnCallback The consumer function.
2729 * @param fRZEnabled Set if the queue should work in RC and R0.
2730 * @param pszName The queue base name. The instance number will be
2731 * appended automatically.
2732 * @param ppQueue Where to store the queue handle on success.
2733 * @thread The emulation thread.
2734 */
2735 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2736 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2737
2738 /**
2739 * Initializes a PDM critical section.
2740 *
2741 * The PDM critical sections are derived from the IPRT critical sections, but
2742 * works in RC and R0 as well.
2743 *
2744 * @returns VBox status code.
2745 * @param pDevIns The device instance.
2746 * @param pCritSect Pointer to the critical section.
2747 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2748 * @param pszNameFmt Format string for namging the critical section.
2749 * For statistics and lock validation.
2750 * @param va Arguments for the format string.
2751 */
2752 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2753 const char *pszNameFmt, va_list va));
2754
2755 /**
2756 * Creates a PDM thread.
2757 *
2758 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2759 * resuming, and destroying the thread as the VM state changes.
2760 *
2761 * @returns VBox status code.
2762 * @param pDevIns The device instance.
2763 * @param ppThread Where to store the thread 'handle'.
2764 * @param pvUser The user argument to the thread function.
2765 * @param pfnThread The thread function.
2766 * @param pfnWakeup The wakup callback. This is called on the EMT
2767 * thread when a state change is pending.
2768 * @param cbStack See RTThreadCreate.
2769 * @param enmType See RTThreadCreate.
2770 * @param pszName See RTThreadCreate.
2771 */
2772 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2773 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2774
2775 /**
2776 * Set up asynchronous handling of a suspend, reset or power off notification.
2777 *
2778 * This shall only be called when getting the notification. It must be called
2779 * for each one.
2780 *
2781 * @returns VBox status code.
2782 * @param pDevIns The device instance.
2783 * @param pfnAsyncNotify The callback.
2784 * @thread EMT(0)
2785 */
2786 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2787
2788 /**
2789 * Notify EMT(0) that the device has completed the asynchronous notification
2790 * handling.
2791 *
2792 * This can be called at any time, spurious calls will simply be ignored.
2793 *
2794 * @param pDevIns The device instance.
2795 * @thread Any
2796 */
2797 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2798
2799 /**
2800 * Register the RTC device.
2801 *
2802 * @returns VBox status code.
2803 * @param pDevIns The device instance.
2804 * @param pRtcReg Pointer to a RTC registration structure.
2805 * @param ppRtcHlp Where to store the pointer to the helper
2806 * functions.
2807 */
2808 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2809
2810 /**
2811 * Register the PCI Bus.
2812 *
2813 * @returns VBox status code.
2814 * @param pDevIns The device instance.
2815 * @param pPciBusReg Pointer to PCI bus registration structure.
2816 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2817 * helpers.
2818 */
2819 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2820
2821 /**
2822 * Register the PIC device.
2823 *
2824 * @returns VBox status code.
2825 * @param pDevIns The device instance.
2826 * @param pPicReg Pointer to a PIC registration structure.
2827 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2828 * helpers.
2829 */
2830 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2831
2832 /**
2833 * Register the APIC device.
2834 *
2835 * @returns VBox status code.
2836 * @param pDevIns The device instance.
2837 * @param pApicReg Pointer to a APIC registration structure.
2838 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2839 */
2840 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2841
2842 /**
2843 * Register the I/O APIC device.
2844 *
2845 * @returns VBox status code.
2846 * @param pDevIns The device instance.
2847 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2848 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2849 * helpers.
2850 */
2851 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2852
2853 /**
2854 * Register the HPET device.
2855 *
2856 * @returns VBox status code.
2857 * @param pDevIns The device instance.
2858 * @param pHpetReg Pointer to a HPET registration structure.
2859 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2860 * helpers.
2861 */
2862 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2863
2864 /**
2865 * Register the DMA device.
2866 *
2867 * @returns VBox status code.
2868 * @param pDevIns The device instance.
2869 * @param pDmacReg Pointer to a DMAC registration structure.
2870 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2871 */
2872 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2873
2874 /**
2875 * Register transfer function for DMA channel.
2876 *
2877 * @returns VBox status code.
2878 * @param pDevIns The device instance.
2879 * @param uChannel Channel number.
2880 * @param pfnTransferHandler Device specific transfer callback function.
2881 * @param pvUser User pointer to pass to the callback.
2882 * @thread EMT
2883 */
2884 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2885
2886 /**
2887 * Read memory.
2888 *
2889 * @returns VBox status code.
2890 * @param pDevIns The device instance.
2891 * @param uChannel Channel number.
2892 * @param pvBuffer Pointer to target buffer.
2893 * @param off DMA position.
2894 * @param cbBlock Block size.
2895 * @param pcbRead Where to store the number of bytes which was
2896 * read. optional.
2897 * @thread EMT
2898 */
2899 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2900
2901 /**
2902 * Write memory.
2903 *
2904 * @returns VBox status code.
2905 * @param pDevIns The device instance.
2906 * @param uChannel Channel number.
2907 * @param pvBuffer Memory to write.
2908 * @param off DMA position.
2909 * @param cbBlock Block size.
2910 * @param pcbWritten Where to store the number of bytes which was
2911 * written. optional.
2912 * @thread EMT
2913 */
2914 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2915
2916 /**
2917 * Set the DREQ line.
2918 *
2919 * @returns VBox status code.
2920 * @param pDevIns Device instance.
2921 * @param uChannel Channel number.
2922 * @param uLevel Level of the line.
2923 * @thread EMT
2924 */
2925 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2926
2927 /**
2928 * Get channel mode.
2929 *
2930 * @returns Channel mode. See specs.
2931 * @param pDevIns The device instance.
2932 * @param uChannel Channel number.
2933 * @thread EMT
2934 */
2935 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2936
2937 /**
2938 * Schedule DMA execution.
2939 *
2940 * @param pDevIns The device instance.
2941 * @thread Any thread.
2942 */
2943 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2944
2945 /**
2946 * Write CMOS value and update the checksum(s).
2947 *
2948 * @returns VBox status code.
2949 * @param pDevIns The device instance.
2950 * @param iReg The CMOS register index.
2951 * @param u8Value The CMOS register value.
2952 * @thread EMT
2953 */
2954 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2955
2956 /**
2957 * Read CMOS value.
2958 *
2959 * @returns VBox status code.
2960 * @param pDevIns The device instance.
2961 * @param iReg The CMOS register index.
2962 * @param pu8Value Where to store the CMOS register value.
2963 * @thread EMT
2964 */
2965 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2966
2967 /**
2968 * Assert that the current thread is the emulation thread.
2969 *
2970 * @returns True if correct.
2971 * @returns False if wrong.
2972 * @param pDevIns The device instance.
2973 * @param pszFile Filename of the assertion location.
2974 * @param iLine The linenumber of the assertion location.
2975 * @param pszFunction Function of the assertion location.
2976 */
2977 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2978
2979 /**
2980 * Assert that the current thread is NOT the emulation thread.
2981 *
2982 * @returns True if correct.
2983 * @returns False if wrong.
2984 * @param pDevIns The device instance.
2985 * @param pszFile Filename of the assertion location.
2986 * @param iLine The linenumber of the assertion location.
2987 * @param pszFunction Function of the assertion location.
2988 */
2989 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2990
2991 /**
2992 * Resolves the symbol for a raw-mode context interface.
2993 *
2994 * @returns VBox status code.
2995 * @param pDevIns The device instance.
2996 * @param pvInterface The interface structure.
2997 * @param cbInterface The size of the interface structure.
2998 * @param pszSymPrefix What to prefix the symbols in the list with
2999 * before resolving them. This must start with
3000 * 'dev' and contain the driver name.
3001 * @param pszSymList List of symbols corresponding to the interface.
3002 * There is generally a there is generally a define
3003 * holding this list associated with the interface
3004 * definition (INTERFACE_SYM_LIST). For more
3005 * details see PDMR3LdrGetInterfaceSymbols.
3006 * @thread EMT
3007 */
3008 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3009 const char *pszSymPrefix, const char *pszSymList));
3010
3011 /**
3012 * Resolves the symbol for a ring-0 context interface.
3013 *
3014 * @returns VBox status code.
3015 * @param pDevIns The device instance.
3016 * @param pvInterface The interface structure.
3017 * @param cbInterface The size of the interface structure.
3018 * @param pszSymPrefix What to prefix the symbols in the list with
3019 * before resolving them. This must start with
3020 * 'dev' and contain the driver name.
3021 * @param pszSymList List of symbols corresponding to the interface.
3022 * There is generally a there is generally a define
3023 * holding this list associated with the interface
3024 * definition (INTERFACE_SYM_LIST). For more
3025 * details see PDMR3LdrGetInterfaceSymbols.
3026 * @thread EMT
3027 */
3028 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3029 const char *pszSymPrefix, const char *pszSymList));
3030
3031 /** Space reserved for future members.
3032 * @{ */
3033 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3034 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3035 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3036 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3037 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3038 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3039 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3040 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3041 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3042 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3043 /** @} */
3044
3045
3046 /** API available to trusted devices only.
3047 *
3048 * These APIs are providing unrestricted access to the guest and the VM,
3049 * or they are interacting intimately with PDM.
3050 *
3051 * @{
3052 */
3053 /**
3054 * Gets the VM handle. Restricted API.
3055 *
3056 * @returns VM Handle.
3057 * @param pDevIns The device instance.
3058 */
3059 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3060
3061 /**
3062 * Gets the VMCPU handle. Restricted API.
3063 *
3064 * @returns VMCPU Handle.
3065 * @param pDevIns The device instance.
3066 */
3067 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3068
3069 /**
3070 * Registers the VMM device heap
3071 *
3072 * @returns VBox status code.
3073 * @param pDevIns The device instance.
3074 * @param GCPhys The physical address.
3075 * @param pvHeap Ring 3 heap pointer.
3076 * @param cbSize Size of the heap.
3077 * @thread EMT.
3078 */
3079 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3080
3081 /**
3082 * Unregisters the VMM device heap
3083 *
3084 * @returns VBox status code.
3085 * @param pDevIns The device instance.
3086 * @param GCPhys The physical address.
3087 * @thread EMT.
3088 */
3089 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3090
3091 /**
3092 * Resets the VM.
3093 *
3094 * @returns The appropriate VBox status code to pass around on reset.
3095 * @param pDevIns The device instance.
3096 * @thread The emulation thread.
3097 */
3098 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3099
3100 /**
3101 * Suspends the VM.
3102 *
3103 * @returns The appropriate VBox status code to pass around on suspend.
3104 * @param pDevIns The device instance.
3105 * @thread The emulation thread.
3106 */
3107 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3108
3109 /**
3110 * Power off the VM.
3111 *
3112 * @returns The appropriate VBox status code to pass around on power off.
3113 * @param pDevIns The device instance.
3114 * @thread The emulation thread.
3115 */
3116 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3117
3118 /**
3119 * Checks if the Gate A20 is enabled or not.
3120 *
3121 * @returns true if A20 is enabled.
3122 * @returns false if A20 is disabled.
3123 * @param pDevIns The device instance.
3124 * @thread The emulation thread.
3125 */
3126 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3127
3128 /**
3129 * Enables or disables the Gate A20.
3130 *
3131 * @param pDevIns The device instance.
3132 * @param fEnable Set this flag to enable the Gate A20; clear it
3133 * to disable.
3134 * @thread The emulation thread.
3135 */
3136 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3137
3138 /**
3139 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3140 * thread.
3141 *
3142 * @param pDevIns The device instance.
3143 * @param iLeaf The CPUID leaf to get.
3144 * @param pEax Where to store the EAX value.
3145 * @param pEbx Where to store the EBX value.
3146 * @param pEcx Where to store the ECX value.
3147 * @param pEdx Where to store the EDX value.
3148 * @thread EMT.
3149 */
3150 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3151
3152 /** @} */
3153
3154 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3155 uint32_t u32TheEnd;
3156} PDMDEVHLPR3;
3157#endif /* !IN_RING3 */
3158/** Pointer to the R3 PDM Device API. */
3159typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3160/** Pointer to the R3 PDM Device API, const variant. */
3161typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3162
3163/** Current PDMDEVHLPR3 version number. */
3164#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 2, 0)
3165
3166
3167/**
3168 * PDM Device API - RC Variant.
3169 */
3170typedef struct PDMDEVHLPRC
3171{
3172 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3173 uint32_t u32Version;
3174
3175 /**
3176 * Set the IRQ for a PCI device.
3177 *
3178 * @param pDevIns Device instance.
3179 * @param iIrq IRQ number to set.
3180 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3181 * @thread Any thread, but will involve the emulation thread.
3182 */
3183 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3184
3185 /**
3186 * Set ISA IRQ for a device.
3187 *
3188 * @param pDevIns Device instance.
3189 * @param iIrq IRQ number to set.
3190 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3191 * @thread Any thread, but will involve the emulation thread.
3192 */
3193 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3194
3195 /**
3196 * Read physical memory.
3197 *
3198 * @returns VINF_SUCCESS (for now).
3199 * @param pDevIns Device instance.
3200 * @param GCPhys Physical address start reading from.
3201 * @param pvBuf Where to put the read bits.
3202 * @param cbRead How many bytes to read.
3203 */
3204 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3205
3206 /**
3207 * Write to physical memory.
3208 *
3209 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3210 * @param pDevIns Device instance.
3211 * @param GCPhys Physical address to write to.
3212 * @param pvBuf What to write.
3213 * @param cbWrite How many bytes to write.
3214 */
3215 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3216
3217 /**
3218 * Checks if the Gate A20 is enabled or not.
3219 *
3220 * @returns true if A20 is enabled.
3221 * @returns false if A20 is disabled.
3222 * @param pDevIns Device instance.
3223 * @thread The emulation thread.
3224 */
3225 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3226
3227 /**
3228 * Set the VM error message
3229 *
3230 * @returns rc.
3231 * @param pDrvIns Driver instance.
3232 * @param rc VBox status code.
3233 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3234 * @param pszFormat Error message format string.
3235 * @param ... Error message arguments.
3236 */
3237 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3238
3239 /**
3240 * Set the VM error message
3241 *
3242 * @returns rc.
3243 * @param pDrvIns Driver instance.
3244 * @param rc VBox status code.
3245 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3246 * @param pszFormat Error message format string.
3247 * @param va Error message arguments.
3248 */
3249 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3250
3251 /**
3252 * Set the VM runtime error message
3253 *
3254 * @returns VBox status code.
3255 * @param pDevIns Device instance.
3256 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3257 * @param pszErrorId Error ID string.
3258 * @param pszFormat Error message format string.
3259 * @param ... Error message arguments.
3260 */
3261 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3262
3263 /**
3264 * Set the VM runtime error message
3265 *
3266 * @returns VBox status code.
3267 * @param pDevIns Device instance.
3268 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3269 * @param pszErrorId Error ID string.
3270 * @param pszFormat Error message format string.
3271 * @param va Error message arguments.
3272 */
3273 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3274
3275 /**
3276 * Set parameters for pending MMIO patch operation
3277 *
3278 * @returns VBox status code.
3279 * @param pDevIns Device instance.
3280 * @param GCPhys MMIO physical address
3281 * @param pCachedData GC pointer to cached data
3282 */
3283 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3284
3285 /**
3286 * Gets the VM handle. Restricted API.
3287 *
3288 * @returns VM Handle.
3289 * @param pDevIns Device instance.
3290 */
3291 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3292
3293 /**
3294 * Gets the VMCPU handle. Restricted API.
3295 *
3296 * @returns VMCPU Handle.
3297 * @param pDevIns The device instance.
3298 */
3299 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3300
3301 /** Just a safety precaution. */
3302 uint32_t u32TheEnd;
3303} PDMDEVHLPRC;
3304/** Pointer PDM Device RC API. */
3305typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3306/** Pointer PDM Device RC API. */
3307typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3308
3309/** Current PDMDEVHLP version number. */
3310#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3311
3312
3313/**
3314 * PDM Device API - R0 Variant.
3315 */
3316typedef struct PDMDEVHLPR0
3317{
3318 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3319 uint32_t u32Version;
3320
3321 /**
3322 * Set the IRQ for a PCI device.
3323 *
3324 * @param pDevIns Device instance.
3325 * @param iIrq IRQ number to set.
3326 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3327 * @thread Any thread, but will involve the emulation thread.
3328 */
3329 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3330
3331 /**
3332 * Set ISA IRQ for a device.
3333 *
3334 * @param pDevIns Device instance.
3335 * @param iIrq IRQ number to set.
3336 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3337 * @thread Any thread, but will involve the emulation thread.
3338 */
3339 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3340
3341 /**
3342 * Read physical memory.
3343 *
3344 * @returns VINF_SUCCESS (for now).
3345 * @param pDevIns Device instance.
3346 * @param GCPhys Physical address start reading from.
3347 * @param pvBuf Where to put the read bits.
3348 * @param cbRead How many bytes to read.
3349 */
3350 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3351
3352 /**
3353 * Write to physical memory.
3354 *
3355 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3356 * @param pDevIns Device instance.
3357 * @param GCPhys Physical address to write to.
3358 * @param pvBuf What to write.
3359 * @param cbWrite How many bytes to write.
3360 */
3361 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3362
3363 /**
3364 * Checks if the Gate A20 is enabled or not.
3365 *
3366 * @returns true if A20 is enabled.
3367 * @returns false if A20 is disabled.
3368 * @param pDevIns Device instance.
3369 * @thread The emulation thread.
3370 */
3371 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3372
3373 /**
3374 * Set the VM error message
3375 *
3376 * @returns rc.
3377 * @param pDrvIns Driver instance.
3378 * @param rc VBox status code.
3379 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3380 * @param pszFormat Error message format string.
3381 * @param ... Error message arguments.
3382 */
3383 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3384
3385 /**
3386 * Set the VM error message
3387 *
3388 * @returns rc.
3389 * @param pDrvIns Driver instance.
3390 * @param rc VBox status code.
3391 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3392 * @param pszFormat Error message format string.
3393 * @param va Error message arguments.
3394 */
3395 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3396
3397 /**
3398 * Set the VM runtime error message
3399 *
3400 * @returns VBox status code.
3401 * @param pDevIns Device instance.
3402 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3403 * @param pszErrorId Error ID string.
3404 * @param pszFormat Error message format string.
3405 * @param ... Error message arguments.
3406 */
3407 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3408
3409 /**
3410 * Set the VM runtime error message
3411 *
3412 * @returns VBox status code.
3413 * @param pDevIns Device instance.
3414 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3415 * @param pszErrorId Error ID string.
3416 * @param pszFormat Error message format string.
3417 * @param va Error message arguments.
3418 */
3419 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3420
3421 /**
3422 * Set parameters for pending MMIO patch operation
3423 *
3424 * @returns rc.
3425 * @param pDevIns Device instance.
3426 * @param GCPhys MMIO physical address
3427 * @param pCachedData GC pointer to cached data
3428 */
3429 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3430
3431 /**
3432 * Gets the VM handle. Restricted API.
3433 *
3434 * @returns VM Handle.
3435 * @param pDevIns Device instance.
3436 */
3437 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3438
3439 /**
3440 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3441 *
3442 * @returns true = yes, false = no
3443 * @param pDevIns Device instance.
3444 */
3445 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3446
3447 /**
3448 * Gets the VMCPU handle. Restricted API.
3449 *
3450 * @returns VMCPU Handle.
3451 * @param pDevIns The device instance.
3452 */
3453 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3454
3455 /** Just a safety precaution. */
3456 uint32_t u32TheEnd;
3457} PDMDEVHLPR0;
3458/** Pointer PDM Device R0 API. */
3459typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3460/** Pointer PDM Device GC API. */
3461typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3462
3463/** Current PDMDEVHLP version number. */
3464#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3465
3466
3467
3468/**
3469 * PDM Device Instance.
3470 */
3471typedef struct PDMDEVINS
3472{
3473 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3474 uint32_t u32Version;
3475 /** Device instance number. */
3476 uint32_t iInstance;
3477
3478 /** Pointer the GC PDM Device API. */
3479 PCPDMDEVHLPRC pHlpRC;
3480 /** Pointer to device instance data. */
3481 RTRCPTR pvInstanceDataRC;
3482
3483 /** Pointer the R0 PDM Device API. */
3484 PCPDMDEVHLPR0 pHlpR0;
3485 /** Pointer to device instance data (R0). */
3486 RTR0PTR pvInstanceDataR0;
3487
3488 /** Pointer the HC PDM Device API. */
3489 PCPDMDEVHLPR3 pHlpR3;
3490 /** Pointer to device instance data. */
3491 RTR3PTR pvInstanceDataR3;
3492
3493 /** Pointer to device registration structure. */
3494 R3PTRTYPE(PCPDMDEVREG) pReg;
3495 /** Configuration handle. */
3496 R3PTRTYPE(PCFGMNODE) pCfg;
3497
3498 /** The base interface of the device.
3499 * The device constructor initializes this if it has any
3500 * device level interfaces to export. To obtain this interface
3501 * call PDMR3QueryDevice(). */
3502 PDMIBASE IBase;
3503 /** Align the internal data more naturally. */
3504 RTR3PTR R3PtrPadding;
3505
3506 /** Internal data. */
3507 union
3508 {
3509#ifdef PDMDEVINSINT_DECLARED
3510 PDMDEVINSINT s;
3511#endif
3512 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3513 } Internal;
3514
3515 /** Device instance data. The size of this area is defined
3516 * in the PDMDEVREG::cbInstanceData field. */
3517 char achInstanceData[8];
3518} PDMDEVINS;
3519
3520/** Current PDMDEVINS version number. */
3521#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 1, 0)
3522
3523/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3524#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3525
3526/**
3527 * Checks the structure versions of the device instance and device helpers,
3528 * returning if they are incompatible.
3529 *
3530 * This is for use in the constructor.
3531 *
3532 * @param pDevIns The device instance pointer.
3533 */
3534#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3535 do \
3536 { \
3537 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3538 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3539 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3540 VERR_VERSION_MISMATCH); \
3541 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3542 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3543 VERR_VERSION_MISMATCH); \
3544 } while (0)
3545
3546/**
3547 * Quietly checks the structure versions of the device instance and device
3548 * helpers, returning if they are incompatible.
3549 *
3550 * This is for use in the destructor.
3551 *
3552 * @param pDevIns The device instance pointer.
3553 */
3554#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3555 do \
3556 { \
3557 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3558 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3559 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3560 return VERR_VERSION_MISMATCH; \
3561 } while (0)
3562
3563/** @def PDMDEV_ASSERT_EMT
3564 * Assert that the current thread is the emulation thread.
3565 */
3566#ifdef VBOX_STRICT
3567# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3568#else
3569# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3570#endif
3571
3572/** @def PDMDEV_ASSERT_OTHER
3573 * Assert that the current thread is NOT the emulation thread.
3574 */
3575#ifdef VBOX_STRICT
3576# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3577#else
3578# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3579#endif
3580
3581/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3582 * Assert that the current thread is owner of the VM lock.
3583 */
3584#ifdef VBOX_STRICT
3585# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3586#else
3587# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3588#endif
3589
3590/** @def PDMDEV_SET_ERROR
3591 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3592 */
3593#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3594 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3595
3596/** @def PDMDEV_SET_RUNTIME_ERROR
3597 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3598 */
3599#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3600 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3601
3602/** @def PDMDEVINS_2_RCPTR
3603 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3604 */
3605#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3606
3607/** @def PDMDEVINS_2_R3PTR
3608 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3609 */
3610#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3611
3612/** @def PDMDEVINS_2_R0PTR
3613 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3614 */
3615#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3616
3617
3618#ifdef IN_RING3
3619
3620/**
3621 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3622 */
3623DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3624 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3625 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3626{
3627 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3628}
3629
3630/**
3631 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3632 */
3633DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3634 const char *pszOut, const char *pszIn, const char *pszOutStr,
3635 const char *pszInStr, const char *pszDesc)
3636{
3637 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3638}
3639
3640/**
3641 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3642 */
3643DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3644 const char *pszOut, const char *pszIn, const char *pszOutStr,
3645 const char *pszInStr, const char *pszDesc)
3646{
3647 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3648}
3649
3650/**
3651 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3652 */
3653DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3654{
3655 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3656}
3657
3658/**
3659 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3660 */
3661DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3662 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3663 const char *pszDesc)
3664{
3665 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3666}
3667
3668/**
3669 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3670 */
3671DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3672 const char *pszWrite, const char *pszRead, const char *pszFill)
3673{
3674 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3675}
3676
3677/**
3678 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3679 */
3680DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3681 const char *pszWrite, const char *pszRead, const char *pszFill)
3682{
3683 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3684}
3685
3686/**
3687 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3688 */
3689DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3690{
3691 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3692}
3693
3694/**
3695 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3696 */
3697DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3698{
3699 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3700}
3701
3702/**
3703 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3704 */
3705DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3706{
3707 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3708}
3709
3710/**
3711 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3712 */
3713DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3714{
3715 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3716}
3717
3718/**
3719 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3720 */
3721DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3722{
3723 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3724}
3725
3726/**
3727 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3728 */
3729DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3730 const char *pszDesc, PRTRCPTR pRCPtr)
3731{
3732 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3733}
3734
3735/**
3736 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3737 */
3738DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3739 const char *pszDesc, PRTR0PTR pR0Ptr)
3740{
3741 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3742}
3743
3744/**
3745 * @copydoc PDMDEVHLPR3::pfnROMRegister
3746 */
3747DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3748{
3749 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3750}
3751
3752/**
3753 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3754 */
3755DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3756{
3757 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3758}
3759
3760/**
3761 * Register a save state data unit.
3762 *
3763 * @returns VBox status.
3764 * @param pDevIns The device instance.
3765 * @param uVersion Data layout version number.
3766 * @param cbGuess The approximate amount of data in the unit.
3767 * Only for progress indicators.
3768 * @param pfnSaveExec Execute save callback, optional.
3769 * @param pfnLoadExec Execute load callback, optional.
3770 */
3771DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3772 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3773{
3774 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3775 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3776 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3777 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3778}
3779
3780/**
3781 * Register a save state data unit with a live save callback as well.
3782 *
3783 * @returns VBox status.
3784 * @param pDevIns The device instance.
3785 * @param uVersion Data layout version number.
3786 * @param cbGuess The approximate amount of data in the unit.
3787 * Only for progress indicators.
3788 * @param pfnLiveExec Execute live callback, optional.
3789 * @param pfnSaveExec Execute save callback, optional.
3790 * @param pfnLoadExec Execute load callback, optional.
3791 */
3792DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3793 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3794{
3795 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3796 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3797 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3798 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3799}
3800
3801/**
3802 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3803 */
3804DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3805 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3806 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3807 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3808{
3809 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3810 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3811 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3812 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3813}
3814
3815/**
3816 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3817 */
3818DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3819 const char *pszDesc, PPTMTIMERR3 ppTimer)
3820{
3821 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3822}
3823
3824/**
3825 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3826 */
3827DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3828{
3829 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3830}
3831
3832#endif /* IN_RING3 */
3833
3834/**
3835 * @copydoc PDMDEVHLPR3::pfnPhysRead
3836 */
3837DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3838{
3839 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3840}
3841
3842/**
3843 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3844 */
3845DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3846{
3847 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3848}
3849
3850#ifdef IN_RING3
3851
3852/**
3853 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3854 */
3855DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3856{
3857 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3858}
3859
3860/**
3861 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3862 */
3863DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3864{
3865 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3866}
3867
3868/**
3869 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3870 */
3871DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3872{
3873 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3874}
3875
3876/**
3877 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3878 */
3879DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3880{
3881 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3882}
3883
3884/**
3885 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3886 */
3887DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3888{
3889 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3890}
3891
3892/**
3893 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3894 */
3895DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3896{
3897 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3898}
3899
3900/**
3901 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3902 */
3903DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3904{
3905 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3906}
3907
3908/**
3909 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3910 */
3911DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3912{
3913 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3914}
3915
3916/**
3917 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3918 */
3919DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3920{
3921 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
3922}
3923
3924/**
3925 * @copydoc PDMDEVHLPR3::pfnVMState
3926 */
3927DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3928{
3929 return pDevIns->pHlpR3->pfnVMState(pDevIns);
3930}
3931
3932/**
3933 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
3934 */
3935DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
3936{
3937 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
3938}
3939
3940#endif /* IN_RING3 */
3941
3942/**
3943 * @copydoc PDMDEVHLPR3::pfnVMSetError
3944 */
3945DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3946{
3947 va_list va;
3948 va_start(va, pszFormat);
3949 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3950 va_end(va);
3951 return rc;
3952}
3953
3954/**
3955 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3956 */
3957DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3958{
3959 va_list va;
3960 int rc;
3961 va_start(va, pszFormat);
3962 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3963 va_end(va);
3964 return rc;
3965}
3966
3967/**
3968 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
3969 *
3970 * @returns VBox status code which must be passed up to the VMM. This will be
3971 * VINF_SUCCESS in non-strict builds.
3972 * @param pDevIns The device instance.
3973 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3974 * @param pszFormat Message. (optional)
3975 * @param ... Message parameters.
3976 */
3977DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3978{
3979#ifdef VBOX_STRICT
3980# ifdef IN_RING3
3981 int rc;
3982 va_list args;
3983 va_start(args, pszFormat);
3984 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3985 va_end(args);
3986 return rc;
3987# else
3988 return VINF_EM_DBG_STOP;
3989# endif
3990#else
3991 NOREF(pDevIns);
3992 NOREF(pszFile);
3993 NOREF(iLine);
3994 NOREF(pszFunction);
3995 NOREF(pszFormat);
3996 return VINF_SUCCESS;
3997#endif
3998}
3999
4000#ifdef IN_RING3
4001
4002/**
4003 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4004 */
4005DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4006{
4007 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4008}
4009
4010/**
4011 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4012 */
4013DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4014{
4015 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4016}
4017
4018/**
4019 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4020 */
4021DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4022 const char *pszDesc, const char *pszName, ...)
4023{
4024 va_list va;
4025 va_start(va, pszName);
4026 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4027 va_end(va);
4028}
4029
4030/**
4031 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4032 */
4033DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4034{
4035 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4036}
4037
4038/**
4039 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4040 */
4041DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4042{
4043 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4044}
4045
4046/**
4047 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4048 */
4049DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4050 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4051{
4052 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4053}
4054
4055#endif /* IN_RING3 */
4056
4057/**
4058 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4059 */
4060DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4061{
4062 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4063}
4064
4065/**
4066 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4067 */
4068DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4069{
4070 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4071}
4072
4073/**
4074 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4075 */
4076DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4077{
4078 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4079}
4080
4081/**
4082 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4083 */
4084DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4085{
4086 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4087}
4088
4089#ifdef IN_RING3
4090
4091/**
4092 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4093 */
4094DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4095{
4096 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4097}
4098
4099/**
4100 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4101 */
4102DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4103 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4104{
4105 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4106}
4107
4108/**
4109 * Initializes a PDM critical section.
4110 *
4111 * The PDM critical sections are derived from the IPRT critical sections, but
4112 * works in RC and R0 as well.
4113 *
4114 * @returns VBox status code.
4115 * @param pDevIns The device instance.
4116 * @param pCritSect Pointer to the critical section.
4117 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4118 * @param pszNameFmt Format string for namging the critical section.
4119 * For statistics and lock validation.
4120 * @param ... Arguments for the format string.
4121 */
4122DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4123{
4124 int rc;
4125 va_list va;
4126 va_start(va, pszNameFmt);
4127 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4128 va_end(va);
4129 return rc;
4130}
4131
4132/**
4133 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4134 */
4135DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4136 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4137{
4138 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4139}
4140
4141/**
4142 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4143 */
4144DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4145{
4146 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4147}
4148
4149/**
4150 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4151 */
4152DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4153{
4154 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4155}
4156
4157/**
4158 * @copydoc PDMDEVHLPR3::pfnA20Set
4159 */
4160DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4161{
4162 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4163}
4164
4165/**
4166 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4167 */
4168DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4169{
4170 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4171}
4172
4173/**
4174 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4175 */
4176DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4177{
4178 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4179}
4180
4181/**
4182 * @copydoc PDMDEVHLPR3::pfnPICRegister
4183 */
4184DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4185{
4186 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4187}
4188
4189/**
4190 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4191 */
4192DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4193{
4194 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4195}
4196
4197/**
4198 * @copydoc PDMDEVHLPR3::pfn
4199 */
4200DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4201{
4202 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4203}
4204
4205/**
4206 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4207 */
4208DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4209{
4210 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4211}
4212
4213/**
4214 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4215 */
4216DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4217{
4218 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4219}
4220
4221/**
4222 * @copydoc PDMDEVHLPR3::pfnDMARegister
4223 */
4224DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4225{
4226 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4227}
4228
4229/**
4230 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4231 */
4232DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4233{
4234 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4235}
4236
4237/**
4238 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4239 */
4240DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4241{
4242 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4243}
4244
4245/**
4246 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4247 */
4248DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4249{
4250 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4251}
4252
4253/**
4254 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4255 */
4256DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4257{
4258 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4259}
4260
4261/**
4262 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4263 */
4264DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4265{
4266 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4267}
4268
4269/**
4270 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4271 */
4272DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4273{
4274 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4275}
4276
4277/**
4278 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4279 */
4280DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4281{
4282 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4283}
4284
4285#endif /* IN_RING3 */
4286
4287/**
4288 * @copydoc PDMDEVHLPR3::pfnGetVM
4289 */
4290DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4291{
4292 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4293}
4294
4295/**
4296 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4297 */
4298DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4299{
4300 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4301}
4302
4303#ifdef IN_RING3
4304
4305/**
4306 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4307 */
4308DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4309{
4310 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4311}
4312
4313/**
4314 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4315 */
4316DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4317{
4318 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4319}
4320
4321/**
4322 * @copydoc PDMDEVHLPR3::pfnVMReset
4323 */
4324DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4325{
4326 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4327}
4328
4329/**
4330 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4331 */
4332DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4333{
4334 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4335}
4336
4337/**
4338 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4339 */
4340DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4341{
4342 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4343}
4344
4345#endif /* IN_RING3 */
4346
4347/**
4348 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4349 */
4350DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4351{
4352 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4353}
4354
4355#ifdef IN_RING3
4356
4357/**
4358 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4359 */
4360DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4361{
4362 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4363}
4364
4365#endif /* IN_RING3 */
4366#ifdef IN_RING0
4367
4368/**
4369 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4370 */
4371DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4372{
4373 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4374}
4375
4376#endif /* IN_RING0 */
4377
4378
4379
4380
4381/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4382typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4383
4384/**
4385 * Callbacks for VBoxDeviceRegister().
4386 */
4387typedef struct PDMDEVREGCB
4388{
4389 /** Interface version.
4390 * This is set to PDM_DEVREG_CB_VERSION. */
4391 uint32_t u32Version;
4392
4393 /**
4394 * Registers a device with the current VM instance.
4395 *
4396 * @returns VBox status code.
4397 * @param pCallbacks Pointer to the callback table.
4398 * @param pReg Pointer to the device registration record.
4399 * This data must be permanent and readonly.
4400 */
4401 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4402} PDMDEVREGCB;
4403
4404/** Current version of the PDMDEVREGCB structure. */
4405#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4406
4407
4408/**
4409 * The VBoxDevicesRegister callback function.
4410 *
4411 * PDM will invoke this function after loading a device module and letting
4412 * the module decide which devices to register and how to handle conflicts.
4413 *
4414 * @returns VBox status code.
4415 * @param pCallbacks Pointer to the callback table.
4416 * @param u32Version VBox version number.
4417 */
4418typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4419
4420/** @} */
4421
4422RT_C_DECLS_END
4423
4424#endif
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