VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 28319

Last change on this file since 28319 was 28319, checked in by vboxsync, 15 years ago

pdmdev: Made PDMDevHlpVMState available in R0 and RC.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/pdmcommon.h>
39#include <VBox/iom.h>
40#include <VBox/tm.h>
41#include <VBox/ssm.h>
42#include <VBox/cfgm.h>
43#include <VBox/dbgf.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48RT_C_DECLS_BEGIN
49
50/** @defgroup grp_pdm_device The PDM Devices API
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data. If the registration structure
60 * is needed, it can be accessed thru pDevIns->pReg.
61 * @param iInstance Instance number. Use this to figure out which registers
62 * and such to use. The instance number is also found in
63 * pDevIns->iInstance, but since it's likely to be
64 * freqently used PDM passes it as parameter.
65 * @param pCfg Configuration node handle for the driver. This is
66 * expected to be in high demand in the constructor and is
67 * therefore passed as an argument. When using it at other
68 * times, it can be found in pDrvIns->pCfg.
69 */
70typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
71/** Pointer to a FNPDMDEVCONSTRUCT() function. */
72typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
73
74/**
75 * Destruct a device instance.
76 *
77 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
78 * resources can be freed correctly.
79 *
80 * @returns VBox status.
81 * @param pDevIns The device instance data.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remark A relocation CANNOT fail.
102 */
103typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
104/** Pointer to a FNPDMDEVRELOCATE() function. */
105typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
106
107/**
108 * Device I/O Control interface.
109 *
110 * This is used by external components, such as the COM interface, to
111 * communicate with devices using a class wide interface or a device
112 * specific interface.
113 *
114 * @returns VBox status code.
115 * @param pDevIns Pointer to the device instance.
116 * @param uFunction Function to perform.
117 * @param pvIn Pointer to input data.
118 * @param cbIn Size of input data.
119 * @param pvOut Pointer to output data.
120 * @param cbOut Size of output data.
121 * @param pcbOut Where to store the actual size of the output data.
122 */
123typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
124 void *pvIn, RTUINT cbIn,
125 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
126/** Pointer to a FNPDMDEVIOCTL() function. */
127typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
128
129/**
130 * Power On notification.
131 *
132 * @returns VBox status.
133 * @param pDevIns The device instance data.
134 */
135typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
136/** Pointer to a FNPDMDEVPOWERON() function. */
137typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
138
139/**
140 * Reset notification.
141 *
142 * @returns VBox status.
143 * @param pDevIns The device instance data.
144 */
145typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
146/** Pointer to a FNPDMDEVRESET() function. */
147typedef FNPDMDEVRESET *PFNPDMDEVRESET;
148
149/**
150 * Suspend notification.
151 *
152 * @returns VBox status.
153 * @param pDevIns The device instance data.
154 * @thread EMT(0)
155 */
156typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVSUSPEND() function. */
158typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
159
160/**
161 * Resume notification.
162 *
163 * @returns VBox status.
164 * @param pDevIns The device instance data.
165 */
166typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
167/** Pointer to a FNPDMDEVRESUME() function. */
168typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
169
170/**
171 * Power Off notification.
172 *
173 * This is only called when the VMR3PowerOff call is made on a running VM. This
174 * means that there is no notification if the VM was suspended before being
175 * powered of. There will also be no callback when hot plugging devices.
176 *
177 * @param pDevIns The device instance data.
178 * @thread EMT(0)
179 */
180typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
181/** Pointer to a FNPDMDEVPOWEROFF() function. */
182typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
183
184/**
185 * Attach command.
186 *
187 * This is called to let the device attach to a driver for a specified LUN
188 * at runtime. This is not called during VM construction, the device
189 * constructor have to attach to all the available drivers.
190 *
191 * This is like plugging in the keyboard or mouse after turning on the PC.
192 *
193 * @returns VBox status code.
194 * @param pDevIns The device instance.
195 * @param iLUN The logical unit which is being detached.
196 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
197 */
198typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
199/** Pointer to a FNPDMDEVATTACH() function. */
200typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
201
202/**
203 * Detach notification.
204 *
205 * This is called when a driver is detaching itself from a LUN of the device.
206 * The device should adjust it's state to reflect this.
207 *
208 * This is like unplugging the network cable to use it for the laptop or
209 * something while the PC is still running.
210 *
211 * @param pDevIns The device instance.
212 * @param iLUN The logical unit which is being detached.
213 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
214 */
215typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
216/** Pointer to a FNPDMDEVDETACH() function. */
217typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
218
219/**
220 * Query the base interface of a logical unit.
221 *
222 * @returns VBOX status code.
223 * @param pDevIns The device instance.
224 * @param iLUN The logicial unit to query.
225 * @param ppBase Where to store the pointer to the base interface of the LUN.
226 */
227typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
228/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
229typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
230
231/**
232 * Init complete notification.
233 * This can be done to do communication with other devices and other
234 * initialization which requires everything to be in place.
235 *
236 * @returns VBOX status code.
237 * @param pDevIns The device instance.
238 */
239typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
240/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
241typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
242
243
244
245/**
246 * PDM Device Registration Structure.
247 *
248 * This structure is used when registering a device from VBoxInitDevices() in HC
249 * Ring-3. PDM will continue use till the VM is terminated.
250 */
251typedef struct PDMDEVREG
252{
253 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
254 uint32_t u32Version;
255 /** Device name. */
256 char szName[32];
257 /** Name of the raw-mode context module (no path).
258 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
259 char szRCMod[32];
260 /** Name of the ring-0 module (no path).
261 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
262 char szR0Mod[32];
263 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
264 * remain unchanged from registration till VM destruction. */
265 const char *pszDescription;
266
267 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
268 uint32_t fFlags;
269 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
270 uint32_t fClass;
271 /** Maximum number of instances (per VM). */
272 uint32_t cMaxInstances;
273 /** Size of the instance data. */
274 uint32_t cbInstance;
275
276 /** Construct instance - required. */
277 PFNPDMDEVCONSTRUCT pfnConstruct;
278 /** Destruct instance - optional. */
279 PFNPDMDEVDESTRUCT pfnDestruct;
280 /** Relocation command - optional. */
281 PFNPDMDEVRELOCATE pfnRelocate;
282 /** I/O Control interface - optional. */
283 PFNPDMDEVIOCTL pfnIOCtl;
284 /** Power on notification - optional. */
285 PFNPDMDEVPOWERON pfnPowerOn;
286 /** Reset notification - optional. */
287 PFNPDMDEVRESET pfnReset;
288 /** Suspend notification - optional. */
289 PFNPDMDEVSUSPEND pfnSuspend;
290 /** Resume notification - optional. */
291 PFNPDMDEVRESUME pfnResume;
292 /** Attach command - optional. */
293 PFNPDMDEVATTACH pfnAttach;
294 /** Detach notification - optional. */
295 PFNPDMDEVDETACH pfnDetach;
296 /** Query a LUN base interface - optional. */
297 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
298 /** Init complete notification - optional. */
299 PFNPDMDEVINITCOMPLETE pfnInitComplete;
300 /** Power off notification - optional. */
301 PFNPDMDEVPOWEROFF pfnPowerOff;
302 /** @todo */
303 PFNRT pfnSoftReset;
304 /** Initialization safty marker. */
305 uint32_t u32VersionEnd;
306} PDMDEVREG;
307/** Pointer to a PDM Device Structure. */
308typedef PDMDEVREG *PPDMDEVREG;
309/** Const pointer to a PDM Device Structure. */
310typedef PDMDEVREG const *PCPDMDEVREG;
311
312/** Current DEVREG version number. */
313#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
314
315/** PDM Device Flags.
316 * @{ */
317/** This flag is used to indicate that the device has a RC component. */
318#define PDM_DEVREG_FLAGS_RC 0x00000001
319/** This flag is used to indicate that the device has a R0 component. */
320#define PDM_DEVREG_FLAGS_R0 0x00000002
321
322/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
323 * The bit count for the current host. */
324#if HC_ARCH_BITS == 32
325# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
326#elif HC_ARCH_BITS == 64
327# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
328#else
329# error Unsupported HC_ARCH_BITS value.
330#endif
331/** The host bit count mask. */
332#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
333
334/** The device support only 32-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
336/** The device support only 64-bit guests. */
337#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
338/** The device support both 32-bit & 64-bit guests. */
339#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
340/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
341 * The guest bit count for the current compilation. */
342#if GC_ARCH_BITS == 32
343# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
344#elif GC_ARCH_BITS == 64
345# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
346#else
347# error Unsupported GC_ARCH_BITS value.
348#endif
349/** The guest bit count mask. */
350#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
351
352/** A convenience. */
353#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
354
355/** Indicates that the devices support PAE36 on a 32-bit guest. */
356#define PDM_DEVREG_FLAGS_PAE36 0x00001000
357
358/** Indicates that the device needs to be notified before the drivers when suspending. */
359#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
360
361/** Indicates that the device needs to be notified before the drivers when powering off. */
362#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
363/** @} */
364
365
366/** PDM Device Classes.
367 * The order is important, lower bit earlier instantiation.
368 * @{ */
369/** Architecture device. */
370#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
371/** Architecture BIOS device. */
372#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
373/** PCI bus brigde. */
374#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
375/** ISA bus brigde. */
376#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
377/** Input device (mouse, keyboard, joystick, HID, ...). */
378#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
379/** Interrupt controller (PIC). */
380#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
381/** Interval controoler (PIT). */
382#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
383/** RTC/CMOS. */
384#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
385/** DMA controller. */
386#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
387/** VMM Device. */
388#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
389/** Graphics device, like VGA. */
390#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
391/** Storage controller device. */
392#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
393/** Network interface controller. */
394#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
395/** Audio. */
396#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
397/** USB HIC. */
398#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
399/** ACPI. */
400#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
401/** Serial controller device. */
402#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
403/** Parallel controller device */
404#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
405/** Misc devices (always last). */
406#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
407/** @} */
408
409
410/** @name IRQ Level for use with the *SetIrq APIs.
411 * @{
412 */
413/** Assert the IRQ (can assume value 1). */
414#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
415/** Deassert the IRQ (can assume value 0). */
416#define PDM_IRQ_LEVEL_LOW 0
417/** flip-flop - assert and then deassert it again immediately. */
418#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
419/** @} */
420
421
422/**
423 * PCI Bus registration structure.
424 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
425 */
426typedef struct PDMPCIBUSREG
427{
428 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
429 uint32_t u32Version;
430
431 /**
432 * Registers the device with the default PCI bus.
433 *
434 * @returns VBox status code.
435 * @param pDevIns Device instance of the PCI Bus.
436 * @param pPciDev The PCI device structure.
437 * Any PCI enabled device must keep this in it's instance data!
438 * Fill in the PCI data config before registration, please.
439 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
440 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
441 * If negative, the pci bus device will assign one.
442 */
443 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
444
445 /**
446 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
447 *
448 * @returns VBox status code.
449 * @param pDevIns Device instance of the PCI Bus.
450 * @param pPciDev The PCI device structure.
451 * @param iRegion The region number.
452 * @param cbRegion Size of the region.
453 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
454 * @param pfnCallback Callback for doing the mapping.
455 */
456 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
457
458 /**
459 * Register PCI configuration space read/write callbacks.
460 *
461 * @param pDevIns Device instance of the PCI Bus.
462 * @param pPciDev The PCI device structure.
463 * @param pfnRead Pointer to the user defined PCI config read function.
464 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
465 * PCI config read function. This way, user can decide when (and if)
466 * to call default PCI config read function. Can be NULL.
467 * @param pfnWrite Pointer to the user defined PCI config write function.
468 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
469 * PCI config write function. This way, user can decide when (and if)
470 * to call default PCI config write function. Can be NULL.
471 * @thread EMT
472 */
473 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
474 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
475
476 /**
477 * Set the IRQ for a PCI device.
478 *
479 * @param pDevIns Device instance of the PCI Bus.
480 * @param pPciDev The PCI device structure.
481 * @param iIrq IRQ number to set.
482 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
483 */
484 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
485
486 /**
487 * Saves a state of the PCI device.
488 *
489 * @returns VBox status code.
490 * @param pDevIns Device instance of the PCI Bus.
491 * @param pPciDev Pointer to PCI device.
492 * @param pSSMHandle The handle to save the state to.
493 */
494 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
495
496 /**
497 * Loads a saved PCI device state.
498 *
499 * @returns VBox status code.
500 * @param pDevIns Device instance of the PCI Bus.
501 * @param pPciDev Pointer to PCI device.
502 * @param pSSMHandle The handle to the saved state.
503 */
504 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
505
506 /**
507 * Called to perform the job of the bios.
508 * This is only called for the first PCI Bus - it is expected to
509 * service all the PCI buses.
510 *
511 * @returns VBox status.
512 * @param pDevIns Device instance of the first bus.
513 */
514 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
515
516 /** The name of the SetIrq RC entry point. */
517 const char *pszSetIrqRC;
518
519 /** The name of the SetIrq R0 entry point. */
520 const char *pszSetIrqR0;
521
522} PDMPCIBUSREG;
523/** Pointer to a PCI bus registration structure. */
524typedef PDMPCIBUSREG *PPDMPCIBUSREG;
525
526/** Current PDMPCIBUSREG version number. */
527#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 1, 0)
528
529/**
530 * PCI Bus RC helpers.
531 */
532typedef struct PDMPCIHLPRC
533{
534 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
535 uint32_t u32Version;
536
537 /**
538 * Set an ISA IRQ.
539 *
540 * @param pDevIns PCI device instance.
541 * @param iIrq IRQ number to set.
542 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
543 * @thread EMT only.
544 */
545 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
546
547 /**
548 * Set an I/O-APIC IRQ.
549 *
550 * @param pDevIns PCI device instance.
551 * @param iIrq IRQ number to set.
552 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
553 * @thread EMT only.
554 */
555 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
556
557 /**
558 * Acquires the PDM lock.
559 *
560 * @returns VINF_SUCCESS on success.
561 * @returns rc if we failed to acquire the lock.
562 * @param pDevIns The PCI device instance.
563 * @param rc What to return if we fail to acquire the lock.
564 */
565 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
566
567 /**
568 * Releases the PDM lock.
569 *
570 * @param pDevIns The PCI device instance.
571 */
572 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
573
574 /** Just a safety precaution. */
575 uint32_t u32TheEnd;
576} PDMPCIHLPRC;
577/** Pointer to PCI helpers. */
578typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
579/** Pointer to const PCI helpers. */
580typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
581
582/** Current PDMPCIHLPR3 version number. */
583#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 1, 0)
584
585
586/**
587 * PCI Bus R0 helpers.
588 */
589typedef struct PDMPCIHLPR0
590{
591 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
592 uint32_t u32Version;
593
594 /**
595 * Set an ISA IRQ.
596 *
597 * @param pDevIns PCI device instance.
598 * @param iIrq IRQ number to set.
599 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
600 * @thread EMT only.
601 */
602 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
603
604 /**
605 * Set an I/O-APIC IRQ.
606 *
607 * @param pDevIns PCI device instance.
608 * @param iIrq IRQ number to set.
609 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
610 * @thread EMT only.
611 */
612 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
613
614 /**
615 * Acquires the PDM lock.
616 *
617 * @returns VINF_SUCCESS on success.
618 * @returns rc if we failed to acquire the lock.
619 * @param pDevIns The PCI device instance.
620 * @param rc What to return if we fail to acquire the lock.
621 */
622 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
623
624 /**
625 * Releases the PDM lock.
626 *
627 * @param pDevIns The PCI device instance.
628 */
629 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
630
631 /** Just a safety precaution. */
632 uint32_t u32TheEnd;
633} PDMPCIHLPR0;
634/** Pointer to PCI helpers. */
635typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
636/** Pointer to const PCI helpers. */
637typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
638
639/** Current PDMPCIHLPR0 version number. */
640#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 1, 0)
641
642/**
643 * PCI device helpers.
644 */
645typedef struct PDMPCIHLPR3
646{
647 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
648 uint32_t u32Version;
649
650 /**
651 * Set an ISA IRQ.
652 *
653 * @param pDevIns The PCI device instance.
654 * @param iIrq IRQ number to set.
655 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
656 * @thread EMT only.
657 */
658 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
659
660 /**
661 * Set an I/O-APIC IRQ.
662 *
663 * @param pDevIns The PCI device instance.
664 * @param iIrq IRQ number to set.
665 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
666 * @thread EMT only.
667 */
668 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
669
670 /**
671 * Checks if the given address is an MMIO2 base address or not.
672 *
673 * @returns true/false accordingly.
674 * @param pDevIns The PCI device instance.
675 * @param pOwner The owner of the memory, optional.
676 * @param GCPhys The address to check.
677 */
678 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
679
680 /**
681 * Gets the address of the RC PCI Bus helpers.
682 *
683 * This should be called at both construction and relocation time
684 * to obtain the correct address of the RC helpers.
685 *
686 * @returns RC pointer to the PCI Bus helpers.
687 * @param pDevIns Device instance of the PCI Bus.
688 * @thread EMT only.
689 */
690 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
691
692 /**
693 * Gets the address of the R0 PCI Bus helpers.
694 *
695 * This should be called at both construction and relocation time
696 * to obtain the correct address of the R0 helpers.
697 *
698 * @returns R0 pointer to the PCI Bus helpers.
699 * @param pDevIns Device instance of the PCI Bus.
700 * @thread EMT only.
701 */
702 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
703
704 /**
705 * Acquires the PDM lock.
706 *
707 * @returns VINF_SUCCESS on success.
708 * @returns Fatal error on failure.
709 * @param pDevIns The PCI device instance.
710 * @param rc Dummy for making the interface identical to the RC and R0 versions.
711 */
712 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
713
714 /**
715 * Releases the PDM lock.
716 *
717 * @param pDevIns The PCI device instance.
718 */
719 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
720
721 /** Just a safety precaution. */
722 uint32_t u32TheEnd;
723} PDMPCIHLPR3;
724/** Pointer to PCI helpers. */
725typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
726/** Pointer to const PCI helpers. */
727typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
728
729/** Current PDMPCIHLPR3 version number. */
730#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 1, 0)
731
732
733/**
734 * Programmable Interrupt Controller registration structure.
735 */
736typedef struct PDMPICREG
737{
738 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
739 uint32_t u32Version;
740
741 /**
742 * Set the an IRQ.
743 *
744 * @param pDevIns Device instance of the PIC.
745 * @param iIrq IRQ number to set.
746 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
747 */
748 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
749
750 /**
751 * Get a pending interrupt.
752 *
753 * @returns Pending interrupt number.
754 * @param pDevIns Device instance of the PIC.
755 */
756 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
757
758 /** The name of the RC SetIrq entry point. */
759 const char *pszSetIrqRC;
760 /** The name of the RC GetInterrupt entry point. */
761 const char *pszGetInterruptRC;
762
763 /** The name of the R0 SetIrq entry point. */
764 const char *pszSetIrqR0;
765 /** The name of the R0 GetInterrupt entry point. */
766 const char *pszGetInterruptR0;
767} PDMPICREG;
768/** Pointer to a PIC registration structure. */
769typedef PDMPICREG *PPDMPICREG;
770
771/** Current PDMPICREG version number. */
772#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
773
774/**
775 * PIC RC helpers.
776 */
777typedef struct PDMPICHLPRC
778{
779 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
780 uint32_t u32Version;
781
782 /**
783 * Set the interrupt force action flag.
784 *
785 * @param pDevIns Device instance of the PIC.
786 */
787 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
788
789 /**
790 * Clear the interrupt force action flag.
791 *
792 * @param pDevIns Device instance of the PIC.
793 */
794 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
795
796 /**
797 * Acquires the PDM lock.
798 *
799 * @returns VINF_SUCCESS on success.
800 * @returns rc if we failed to acquire the lock.
801 * @param pDevIns The PIC device instance.
802 * @param rc What to return if we fail to acquire the lock.
803 */
804 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
805
806 /**
807 * Releases the PDM lock.
808 *
809 * @param pDevIns The PIC device instance.
810 */
811 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
812
813 /** Just a safety precaution. */
814 uint32_t u32TheEnd;
815} PDMPICHLPRC;
816
817/** Pointer to PIC RC helpers. */
818typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
819/** Pointer to const PIC RC helpers. */
820typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
821
822/** Current PDMPICHLPRC version number. */
823#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
824
825
826/**
827 * PIC R0 helpers.
828 */
829typedef struct PDMPICHLPR0
830{
831 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
832 uint32_t u32Version;
833
834 /**
835 * Set the interrupt force action flag.
836 *
837 * @param pDevIns Device instance of the PIC.
838 */
839 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
840
841 /**
842 * Clear the interrupt force action flag.
843 *
844 * @param pDevIns Device instance of the PIC.
845 */
846 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
847
848 /**
849 * Acquires the PDM lock.
850 *
851 * @returns VINF_SUCCESS on success.
852 * @returns rc if we failed to acquire the lock.
853 * @param pDevIns The PIC device instance.
854 * @param rc What to return if we fail to acquire the lock.
855 */
856 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
857
858 /**
859 * Releases the PDM lock.
860 *
861 * @param pDevIns The PCI device instance.
862 */
863 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
864
865 /** Just a safety precaution. */
866 uint32_t u32TheEnd;
867} PDMPICHLPR0;
868
869/** Pointer to PIC R0 helpers. */
870typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
871/** Pointer to const PIC R0 helpers. */
872typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
873
874/** Current PDMPICHLPR0 version number. */
875#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
876
877/**
878 * PIC R3 helpers.
879 */
880typedef struct PDMPICHLPR3
881{
882 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
883 uint32_t u32Version;
884
885 /**
886 * Set the interrupt force action flag.
887 *
888 * @param pDevIns Device instance of the PIC.
889 */
890 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
891
892 /**
893 * Clear the interrupt force action flag.
894 *
895 * @param pDevIns Device instance of the PIC.
896 */
897 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
898
899 /**
900 * Acquires the PDM lock.
901 *
902 * @returns VINF_SUCCESS on success.
903 * @returns Fatal error on failure.
904 * @param pDevIns The PIC device instance.
905 * @param rc Dummy for making the interface identical to the RC and R0 versions.
906 */
907 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
908
909 /**
910 * Releases the PDM lock.
911 *
912 * @param pDevIns The PIC device instance.
913 */
914 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
915
916 /**
917 * Gets the address of the RC PIC helpers.
918 *
919 * This should be called at both construction and relocation time
920 * to obtain the correct address of the RC helpers.
921 *
922 * @returns RC pointer to the PIC helpers.
923 * @param pDevIns Device instance of the PIC.
924 */
925 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
926
927 /**
928 * Gets the address of the R0 PIC helpers.
929 *
930 * This should be called at both construction and relocation time
931 * to obtain the correct address of the R0 helpers.
932 *
933 * @returns R0 pointer to the PIC helpers.
934 * @param pDevIns Device instance of the PIC.
935 */
936 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
937
938 /** Just a safety precaution. */
939 uint32_t u32TheEnd;
940} PDMPICHLPR3;
941
942/** Pointer to PIC R3 helpers. */
943typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
944/** Pointer to const PIC R3 helpers. */
945typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
946
947/** Current PDMPICHLPR3 version number. */
948#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
949
950
951
952/**
953 * Advanced Programmable Interrupt Controller registration structure.
954 */
955typedef struct PDMAPICREG
956{
957 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
958 uint32_t u32Version;
959
960 /**
961 * Get a pending interrupt.
962 *
963 * @returns Pending interrupt number.
964 * @param pDevIns Device instance of the APIC.
965 */
966 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
967
968 /**
969 * Check if the APIC has a pending interrupt/if a TPR change would active one
970 *
971 * @returns Pending interrupt yes/no
972 * @param pDevIns Device instance of the APIC.
973 */
974 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
975
976 /**
977 * Set the APIC base.
978 *
979 * @param pDevIns Device instance of the APIC.
980 * @param u64Base The new base.
981 */
982 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
983
984 /**
985 * Get the APIC base.
986 *
987 * @returns Current base.
988 * @param pDevIns Device instance of the APIC.
989 */
990 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
991
992 /**
993 * Set the TPR (task priority register).
994 *
995 * @param pDevIns Device instance of the APIC.
996 * @param idCpu VCPU id
997 * @param u8TPR The new TPR.
998 */
999 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1000
1001 /**
1002 * Get the TPR (task priority register).
1003 *
1004 * @returns The current TPR.
1005 * @param pDevIns Device instance of the APIC.
1006 * @param idCpu VCPU id
1007 */
1008 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1009
1010 /**
1011 * Write MSR in APIC range.
1012 *
1013 * @returns VBox status code.
1014 * @param pDevIns Device instance of the APIC.
1015 * @param idCpu Target CPU.
1016 * @param u32Reg MSR to write.
1017 * @param u64Value Value to write.
1018 */
1019 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1020
1021 /**
1022 * Read MSR in APIC range.
1023 *
1024 * @returns VBox status code.
1025 * @param pDevIns Device instance of the APIC.
1026 * @param idCpu Target CPU.
1027 * @param u32Reg MSR to read.
1028 * @param pu64Value Value read.
1029 */
1030 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1031
1032 /**
1033 * Private interface between the IOAPIC and APIC.
1034 *
1035 * This is a low-level, APIC/IOAPIC implementation specific interface
1036 * which is registered with PDM only because it makes life so much
1037 * simpler right now (GC bits). This is a bad bad hack! The correct
1038 * way of doing this would involve some way of querying GC interfaces
1039 * and relocating them. Perhaps doing some kind of device init in GC...
1040 *
1041 * @returns status code.
1042 * @param pDevIns Device instance of the APIC.
1043 * @param u8Dest See APIC implementation.
1044 * @param u8DestMode See APIC implementation.
1045 * @param u8DeliveryMode See APIC implementation.
1046 * @param iVector See APIC implementation.
1047 * @param u8Polarity See APIC implementation.
1048 * @param u8TriggerMode See APIC implementation.
1049 */
1050 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1051 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1052
1053 /**
1054 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1055 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1056 *
1057 * @returns status code.
1058 * @param pDevIns Device instance of the APIC.
1059 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1060 */
1061 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1062
1063 /** The name of the RC GetInterrupt entry point. */
1064 const char *pszGetInterruptRC;
1065 /** The name of the RC HasPendingIrq entry point. */
1066 const char *pszHasPendingIrqRC;
1067 /** The name of the RC SetBase entry point. */
1068 const char *pszSetBaseRC;
1069 /** The name of the RC GetBase entry point. */
1070 const char *pszGetBaseRC;
1071 /** The name of the RC SetTPR entry point. */
1072 const char *pszSetTPRRC;
1073 /** The name of the RC GetTPR entry point. */
1074 const char *pszGetTPRRC;
1075 /** The name of the RC WriteMSR entry point. */
1076 const char *pszWriteMSRRC;
1077 /** The name of the RC ReadMSR entry point. */
1078 const char *pszReadMSRRC;
1079 /** The name of the RC BusDeliver entry point. */
1080 const char *pszBusDeliverRC;
1081 /** The name of the RC LocalInterrupt entry point. */
1082 const char *pszLocalInterruptRC;
1083
1084 /** The name of the R0 GetInterrupt entry point. */
1085 const char *pszGetInterruptR0;
1086 /** The name of the R0 HasPendingIrq entry point. */
1087 const char *pszHasPendingIrqR0;
1088 /** The name of the R0 SetBase entry point. */
1089 const char *pszSetBaseR0;
1090 /** The name of the R0 GetBase entry point. */
1091 const char *pszGetBaseR0;
1092 /** The name of the R0 SetTPR entry point. */
1093 const char *pszSetTPRR0;
1094 /** The name of the R0 GetTPR entry point. */
1095 const char *pszGetTPRR0;
1096 /** The name of the R0 WriteMSR entry point. */
1097 const char *pszWriteMSRR0;
1098 /** The name of the R0 ReadMSR entry point. */
1099 const char *pszReadMSRR0;
1100 /** The name of the R0 BusDeliver entry point. */
1101 const char *pszBusDeliverR0;
1102 /** The name of the R0 LocalInterrupt entry point. */
1103 const char *pszLocalInterruptR0;
1104
1105} PDMAPICREG;
1106/** Pointer to an APIC registration structure. */
1107typedef PDMAPICREG *PPDMAPICREG;
1108
1109/** Current PDMAPICREG version number. */
1110#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1111
1112
1113/**
1114 * APIC version argument for pfnChangeFeature.
1115 */
1116typedef enum PDMAPICVERSION
1117{
1118 /** Invalid 0 entry. */
1119 PDMAPICVERSION_INVALID = 0,
1120 /** No APIC. */
1121 PDMAPICVERSION_NONE,
1122 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1123 PDMAPICVERSION_APIC,
1124 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1125 PDMAPICVERSION_X2APIC,
1126 /** The usual 32-bit paranoia. */
1127 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1128} PDMAPICVERSION;
1129
1130/**
1131 * APIC irq argument for SetInterruptFF.
1132 */
1133typedef enum PDMAPICIRQ
1134{
1135 /** Invalid 0 entry. */
1136 PDMAPICIRQ_INVALID = 0,
1137 /** Normal hardware interrupt. */
1138 PDMAPICIRQ_HARDWARE,
1139 /** NMI. */
1140 PDMAPICIRQ_NMI,
1141 /** SMI. */
1142 PDMAPICIRQ_SMI,
1143 /** ExtINT (HW interrupt via PIC). */
1144 PDMAPICIRQ_EXTINT,
1145 /** The usual 32-bit paranoia. */
1146 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1147} PDMAPICIRQ;
1148
1149
1150/**
1151 * APIC RC helpers.
1152 */
1153typedef struct PDMAPICHLPRC
1154{
1155 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1156 uint32_t u32Version;
1157
1158 /**
1159 * Set the interrupt force action flag.
1160 *
1161 * @param pDevIns Device instance of the APIC.
1162 * @param enmType IRQ type.
1163 * @param idCpu Virtual CPU to set flag upon.
1164 */
1165 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1166
1167 /**
1168 * Clear the interrupt force action flag.
1169 *
1170 * @param pDevIns Device instance of the APIC.
1171 * @param enmType IRQ type.
1172 * @param idCpu Virtual CPU to clear flag upon.
1173 */
1174 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1175
1176 /**
1177 * Modifies APIC-related bits in the CPUID feature mask.
1178 *
1179 * @param pDevIns Device instance of the APIC.
1180 * @param enmVersion Supported APIC version.
1181 */
1182 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1183
1184 /**
1185 * Acquires the PDM lock.
1186 *
1187 * @returns VINF_SUCCESS on success.
1188 * @returns rc if we failed to acquire the lock.
1189 * @param pDevIns The APIC device instance.
1190 * @param rc What to return if we fail to acquire the lock.
1191 */
1192 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1193
1194 /**
1195 * Releases the PDM lock.
1196 *
1197 * @param pDevIns The APIC device instance.
1198 */
1199 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1200
1201 /**
1202 * Get the virtual CPU id corresponding to the current EMT.
1203 *
1204 * @param pDevIns The APIC device instance.
1205 */
1206 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1207
1208 /** Just a safety precaution. */
1209 uint32_t u32TheEnd;
1210} PDMAPICHLPRC;
1211/** Pointer to APIC GC helpers. */
1212typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1213/** Pointer to const APIC helpers. */
1214typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1215
1216/** Current PDMAPICHLPRC version number. */
1217#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1218
1219
1220/**
1221 * APIC R0 helpers.
1222 */
1223typedef struct PDMAPICHLPR0
1224{
1225 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1226 uint32_t u32Version;
1227
1228 /**
1229 * Set the interrupt force action flag.
1230 *
1231 * @param pDevIns Device instance of the APIC.
1232 * @param enmType IRQ type.
1233 * @param idCpu Virtual CPU to set flag upon.
1234 */
1235 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1236
1237 /**
1238 * Clear the interrupt force action flag.
1239 *
1240 * @param pDevIns Device instance of the APIC.
1241 * @param enmType IRQ type.
1242 * @param idCpu Virtual CPU to clear flag upon.
1243 */
1244 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1245
1246 /**
1247 * Modifies APIC-related bits in the CPUID feature mask.
1248 *
1249 * @param pDevIns Device instance of the APIC.
1250 * @param enmVersion Supported APIC version.
1251 */
1252 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1253
1254 /**
1255 * Acquires the PDM lock.
1256 *
1257 * @returns VINF_SUCCESS on success.
1258 * @returns rc if we failed to acquire the lock.
1259 * @param pDevIns The APIC device instance.
1260 * @param rc What to return if we fail to acquire the lock.
1261 */
1262 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1263
1264 /**
1265 * Releases the PDM lock.
1266 *
1267 * @param pDevIns The APIC device instance.
1268 */
1269 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1270
1271 /**
1272 * Get the virtual CPU id corresponding to the current EMT.
1273 *
1274 * @param pDevIns The APIC device instance.
1275 */
1276 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1277
1278 /** Just a safety precaution. */
1279 uint32_t u32TheEnd;
1280} PDMAPICHLPR0;
1281/** Pointer to APIC GC helpers. */
1282typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1283/** Pointer to const APIC helpers. */
1284typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1285
1286/** Current PDMAPICHLPR0 version number. */
1287#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1288
1289/**
1290 * APIC R3 helpers.
1291 */
1292typedef struct PDMAPICHLPR3
1293{
1294 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1295 uint32_t u32Version;
1296
1297 /**
1298 * Set the interrupt force action flag.
1299 *
1300 * @param pDevIns Device instance of the APIC.
1301 * @param enmType IRQ type.
1302 * @param idCpu Virtual CPU to set flag upon.
1303 */
1304 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1305
1306 /**
1307 * Clear the interrupt force action flag.
1308 *
1309 * @param pDevIns Device instance of the APIC.
1310 * @param enmType IRQ type.
1311 * @param idCpu Virtual CPU to clear flag upon.
1312 */
1313 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1314
1315 /**
1316 * Modifies APIC-related bits in the CPUID feature mask.
1317 *
1318 * @param pDevIns Device instance of the APIC.
1319 * @param enmVersion Supported APIC version.
1320 */
1321 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1322
1323 /**
1324 * Get the virtual CPU id corresponding to the current EMT.
1325 *
1326 * @param pDevIns The APIC device instance.
1327 */
1328 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1329
1330 /**
1331 * Sends SIPI to given virtual CPU.
1332 *
1333 * @param pDevIns The APIC device instance.
1334 * @param idCpu Virtual CPU to perform SIPI on
1335 * @param iVector SIPI vector
1336 */
1337 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1338
1339 /**
1340 * Sends init IPI to given virtual CPU, should result in reset and
1341 * halting till SIPI.
1342 *
1343 * @param pDevIns The APIC device instance.
1344 * @param idCpu Virtual CPU to perform SIPI on
1345 */
1346 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1347
1348 /**
1349 * Gets the address of the RC APIC helpers.
1350 *
1351 * This should be called at both construction and relocation time
1352 * to obtain the correct address of the RC helpers.
1353 *
1354 * @returns GC pointer to the APIC helpers.
1355 * @param pDevIns Device instance of the APIC.
1356 */
1357 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1358
1359 /**
1360 * Gets the address of the R0 APIC helpers.
1361 *
1362 * This should be called at both construction and relocation time
1363 * to obtain the correct address of the R0 helpers.
1364 *
1365 * @returns R0 pointer to the APIC helpers.
1366 * @param pDevIns Device instance of the APIC.
1367 */
1368 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1369
1370 /**
1371 * Get the critical section used to synchronize the PICs, PCI and stuff.
1372 *
1373 * @returns Ring-3 pointer to the critical section.
1374 * @param pDevIns The APIC device instance.
1375 */
1376 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1377
1378 /**
1379 * Get the critical section used to synchronize the PICs, PCI and stuff.
1380 *
1381 * @returns Raw-mode context pointer to the critical section.
1382 * @param pDevIns The APIC device instance.
1383 */
1384 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1385
1386 /**
1387 * Get the critical section used to synchronize the PICs, PCI and stuff.
1388 *
1389 * @returns Ring-0 pointer to the critical section.
1390 * @param pDevIns The APIC device instance.
1391 */
1392 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1393
1394 /** Just a safety precaution. */
1395 uint32_t u32TheEnd;
1396} PDMAPICHLPR3;
1397/** Pointer to APIC helpers. */
1398typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1399/** Pointer to const APIC helpers. */
1400typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1401
1402/** Current PDMAPICHLP version number. */
1403#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1404
1405
1406/**
1407 * I/O APIC registration structure.
1408 */
1409typedef struct PDMIOAPICREG
1410{
1411 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1412 uint32_t u32Version;
1413
1414 /**
1415 * Set the an IRQ.
1416 *
1417 * @param pDevIns Device instance of the I/O APIC.
1418 * @param iIrq IRQ number to set.
1419 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1420 */
1421 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1422
1423 /** The name of the GC SetIrq entry point. */
1424 const char *pszSetIrqRC;
1425
1426 /** The name of the R0 SetIrq entry point. */
1427 const char *pszSetIrqR0;
1428} PDMIOAPICREG;
1429/** Pointer to an APIC registration structure. */
1430typedef PDMIOAPICREG *PPDMIOAPICREG;
1431
1432/** Current PDMAPICREG version number. */
1433#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
1434
1435
1436/**
1437 * IOAPIC RC helpers.
1438 */
1439typedef struct PDMIOAPICHLPRC
1440{
1441 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1442 uint32_t u32Version;
1443
1444 /**
1445 * Private interface between the IOAPIC and APIC.
1446 *
1447 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1448 *
1449 * @returns status code.
1450 * @param pDevIns Device instance of the IOAPIC.
1451 * @param u8Dest See APIC implementation.
1452 * @param u8DestMode See APIC implementation.
1453 * @param u8DeliveryMode See APIC implementation.
1454 * @param iVector See APIC implementation.
1455 * @param u8Polarity See APIC implementation.
1456 * @param u8TriggerMode See APIC implementation.
1457 */
1458 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1459 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1460
1461 /**
1462 * Acquires the PDM lock.
1463 *
1464 * @returns VINF_SUCCESS on success.
1465 * @returns rc if we failed to acquire the lock.
1466 * @param pDevIns The IOAPIC device instance.
1467 * @param rc What to return if we fail to acquire the lock.
1468 */
1469 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1470
1471 /**
1472 * Releases the PDM lock.
1473 *
1474 * @param pDevIns The IOAPIC device instance.
1475 */
1476 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1477
1478 /** Just a safety precaution. */
1479 uint32_t u32TheEnd;
1480} PDMIOAPICHLPRC;
1481/** Pointer to IOAPIC RC helpers. */
1482typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1483/** Pointer to const IOAPIC helpers. */
1484typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1485
1486/** Current PDMIOAPICHLPRC version number. */
1487#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1488
1489
1490/**
1491 * IOAPIC R0 helpers.
1492 */
1493typedef struct PDMIOAPICHLPR0
1494{
1495 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1496 uint32_t u32Version;
1497
1498 /**
1499 * Private interface between the IOAPIC and APIC.
1500 *
1501 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1502 *
1503 * @returns status code.
1504 * @param pDevIns Device instance of the IOAPIC.
1505 * @param u8Dest See APIC implementation.
1506 * @param u8DestMode See APIC implementation.
1507 * @param u8DeliveryMode See APIC implementation.
1508 * @param iVector See APIC implementation.
1509 * @param u8Polarity See APIC implementation.
1510 * @param u8TriggerMode See APIC implementation.
1511 */
1512 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1513 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1514
1515 /**
1516 * Acquires the PDM lock.
1517 *
1518 * @returns VINF_SUCCESS on success.
1519 * @returns rc if we failed to acquire the lock.
1520 * @param pDevIns The IOAPIC device instance.
1521 * @param rc What to return if we fail to acquire the lock.
1522 */
1523 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1524
1525 /**
1526 * Releases the PDM lock.
1527 *
1528 * @param pDevIns The IOAPIC device instance.
1529 */
1530 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1531
1532 /** Just a safety precaution. */
1533 uint32_t u32TheEnd;
1534} PDMIOAPICHLPR0;
1535/** Pointer to IOAPIC R0 helpers. */
1536typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1537/** Pointer to const IOAPIC helpers. */
1538typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1539
1540/** Current PDMIOAPICHLPR0 version number. */
1541#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1542
1543/**
1544 * IOAPIC R3 helpers.
1545 */
1546typedef struct PDMIOAPICHLPR3
1547{
1548 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1549 uint32_t u32Version;
1550
1551 /**
1552 * Private interface between the IOAPIC and APIC.
1553 *
1554 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1555 *
1556 * @returns status code
1557 * @param pDevIns Device instance of the IOAPIC.
1558 * @param u8Dest See APIC implementation.
1559 * @param u8DestMode See APIC implementation.
1560 * @param u8DeliveryMode See APIC implementation.
1561 * @param iVector See APIC implementation.
1562 * @param u8Polarity See APIC implementation.
1563 * @param u8TriggerMode See APIC implementation.
1564 */
1565 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1566 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1567
1568 /**
1569 * Acquires the PDM lock.
1570 *
1571 * @returns VINF_SUCCESS on success.
1572 * @returns Fatal error on failure.
1573 * @param pDevIns The IOAPIC device instance.
1574 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1575 */
1576 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1577
1578 /**
1579 * Releases the PDM lock.
1580 *
1581 * @param pDevIns The IOAPIC device instance.
1582 */
1583 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1584
1585 /**
1586 * Gets the address of the RC IOAPIC helpers.
1587 *
1588 * This should be called at both construction and relocation time
1589 * to obtain the correct address of the RC helpers.
1590 *
1591 * @returns RC pointer to the IOAPIC helpers.
1592 * @param pDevIns Device instance of the IOAPIC.
1593 */
1594 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1595
1596 /**
1597 * Gets the address of the R0 IOAPIC helpers.
1598 *
1599 * This should be called at both construction and relocation time
1600 * to obtain the correct address of the R0 helpers.
1601 *
1602 * @returns R0 pointer to the IOAPIC helpers.
1603 * @param pDevIns Device instance of the IOAPIC.
1604 */
1605 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1606
1607 /** Just a safety precaution. */
1608 uint32_t u32TheEnd;
1609} PDMIOAPICHLPR3;
1610/** Pointer to IOAPIC R3 helpers. */
1611typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1612/** Pointer to const IOAPIC helpers. */
1613typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1614
1615/** Current PDMIOAPICHLPR3 version number. */
1616#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1617
1618
1619/**
1620 * HPET registration structure.
1621 */
1622typedef struct PDMHPETREG
1623{
1624 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1625 uint32_t u32Version;
1626
1627} PDMHPETREG;
1628/** Pointer to an HPET registration structure. */
1629typedef PDMHPETREG *PPDMHPETREG;
1630
1631/** Current PDMHPETREG version number. */
1632#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1633
1634/**
1635 * HPET RC helpers.
1636 *
1637 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1638 * at some later point.
1639 */
1640typedef struct PDMHPETHLPRC
1641{
1642 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1643 uint32_t u32Version;
1644
1645 /** Just a safety precaution. */
1646 uint32_t u32TheEnd;
1647} PDMHPETHLPRC;
1648
1649/** Pointer to HPET RC helpers. */
1650typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1651/** Pointer to const HPET RC helpers. */
1652typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1653
1654/** Current PDMHPETHLPRC version number. */
1655#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1656
1657
1658/**
1659 * HPET R0 helpers.
1660 *
1661 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1662 * at some later point.
1663 */
1664typedef struct PDMHPETHLPR0
1665{
1666 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1667 uint32_t u32Version;
1668
1669 /** Just a safety precaution. */
1670 uint32_t u32TheEnd;
1671} PDMHPETHLPR0;
1672
1673/** Pointer to HPET R0 helpers. */
1674typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1675/** Pointer to const HPET R0 helpers. */
1676typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1677
1678/** Current PDMHPETHLPR0 version number. */
1679#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1680
1681/**
1682 * HPET R3 helpers.
1683 */
1684typedef struct PDMHPETHLPR3
1685{
1686 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1687 uint32_t u32Version;
1688
1689 /**
1690 * Gets the address of the RC HPET helpers.
1691 *
1692 * This should be called at both construction and relocation time
1693 * to obtain the correct address of the RC helpers.
1694 *
1695 * @returns RC pointer to the HPET helpers.
1696 * @param pDevIns Device instance of the HPET.
1697 */
1698 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1699
1700 /**
1701 * Gets the address of the R0 HPET helpers.
1702 *
1703 * This should be called at both construction and relocation time
1704 * to obtain the correct address of the R0 helpers.
1705 *
1706 * @returns R0 pointer to the HPET helpers.
1707 * @param pDevIns Device instance of the HPET.
1708 */
1709 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1710
1711 /**
1712 * Set legacy mode on PIT and RTC.
1713 *
1714 * @returns VINF_SUCCESS on success.
1715 * @returns rc if we failed to set legacy mode.
1716 * @param pDevIns Device instance of the HPET.
1717 * @param fActivated Whether legacy mode is activated or deactivated.
1718 */
1719 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1720
1721
1722 /**
1723 * Set IRQ, bypassing ISA bus override rules.
1724 *
1725 * @returns VINF_SUCCESS on success.
1726 * @returns rc if we failed to set legacy mode.
1727 * @param pDevIns Device instance of the HPET.
1728 * @param fActivate Activate or deactivate legacy mode.
1729 */
1730 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1731
1732 /** Just a safety precaution. */
1733 uint32_t u32TheEnd;
1734} PDMHPETHLPR3;
1735
1736/** Pointer to HPET R3 helpers. */
1737typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1738/** Pointer to const HPET R3 helpers. */
1739typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1740
1741/** Current PDMHPETHLPR3 version number. */
1742#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1743
1744
1745
1746#ifdef IN_RING3
1747
1748/**
1749 * DMA Transfer Handler.
1750 *
1751 * @returns Number of bytes transferred.
1752 * @param pDevIns Device instance of the DMA.
1753 * @param pvUser User pointer.
1754 * @param uChannel Channel number.
1755 * @param off DMA position.
1756 * @param cb Block size.
1757 */
1758typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1759/** Pointer to a FNDMATRANSFERHANDLER(). */
1760typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1761
1762/**
1763 * DMA Controller registration structure.
1764 */
1765typedef struct PDMDMAREG
1766{
1767 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1768 uint32_t u32Version;
1769
1770 /**
1771 * Execute pending transfers.
1772 *
1773 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1774 * @param pDevIns Device instance of the DMAC.
1775 */
1776 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1777
1778 /**
1779 * Register transfer function for DMA channel.
1780 *
1781 * @param pDevIns Device instance of the DMAC.
1782 * @param uChannel Channel number.
1783 * @param pfnTransferHandler Device specific transfer function.
1784 * @param pvUSer User pointer to be passed to the callback.
1785 */
1786 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1787
1788 /**
1789 * Read memory
1790 *
1791 * @returns Number of bytes read.
1792 * @param pDevIns Device instance of the DMAC.
1793 * @param pvBuffer Pointer to target buffer.
1794 * @param off DMA position.
1795 * @param cbBlock Block size.
1796 */
1797 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1798
1799 /**
1800 * Write memory
1801 *
1802 * @returns Number of bytes written.
1803 * @param pDevIns Device instance of the DMAC.
1804 * @param pvBuffer Memory to write.
1805 * @param off DMA position.
1806 * @param cbBlock Block size.
1807 */
1808 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1809
1810 /**
1811 * Set the DREQ line.
1812 *
1813 * @param pDevIns Device instance of the DMAC.
1814 * @param uChannel Channel number.
1815 * @param uLevel Level of the line.
1816 */
1817 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1818
1819 /**
1820 * Get channel mode
1821 *
1822 * @returns Channel mode.
1823 * @param pDevIns Device instance of the DMAC.
1824 * @param uChannel Channel number.
1825 */
1826 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1827
1828} PDMDMACREG;
1829/** Pointer to a DMAC registration structure. */
1830typedef PDMDMACREG *PPDMDMACREG;
1831
1832/** Current PDMDMACREG version number. */
1833#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1834
1835
1836/**
1837 * DMA Controller device helpers.
1838 */
1839typedef struct PDMDMACHLP
1840{
1841 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1842 uint32_t u32Version;
1843
1844 /* to-be-defined */
1845
1846} PDMDMACHLP;
1847/** Pointer to DMAC helpers. */
1848typedef PDMDMACHLP *PPDMDMACHLP;
1849/** Pointer to const DMAC helpers. */
1850typedef const PDMDMACHLP *PCPDMDMACHLP;
1851
1852/** Current PDMDMACHLP version number. */
1853#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1854
1855#endif /* IN_RING3 */
1856
1857
1858
1859/**
1860 * RTC registration structure.
1861 */
1862typedef struct PDMRTCREG
1863{
1864 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1865 uint32_t u32Version;
1866 uint32_t u32Alignment; /**< structure size alignment. */
1867
1868 /**
1869 * Write to a CMOS register and update the checksum if necessary.
1870 *
1871 * @returns VBox status code.
1872 * @param pDevIns Device instance of the RTC.
1873 * @param iReg The CMOS register index.
1874 * @param u8Value The CMOS register value.
1875 */
1876 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1877
1878 /**
1879 * Read a CMOS register.
1880 *
1881 * @returns VBox status code.
1882 * @param pDevIns Device instance of the RTC.
1883 * @param iReg The CMOS register index.
1884 * @param pu8Value Where to store the CMOS register value.
1885 */
1886 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1887
1888} PDMRTCREG;
1889/** Pointer to a RTC registration structure. */
1890typedef PDMRTCREG *PPDMRTCREG;
1891/** Pointer to a const RTC registration structure. */
1892typedef const PDMRTCREG *PCPDMRTCREG;
1893
1894/** Current PDMRTCREG version number. */
1895#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1896
1897
1898/**
1899 * RTC device helpers.
1900 */
1901typedef struct PDMRTCHLP
1902{
1903 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1904 uint32_t u32Version;
1905
1906 /* to-be-defined */
1907
1908} PDMRTCHLP;
1909/** Pointer to RTC helpers. */
1910typedef PDMRTCHLP *PPDMRTCHLP;
1911/** Pointer to const RTC helpers. */
1912typedef const PDMRTCHLP *PCPDMRTCHLP;
1913
1914/** Current PDMRTCHLP version number. */
1915#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1916
1917
1918
1919#ifdef IN_RING3
1920
1921/**
1922 * PDM Device API.
1923 */
1924typedef struct PDMDEVHLPR3
1925{
1926 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1927 uint32_t u32Version;
1928
1929 /**
1930 * Register a number of I/O ports with a device.
1931 *
1932 * These callbacks are of course for the host context (HC).
1933 * Register HC handlers before guest context (GC) handlers! There must be a
1934 * HC handler for every GC handler!
1935 *
1936 * @returns VBox status.
1937 * @param pDevIns The device instance to register the ports with.
1938 * @param Port First port number in the range.
1939 * @param cPorts Number of ports to register.
1940 * @param pvUser User argument.
1941 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1942 * @param pfnIn Pointer to function which is gonna handle IN operations.
1943 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1944 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1945 * @param pszDesc Pointer to description string. This must not be freed.
1946 */
1947 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1948 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1949 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1950
1951 /**
1952 * Register a number of I/O ports with a device for RC.
1953 *
1954 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1955 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1956 * for every RC handler!
1957 *
1958 * @returns VBox status.
1959 * @param pDevIns The device instance to register the ports with
1960 * and which RC module to resolve the names
1961 * against.
1962 * @param Port First port number in the range.
1963 * @param cPorts Number of ports to register.
1964 * @param pvUser User argument.
1965 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1966 * @param pszIn Name of the RC function which is gonna handle IN operations.
1967 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1968 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1969 * @param pszDesc Pointer to description string. This must not be freed.
1970 */
1971 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1972 const char *pszOut, const char *pszIn,
1973 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1974
1975 /**
1976 * Register a number of I/O ports with a device.
1977 *
1978 * These callbacks are of course for the ring-0 host context (R0).
1979 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1980 *
1981 * @returns VBox status.
1982 * @param pDevIns The device instance to register the ports with.
1983 * @param Port First port number in the range.
1984 * @param cPorts Number of ports to register.
1985 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1986 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1987 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1988 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1989 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1990 * @param pszDesc Pointer to description string. This must not be freed.
1991 */
1992 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1993 const char *pszOut, const char *pszIn,
1994 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1995
1996 /**
1997 * Deregister I/O ports.
1998 *
1999 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2000 *
2001 * @returns VBox status.
2002 * @param pDevIns The device instance owning the ports.
2003 * @param Port First port number in the range.
2004 * @param cPorts Number of ports to deregister.
2005 */
2006 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2007
2008 /**
2009 * Register a Memory Mapped I/O (MMIO) region.
2010 *
2011 * These callbacks are of course for the ring-3 context (R3). Register HC
2012 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2013 * must be a R3 handler for every RC and R0 handler!
2014 *
2015 * @returns VBox status.
2016 * @param pDevIns The device instance to register the MMIO with.
2017 * @param GCPhysStart First physical address in the range.
2018 * @param cbRange The size of the range (in bytes).
2019 * @param pvUser User argument.
2020 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2021 * @param pfnRead Pointer to function which is gonna handle Read operations.
2022 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2023 * @param pszDesc Pointer to description string. This must not be freed.
2024 */
2025 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2026 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2027 const char *pszDesc));
2028
2029 /**
2030 * Register a Memory Mapped I/O (MMIO) region for GC.
2031 *
2032 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2033 * (R3) handlers before guest context handlers! There must be a R3 handler for
2034 * every RC handler!
2035 *
2036 * @returns VBox status.
2037 * @param pDevIns The device instance to register the MMIO with.
2038 * @param GCPhysStart First physical address in the range.
2039 * @param cbRange The size of the range (in bytes).
2040 * @param pvUser User argument.
2041 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2042 * @param pszRead Name of the RC function which is gonna handle Read operations.
2043 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2044 * @param pszDesc Obsolete. NULL is fine.
2045 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2046 */
2047 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2048 const char *pszWrite, const char *pszRead, const char *pszFill,
2049 const char *pszDesc));
2050
2051 /**
2052 * Register a Memory Mapped I/O (MMIO) region for R0.
2053 *
2054 * These callbacks are for the ring-0 host context (R0). Register ring-3
2055 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2056 * every R0 handler!
2057 *
2058 * @returns VBox status.
2059 * @param pDevIns The device instance to register the MMIO with.
2060 * @param GCPhysStart First physical address in the range.
2061 * @param cbRange The size of the range (in bytes).
2062 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2063 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2064 * @param pszRead Name of the RC function which is gonna handle Read operations.
2065 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2066 * @param pszDesc Obsolete. NULL is fine.
2067 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2068 */
2069 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2070 const char *pszWrite, const char *pszRead, const char *pszFill,
2071 const char *pszDesc));
2072
2073 /**
2074 * Deregister a Memory Mapped I/O (MMIO) region.
2075 *
2076 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2077 *
2078 * @returns VBox status.
2079 * @param pDevIns The device instance owning the MMIO region(s).
2080 * @param GCPhysStart First physical address in the range.
2081 * @param cbRange The size of the range (in bytes).
2082 */
2083 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2084
2085 /**
2086 * Allocate and register a MMIO2 region.
2087 *
2088 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2089 * RAM associated with a device. It is also non-shared memory with a
2090 * permanent ring-3 mapping and page backing (presently).
2091 *
2092 * @returns VBox status.
2093 * @param pDevIns The device instance.
2094 * @param iRegion The region number. Use the PCI region number as
2095 * this must be known to the PCI bus device too. If
2096 * it's not associated with the PCI device, then
2097 * any number up to UINT8_MAX is fine.
2098 * @param cb The size (in bytes) of the region.
2099 * @param fFlags Reserved for future use, must be zero.
2100 * @param ppv Where to store the address of the ring-3 mapping
2101 * of the memory.
2102 * @param pszDesc Pointer to description string. This must not be
2103 * freed.
2104 * @thread EMT.
2105 */
2106 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2107
2108 /**
2109 * Deregisters and frees a MMIO2 region.
2110 *
2111 * Any physical (and virtual) access handlers registered for the region must
2112 * be deregistered before calling this function.
2113 *
2114 * @returns VBox status code.
2115 * @param pDevIns The device instance.
2116 * @param iRegion The region number used during registration.
2117 * @thread EMT.
2118 */
2119 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2120
2121 /**
2122 * Maps a MMIO2 region into the physical memory space.
2123 *
2124 * A MMIO2 range may overlap with base memory if a lot of RAM
2125 * is configured for the VM, in which case we'll drop the base
2126 * memory pages. Presently we will make no attempt to preserve
2127 * anything that happens to be present in the base memory that
2128 * is replaced, this is of course incorrectly but it's too much
2129 * effort.
2130 *
2131 * @returns VBox status code.
2132 * @param pDevIns The device instance.
2133 * @param iRegion The region number used during registration.
2134 * @param GCPhys The physical address to map it at.
2135 * @thread EMT.
2136 */
2137 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2138
2139 /**
2140 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2141 *
2142 * @returns VBox status code.
2143 * @param pDevIns The device instance.
2144 * @param iRegion The region number used during registration.
2145 * @param GCPhys The physical address it's currently mapped at.
2146 * @thread EMT.
2147 */
2148 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2149
2150 /**
2151 * Maps a portion of an MMIO2 region into the hypervisor region.
2152 *
2153 * Callers of this API must never deregister the MMIO2 region before the
2154 * VM is powered off.
2155 *
2156 * @return VBox status code.
2157 * @param pDevIns The device owning the MMIO2 memory.
2158 * @param iRegion The region.
2159 * @param off The offset into the region. Will be rounded down
2160 * to closest page boundrary.
2161 * @param cb The number of bytes to map. Will be rounded up
2162 * to the closest page boundrary.
2163 * @param pszDesc Mapping description.
2164 * @param pRCPtr Where to store the RC address.
2165 */
2166 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2167 const char *pszDesc, PRTRCPTR pRCPtr));
2168
2169 /**
2170 * Maps a portion of an MMIO2 region into kernel space (host).
2171 *
2172 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2173 * or the VM is terminated.
2174 *
2175 * @return VBox status code.
2176 * @param pDevIns The device owning the MMIO2 memory.
2177 * @param iRegion The region.
2178 * @param off The offset into the region. Must be page
2179 * aligned.
2180 * @param cb The number of bytes to map. Must be page
2181 * aligned.
2182 * @param pszDesc Mapping description.
2183 * @param pR0Ptr Where to store the R0 address.
2184 */
2185 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2186 const char *pszDesc, PRTR0PTR pR0Ptr));
2187
2188 /**
2189 * Register a ROM (BIOS) region.
2190 *
2191 * It goes without saying that this is read-only memory. The memory region must be
2192 * in unassigned memory. I.e. from the top of the address space or on the PC in
2193 * the 0xa0000-0xfffff range.
2194 *
2195 * @returns VBox status.
2196 * @param pDevIns The device instance owning the ROM region.
2197 * @param GCPhysStart First physical address in the range.
2198 * Must be page aligned!
2199 * @param cbRange The size of the range (in bytes).
2200 * Must be page aligned!
2201 * @param pvBinary Pointer to the binary data backing the ROM image.
2202 * This must be cbRange bytes big.
2203 * It will be copied and doesn't have to stick around if fShadow is clear.
2204 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2205 * @param pszDesc Pointer to description string. This must not be freed.
2206 *
2207 * @remark There is no way to remove the rom, automatically on device cleanup or
2208 * manually from the device yet. At present I doubt we need such features...
2209 */
2210 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2211
2212 /**
2213 * Changes the protection of shadowed ROM mapping.
2214 *
2215 * This is intented for use by the system BIOS, chipset or device in question to
2216 * change the protection of shadowed ROM code after init and on reset.
2217 *
2218 * @param pDevIns The device instance.
2219 * @param GCPhysStart Where the mapping starts.
2220 * @param cbRange The size of the mapping.
2221 * @param enmProt The new protection type.
2222 */
2223 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2224
2225 /**
2226 * Register a save state data unit.
2227 *
2228 * @returns VBox status.
2229 * @param pDevIns The device instance.
2230 * @param pszName Data unit name.
2231 * @param uInstance The instance identifier of the data unit.
2232 * This must together with the name be unique.
2233 * @param uVersion Data layout version number.
2234 * @param cbGuess The approximate amount of data in the unit.
2235 * Only for progress indicators.
2236 * @param pszBefore Name of data unit which we should be put in
2237 * front of. Optional (NULL).
2238 *
2239 * @param pfnLivePrep Prepare live save callback, optional.
2240 * @param pfnLiveExec Execute live save callback, optional.
2241 * @param pfnLiveVote Vote live save callback, optional.
2242 *
2243 * @param pfnSavePrep Prepare save callback, optional.
2244 * @param pfnSaveExec Execute save callback, optional.
2245 * @param pfnSaveDone Done save callback, optional.
2246 *
2247 * @param pfnLoadPrep Prepare load callback, optional.
2248 * @param pfnLoadExec Execute load callback, optional.
2249 * @param pfnLoadDone Done load callback, optional.
2250 */
2251 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2252 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2253 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2254 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2255
2256 /**
2257 * Creates a timer.
2258 *
2259 * @returns VBox status.
2260 * @param pDevIns The device instance.
2261 * @param enmClock The clock to use on this timer.
2262 * @param pfnCallback Callback function.
2263 * @param pvUser User argument for the callback.
2264 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2265 * @param pszDesc Pointer to description string which must stay around
2266 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2267 * @param ppTimer Where to store the timer on success.
2268 */
2269 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2270
2271 /**
2272 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2273 *
2274 * @returns pTime.
2275 * @param pDevIns The device instance.
2276 * @param pTime Where to store the time.
2277 */
2278 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2279
2280 /**
2281 * Read physical memory.
2282 *
2283 * @returns VINF_SUCCESS (for now).
2284 * @param pDevIns The device instance.
2285 * @param GCPhys Physical address start reading from.
2286 * @param pvBuf Where to put the read bits.
2287 * @param cbRead How many bytes to read.
2288 * @thread Any thread, but the call may involve the emulation thread.
2289 */
2290 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2291
2292 /**
2293 * Write to physical memory.
2294 *
2295 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2296 * @param pDevIns The device instance.
2297 * @param GCPhys Physical address to write to.
2298 * @param pvBuf What to write.
2299 * @param cbWrite How many bytes to write.
2300 * @thread Any thread, but the call may involve the emulation thread.
2301 */
2302 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2303
2304 /**
2305 * Requests the mapping of a guest page into ring-3.
2306 *
2307 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2308 * release it.
2309 *
2310 * This API will assume your intention is to write to the page, and will
2311 * therefore replace shared and zero pages. If you do not intend to modify the
2312 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2313 *
2314 * @returns VBox status code.
2315 * @retval VINF_SUCCESS on success.
2316 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2317 * backing or if the page has any active access handlers. The caller
2318 * must fall back on using PGMR3PhysWriteExternal.
2319 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2320 *
2321 * @param pVM The VM handle.
2322 * @param GCPhys The guest physical address of the page that
2323 * should be mapped.
2324 * @param fFlags Flags reserved for future use, MBZ.
2325 * @param ppv Where to store the address corresponding to
2326 * GCPhys.
2327 * @param pLock Where to store the lock information that
2328 * pfnPhysReleasePageMappingLock needs.
2329 *
2330 * @remark Avoid calling this API from within critical sections (other than the
2331 * PGM one) because of the deadlock risk when we have to delegating the
2332 * task to an EMT.
2333 * @thread Any.
2334 */
2335 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2336
2337 /**
2338 * Requests the mapping of a guest page into ring-3, external threads.
2339 *
2340 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2341 * release it.
2342 *
2343 * @returns VBox status code.
2344 * @retval VINF_SUCCESS on success.
2345 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2346 * backing or if the page as an active ALL access handler. The caller
2347 * must fall back on using PGMPhysRead.
2348 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2349 *
2350 * @param pDevIns The device instance.
2351 * @param GCPhys The guest physical address of the page that
2352 * should be mapped.
2353 * @param fFlags Flags reserved for future use, MBZ.
2354 * @param ppv Where to store the address corresponding to
2355 * GCPhys.
2356 * @param pLock Where to store the lock information that
2357 * pfnPhysReleasePageMappingLock needs.
2358 *
2359 * @remark Avoid calling this API from within critical sections.
2360 * @thread Any.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2363
2364 /**
2365 * Release the mapping of a guest page.
2366 *
2367 * This is the counter part of pfnPhysGCPhys2CCPtr and
2368 * pfnPhysGCPhys2CCPtrReadOnly.
2369 *
2370 * @param pDevIns The device instance.
2371 * @param pLock The lock structure initialized by the mapping
2372 * function.
2373 */
2374 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2375
2376 /**
2377 * Read guest physical memory by virtual address.
2378 *
2379 * @param pDevIns The device instance.
2380 * @param pvDst Where to put the read bits.
2381 * @param GCVirtSrc Guest virtual address to start reading from.
2382 * @param cb How many bytes to read.
2383 * @thread The emulation thread.
2384 */
2385 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2386
2387 /**
2388 * Write to guest physical memory by virtual address.
2389 *
2390 * @param pDevIns The device instance.
2391 * @param GCVirtDst Guest virtual address to write to.
2392 * @param pvSrc What to write.
2393 * @param cb How many bytes to write.
2394 * @thread The emulation thread.
2395 */
2396 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2397
2398 /**
2399 * Convert a guest virtual address to a guest physical address.
2400 *
2401 * @returns VBox status code.
2402 * @param pDevIns The device instance.
2403 * @param GCPtr Guest virtual address.
2404 * @param pGCPhys Where to store the GC physical address
2405 * corresponding to GCPtr.
2406 * @thread The emulation thread.
2407 * @remark Careful with page boundraries.
2408 */
2409 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2410
2411 /**
2412 * Allocate memory which is associated with current VM instance
2413 * and automatically freed on it's destruction.
2414 *
2415 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2416 * @param pDevIns The device instance.
2417 * @param cb Number of bytes to allocate.
2418 */
2419 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2420
2421 /**
2422 * Allocate memory which is associated with current VM instance
2423 * and automatically freed on it's destruction. The memory is ZEROed.
2424 *
2425 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2426 * @param pDevIns The device instance.
2427 * @param cb Number of bytes to allocate.
2428 */
2429 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2430
2431 /**
2432 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2433 *
2434 * @param pDevIns The device instance.
2435 * @param pv Pointer to the memory to free.
2436 */
2437 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2438
2439 /**
2440 * Gets the VM state.
2441 *
2442 * @returns VM state.
2443 * @param pDevIns The device instance.
2444 * @thread Any thread (just keep in mind that it's volatile info).
2445 */
2446 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2447
2448 /**
2449 * Checks if the VM was teleported and hasn't been fully resumed yet.
2450 *
2451 * @returns true / false.
2452 * @param pDevIns The device instance.
2453 * @thread Any thread.
2454 */
2455 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2456
2457 /**
2458 * Set the VM error message
2459 *
2460 * @returns rc.
2461 * @param pDevIns The device instance.
2462 * @param rc VBox status code.
2463 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2464 * @param pszFormat Error message format string.
2465 * @param ... Error message arguments.
2466 */
2467 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2468
2469 /**
2470 * Set the VM error message
2471 *
2472 * @returns rc.
2473 * @param pDevIns The device instance.
2474 * @param rc VBox status code.
2475 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2476 * @param pszFormat Error message format string.
2477 * @param va Error message arguments.
2478 */
2479 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2480
2481 /**
2482 * Set the VM runtime error message
2483 *
2484 * @returns VBox status code.
2485 * @param pDevIns The device instance.
2486 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2487 * @param pszErrorId Error ID string.
2488 * @param pszFormat Error message format string.
2489 * @param ... Error message arguments.
2490 */
2491 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2492
2493 /**
2494 * Set the VM runtime error message
2495 *
2496 * @returns VBox status code.
2497 * @param pDevIns The device instance.
2498 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2499 * @param pszErrorId Error ID string.
2500 * @param pszFormat Error message format string.
2501 * @param va Error message arguments.
2502 */
2503 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2504
2505 /**
2506 * Stops the VM and enters the debugger to look at the guest state.
2507 *
2508 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2509 * invoking this function directly.
2510 *
2511 * @returns VBox status code which must be passed up to the VMM.
2512 * @param pDevIns The device instance.
2513 * @param pszFile Filename of the assertion location.
2514 * @param iLine The linenumber of the assertion location.
2515 * @param pszFunction Function of the assertion location.
2516 * @param pszFormat Message. (optional)
2517 * @param args Message parameters.
2518 */
2519 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2520
2521 /**
2522 * Register a info handler with DBGF,
2523 *
2524 * @returns VBox status code.
2525 * @param pDevIns The device instance.
2526 * @param pszName The identifier of the info.
2527 * @param pszDesc The description of the info and any arguments
2528 * the handler may take.
2529 * @param pfnHandler The handler function to be called to display the
2530 * info.
2531 */
2532 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2533
2534 /**
2535 * Registers a statistics sample if statistics are enabled.
2536 *
2537 * @param pDevIns Device instance of the DMA.
2538 * @param pvSample Pointer to the sample.
2539 * @param enmType Sample type. This indicates what pvSample is
2540 * pointing at.
2541 * @param pszName Sample name. The name is on this form
2542 * "/<component>/<sample>". Further nesting is
2543 * possible.
2544 * @param enmUnit Sample unit.
2545 * @param pszDesc Sample description.
2546 */
2547 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2548
2549 /**
2550 * Same as pfnSTAMRegister except that the name is specified in a
2551 * RTStrPrintf like fashion.
2552 *
2553 * @returns VBox status.
2554 * @param pDevIns Device instance of the DMA.
2555 * @param pvSample Pointer to the sample.
2556 * @param enmType Sample type. This indicates what pvSample is
2557 * pointing at.
2558 * @param enmVisibility Visibility type specifying whether unused
2559 * statistics should be visible or not.
2560 * @param enmUnit Sample unit.
2561 * @param pszDesc Sample description.
2562 * @param pszName The sample name format string.
2563 * @param ... Arguments to the format string.
2564 */
2565 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2566 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2567
2568 /**
2569 * Same as pfnSTAMRegister except that the name is specified in a
2570 * RTStrPrintfV like fashion.
2571 *
2572 * @returns VBox status.
2573 * @param pDevIns Device instance of the DMA.
2574 * @param pvSample Pointer to the sample.
2575 * @param enmType Sample type. This indicates what pvSample is
2576 * pointing at.
2577 * @param enmVisibility Visibility type specifying whether unused
2578 * statistics should be visible or not.
2579 * @param enmUnit Sample unit.
2580 * @param pszDesc Sample description.
2581 * @param pszName The sample name format string.
2582 * @param args Arguments to the format string.
2583 */
2584 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2585 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2586
2587 /**
2588 * Registers the device with the default PCI bus.
2589 *
2590 * @returns VBox status code.
2591 * @param pDevIns The device instance.
2592 * @param pPciDev The PCI device structure.
2593 * Any PCI enabled device must keep this in it's instance data!
2594 * Fill in the PCI data config before registration, please.
2595 * @remark This is the simple interface, a Ex interface will be created if
2596 * more features are needed later.
2597 */
2598 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2599
2600 /**
2601 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2602 *
2603 * @returns VBox status code.
2604 * @param pDevIns The device instance.
2605 * @param iRegion The region number.
2606 * @param cbRegion Size of the region.
2607 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2608 * @param pfnCallback Callback for doing the mapping.
2609 */
2610 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2611
2612 /**
2613 * Register PCI configuration space read/write callbacks.
2614 *
2615 * @param pDevIns The device instance.
2616 * @param pPciDev The PCI device structure.
2617 * If NULL the default PCI device for this device instance is used.
2618 * @param pfnRead Pointer to the user defined PCI config read function.
2619 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2620 * PCI config read function. This way, user can decide when (and if)
2621 * to call default PCI config read function. Can be NULL.
2622 * @param pfnWrite Pointer to the user defined PCI config write function.
2623 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2624 * PCI config write function. This way, user can decide when (and if)
2625 * to call default PCI config write function. Can be NULL.
2626 * @thread EMT
2627 */
2628 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2629 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2630
2631 /**
2632 * Set the IRQ for a PCI device.
2633 *
2634 * @param pDevIns The device instance.
2635 * @param iIrq IRQ number to set.
2636 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2637 * @thread Any thread, but will involve the emulation thread.
2638 */
2639 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2640
2641 /**
2642 * Set the IRQ for a PCI device, but don't wait for EMT to process
2643 * the request when not called from EMT.
2644 *
2645 * @param pDevIns The device instance.
2646 * @param iIrq IRQ number to set.
2647 * @param iLevel IRQ level.
2648 * @thread Any thread, but will involve the emulation thread.
2649 */
2650 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2651
2652 /**
2653 * Set ISA IRQ for a device.
2654 *
2655 * @param pDevIns The device instance.
2656 * @param iIrq IRQ number to set.
2657 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2658 * @thread Any thread, but will involve the emulation thread.
2659 */
2660 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2661
2662 /**
2663 * Set the ISA IRQ for a device, but don't wait for EMT to process
2664 * the request when not called from EMT.
2665 *
2666 * @param pDevIns The device instance.
2667 * @param iIrq IRQ number to set.
2668 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2669 * @thread Any thread, but will involve the emulation thread.
2670 */
2671 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2672
2673 /**
2674 * Attaches a driver (chain) to the device.
2675 *
2676 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2677 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2678 *
2679 * @returns VBox status code.
2680 * @param pDevIns The device instance.
2681 * @param iLun The logical unit to attach.
2682 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2683 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2684 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2685 * for the live of the device instance.
2686 */
2687 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2688
2689 /**
2690 * Create a queue.
2691 *
2692 * @returns VBox status code.
2693 * @param pDevIns The device instance.
2694 * @param cbItem The size of a queue item.
2695 * @param cItems The number of items in the queue.
2696 * @param cMilliesInterval The number of milliseconds between polling the queue.
2697 * If 0 then the emulation thread will be notified whenever an item arrives.
2698 * @param pfnCallback The consumer function.
2699 * @param fRZEnabled Set if the queue should work in RC and R0.
2700 * @param pszName The queue base name. The instance number will be
2701 * appended automatically.
2702 * @param ppQueue Where to store the queue handle on success.
2703 * @thread The emulation thread.
2704 */
2705 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2706 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2707
2708 /**
2709 * Initializes a PDM critical section.
2710 *
2711 * The PDM critical sections are derived from the IPRT critical sections, but
2712 * works in RC and R0 as well.
2713 *
2714 * @returns VBox status code.
2715 * @param pDevIns The device instance.
2716 * @param pCritSect Pointer to the critical section.
2717 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2718 * @param pszNameFmt Format string for namging the critical section.
2719 * For statistics and lock validation.
2720 * @param va Arguments for the format string.
2721 */
2722 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2723 const char *pszNameFmt, va_list va));
2724
2725 /**
2726 * Creates a PDM thread.
2727 *
2728 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2729 * resuming, and destroying the thread as the VM state changes.
2730 *
2731 * @returns VBox status code.
2732 * @param pDevIns The device instance.
2733 * @param ppThread Where to store the thread 'handle'.
2734 * @param pvUser The user argument to the thread function.
2735 * @param pfnThread The thread function.
2736 * @param pfnWakeup The wakup callback. This is called on the EMT
2737 * thread when a state change is pending.
2738 * @param cbStack See RTThreadCreate.
2739 * @param enmType See RTThreadCreate.
2740 * @param pszName See RTThreadCreate.
2741 */
2742 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2743 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2744
2745 /**
2746 * Set up asynchronous handling of a suspend, reset or power off notification.
2747 *
2748 * This shall only be called when getting the notification. It must be called
2749 * for each one.
2750 *
2751 * @returns VBox status code.
2752 * @param pDevIns The device instance.
2753 * @param pfnAsyncNotify The callback.
2754 * @thread EMT(0)
2755 */
2756 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2757
2758 /**
2759 * Notify EMT(0) that the device has completed the asynchronous notification
2760 * handling.
2761 *
2762 * This can be called at any time, spurious calls will simply be ignored.
2763 *
2764 * @param pDevIns The device instance.
2765 * @thread Any
2766 */
2767 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2768
2769 /**
2770 * Register the RTC device.
2771 *
2772 * @returns VBox status code.
2773 * @param pDevIns The device instance.
2774 * @param pRtcReg Pointer to a RTC registration structure.
2775 * @param ppRtcHlp Where to store the pointer to the helper
2776 * functions.
2777 */
2778 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2779
2780 /**
2781 * Register the PCI Bus.
2782 *
2783 * @returns VBox status code.
2784 * @param pDevIns The device instance.
2785 * @param pPciBusReg Pointer to PCI bus registration structure.
2786 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2787 * helpers.
2788 */
2789 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2790
2791 /**
2792 * Register the PIC device.
2793 *
2794 * @returns VBox status code.
2795 * @param pDevIns The device instance.
2796 * @param pPicReg Pointer to a PIC registration structure.
2797 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2798 * helpers.
2799 */
2800 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2801
2802 /**
2803 * Register the APIC device.
2804 *
2805 * @returns VBox status code.
2806 * @param pDevIns The device instance.
2807 * @param pApicReg Pointer to a APIC registration structure.
2808 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2809 */
2810 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2811
2812 /**
2813 * Register the I/O APIC device.
2814 *
2815 * @returns VBox status code.
2816 * @param pDevIns The device instance.
2817 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2818 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2819 * helpers.
2820 */
2821 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2822
2823 /**
2824 * Register the HPET device.
2825 *
2826 * @returns VBox status code.
2827 * @param pDevIns The device instance.
2828 * @param pHpetReg Pointer to a HPET registration structure.
2829 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2830 * helpers.
2831 */
2832 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2833
2834 /**
2835 * Register the DMA device.
2836 *
2837 * @returns VBox status code.
2838 * @param pDevIns The device instance.
2839 * @param pDmacReg Pointer to a DMAC registration structure.
2840 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2841 */
2842 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2843
2844 /**
2845 * Register transfer function for DMA channel.
2846 *
2847 * @returns VBox status code.
2848 * @param pDevIns The device instance.
2849 * @param uChannel Channel number.
2850 * @param pfnTransferHandler Device specific transfer callback function.
2851 * @param pvUser User pointer to pass to the callback.
2852 * @thread EMT
2853 */
2854 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2855
2856 /**
2857 * Read memory.
2858 *
2859 * @returns VBox status code.
2860 * @param pDevIns The device instance.
2861 * @param uChannel Channel number.
2862 * @param pvBuffer Pointer to target buffer.
2863 * @param off DMA position.
2864 * @param cbBlock Block size.
2865 * @param pcbRead Where to store the number of bytes which was
2866 * read. optional.
2867 * @thread EMT
2868 */
2869 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2870
2871 /**
2872 * Write memory.
2873 *
2874 * @returns VBox status code.
2875 * @param pDevIns The device instance.
2876 * @param uChannel Channel number.
2877 * @param pvBuffer Memory to write.
2878 * @param off DMA position.
2879 * @param cbBlock Block size.
2880 * @param pcbWritten Where to store the number of bytes which was
2881 * written. optional.
2882 * @thread EMT
2883 */
2884 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2885
2886 /**
2887 * Set the DREQ line.
2888 *
2889 * @returns VBox status code.
2890 * @param pDevIns Device instance.
2891 * @param uChannel Channel number.
2892 * @param uLevel Level of the line.
2893 * @thread EMT
2894 */
2895 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2896
2897 /**
2898 * Get channel mode.
2899 *
2900 * @returns Channel mode. See specs.
2901 * @param pDevIns The device instance.
2902 * @param uChannel Channel number.
2903 * @thread EMT
2904 */
2905 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2906
2907 /**
2908 * Schedule DMA execution.
2909 *
2910 * @param pDevIns The device instance.
2911 * @thread Any thread.
2912 */
2913 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2914
2915 /**
2916 * Write CMOS value and update the checksum(s).
2917 *
2918 * @returns VBox status code.
2919 * @param pDevIns The device instance.
2920 * @param iReg The CMOS register index.
2921 * @param u8Value The CMOS register value.
2922 * @thread EMT
2923 */
2924 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2925
2926 /**
2927 * Read CMOS value.
2928 *
2929 * @returns VBox status code.
2930 * @param pDevIns The device instance.
2931 * @param iReg The CMOS register index.
2932 * @param pu8Value Where to store the CMOS register value.
2933 * @thread EMT
2934 */
2935 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2936
2937 /**
2938 * Assert that the current thread is the emulation thread.
2939 *
2940 * @returns True if correct.
2941 * @returns False if wrong.
2942 * @param pDevIns The device instance.
2943 * @param pszFile Filename of the assertion location.
2944 * @param iLine The linenumber of the assertion location.
2945 * @param pszFunction Function of the assertion location.
2946 */
2947 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2948
2949 /**
2950 * Assert that the current thread is NOT the emulation thread.
2951 *
2952 * @returns True if correct.
2953 * @returns False if wrong.
2954 * @param pDevIns The device instance.
2955 * @param pszFile Filename of the assertion location.
2956 * @param iLine The linenumber of the assertion location.
2957 * @param pszFunction Function of the assertion location.
2958 */
2959 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2960
2961 /**
2962 * Resolves the symbol for a raw-mode context interface.
2963 *
2964 * @returns VBox status code.
2965 * @param pDevIns The device instance.
2966 * @param pvInterface The interface structure.
2967 * @param cbInterface The size of the interface structure.
2968 * @param pszSymPrefix What to prefix the symbols in the list with
2969 * before resolving them. This must start with
2970 * 'dev' and contain the driver name.
2971 * @param pszSymList List of symbols corresponding to the interface.
2972 * There is generally a there is generally a define
2973 * holding this list associated with the interface
2974 * definition (INTERFACE_SYM_LIST). For more
2975 * details see PDMR3LdrGetInterfaceSymbols.
2976 * @thread EMT
2977 */
2978 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2979 const char *pszSymPrefix, const char *pszSymList));
2980
2981 /**
2982 * Resolves the symbol for a ring-0 context interface.
2983 *
2984 * @returns VBox status code.
2985 * @param pDevIns The device instance.
2986 * @param pvInterface The interface structure.
2987 * @param cbInterface The size of the interface structure.
2988 * @param pszSymPrefix What to prefix the symbols in the list with
2989 * before resolving them. This must start with
2990 * 'dev' and contain the driver name.
2991 * @param pszSymList List of symbols corresponding to the interface.
2992 * There is generally a there is generally a define
2993 * holding this list associated with the interface
2994 * definition (INTERFACE_SYM_LIST). For more
2995 * details see PDMR3LdrGetInterfaceSymbols.
2996 * @thread EMT
2997 */
2998 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2999 const char *pszSymPrefix, const char *pszSymList));
3000
3001 /** Space reserved for future members.
3002 * @{ */
3003 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3004 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3005 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3006 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3007 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3008 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3009 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3010 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3011 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3012 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3013 /** @} */
3014
3015
3016 /** API available to trusted devices only.
3017 *
3018 * These APIs are providing unrestricted access to the guest and the VM,
3019 * or they are interacting intimately with PDM.
3020 *
3021 * @{
3022 */
3023 /**
3024 * Gets the VM handle. Restricted API.
3025 *
3026 * @returns VM Handle.
3027 * @param pDevIns The device instance.
3028 */
3029 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3030
3031 /**
3032 * Gets the VMCPU handle. Restricted API.
3033 *
3034 * @returns VMCPU Handle.
3035 * @param pDevIns The device instance.
3036 */
3037 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3038
3039 /**
3040 * Registers the VMM device heap
3041 *
3042 * @returns VBox status code.
3043 * @param pDevIns The device instance.
3044 * @param GCPhys The physical address.
3045 * @param pvHeap Ring 3 heap pointer.
3046 * @param cbSize Size of the heap.
3047 * @thread EMT.
3048 */
3049 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3050
3051 /**
3052 * Unregisters the VMM device heap
3053 *
3054 * @returns VBox status code.
3055 * @param pDevIns The device instance.
3056 * @param GCPhys The physical address.
3057 * @thread EMT.
3058 */
3059 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3060
3061 /**
3062 * Resets the VM.
3063 *
3064 * @returns The appropriate VBox status code to pass around on reset.
3065 * @param pDevIns The device instance.
3066 * @thread The emulation thread.
3067 */
3068 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3069
3070 /**
3071 * Suspends the VM.
3072 *
3073 * @returns The appropriate VBox status code to pass around on suspend.
3074 * @param pDevIns The device instance.
3075 * @thread The emulation thread.
3076 */
3077 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3078
3079 /**
3080 * Power off the VM.
3081 *
3082 * @returns The appropriate VBox status code to pass around on power off.
3083 * @param pDevIns The device instance.
3084 * @thread The emulation thread.
3085 */
3086 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3087
3088 /**
3089 * Checks if the Gate A20 is enabled or not.
3090 *
3091 * @returns true if A20 is enabled.
3092 * @returns false if A20 is disabled.
3093 * @param pDevIns The device instance.
3094 * @thread The emulation thread.
3095 */
3096 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3097
3098 /**
3099 * Enables or disables the Gate A20.
3100 *
3101 * @param pDevIns The device instance.
3102 * @param fEnable Set this flag to enable the Gate A20; clear it
3103 * to disable.
3104 * @thread The emulation thread.
3105 */
3106 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3107
3108 /**
3109 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3110 * thread.
3111 *
3112 * @param pDevIns The device instance.
3113 * @param iLeaf The CPUID leaf to get.
3114 * @param pEax Where to store the EAX value.
3115 * @param pEbx Where to store the EBX value.
3116 * @param pEcx Where to store the ECX value.
3117 * @param pEdx Where to store the EDX value.
3118 * @thread EMT.
3119 */
3120 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3121
3122 /** @} */
3123
3124 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3125 uint32_t u32TheEnd;
3126} PDMDEVHLPR3;
3127#endif /* !IN_RING3 */
3128/** Pointer to the R3 PDM Device API. */
3129typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3130/** Pointer to the R3 PDM Device API, const variant. */
3131typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3132
3133/** Current PDMDEVHLPR3 version number. */
3134#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 2, 0)
3135
3136
3137/**
3138 * PDM Device API - RC Variant.
3139 */
3140typedef struct PDMDEVHLPRC
3141{
3142 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3143 uint32_t u32Version;
3144
3145 /**
3146 * Set the IRQ for a PCI device.
3147 *
3148 * @param pDevIns Device instance.
3149 * @param iIrq IRQ number to set.
3150 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3151 * @thread Any thread, but will involve the emulation thread.
3152 */
3153 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3154
3155 /**
3156 * Set ISA IRQ for a device.
3157 *
3158 * @param pDevIns Device instance.
3159 * @param iIrq IRQ number to set.
3160 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3161 * @thread Any thread, but will involve the emulation thread.
3162 */
3163 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3164
3165 /**
3166 * Read physical memory.
3167 *
3168 * @returns VINF_SUCCESS (for now).
3169 * @param pDevIns Device instance.
3170 * @param GCPhys Physical address start reading from.
3171 * @param pvBuf Where to put the read bits.
3172 * @param cbRead How many bytes to read.
3173 */
3174 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3175
3176 /**
3177 * Write to physical memory.
3178 *
3179 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3180 * @param pDevIns Device instance.
3181 * @param GCPhys Physical address to write to.
3182 * @param pvBuf What to write.
3183 * @param cbWrite How many bytes to write.
3184 */
3185 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3186
3187 /**
3188 * Checks if the Gate A20 is enabled or not.
3189 *
3190 * @returns true if A20 is enabled.
3191 * @returns false if A20 is disabled.
3192 * @param pDevIns Device instance.
3193 * @thread The emulation thread.
3194 */
3195 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3196
3197 /**
3198 * Gets the VM state.
3199 *
3200 * @returns VM state.
3201 * @param pDevIns The device instance.
3202 * @thread Any thread (just keep in mind that it's volatile info).
3203 */
3204 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3205
3206 /**
3207 * Set the VM error message
3208 *
3209 * @returns rc.
3210 * @param pDrvIns Driver instance.
3211 * @param rc VBox status code.
3212 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3213 * @param pszFormat Error message format string.
3214 * @param ... Error message arguments.
3215 */
3216 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3217
3218 /**
3219 * Set the VM error message
3220 *
3221 * @returns rc.
3222 * @param pDrvIns Driver instance.
3223 * @param rc VBox status code.
3224 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3225 * @param pszFormat Error message format string.
3226 * @param va Error message arguments.
3227 */
3228 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3229
3230 /**
3231 * Set the VM runtime error message
3232 *
3233 * @returns VBox status code.
3234 * @param pDevIns Device instance.
3235 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3236 * @param pszErrorId Error ID string.
3237 * @param pszFormat Error message format string.
3238 * @param ... Error message arguments.
3239 */
3240 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3241
3242 /**
3243 * Set the VM runtime error message
3244 *
3245 * @returns VBox status code.
3246 * @param pDevIns Device instance.
3247 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3248 * @param pszErrorId Error ID string.
3249 * @param pszFormat Error message format string.
3250 * @param va Error message arguments.
3251 */
3252 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3253
3254 /**
3255 * Set parameters for pending MMIO patch operation
3256 *
3257 * @returns VBox status code.
3258 * @param pDevIns Device instance.
3259 * @param GCPhys MMIO physical address
3260 * @param pCachedData GC pointer to cached data
3261 */
3262 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3263
3264 /**
3265 * Gets the VM handle. Restricted API.
3266 *
3267 * @returns VM Handle.
3268 * @param pDevIns Device instance.
3269 */
3270 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3271
3272 /**
3273 * Gets the VMCPU handle. Restricted API.
3274 *
3275 * @returns VMCPU Handle.
3276 * @param pDevIns The device instance.
3277 */
3278 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3279
3280 /** Just a safety precaution. */
3281 uint32_t u32TheEnd;
3282} PDMDEVHLPRC;
3283/** Pointer PDM Device RC API. */
3284typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3285/** Pointer PDM Device RC API. */
3286typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3287
3288/** Current PDMDEVHLP version number. */
3289#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3290
3291
3292/**
3293 * PDM Device API - R0 Variant.
3294 */
3295typedef struct PDMDEVHLPR0
3296{
3297 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3298 uint32_t u32Version;
3299
3300 /**
3301 * Set the IRQ for a PCI device.
3302 *
3303 * @param pDevIns Device instance.
3304 * @param iIrq IRQ number to set.
3305 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3306 * @thread Any thread, but will involve the emulation thread.
3307 */
3308 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3309
3310 /**
3311 * Set ISA IRQ for a device.
3312 *
3313 * @param pDevIns Device instance.
3314 * @param iIrq IRQ number to set.
3315 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3316 * @thread Any thread, but will involve the emulation thread.
3317 */
3318 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3319
3320 /**
3321 * Read physical memory.
3322 *
3323 * @returns VINF_SUCCESS (for now).
3324 * @param pDevIns Device instance.
3325 * @param GCPhys Physical address start reading from.
3326 * @param pvBuf Where to put the read bits.
3327 * @param cbRead How many bytes to read.
3328 */
3329 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3330
3331 /**
3332 * Write to physical memory.
3333 *
3334 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3335 * @param pDevIns Device instance.
3336 * @param GCPhys Physical address to write to.
3337 * @param pvBuf What to write.
3338 * @param cbWrite How many bytes to write.
3339 */
3340 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3341
3342 /**
3343 * Checks if the Gate A20 is enabled or not.
3344 *
3345 * @returns true if A20 is enabled.
3346 * @returns false if A20 is disabled.
3347 * @param pDevIns Device instance.
3348 * @thread The emulation thread.
3349 */
3350 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3351
3352 /**
3353 * Gets the VM state.
3354 *
3355 * @returns VM state.
3356 * @param pDevIns The device instance.
3357 * @thread Any thread (just keep in mind that it's volatile info).
3358 */
3359 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3360
3361 /**
3362 * Set the VM error message
3363 *
3364 * @returns rc.
3365 * @param pDrvIns Driver instance.
3366 * @param rc VBox status code.
3367 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3368 * @param pszFormat Error message format string.
3369 * @param ... Error message arguments.
3370 */
3371 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3372
3373 /**
3374 * Set the VM error message
3375 *
3376 * @returns rc.
3377 * @param pDrvIns Driver instance.
3378 * @param rc VBox status code.
3379 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3380 * @param pszFormat Error message format string.
3381 * @param va Error message arguments.
3382 */
3383 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3384
3385 /**
3386 * Set the VM runtime error message
3387 *
3388 * @returns VBox status code.
3389 * @param pDevIns Device instance.
3390 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3391 * @param pszErrorId Error ID string.
3392 * @param pszFormat Error message format string.
3393 * @param ... Error message arguments.
3394 */
3395 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3396
3397 /**
3398 * Set the VM runtime error message
3399 *
3400 * @returns VBox status code.
3401 * @param pDevIns Device instance.
3402 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3403 * @param pszErrorId Error ID string.
3404 * @param pszFormat Error message format string.
3405 * @param va Error message arguments.
3406 */
3407 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3408
3409 /**
3410 * Set parameters for pending MMIO patch operation
3411 *
3412 * @returns rc.
3413 * @param pDevIns Device instance.
3414 * @param GCPhys MMIO physical address
3415 * @param pCachedData GC pointer to cached data
3416 */
3417 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3418
3419 /**
3420 * Gets the VM handle. Restricted API.
3421 *
3422 * @returns VM Handle.
3423 * @param pDevIns Device instance.
3424 */
3425 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3426
3427 /**
3428 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3429 *
3430 * @returns true = yes, false = no
3431 * @param pDevIns Device instance.
3432 */
3433 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3434
3435 /**
3436 * Gets the VMCPU handle. Restricted API.
3437 *
3438 * @returns VMCPU Handle.
3439 * @param pDevIns The device instance.
3440 */
3441 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3442
3443 /** Just a safety precaution. */
3444 uint32_t u32TheEnd;
3445} PDMDEVHLPR0;
3446/** Pointer PDM Device R0 API. */
3447typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3448/** Pointer PDM Device GC API. */
3449typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3450
3451/** Current PDMDEVHLP version number. */
3452#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3453
3454
3455
3456/**
3457 * PDM Device Instance.
3458 */
3459typedef struct PDMDEVINS
3460{
3461 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3462 uint32_t u32Version;
3463 /** Device instance number. */
3464 uint32_t iInstance;
3465
3466 /** Pointer the GC PDM Device API. */
3467 PCPDMDEVHLPRC pHlpRC;
3468 /** Pointer to device instance data. */
3469 RTRCPTR pvInstanceDataRC;
3470 /** The critical section for the device, see pCritSectR3.
3471 * This is automatically resolved by PDM when pCritSectR3 is set by the
3472 * constructor. */
3473 RCPTRTYPE(PPDMCRITSECT) pCritSectRC;
3474 /** Alignment padding. */
3475 RTRCPTR pAlignmentRC;
3476
3477 /** Pointer the R0 PDM Device API. */
3478 PCPDMDEVHLPR0 pHlpR0;
3479 /** Pointer to device instance data (R0). */
3480 RTR0PTR pvInstanceDataR0;
3481 /** The critical section for the device, see pCritSectR3.
3482 * This is automatically resolved by PDM when pCritSectR3 is set by the
3483 * constructor. */
3484 R0PTRTYPE(PPDMCRITSECT) pCritSectR0;
3485
3486 /** Pointer the HC PDM Device API. */
3487 PCPDMDEVHLPR3 pHlpR3;
3488 /** Pointer to device instance data. */
3489 RTR3PTR pvInstanceDataR3;
3490 /** The critical section for the device. (Optional)
3491 *
3492 * The device constructor initializes this if it has a critical section for
3493 * the device and desires it to be taken automatically by MMIO, I/O port
3494 * and timer callbacks to the device. The advantages using this locking
3495 * approach is both less code and avoiding the global IOM lock.
3496 *
3497 * @remarks Will not yet be taken by SSM.
3498 */
3499 R3PTRTYPE(PPDMCRITSECT) pCritSectR3;
3500
3501 /** Pointer to device registration structure. */
3502 R3PTRTYPE(PCPDMDEVREG) pReg;
3503 /** Configuration handle. */
3504 R3PTRTYPE(PCFGMNODE) pCfg;
3505
3506 /** The base interface of the device.
3507 *
3508 * The device constructor initializes this if it has any
3509 * device level interfaces to export. To obtain this interface
3510 * call PDMR3QueryDevice(). */
3511 PDMIBASE IBase;
3512 /** Align the internal data more naturally. */
3513 RTR3PTR R3PtrPadding;
3514
3515 /** Internal data. */
3516 union
3517 {
3518#ifdef PDMDEVINSINT_DECLARED
3519 PDMDEVINSINT s;
3520#endif
3521 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3522 } Internal;
3523
3524 /** Device instance data. The size of this area is defined
3525 * in the PDMDEVREG::cbInstanceData field. */
3526 char achInstanceData[8];
3527} PDMDEVINS;
3528
3529/** Current PDMDEVINS version number. */
3530#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3531
3532/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3533#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3534
3535/**
3536 * Checks the structure versions of the device instance and device helpers,
3537 * returning if they are incompatible.
3538 *
3539 * This is for use in the constructor.
3540 *
3541 * @param pDevIns The device instance pointer.
3542 */
3543#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3544 do \
3545 { \
3546 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3547 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3548 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3549 VERR_VERSION_MISMATCH); \
3550 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3551 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3552 VERR_VERSION_MISMATCH); \
3553 } while (0)
3554
3555/**
3556 * Quietly checks the structure versions of the device instance and device
3557 * helpers, returning if they are incompatible.
3558 *
3559 * This is for use in the destructor.
3560 *
3561 * @param pDevIns The device instance pointer.
3562 */
3563#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3564 do \
3565 { \
3566 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3567 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3568 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3569 return VERR_VERSION_MISMATCH; \
3570 } while (0)
3571
3572/** @def PDMDEV_ASSERT_EMT
3573 * Assert that the current thread is the emulation thread.
3574 */
3575#ifdef VBOX_STRICT
3576# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3577#else
3578# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3579#endif
3580
3581/** @def PDMDEV_ASSERT_OTHER
3582 * Assert that the current thread is NOT the emulation thread.
3583 */
3584#ifdef VBOX_STRICT
3585# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3586#else
3587# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3588#endif
3589
3590/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3591 * Assert that the current thread is owner of the VM lock.
3592 */
3593#ifdef VBOX_STRICT
3594# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3595#else
3596# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3597#endif
3598
3599/** @def PDMDEV_SET_ERROR
3600 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3601 */
3602#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3603 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3604
3605/** @def PDMDEV_SET_RUNTIME_ERROR
3606 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3607 */
3608#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3609 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3610
3611/** @def PDMDEVINS_2_RCPTR
3612 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3613 */
3614#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3615
3616/** @def PDMDEVINS_2_R3PTR
3617 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3618 */
3619#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3620
3621/** @def PDMDEVINS_2_R0PTR
3622 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3623 */
3624#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3625
3626
3627#ifdef IN_RING3
3628
3629/**
3630 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3631 */
3632DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3633 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3634 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3635{
3636 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3637}
3638
3639/**
3640 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3641 */
3642DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3643 const char *pszOut, const char *pszIn, const char *pszOutStr,
3644 const char *pszInStr, const char *pszDesc)
3645{
3646 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3647}
3648
3649/**
3650 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3651 */
3652DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3653 const char *pszOut, const char *pszIn, const char *pszOutStr,
3654 const char *pszInStr, const char *pszDesc)
3655{
3656 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3657}
3658
3659/**
3660 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3661 */
3662DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3663{
3664 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3665}
3666
3667/**
3668 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3669 */
3670DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3671 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3672 const char *pszDesc)
3673{
3674 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3675}
3676
3677/**
3678 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3679 */
3680DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3681 const char *pszWrite, const char *pszRead, const char *pszFill)
3682{
3683 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3684}
3685
3686/**
3687 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3688 */
3689DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3690 const char *pszWrite, const char *pszRead, const char *pszFill)
3691{
3692 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3693}
3694
3695/**
3696 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3697 */
3698DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3699{
3700 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3701}
3702
3703/**
3704 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3705 */
3706DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3707{
3708 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3709}
3710
3711/**
3712 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3713 */
3714DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3715{
3716 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3717}
3718
3719/**
3720 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3721 */
3722DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3723{
3724 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3725}
3726
3727/**
3728 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3729 */
3730DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3731{
3732 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3733}
3734
3735/**
3736 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3737 */
3738DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3739 const char *pszDesc, PRTRCPTR pRCPtr)
3740{
3741 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3742}
3743
3744/**
3745 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3746 */
3747DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3748 const char *pszDesc, PRTR0PTR pR0Ptr)
3749{
3750 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3751}
3752
3753/**
3754 * @copydoc PDMDEVHLPR3::pfnROMRegister
3755 */
3756DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3757{
3758 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3759}
3760
3761/**
3762 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3763 */
3764DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3765{
3766 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3767}
3768
3769/**
3770 * Register a save state data unit.
3771 *
3772 * @returns VBox status.
3773 * @param pDevIns The device instance.
3774 * @param uVersion Data layout version number.
3775 * @param cbGuess The approximate amount of data in the unit.
3776 * Only for progress indicators.
3777 * @param pfnSaveExec Execute save callback, optional.
3778 * @param pfnLoadExec Execute load callback, optional.
3779 */
3780DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3781 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3782{
3783 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3784 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3785 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3786 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3787}
3788
3789/**
3790 * Register a save state data unit with a live save callback as well.
3791 *
3792 * @returns VBox status.
3793 * @param pDevIns The device instance.
3794 * @param uVersion Data layout version number.
3795 * @param cbGuess The approximate amount of data in the unit.
3796 * Only for progress indicators.
3797 * @param pfnLiveExec Execute live callback, optional.
3798 * @param pfnSaveExec Execute save callback, optional.
3799 * @param pfnLoadExec Execute load callback, optional.
3800 */
3801DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3802 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3803{
3804 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3805 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3806 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3807 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3808}
3809
3810/**
3811 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3812 */
3813DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3814 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3815 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3816 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3817{
3818 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3819 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3820 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3821 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3822}
3823
3824/**
3825 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3826 */
3827DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3828 const char *pszDesc, PPTMTIMERR3 ppTimer)
3829{
3830 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3831}
3832
3833/**
3834 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3835 */
3836DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3837{
3838 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3839}
3840
3841#endif /* IN_RING3 */
3842
3843/**
3844 * @copydoc PDMDEVHLPR3::pfnPhysRead
3845 */
3846DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3847{
3848 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3849}
3850
3851/**
3852 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3853 */
3854DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3855{
3856 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3857}
3858
3859#ifdef IN_RING3
3860
3861/**
3862 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3863 */
3864DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3865{
3866 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3867}
3868
3869/**
3870 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3871 */
3872DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3873{
3874 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3875}
3876
3877/**
3878 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3879 */
3880DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3881{
3882 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3883}
3884
3885/**
3886 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3887 */
3888DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3889{
3890 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3891}
3892
3893/**
3894 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3895 */
3896DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3897{
3898 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3899}
3900
3901/**
3902 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3903 */
3904DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3905{
3906 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3907}
3908
3909/**
3910 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3911 */
3912DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3913{
3914 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3915}
3916
3917/**
3918 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3919 */
3920DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3921{
3922 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3923}
3924
3925/**
3926 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3927 */
3928DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3929{
3930 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
3931}
3932#endif /* IN_RING3 */
3933
3934/**
3935 * @copydoc PDMDEVHLPR3::pfnVMState
3936 */
3937DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3938{
3939 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
3940}
3941
3942#ifdef IN_RING3
3943/**
3944 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
3945 */
3946DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
3947{
3948 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
3949}
3950#endif /* IN_RING3 */
3951
3952/**
3953 * @copydoc PDMDEVHLPR3::pfnVMSetError
3954 */
3955DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3956{
3957 va_list va;
3958 va_start(va, pszFormat);
3959 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3960 va_end(va);
3961 return rc;
3962}
3963
3964/**
3965 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3966 */
3967DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
3968{
3969 va_list va;
3970 int rc;
3971 va_start(va, pszFormat);
3972 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
3973 va_end(va);
3974 return rc;
3975}
3976
3977/**
3978 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
3979 *
3980 * @returns VBox status code which must be passed up to the VMM. This will be
3981 * VINF_SUCCESS in non-strict builds.
3982 * @param pDevIns The device instance.
3983 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3984 * @param pszFormat Message. (optional)
3985 * @param ... Message parameters.
3986 */
3987DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3988{
3989#ifdef VBOX_STRICT
3990# ifdef IN_RING3
3991 int rc;
3992 va_list args;
3993 va_start(args, pszFormat);
3994 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3995 va_end(args);
3996 return rc;
3997# else
3998 return VINF_EM_DBG_STOP;
3999# endif
4000#else
4001 NOREF(pDevIns);
4002 NOREF(pszFile);
4003 NOREF(iLine);
4004 NOREF(pszFunction);
4005 NOREF(pszFormat);
4006 return VINF_SUCCESS;
4007#endif
4008}
4009
4010#ifdef IN_RING3
4011
4012/**
4013 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4014 */
4015DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4016{
4017 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4018}
4019
4020/**
4021 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4022 */
4023DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4024{
4025 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4026}
4027
4028/**
4029 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4030 */
4031DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4032 const char *pszDesc, const char *pszName, ...)
4033{
4034 va_list va;
4035 va_start(va, pszName);
4036 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4037 va_end(va);
4038}
4039
4040/**
4041 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4042 */
4043DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4044{
4045 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4046}
4047
4048/**
4049 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4050 */
4051DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4052{
4053 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4054}
4055
4056/**
4057 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4058 */
4059DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4060 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4061{
4062 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4063}
4064
4065#endif /* IN_RING3 */
4066
4067/**
4068 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4069 */
4070DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4071{
4072 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4073}
4074
4075/**
4076 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4077 */
4078DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4079{
4080 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4081}
4082
4083/**
4084 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4085 */
4086DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4087{
4088 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4089}
4090
4091/**
4092 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4093 */
4094DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4095{
4096 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4097}
4098
4099#ifdef IN_RING3
4100
4101/**
4102 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4103 */
4104DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4105{
4106 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4107}
4108
4109/**
4110 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4111 */
4112DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4113 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4114{
4115 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4116}
4117
4118/**
4119 * Initializes a PDM critical section.
4120 *
4121 * The PDM critical sections are derived from the IPRT critical sections, but
4122 * works in RC and R0 as well.
4123 *
4124 * @returns VBox status code.
4125 * @param pDevIns The device instance.
4126 * @param pCritSect Pointer to the critical section.
4127 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4128 * @param pszNameFmt Format string for namging the critical section.
4129 * For statistics and lock validation.
4130 * @param ... Arguments for the format string.
4131 */
4132DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4133{
4134 int rc;
4135 va_list va;
4136 va_start(va, pszNameFmt);
4137 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4138 va_end(va);
4139 return rc;
4140}
4141
4142/**
4143 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4144 */
4145DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4146 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4147{
4148 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4149}
4150
4151/**
4152 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4153 */
4154DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4155{
4156 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4157}
4158
4159/**
4160 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4161 */
4162DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4163{
4164 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4165}
4166
4167/**
4168 * @copydoc PDMDEVHLPR3::pfnA20Set
4169 */
4170DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4171{
4172 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4173}
4174
4175/**
4176 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4177 */
4178DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4179{
4180 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4181}
4182
4183/**
4184 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4185 */
4186DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4187{
4188 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4189}
4190
4191/**
4192 * @copydoc PDMDEVHLPR3::pfnPICRegister
4193 */
4194DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4195{
4196 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4197}
4198
4199/**
4200 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4201 */
4202DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4203{
4204 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4205}
4206
4207/**
4208 * @copydoc PDMDEVHLPR3::pfn
4209 */
4210DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4211{
4212 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4213}
4214
4215/**
4216 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4217 */
4218DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4219{
4220 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4221}
4222
4223/**
4224 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4225 */
4226DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4227{
4228 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4229}
4230
4231/**
4232 * @copydoc PDMDEVHLPR3::pfnDMARegister
4233 */
4234DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4235{
4236 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4237}
4238
4239/**
4240 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4241 */
4242DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4243{
4244 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4245}
4246
4247/**
4248 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4249 */
4250DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4251{
4252 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4253}
4254
4255/**
4256 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4257 */
4258DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4259{
4260 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4261}
4262
4263/**
4264 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4265 */
4266DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4267{
4268 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4269}
4270
4271/**
4272 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4273 */
4274DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4275{
4276 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4277}
4278
4279/**
4280 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4281 */
4282DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4283{
4284 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4285}
4286
4287/**
4288 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4289 */
4290DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4291{
4292 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4293}
4294
4295#endif /* IN_RING3 */
4296
4297/**
4298 * @copydoc PDMDEVHLPR3::pfnGetVM
4299 */
4300DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4301{
4302 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4303}
4304
4305/**
4306 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4307 */
4308DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4309{
4310 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4311}
4312
4313#ifdef IN_RING3
4314
4315/**
4316 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4317 */
4318DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4319{
4320 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4321}
4322
4323/**
4324 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4325 */
4326DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4327{
4328 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4329}
4330
4331/**
4332 * @copydoc PDMDEVHLPR3::pfnVMReset
4333 */
4334DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4335{
4336 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4337}
4338
4339/**
4340 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4341 */
4342DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4343{
4344 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4345}
4346
4347/**
4348 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4349 */
4350DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4351{
4352 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4353}
4354
4355#endif /* IN_RING3 */
4356
4357/**
4358 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4359 */
4360DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4361{
4362 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4363}
4364
4365#ifdef IN_RING3
4366
4367/**
4368 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4369 */
4370DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4371{
4372 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4373}
4374
4375#endif /* IN_RING3 */
4376#ifdef IN_RING0
4377
4378/**
4379 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4380 */
4381DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4382{
4383 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4384}
4385
4386#endif /* IN_RING0 */
4387
4388
4389
4390
4391/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4392typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4393
4394/**
4395 * Callbacks for VBoxDeviceRegister().
4396 */
4397typedef struct PDMDEVREGCB
4398{
4399 /** Interface version.
4400 * This is set to PDM_DEVREG_CB_VERSION. */
4401 uint32_t u32Version;
4402
4403 /**
4404 * Registers a device with the current VM instance.
4405 *
4406 * @returns VBox status code.
4407 * @param pCallbacks Pointer to the callback table.
4408 * @param pReg Pointer to the device registration record.
4409 * This data must be permanent and readonly.
4410 */
4411 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4412} PDMDEVREGCB;
4413
4414/** Current version of the PDMDEVREGCB structure. */
4415#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4416
4417
4418/**
4419 * The VBoxDevicesRegister callback function.
4420 *
4421 * PDM will invoke this function after loading a device module and letting
4422 * the module decide which devices to register and how to handle conflicts.
4423 *
4424 * @returns VBox status code.
4425 * @param pCallbacks Pointer to the callback table.
4426 * @param u32Version VBox version number.
4427 */
4428typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4429
4430/** @} */
4431
4432RT_C_DECLS_END
4433
4434#endif
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