VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 32824

Last change on this file since 32824 was 32820, checked in by vboxsync, 14 years ago

PCI, PDM: initial drop of MSI support

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1/** @file
2 * PDM - Pluggable Device Manager, Devices. (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2010 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/pdmcommon.h>
35#include <VBox/iom.h>
36#include <VBox/tm.h>
37#include <VBox/ssm.h>
38#include <VBox/cfgm.h>
39#include <VBox/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44RT_C_DECLS_BEGIN
45
46/** @defgroup grp_pdm_device The PDM Devices API
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data. If the registration structure
56 * is needed, it can be accessed thru pDevIns->pReg.
57 * @param iInstance Instance number. Use this to figure out which registers
58 * and such to use. The instance number is also found in
59 * pDevIns->iInstance, but since it's likely to be
60 * freqently used PDM passes it as parameter.
61 * @param pCfg Configuration node handle for the driver. This is
62 * expected to be in high demand in the constructor and is
63 * therefore passed as an argument. When using it at other
64 * times, it can be found in pDrvIns->pCfg.
65 */
66typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
67/** Pointer to a FNPDMDEVCONSTRUCT() function. */
68typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
69
70/**
71 * Destruct a device instance.
72 *
73 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
74 * resources can be freed correctly.
75 *
76 * @returns VBox status.
77 * @param pDevIns The device instance data.
78 */
79typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
80/** Pointer to a FNPDMDEVDESTRUCT() function. */
81typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
82
83/**
84 * Device relocation callback.
85 *
86 * This is called when the instance data has been relocated in raw-mode context
87 * (RC). It is also called when the RC hypervisor selects changes. The device
88 * must fixup all necessary pointers and re-query all interfaces to other RC
89 * devices and drivers.
90 *
91 * Before the RC code is executed the first time, this function will be called
92 * with a 0 delta so RC pointer calculations can be one in one place.
93 *
94 * @param pDevIns Pointer to the device instance.
95 * @param offDelta The relocation delta relative to the old location.
96 *
97 * @remark A relocation CANNOT fail.
98 */
99typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
100/** Pointer to a FNPDMDEVRELOCATE() function. */
101typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
102
103/**
104 * Device I/O Control interface.
105 *
106 * This is used by external components, such as the COM interface, to
107 * communicate with devices using a class wide interface or a device
108 * specific interface.
109 *
110 * @returns VBox status code.
111 * @param pDevIns Pointer to the device instance.
112 * @param uFunction Function to perform.
113 * @param pvIn Pointer to input data.
114 * @param cbIn Size of input data.
115 * @param pvOut Pointer to output data.
116 * @param cbOut Size of output data.
117 * @param pcbOut Where to store the actual size of the output data.
118 */
119typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
120 void *pvIn, RTUINT cbIn,
121 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
122/** Pointer to a FNPDMDEVIOCTL() function. */
123typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
124
125/**
126 * Power On notification.
127 *
128 * @returns VBox status.
129 * @param pDevIns The device instance data.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVPOWERON() function. */
133typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
134
135/**
136 * Reset notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 */
141typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
142/** Pointer to a FNPDMDEVRESET() function. */
143typedef FNPDMDEVRESET *PFNPDMDEVRESET;
144
145/**
146 * Suspend notification.
147 *
148 * @returns VBox status.
149 * @param pDevIns The device instance data.
150 * @thread EMT(0)
151 */
152typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
153/** Pointer to a FNPDMDEVSUSPEND() function. */
154typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
155
156/**
157 * Resume notification.
158 *
159 * @returns VBox status.
160 * @param pDevIns The device instance data.
161 */
162typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
163/** Pointer to a FNPDMDEVRESUME() function. */
164typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
165
166/**
167 * Power Off notification.
168 *
169 * This is only called when the VMR3PowerOff call is made on a running VM. This
170 * means that there is no notification if the VM was suspended before being
171 * powered of. There will also be no callback when hot plugging devices.
172 *
173 * @param pDevIns The device instance data.
174 * @thread EMT(0)
175 */
176typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
177/** Pointer to a FNPDMDEVPOWEROFF() function. */
178typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
179
180/**
181 * Attach command.
182 *
183 * This is called to let the device attach to a driver for a specified LUN
184 * at runtime. This is not called during VM construction, the device
185 * constructor have to attach to all the available drivers.
186 *
187 * This is like plugging in the keyboard or mouse after turning on the PC.
188 *
189 * @returns VBox status code.
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
193 */
194typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
195/** Pointer to a FNPDMDEVATTACH() function. */
196typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
197
198/**
199 * Detach notification.
200 *
201 * This is called when a driver is detaching itself from a LUN of the device.
202 * The device should adjust it's state to reflect this.
203 *
204 * This is like unplugging the network cable to use it for the laptop or
205 * something while the PC is still running.
206 *
207 * @param pDevIns The device instance.
208 * @param iLUN The logical unit which is being detached.
209 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 */
223typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
224/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
225typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
226
227/**
228 * Init complete notification.
229 * This can be done to do communication with other devices and other
230 * initialization which requires everything to be in place.
231 *
232 * @returns VBOX status code.
233 * @param pDevIns The device instance.
234 */
235typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
236/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
237typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
238
239
240
241/**
242 * PDM Device Registration Structure.
243 *
244 * This structure is used when registering a device from VBoxInitDevices() in HC
245 * Ring-3. PDM will continue use till the VM is terminated.
246 */
247typedef struct PDMDEVREG
248{
249 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
250 uint32_t u32Version;
251 /** Device name. */
252 char szName[32];
253 /** Name of the raw-mode context module (no path).
254 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
255 char szRCMod[32];
256 /** Name of the ring-0 module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
258 char szR0Mod[32];
259 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
260 * remain unchanged from registration till VM destruction. */
261 const char *pszDescription;
262
263 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
264 uint32_t fFlags;
265 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
266 uint32_t fClass;
267 /** Maximum number of instances (per VM). */
268 uint32_t cMaxInstances;
269 /** Size of the instance data. */
270 uint32_t cbInstance;
271
272 /** Construct instance - required. */
273 PFNPDMDEVCONSTRUCT pfnConstruct;
274 /** Destruct instance - optional. */
275 PFNPDMDEVDESTRUCT pfnDestruct;
276 /** Relocation command - optional. */
277 PFNPDMDEVRELOCATE pfnRelocate;
278 /** I/O Control interface - optional. */
279 PFNPDMDEVIOCTL pfnIOCtl;
280 /** Power on notification - optional. */
281 PFNPDMDEVPOWERON pfnPowerOn;
282 /** Reset notification - optional. */
283 PFNPDMDEVRESET pfnReset;
284 /** Suspend notification - optional. */
285 PFNPDMDEVSUSPEND pfnSuspend;
286 /** Resume notification - optional. */
287 PFNPDMDEVRESUME pfnResume;
288 /** Attach command - optional. */
289 PFNPDMDEVATTACH pfnAttach;
290 /** Detach notification - optional. */
291 PFNPDMDEVDETACH pfnDetach;
292 /** Query a LUN base interface - optional. */
293 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
294 /** Init complete notification - optional. */
295 PFNPDMDEVINITCOMPLETE pfnInitComplete;
296 /** Power off notification - optional. */
297 PFNPDMDEVPOWEROFF pfnPowerOff;
298 /** @todo */
299 PFNRT pfnSoftReset;
300 /** Initialization safty marker. */
301 uint32_t u32VersionEnd;
302} PDMDEVREG;
303/** Pointer to a PDM Device Structure. */
304typedef PDMDEVREG *PPDMDEVREG;
305/** Const pointer to a PDM Device Structure. */
306typedef PDMDEVREG const *PCPDMDEVREG;
307
308/** Current DEVREG version number. */
309#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
310
311/** PDM Device Flags.
312 * @{ */
313/** This flag is used to indicate that the device has a RC component. */
314#define PDM_DEVREG_FLAGS_RC 0x00000001
315/** This flag is used to indicate that the device has a R0 component. */
316#define PDM_DEVREG_FLAGS_R0 0x00000002
317
318/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
319 * The bit count for the current host. */
320#if HC_ARCH_BITS == 32
321# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
322#elif HC_ARCH_BITS == 64
323# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
324#else
325# error Unsupported HC_ARCH_BITS value.
326#endif
327/** The host bit count mask. */
328#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
329
330/** The device support only 32-bit guests. */
331#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
332/** The device support only 64-bit guests. */
333#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
334/** The device support both 32-bit & 64-bit guests. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
336/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
337 * The guest bit count for the current compilation. */
338#if GC_ARCH_BITS == 32
339# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
340#elif GC_ARCH_BITS == 64
341# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
342#else
343# error Unsupported GC_ARCH_BITS value.
344#endif
345/** The guest bit count mask. */
346#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
347
348/** A convenience. */
349#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
350
351/** Indicates that the devices support PAE36 on a 32-bit guest. */
352#define PDM_DEVREG_FLAGS_PAE36 0x00001000
353
354/** Indicates that the device needs to be notified before the drivers when suspending. */
355#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
356
357/** Indicates that the device needs to be notified before the drivers when powering off. */
358#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
359/** @} */
360
361
362/** PDM Device Classes.
363 * The order is important, lower bit earlier instantiation.
364 * @{ */
365/** Architecture device. */
366#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
367/** Architecture BIOS device. */
368#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
369/** PCI bus brigde. */
370#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
371/** ISA bus brigde. */
372#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
373/** Input device (mouse, keyboard, joystick, HID, ...). */
374#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
375/** Interrupt controller (PIC). */
376#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
377/** Interval controoler (PIT). */
378#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
379/** RTC/CMOS. */
380#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
381/** DMA controller. */
382#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
383/** VMM Device. */
384#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
385/** Graphics device, like VGA. */
386#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
387/** Storage controller device. */
388#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
389/** Network interface controller. */
390#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
391/** Audio. */
392#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
393/** USB HIC. */
394#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
395/** ACPI. */
396#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
397/** Serial controller device. */
398#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
399/** Parallel controller device */
400#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
401/** Host PCI pass-through device */
402#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
403/** Misc devices (always last). */
404#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
405/** @} */
406
407
408/** @name IRQ Level for use with the *SetIrq APIs.
409 * @{
410 */
411/** Assert the IRQ (can assume value 1). */
412#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
413/** Deassert the IRQ (can assume value 0). */
414#define PDM_IRQ_LEVEL_LOW 0
415/** flip-flop - assert and then deassert it again immediately. */
416#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
417/** @} */
418
419/**
420 * Registration record for MSI.
421 */
422typedef struct PDMMSIREG
423{
424 /** Number of interrupt vectors */
425 uint16_t cVectors;
426 /** Offset of MSI capability */
427 uint8_t iCapOffset;
428 /** Offset of next capability */
429 uint8_t iNextOffset;
430 /** Value to initialize message control register */
431 uint16_t iMsiFlags;
432} PDMMSIREG;
433typedef PDMMSIREG *PPDMMSIREG;
434
435/**
436 * PCI Bus registration structure.
437 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
438 */
439typedef struct PDMPCIBUSREG
440{
441 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
442 uint32_t u32Version;
443
444 /**
445 * Registers the device with the default PCI bus.
446 *
447 * @returns VBox status code.
448 * @param pDevIns Device instance of the PCI Bus.
449 * @param pPciDev The PCI device structure.
450 * Any PCI enabled device must keep this in it's instance data!
451 * Fill in the PCI data config before registration, please.
452 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
453 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
454 * If negative, the pci bus device will assign one.
455 */
456 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
457
458 /**
459 * Initialize MSI support in a PCI device.
460 *
461 * @returns VBox status code.
462 * @param pDevIns Device instance of the PCI Bus.
463 * @param pPciDev The PCI device structure.
464 * @param pMsiReg MSI registration structure
465 */
466 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
467
468 /**
469 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
470 *
471 * @returns VBox status code.
472 * @param pDevIns Device instance of the PCI Bus.
473 * @param pPciDev The PCI device structure.
474 * @param iRegion The region number.
475 * @param cbRegion Size of the region.
476 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
477 * @param pfnCallback Callback for doing the mapping.
478 */
479 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
480
481 /**
482 * Register PCI configuration space read/write callbacks.
483 *
484 * @param pDevIns Device instance of the PCI Bus.
485 * @param pPciDev The PCI device structure.
486 * @param pfnRead Pointer to the user defined PCI config read function.
487 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
488 * PCI config read function. This way, user can decide when (and if)
489 * to call default PCI config read function. Can be NULL.
490 * @param pfnWrite Pointer to the user defined PCI config write function.
491 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
492 * PCI config write function. This way, user can decide when (and if)
493 * to call default PCI config write function. Can be NULL.
494 * @thread EMT
495 */
496 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
497 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
498
499 /**
500 * Set the IRQ for a PCI device.
501 *
502 * @param pDevIns Device instance of the PCI Bus.
503 * @param pPciDev The PCI device structure.
504 * @param iIrq IRQ number to set.
505 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
506 */
507 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
508
509 /**
510 * Saves a state of the PCI device.
511 *
512 * @returns VBox status code.
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev Pointer to PCI device.
515 * @param pSSMHandle The handle to save the state to.
516 */
517 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
518
519 /**
520 * Loads a saved PCI device state.
521 *
522 * @returns VBox status code.
523 * @param pDevIns Device instance of the PCI Bus.
524 * @param pPciDev Pointer to PCI device.
525 * @param pSSMHandle The handle to the saved state.
526 */
527 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
528
529 /**
530 * Called to perform the job of the bios.
531 * This is only called for the first PCI Bus - it is expected to
532 * service all the PCI buses.
533 *
534 * @returns VBox status.
535 * @param pDevIns Device instance of the first bus.
536 */
537 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
538
539 /** The name of the SetIrq RC entry point. */
540 const char *pszSetIrqRC;
541
542 /** The name of the SetIrq R0 entry point. */
543 const char *pszSetIrqR0;
544
545} PDMPCIBUSREG;
546/** Pointer to a PCI bus registration structure. */
547typedef PDMPCIBUSREG *PPDMPCIBUSREG;
548
549/** Current PDMPCIBUSREG version number. */
550#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)
551
552/**
553 * PCI Bus RC helpers.
554 */
555typedef struct PDMPCIHLPRC
556{
557 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
558 uint32_t u32Version;
559
560 /**
561 * Set an ISA IRQ.
562 *
563 * @param pDevIns PCI device instance.
564 * @param iIrq IRQ number to set.
565 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
566 * @thread EMT only.
567 */
568 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
569
570 /**
571 * Set an I/O-APIC IRQ.
572 *
573 * @param pDevIns PCI device instance.
574 * @param iIrq IRQ number to set.
575 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
576 * @thread EMT only.
577 */
578 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
579
580 /**
581 * Acquires the PDM lock.
582 *
583 * @returns VINF_SUCCESS on success.
584 * @returns rc if we failed to acquire the lock.
585 * @param pDevIns The PCI device instance.
586 * @param rc What to return if we fail to acquire the lock.
587 */
588 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
589
590 /**
591 * Releases the PDM lock.
592 *
593 * @param pDevIns The PCI device instance.
594 */
595 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
596
597 /** Just a safety precaution. */
598 uint32_t u32TheEnd;
599} PDMPCIHLPRC;
600/** Pointer to PCI helpers. */
601typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
602/** Pointer to const PCI helpers. */
603typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
604
605/** Current PDMPCIHLPR3 version number. */
606#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 1, 0)
607
608
609/**
610 * PCI Bus R0 helpers.
611 */
612typedef struct PDMPCIHLPR0
613{
614 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
615 uint32_t u32Version;
616
617 /**
618 * Set an ISA IRQ.
619 *
620 * @param pDevIns PCI device instance.
621 * @param iIrq IRQ number to set.
622 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
623 * @thread EMT only.
624 */
625 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
626
627 /**
628 * Set an I/O-APIC IRQ.
629 *
630 * @param pDevIns PCI device instance.
631 * @param iIrq IRQ number to set.
632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
633 * @thread EMT only.
634 */
635 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
636
637 /**
638 * Acquires the PDM lock.
639 *
640 * @returns VINF_SUCCESS on success.
641 * @returns rc if we failed to acquire the lock.
642 * @param pDevIns The PCI device instance.
643 * @param rc What to return if we fail to acquire the lock.
644 */
645 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
646
647 /**
648 * Releases the PDM lock.
649 *
650 * @param pDevIns The PCI device instance.
651 */
652 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
653
654 /** Just a safety precaution. */
655 uint32_t u32TheEnd;
656} PDMPCIHLPR0;
657/** Pointer to PCI helpers. */
658typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
659/** Pointer to const PCI helpers. */
660typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
661
662/** Current PDMPCIHLPR0 version number. */
663#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 1, 0)
664
665/**
666 * PCI device helpers.
667 */
668typedef struct PDMPCIHLPR3
669{
670 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
671 uint32_t u32Version;
672
673 /**
674 * Set an ISA IRQ.
675 *
676 * @param pDevIns The PCI device instance.
677 * @param iIrq IRQ number to set.
678 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
679 * @thread EMT only.
680 */
681 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
682
683 /**
684 * Set an I/O-APIC IRQ.
685 *
686 * @param pDevIns The PCI device instance.
687 * @param iIrq IRQ number to set.
688 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
689 * @thread EMT only.
690 */
691 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
692
693 /**
694 * Checks if the given address is an MMIO2 base address or not.
695 *
696 * @returns true/false accordingly.
697 * @param pDevIns The PCI device instance.
698 * @param pOwner The owner of the memory, optional.
699 * @param GCPhys The address to check.
700 */
701 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
702
703 /**
704 * Gets the address of the RC PCI Bus helpers.
705 *
706 * This should be called at both construction and relocation time
707 * to obtain the correct address of the RC helpers.
708 *
709 * @returns RC pointer to the PCI Bus helpers.
710 * @param pDevIns Device instance of the PCI Bus.
711 * @thread EMT only.
712 */
713 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
714
715 /**
716 * Gets the address of the R0 PCI Bus helpers.
717 *
718 * This should be called at both construction and relocation time
719 * to obtain the correct address of the R0 helpers.
720 *
721 * @returns R0 pointer to the PCI Bus helpers.
722 * @param pDevIns Device instance of the PCI Bus.
723 * @thread EMT only.
724 */
725 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
726
727 /**
728 * Acquires the PDM lock.
729 *
730 * @returns VINF_SUCCESS on success.
731 * @returns Fatal error on failure.
732 * @param pDevIns The PCI device instance.
733 * @param rc Dummy for making the interface identical to the RC and R0 versions.
734 */
735 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
736
737 /**
738 * Releases the PDM lock.
739 *
740 * @param pDevIns The PCI device instance.
741 */
742 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
743
744 /** Just a safety precaution. */
745 uint32_t u32TheEnd;
746} PDMPCIHLPR3;
747/** Pointer to PCI helpers. */
748typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
749/** Pointer to const PCI helpers. */
750typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
751
752/** Current PDMPCIHLPR3 version number. */
753#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 1, 0)
754
755
756/**
757 * Programmable Interrupt Controller registration structure.
758 */
759typedef struct PDMPICREG
760{
761 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
762 uint32_t u32Version;
763
764 /**
765 * Set the an IRQ.
766 *
767 * @param pDevIns Device instance of the PIC.
768 * @param iIrq IRQ number to set.
769 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
770 */
771 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
772
773 /**
774 * Get a pending interrupt.
775 *
776 * @returns Pending interrupt number.
777 * @param pDevIns Device instance of the PIC.
778 */
779 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
780
781 /** The name of the RC SetIrq entry point. */
782 const char *pszSetIrqRC;
783 /** The name of the RC GetInterrupt entry point. */
784 const char *pszGetInterruptRC;
785
786 /** The name of the R0 SetIrq entry point. */
787 const char *pszSetIrqR0;
788 /** The name of the R0 GetInterrupt entry point. */
789 const char *pszGetInterruptR0;
790} PDMPICREG;
791/** Pointer to a PIC registration structure. */
792typedef PDMPICREG *PPDMPICREG;
793
794/** Current PDMPICREG version number. */
795#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
796
797/**
798 * PIC RC helpers.
799 */
800typedef struct PDMPICHLPRC
801{
802 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
803 uint32_t u32Version;
804
805 /**
806 * Set the interrupt force action flag.
807 *
808 * @param pDevIns Device instance of the PIC.
809 */
810 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
811
812 /**
813 * Clear the interrupt force action flag.
814 *
815 * @param pDevIns Device instance of the PIC.
816 */
817 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
818
819 /**
820 * Acquires the PDM lock.
821 *
822 * @returns VINF_SUCCESS on success.
823 * @returns rc if we failed to acquire the lock.
824 * @param pDevIns The PIC device instance.
825 * @param rc What to return if we fail to acquire the lock.
826 */
827 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
828
829 /**
830 * Releases the PDM lock.
831 *
832 * @param pDevIns The PIC device instance.
833 */
834 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
835
836 /** Just a safety precaution. */
837 uint32_t u32TheEnd;
838} PDMPICHLPRC;
839
840/** Pointer to PIC RC helpers. */
841typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
842/** Pointer to const PIC RC helpers. */
843typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
844
845/** Current PDMPICHLPRC version number. */
846#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
847
848
849/**
850 * PIC R0 helpers.
851 */
852typedef struct PDMPICHLPR0
853{
854 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
855 uint32_t u32Version;
856
857 /**
858 * Set the interrupt force action flag.
859 *
860 * @param pDevIns Device instance of the PIC.
861 */
862 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
863
864 /**
865 * Clear the interrupt force action flag.
866 *
867 * @param pDevIns Device instance of the PIC.
868 */
869 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
870
871 /**
872 * Acquires the PDM lock.
873 *
874 * @returns VINF_SUCCESS on success.
875 * @returns rc if we failed to acquire the lock.
876 * @param pDevIns The PIC device instance.
877 * @param rc What to return if we fail to acquire the lock.
878 */
879 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
880
881 /**
882 * Releases the PDM lock.
883 *
884 * @param pDevIns The PCI device instance.
885 */
886 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
887
888 /** Just a safety precaution. */
889 uint32_t u32TheEnd;
890} PDMPICHLPR0;
891
892/** Pointer to PIC R0 helpers. */
893typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
894/** Pointer to const PIC R0 helpers. */
895typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
896
897/** Current PDMPICHLPR0 version number. */
898#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
899
900/**
901 * PIC R3 helpers.
902 */
903typedef struct PDMPICHLPR3
904{
905 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
906 uint32_t u32Version;
907
908 /**
909 * Set the interrupt force action flag.
910 *
911 * @param pDevIns Device instance of the PIC.
912 */
913 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
914
915 /**
916 * Clear the interrupt force action flag.
917 *
918 * @param pDevIns Device instance of the PIC.
919 */
920 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
921
922 /**
923 * Acquires the PDM lock.
924 *
925 * @returns VINF_SUCCESS on success.
926 * @returns Fatal error on failure.
927 * @param pDevIns The PIC device instance.
928 * @param rc Dummy for making the interface identical to the RC and R0 versions.
929 */
930 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
931
932 /**
933 * Releases the PDM lock.
934 *
935 * @param pDevIns The PIC device instance.
936 */
937 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
938
939 /**
940 * Gets the address of the RC PIC helpers.
941 *
942 * This should be called at both construction and relocation time
943 * to obtain the correct address of the RC helpers.
944 *
945 * @returns RC pointer to the PIC helpers.
946 * @param pDevIns Device instance of the PIC.
947 */
948 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
949
950 /**
951 * Gets the address of the R0 PIC helpers.
952 *
953 * This should be called at both construction and relocation time
954 * to obtain the correct address of the R0 helpers.
955 *
956 * @returns R0 pointer to the PIC helpers.
957 * @param pDevIns Device instance of the PIC.
958 */
959 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
960
961 /** Just a safety precaution. */
962 uint32_t u32TheEnd;
963} PDMPICHLPR3;
964
965/** Pointer to PIC R3 helpers. */
966typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
967/** Pointer to const PIC R3 helpers. */
968typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
969
970/** Current PDMPICHLPR3 version number. */
971#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
972
973
974
975/**
976 * Advanced Programmable Interrupt Controller registration structure.
977 */
978typedef struct PDMAPICREG
979{
980 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
981 uint32_t u32Version;
982
983 /**
984 * Get a pending interrupt.
985 *
986 * @returns Pending interrupt number.
987 * @param pDevIns Device instance of the APIC.
988 */
989 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
990
991 /**
992 * Check if the APIC has a pending interrupt/if a TPR change would active one
993 *
994 * @returns Pending interrupt yes/no
995 * @param pDevIns Device instance of the APIC.
996 */
997 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
998
999 /**
1000 * Set the APIC base.
1001 *
1002 * @param pDevIns Device instance of the APIC.
1003 * @param u64Base The new base.
1004 */
1005 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
1006
1007 /**
1008 * Get the APIC base.
1009 *
1010 * @returns Current base.
1011 * @param pDevIns Device instance of the APIC.
1012 */
1013 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
1014
1015 /**
1016 * Set the TPR (task priority register).
1017 *
1018 * @param pDevIns Device instance of the APIC.
1019 * @param idCpu VCPU id
1020 * @param u8TPR The new TPR.
1021 */
1022 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1023
1024 /**
1025 * Get the TPR (task priority register).
1026 *
1027 * @returns The current TPR.
1028 * @param pDevIns Device instance of the APIC.
1029 * @param idCpu VCPU id
1030 */
1031 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1032
1033 /**
1034 * Write MSR in APIC range.
1035 *
1036 * @returns VBox status code.
1037 * @param pDevIns Device instance of the APIC.
1038 * @param idCpu Target CPU.
1039 * @param u32Reg MSR to write.
1040 * @param u64Value Value to write.
1041 */
1042 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1043
1044 /**
1045 * Read MSR in APIC range.
1046 *
1047 * @returns VBox status code.
1048 * @param pDevIns Device instance of the APIC.
1049 * @param idCpu Target CPU.
1050 * @param u32Reg MSR to read.
1051 * @param pu64Value Value read.
1052 */
1053 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1054
1055 /**
1056 * Private interface between the IOAPIC and APIC.
1057 *
1058 * This is a low-level, APIC/IOAPIC implementation specific interface
1059 * which is registered with PDM only because it makes life so much
1060 * simpler right now (GC bits). This is a bad bad hack! The correct
1061 * way of doing this would involve some way of querying GC interfaces
1062 * and relocating them. Perhaps doing some kind of device init in GC...
1063 *
1064 * @returns status code.
1065 * @param pDevIns Device instance of the APIC.
1066 * @param u8Dest See APIC implementation.
1067 * @param u8DestMode See APIC implementation.
1068 * @param u8DeliveryMode See APIC implementation.
1069 * @param iVector See APIC implementation.
1070 * @param u8Polarity See APIC implementation.
1071 * @param u8TriggerMode See APIC implementation.
1072 */
1073 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1074 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1075
1076 /**
1077 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1078 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1079 *
1080 * @returns status code.
1081 * @param pDevIns Device instance of the APIC.
1082 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1083 */
1084 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1085
1086 /** The name of the RC GetInterrupt entry point. */
1087 const char *pszGetInterruptRC;
1088 /** The name of the RC HasPendingIrq entry point. */
1089 const char *pszHasPendingIrqRC;
1090 /** The name of the RC SetBase entry point. */
1091 const char *pszSetBaseRC;
1092 /** The name of the RC GetBase entry point. */
1093 const char *pszGetBaseRC;
1094 /** The name of the RC SetTPR entry point. */
1095 const char *pszSetTPRRC;
1096 /** The name of the RC GetTPR entry point. */
1097 const char *pszGetTPRRC;
1098 /** The name of the RC WriteMSR entry point. */
1099 const char *pszWriteMSRRC;
1100 /** The name of the RC ReadMSR entry point. */
1101 const char *pszReadMSRRC;
1102 /** The name of the RC BusDeliver entry point. */
1103 const char *pszBusDeliverRC;
1104 /** The name of the RC LocalInterrupt entry point. */
1105 const char *pszLocalInterruptRC;
1106
1107 /** The name of the R0 GetInterrupt entry point. */
1108 const char *pszGetInterruptR0;
1109 /** The name of the R0 HasPendingIrq entry point. */
1110 const char *pszHasPendingIrqR0;
1111 /** The name of the R0 SetBase entry point. */
1112 const char *pszSetBaseR0;
1113 /** The name of the R0 GetBase entry point. */
1114 const char *pszGetBaseR0;
1115 /** The name of the R0 SetTPR entry point. */
1116 const char *pszSetTPRR0;
1117 /** The name of the R0 GetTPR entry point. */
1118 const char *pszGetTPRR0;
1119 /** The name of the R0 WriteMSR entry point. */
1120 const char *pszWriteMSRR0;
1121 /** The name of the R0 ReadMSR entry point. */
1122 const char *pszReadMSRR0;
1123 /** The name of the R0 BusDeliver entry point. */
1124 const char *pszBusDeliverR0;
1125 /** The name of the R0 LocalInterrupt entry point. */
1126 const char *pszLocalInterruptR0;
1127
1128} PDMAPICREG;
1129/** Pointer to an APIC registration structure. */
1130typedef PDMAPICREG *PPDMAPICREG;
1131
1132/** Current PDMAPICREG version number. */
1133#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1134
1135
1136/**
1137 * APIC version argument for pfnChangeFeature.
1138 */
1139typedef enum PDMAPICVERSION
1140{
1141 /** Invalid 0 entry. */
1142 PDMAPICVERSION_INVALID = 0,
1143 /** No APIC. */
1144 PDMAPICVERSION_NONE,
1145 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1146 PDMAPICVERSION_APIC,
1147 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1148 PDMAPICVERSION_X2APIC,
1149 /** The usual 32-bit paranoia. */
1150 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1151} PDMAPICVERSION;
1152
1153/**
1154 * APIC irq argument for SetInterruptFF.
1155 */
1156typedef enum PDMAPICIRQ
1157{
1158 /** Invalid 0 entry. */
1159 PDMAPICIRQ_INVALID = 0,
1160 /** Normal hardware interrupt. */
1161 PDMAPICIRQ_HARDWARE,
1162 /** NMI. */
1163 PDMAPICIRQ_NMI,
1164 /** SMI. */
1165 PDMAPICIRQ_SMI,
1166 /** ExtINT (HW interrupt via PIC). */
1167 PDMAPICIRQ_EXTINT,
1168 /** The usual 32-bit paranoia. */
1169 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1170} PDMAPICIRQ;
1171
1172
1173/**
1174 * APIC RC helpers.
1175 */
1176typedef struct PDMAPICHLPRC
1177{
1178 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1179 uint32_t u32Version;
1180
1181 /**
1182 * Set the interrupt force action flag.
1183 *
1184 * @param pDevIns Device instance of the APIC.
1185 * @param enmType IRQ type.
1186 * @param idCpu Virtual CPU to set flag upon.
1187 */
1188 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1189
1190 /**
1191 * Clear the interrupt force action flag.
1192 *
1193 * @param pDevIns Device instance of the APIC.
1194 * @param enmType IRQ type.
1195 * @param idCpu Virtual CPU to clear flag upon.
1196 */
1197 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1198
1199 /**
1200 * Modifies APIC-related bits in the CPUID feature mask.
1201 *
1202 * @param pDevIns Device instance of the APIC.
1203 * @param enmVersion Supported APIC version.
1204 */
1205 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1206
1207 /**
1208 * Acquires the PDM lock.
1209 *
1210 * @returns VINF_SUCCESS on success.
1211 * @returns rc if we failed to acquire the lock.
1212 * @param pDevIns The APIC device instance.
1213 * @param rc What to return if we fail to acquire the lock.
1214 */
1215 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1216
1217 /**
1218 * Releases the PDM lock.
1219 *
1220 * @param pDevIns The APIC device instance.
1221 */
1222 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1223
1224 /**
1225 * Get the virtual CPU id corresponding to the current EMT.
1226 *
1227 * @param pDevIns The APIC device instance.
1228 */
1229 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1230
1231 /** Just a safety precaution. */
1232 uint32_t u32TheEnd;
1233} PDMAPICHLPRC;
1234/** Pointer to APIC GC helpers. */
1235typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1236/** Pointer to const APIC helpers. */
1237typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1238
1239/** Current PDMAPICHLPRC version number. */
1240#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1241
1242
1243/**
1244 * APIC R0 helpers.
1245 */
1246typedef struct PDMAPICHLPR0
1247{
1248 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1249 uint32_t u32Version;
1250
1251 /**
1252 * Set the interrupt force action flag.
1253 *
1254 * @param pDevIns Device instance of the APIC.
1255 * @param enmType IRQ type.
1256 * @param idCpu Virtual CPU to set flag upon.
1257 */
1258 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1259
1260 /**
1261 * Clear the interrupt force action flag.
1262 *
1263 * @param pDevIns Device instance of the APIC.
1264 * @param enmType IRQ type.
1265 * @param idCpu Virtual CPU to clear flag upon.
1266 */
1267 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1268
1269 /**
1270 * Modifies APIC-related bits in the CPUID feature mask.
1271 *
1272 * @param pDevIns Device instance of the APIC.
1273 * @param enmVersion Supported APIC version.
1274 */
1275 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1276
1277 /**
1278 * Acquires the PDM lock.
1279 *
1280 * @returns VINF_SUCCESS on success.
1281 * @returns rc if we failed to acquire the lock.
1282 * @param pDevIns The APIC device instance.
1283 * @param rc What to return if we fail to acquire the lock.
1284 */
1285 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1286
1287 /**
1288 * Releases the PDM lock.
1289 *
1290 * @param pDevIns The APIC device instance.
1291 */
1292 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1293
1294 /**
1295 * Get the virtual CPU id corresponding to the current EMT.
1296 *
1297 * @param pDevIns The APIC device instance.
1298 */
1299 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1300
1301 /** Just a safety precaution. */
1302 uint32_t u32TheEnd;
1303} PDMAPICHLPR0;
1304/** Pointer to APIC GC helpers. */
1305typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1306/** Pointer to const APIC helpers. */
1307typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1308
1309/** Current PDMAPICHLPR0 version number. */
1310#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1311
1312/**
1313 * APIC R3 helpers.
1314 */
1315typedef struct PDMAPICHLPR3
1316{
1317 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1318 uint32_t u32Version;
1319
1320 /**
1321 * Set the interrupt force action flag.
1322 *
1323 * @param pDevIns Device instance of the APIC.
1324 * @param enmType IRQ type.
1325 * @param idCpu Virtual CPU to set flag upon.
1326 */
1327 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1328
1329 /**
1330 * Clear the interrupt force action flag.
1331 *
1332 * @param pDevIns Device instance of the APIC.
1333 * @param enmType IRQ type.
1334 * @param idCpu Virtual CPU to clear flag upon.
1335 */
1336 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1337
1338 /**
1339 * Modifies APIC-related bits in the CPUID feature mask.
1340 *
1341 * @param pDevIns Device instance of the APIC.
1342 * @param enmVersion Supported APIC version.
1343 */
1344 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1345
1346 /**
1347 * Get the virtual CPU id corresponding to the current EMT.
1348 *
1349 * @param pDevIns The APIC device instance.
1350 */
1351 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1352
1353 /**
1354 * Sends SIPI to given virtual CPU.
1355 *
1356 * @param pDevIns The APIC device instance.
1357 * @param idCpu Virtual CPU to perform SIPI on
1358 * @param iVector SIPI vector
1359 */
1360 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1361
1362 /**
1363 * Sends init IPI to given virtual CPU, should result in reset and
1364 * halting till SIPI.
1365 *
1366 * @param pDevIns The APIC device instance.
1367 * @param idCpu Virtual CPU to perform SIPI on
1368 */
1369 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1370
1371 /**
1372 * Gets the address of the RC APIC helpers.
1373 *
1374 * This should be called at both construction and relocation time
1375 * to obtain the correct address of the RC helpers.
1376 *
1377 * @returns GC pointer to the APIC helpers.
1378 * @param pDevIns Device instance of the APIC.
1379 */
1380 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1381
1382 /**
1383 * Gets the address of the R0 APIC helpers.
1384 *
1385 * This should be called at both construction and relocation time
1386 * to obtain the correct address of the R0 helpers.
1387 *
1388 * @returns R0 pointer to the APIC helpers.
1389 * @param pDevIns Device instance of the APIC.
1390 */
1391 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1392
1393 /**
1394 * Get the critical section used to synchronize the PICs, PCI and stuff.
1395 *
1396 * @returns Ring-3 pointer to the critical section.
1397 * @param pDevIns The APIC device instance.
1398 */
1399 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1400
1401 /**
1402 * Get the critical section used to synchronize the PICs, PCI and stuff.
1403 *
1404 * @returns Raw-mode context pointer to the critical section.
1405 * @param pDevIns The APIC device instance.
1406 */
1407 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1408
1409 /**
1410 * Get the critical section used to synchronize the PICs, PCI and stuff.
1411 *
1412 * @returns Ring-0 pointer to the critical section.
1413 * @param pDevIns The APIC device instance.
1414 */
1415 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1416
1417 /** Just a safety precaution. */
1418 uint32_t u32TheEnd;
1419} PDMAPICHLPR3;
1420/** Pointer to APIC helpers. */
1421typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1422/** Pointer to const APIC helpers. */
1423typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1424
1425/** Current PDMAPICHLP version number. */
1426#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1427
1428
1429/**
1430 * I/O APIC registration structure.
1431 */
1432typedef struct PDMIOAPICREG
1433{
1434 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1435 uint32_t u32Version;
1436
1437 /**
1438 * Set the an IRQ.
1439 *
1440 * @param pDevIns Device instance of the I/O APIC.
1441 * @param iIrq IRQ number to set.
1442 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1443 */
1444 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1445
1446 /** The name of the GC SetIrq entry point. */
1447 const char *pszSetIrqRC;
1448
1449 /** The name of the R0 SetIrq entry point. */
1450 const char *pszSetIrqR0;
1451} PDMIOAPICREG;
1452/** Pointer to an APIC registration structure. */
1453typedef PDMIOAPICREG *PPDMIOAPICREG;
1454
1455/** Current PDMAPICREG version number. */
1456#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 1, 0)
1457
1458
1459/**
1460 * IOAPIC RC helpers.
1461 */
1462typedef struct PDMIOAPICHLPRC
1463{
1464 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1465 uint32_t u32Version;
1466
1467 /**
1468 * Private interface between the IOAPIC and APIC.
1469 *
1470 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1471 *
1472 * @returns status code.
1473 * @param pDevIns Device instance of the IOAPIC.
1474 * @param u8Dest See APIC implementation.
1475 * @param u8DestMode See APIC implementation.
1476 * @param u8DeliveryMode See APIC implementation.
1477 * @param iVector See APIC implementation.
1478 * @param u8Polarity See APIC implementation.
1479 * @param u8TriggerMode See APIC implementation.
1480 */
1481 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1482 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1483
1484 /**
1485 * Acquires the PDM lock.
1486 *
1487 * @returns VINF_SUCCESS on success.
1488 * @returns rc if we failed to acquire the lock.
1489 * @param pDevIns The IOAPIC device instance.
1490 * @param rc What to return if we fail to acquire the lock.
1491 */
1492 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1493
1494 /**
1495 * Releases the PDM lock.
1496 *
1497 * @param pDevIns The IOAPIC device instance.
1498 */
1499 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1500
1501 /** Just a safety precaution. */
1502 uint32_t u32TheEnd;
1503} PDMIOAPICHLPRC;
1504/** Pointer to IOAPIC RC helpers. */
1505typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1506/** Pointer to const IOAPIC helpers. */
1507typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1508
1509/** Current PDMIOAPICHLPRC version number. */
1510#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1511
1512
1513/**
1514 * IOAPIC R0 helpers.
1515 */
1516typedef struct PDMIOAPICHLPR0
1517{
1518 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1519 uint32_t u32Version;
1520
1521 /**
1522 * Private interface between the IOAPIC and APIC.
1523 *
1524 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1525 *
1526 * @returns status code.
1527 * @param pDevIns Device instance of the IOAPIC.
1528 * @param u8Dest See APIC implementation.
1529 * @param u8DestMode See APIC implementation.
1530 * @param u8DeliveryMode See APIC implementation.
1531 * @param iVector See APIC implementation.
1532 * @param u8Polarity See APIC implementation.
1533 * @param u8TriggerMode See APIC implementation.
1534 */
1535 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1536 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1537
1538 /**
1539 * Acquires the PDM lock.
1540 *
1541 * @returns VINF_SUCCESS on success.
1542 * @returns rc if we failed to acquire the lock.
1543 * @param pDevIns The IOAPIC device instance.
1544 * @param rc What to return if we fail to acquire the lock.
1545 */
1546 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1547
1548 /**
1549 * Releases the PDM lock.
1550 *
1551 * @param pDevIns The IOAPIC device instance.
1552 */
1553 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1554
1555 /** Just a safety precaution. */
1556 uint32_t u32TheEnd;
1557} PDMIOAPICHLPR0;
1558/** Pointer to IOAPIC R0 helpers. */
1559typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1560/** Pointer to const IOAPIC helpers. */
1561typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1562
1563/** Current PDMIOAPICHLPR0 version number. */
1564#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1565
1566/**
1567 * IOAPIC R3 helpers.
1568 */
1569typedef struct PDMIOAPICHLPR3
1570{
1571 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1572 uint32_t u32Version;
1573
1574 /**
1575 * Private interface between the IOAPIC and APIC.
1576 *
1577 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1578 *
1579 * @returns status code
1580 * @param pDevIns Device instance of the IOAPIC.
1581 * @param u8Dest See APIC implementation.
1582 * @param u8DestMode See APIC implementation.
1583 * @param u8DeliveryMode See APIC implementation.
1584 * @param iVector See APIC implementation.
1585 * @param u8Polarity See APIC implementation.
1586 * @param u8TriggerMode See APIC implementation.
1587 */
1588 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1589 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1590
1591 /**
1592 * Acquires the PDM lock.
1593 *
1594 * @returns VINF_SUCCESS on success.
1595 * @returns Fatal error on failure.
1596 * @param pDevIns The IOAPIC device instance.
1597 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1598 */
1599 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1600
1601 /**
1602 * Releases the PDM lock.
1603 *
1604 * @param pDevIns The IOAPIC device instance.
1605 */
1606 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1607
1608 /**
1609 * Gets the address of the RC IOAPIC helpers.
1610 *
1611 * This should be called at both construction and relocation time
1612 * to obtain the correct address of the RC helpers.
1613 *
1614 * @returns RC pointer to the IOAPIC helpers.
1615 * @param pDevIns Device instance of the IOAPIC.
1616 */
1617 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1618
1619 /**
1620 * Gets the address of the R0 IOAPIC helpers.
1621 *
1622 * This should be called at both construction and relocation time
1623 * to obtain the correct address of the R0 helpers.
1624 *
1625 * @returns R0 pointer to the IOAPIC helpers.
1626 * @param pDevIns Device instance of the IOAPIC.
1627 */
1628 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1629
1630 /** Just a safety precaution. */
1631 uint32_t u32TheEnd;
1632} PDMIOAPICHLPR3;
1633/** Pointer to IOAPIC R3 helpers. */
1634typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1635/** Pointer to const IOAPIC helpers. */
1636typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1637
1638/** Current PDMIOAPICHLPR3 version number. */
1639#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1640
1641
1642/**
1643 * HPET registration structure.
1644 */
1645typedef struct PDMHPETREG
1646{
1647 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1648 uint32_t u32Version;
1649
1650} PDMHPETREG;
1651/** Pointer to an HPET registration structure. */
1652typedef PDMHPETREG *PPDMHPETREG;
1653
1654/** Current PDMHPETREG version number. */
1655#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1656
1657/**
1658 * HPET RC helpers.
1659 *
1660 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1661 * at some later point.
1662 */
1663typedef struct PDMHPETHLPRC
1664{
1665 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1666 uint32_t u32Version;
1667
1668 /** Just a safety precaution. */
1669 uint32_t u32TheEnd;
1670} PDMHPETHLPRC;
1671
1672/** Pointer to HPET RC helpers. */
1673typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1674/** Pointer to const HPET RC helpers. */
1675typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1676
1677/** Current PDMHPETHLPRC version number. */
1678#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1679
1680
1681/**
1682 * HPET R0 helpers.
1683 *
1684 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1685 * at some later point.
1686 */
1687typedef struct PDMHPETHLPR0
1688{
1689 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1690 uint32_t u32Version;
1691
1692 /** Just a safety precaution. */
1693 uint32_t u32TheEnd;
1694} PDMHPETHLPR0;
1695
1696/** Pointer to HPET R0 helpers. */
1697typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1698/** Pointer to const HPET R0 helpers. */
1699typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1700
1701/** Current PDMHPETHLPR0 version number. */
1702#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1703
1704/**
1705 * HPET R3 helpers.
1706 */
1707typedef struct PDMHPETHLPR3
1708{
1709 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1710 uint32_t u32Version;
1711
1712 /**
1713 * Gets the address of the RC HPET helpers.
1714 *
1715 * This should be called at both construction and relocation time
1716 * to obtain the correct address of the RC helpers.
1717 *
1718 * @returns RC pointer to the HPET helpers.
1719 * @param pDevIns Device instance of the HPET.
1720 */
1721 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1722
1723 /**
1724 * Gets the address of the R0 HPET helpers.
1725 *
1726 * This should be called at both construction and relocation time
1727 * to obtain the correct address of the R0 helpers.
1728 *
1729 * @returns R0 pointer to the HPET helpers.
1730 * @param pDevIns Device instance of the HPET.
1731 */
1732 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1733
1734 /**
1735 * Set legacy mode on PIT and RTC.
1736 *
1737 * @returns VINF_SUCCESS on success.
1738 * @returns rc if we failed to set legacy mode.
1739 * @param pDevIns Device instance of the HPET.
1740 * @param fActivated Whether legacy mode is activated or deactivated.
1741 */
1742 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1743
1744
1745 /**
1746 * Set IRQ, bypassing ISA bus override rules.
1747 *
1748 * @returns VINF_SUCCESS on success.
1749 * @returns rc if we failed to set legacy mode.
1750 * @param pDevIns Device instance of the HPET.
1751 * @param fActivate Activate or deactivate legacy mode.
1752 */
1753 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1754
1755 /** Just a safety precaution. */
1756 uint32_t u32TheEnd;
1757} PDMHPETHLPR3;
1758
1759/** Pointer to HPET R3 helpers. */
1760typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1761/** Pointer to const HPET R3 helpers. */
1762typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1763
1764/** Current PDMHPETHLPR3 version number. */
1765#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1766
1767
1768
1769#ifdef IN_RING3
1770
1771/**
1772 * DMA Transfer Handler.
1773 *
1774 * @returns Number of bytes transferred.
1775 * @param pDevIns Device instance of the DMA.
1776 * @param pvUser User pointer.
1777 * @param uChannel Channel number.
1778 * @param off DMA position.
1779 * @param cb Block size.
1780 */
1781typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1782/** Pointer to a FNDMATRANSFERHANDLER(). */
1783typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1784
1785/**
1786 * DMA Controller registration structure.
1787 */
1788typedef struct PDMDMAREG
1789{
1790 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1791 uint32_t u32Version;
1792
1793 /**
1794 * Execute pending transfers.
1795 *
1796 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1797 * @param pDevIns Device instance of the DMAC.
1798 */
1799 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1800
1801 /**
1802 * Register transfer function for DMA channel.
1803 *
1804 * @param pDevIns Device instance of the DMAC.
1805 * @param uChannel Channel number.
1806 * @param pfnTransferHandler Device specific transfer function.
1807 * @param pvUSer User pointer to be passed to the callback.
1808 */
1809 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1810
1811 /**
1812 * Read memory
1813 *
1814 * @returns Number of bytes read.
1815 * @param pDevIns Device instance of the DMAC.
1816 * @param pvBuffer Pointer to target buffer.
1817 * @param off DMA position.
1818 * @param cbBlock Block size.
1819 */
1820 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1821
1822 /**
1823 * Write memory
1824 *
1825 * @returns Number of bytes written.
1826 * @param pDevIns Device instance of the DMAC.
1827 * @param pvBuffer Memory to write.
1828 * @param off DMA position.
1829 * @param cbBlock Block size.
1830 */
1831 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1832
1833 /**
1834 * Set the DREQ line.
1835 *
1836 * @param pDevIns Device instance of the DMAC.
1837 * @param uChannel Channel number.
1838 * @param uLevel Level of the line.
1839 */
1840 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1841
1842 /**
1843 * Get channel mode
1844 *
1845 * @returns Channel mode.
1846 * @param pDevIns Device instance of the DMAC.
1847 * @param uChannel Channel number.
1848 */
1849 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1850
1851} PDMDMACREG;
1852/** Pointer to a DMAC registration structure. */
1853typedef PDMDMACREG *PPDMDMACREG;
1854
1855/** Current PDMDMACREG version number. */
1856#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
1857
1858
1859/**
1860 * DMA Controller device helpers.
1861 */
1862typedef struct PDMDMACHLP
1863{
1864 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1865 uint32_t u32Version;
1866
1867 /* to-be-defined */
1868
1869} PDMDMACHLP;
1870/** Pointer to DMAC helpers. */
1871typedef PDMDMACHLP *PPDMDMACHLP;
1872/** Pointer to const DMAC helpers. */
1873typedef const PDMDMACHLP *PCPDMDMACHLP;
1874
1875/** Current PDMDMACHLP version number. */
1876#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
1877
1878#endif /* IN_RING3 */
1879
1880
1881
1882/**
1883 * RTC registration structure.
1884 */
1885typedef struct PDMRTCREG
1886{
1887 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1888 uint32_t u32Version;
1889 uint32_t u32Alignment; /**< structure size alignment. */
1890
1891 /**
1892 * Write to a CMOS register and update the checksum if necessary.
1893 *
1894 * @returns VBox status code.
1895 * @param pDevIns Device instance of the RTC.
1896 * @param iReg The CMOS register index.
1897 * @param u8Value The CMOS register value.
1898 */
1899 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1900
1901 /**
1902 * Read a CMOS register.
1903 *
1904 * @returns VBox status code.
1905 * @param pDevIns Device instance of the RTC.
1906 * @param iReg The CMOS register index.
1907 * @param pu8Value Where to store the CMOS register value.
1908 */
1909 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1910
1911} PDMRTCREG;
1912/** Pointer to a RTC registration structure. */
1913typedef PDMRTCREG *PPDMRTCREG;
1914/** Pointer to a const RTC registration structure. */
1915typedef const PDMRTCREG *PCPDMRTCREG;
1916
1917/** Current PDMRTCREG version number. */
1918#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
1919
1920
1921/**
1922 * RTC device helpers.
1923 */
1924typedef struct PDMRTCHLP
1925{
1926 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1927 uint32_t u32Version;
1928
1929 /* to-be-defined */
1930
1931} PDMRTCHLP;
1932/** Pointer to RTC helpers. */
1933typedef PDMRTCHLP *PPDMRTCHLP;
1934/** Pointer to const RTC helpers. */
1935typedef const PDMRTCHLP *PCPDMRTCHLP;
1936
1937/** Current PDMRTCHLP version number. */
1938#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
1939
1940
1941
1942#ifdef IN_RING3
1943
1944/**
1945 * PDM Device API.
1946 */
1947typedef struct PDMDEVHLPR3
1948{
1949 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1950 uint32_t u32Version;
1951
1952 /**
1953 * Register a number of I/O ports with a device.
1954 *
1955 * These callbacks are of course for the host context (HC).
1956 * Register HC handlers before guest context (GC) handlers! There must be a
1957 * HC handler for every GC handler!
1958 *
1959 * @returns VBox status.
1960 * @param pDevIns The device instance to register the ports with.
1961 * @param Port First port number in the range.
1962 * @param cPorts Number of ports to register.
1963 * @param pvUser User argument.
1964 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1965 * @param pfnIn Pointer to function which is gonna handle IN operations.
1966 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1967 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1968 * @param pszDesc Pointer to description string. This must not be freed.
1969 */
1970 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1971 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1972 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1973
1974 /**
1975 * Register a number of I/O ports with a device for RC.
1976 *
1977 * These callbacks are for the raw-mode context (RC). Register ring-3 context
1978 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
1979 * for every RC handler!
1980 *
1981 * @returns VBox status.
1982 * @param pDevIns The device instance to register the ports with
1983 * and which RC module to resolve the names
1984 * against.
1985 * @param Port First port number in the range.
1986 * @param cPorts Number of ports to register.
1987 * @param pvUser User argument.
1988 * @param pszOut Name of the RC function which is gonna handle OUT operations.
1989 * @param pszIn Name of the RC function which is gonna handle IN operations.
1990 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
1991 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
1992 * @param pszDesc Pointer to description string. This must not be freed.
1993 */
1994 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1995 const char *pszOut, const char *pszIn,
1996 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1997
1998 /**
1999 * Register a number of I/O ports with a device.
2000 *
2001 * These callbacks are of course for the ring-0 host context (R0).
2002 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2003 *
2004 * @returns VBox status.
2005 * @param pDevIns The device instance to register the ports with.
2006 * @param Port First port number in the range.
2007 * @param cPorts Number of ports to register.
2008 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2009 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2010 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2011 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2012 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2013 * @param pszDesc Pointer to description string. This must not be freed.
2014 */
2015 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2016 const char *pszOut, const char *pszIn,
2017 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2018
2019 /**
2020 * Deregister I/O ports.
2021 *
2022 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2023 *
2024 * @returns VBox status.
2025 * @param pDevIns The device instance owning the ports.
2026 * @param Port First port number in the range.
2027 * @param cPorts Number of ports to deregister.
2028 */
2029 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2030
2031 /**
2032 * Register a Memory Mapped I/O (MMIO) region.
2033 *
2034 * These callbacks are of course for the ring-3 context (R3). Register HC
2035 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2036 * must be a R3 handler for every RC and R0 handler!
2037 *
2038 * @returns VBox status.
2039 * @param pDevIns The device instance to register the MMIO with.
2040 * @param GCPhysStart First physical address in the range.
2041 * @param cbRange The size of the range (in bytes).
2042 * @param pvUser User argument.
2043 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2044 * @param pfnRead Pointer to function which is gonna handle Read operations.
2045 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2046 * @param pszDesc Pointer to description string. This must not be freed.
2047 */
2048 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2049 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2050 const char *pszDesc));
2051
2052 /**
2053 * Register a Memory Mapped I/O (MMIO) region for GC.
2054 *
2055 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2056 * (R3) handlers before guest context handlers! There must be a R3 handler for
2057 * every RC handler!
2058 *
2059 * @returns VBox status.
2060 * @param pDevIns The device instance to register the MMIO with.
2061 * @param GCPhysStart First physical address in the range.
2062 * @param cbRange The size of the range (in bytes).
2063 * @param pvUser User argument.
2064 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2065 * @param pszRead Name of the RC function which is gonna handle Read operations.
2066 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2067 * @param pszDesc Obsolete. NULL is fine.
2068 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2069 */
2070 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2071 const char *pszWrite, const char *pszRead, const char *pszFill,
2072 const char *pszDesc));
2073
2074 /**
2075 * Register a Memory Mapped I/O (MMIO) region for R0.
2076 *
2077 * These callbacks are for the ring-0 host context (R0). Register ring-3
2078 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2079 * every R0 handler!
2080 *
2081 * @returns VBox status.
2082 * @param pDevIns The device instance to register the MMIO with.
2083 * @param GCPhysStart First physical address in the range.
2084 * @param cbRange The size of the range (in bytes).
2085 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2086 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2087 * @param pszRead Name of the RC function which is gonna handle Read operations.
2088 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2089 * @param pszDesc Obsolete. NULL is fine.
2090 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2091 */
2092 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2093 const char *pszWrite, const char *pszRead, const char *pszFill,
2094 const char *pszDesc));
2095
2096 /**
2097 * Deregister a Memory Mapped I/O (MMIO) region.
2098 *
2099 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2100 *
2101 * @returns VBox status.
2102 * @param pDevIns The device instance owning the MMIO region(s).
2103 * @param GCPhysStart First physical address in the range.
2104 * @param cbRange The size of the range (in bytes).
2105 */
2106 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2107
2108 /**
2109 * Allocate and register a MMIO2 region.
2110 *
2111 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2112 * RAM associated with a device. It is also non-shared memory with a
2113 * permanent ring-3 mapping and page backing (presently).
2114 *
2115 * @returns VBox status.
2116 * @param pDevIns The device instance.
2117 * @param iRegion The region number. Use the PCI region number as
2118 * this must be known to the PCI bus device too. If
2119 * it's not associated with the PCI device, then
2120 * any number up to UINT8_MAX is fine.
2121 * @param cb The size (in bytes) of the region.
2122 * @param fFlags Reserved for future use, must be zero.
2123 * @param ppv Where to store the address of the ring-3 mapping
2124 * of the memory.
2125 * @param pszDesc Pointer to description string. This must not be
2126 * freed.
2127 * @thread EMT.
2128 */
2129 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2130
2131 /**
2132 * Deregisters and frees a MMIO2 region.
2133 *
2134 * Any physical (and virtual) access handlers registered for the region must
2135 * be deregistered before calling this function.
2136 *
2137 * @returns VBox status code.
2138 * @param pDevIns The device instance.
2139 * @param iRegion The region number used during registration.
2140 * @thread EMT.
2141 */
2142 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2143
2144 /**
2145 * Maps a MMIO2 region into the physical memory space.
2146 *
2147 * A MMIO2 range may overlap with base memory if a lot of RAM
2148 * is configured for the VM, in which case we'll drop the base
2149 * memory pages. Presently we will make no attempt to preserve
2150 * anything that happens to be present in the base memory that
2151 * is replaced, this is of course incorrectly but it's too much
2152 * effort.
2153 *
2154 * @returns VBox status code.
2155 * @param pDevIns The device instance.
2156 * @param iRegion The region number used during registration.
2157 * @param GCPhys The physical address to map it at.
2158 * @thread EMT.
2159 */
2160 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2161
2162 /**
2163 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2164 *
2165 * @returns VBox status code.
2166 * @param pDevIns The device instance.
2167 * @param iRegion The region number used during registration.
2168 * @param GCPhys The physical address it's currently mapped at.
2169 * @thread EMT.
2170 */
2171 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2172
2173 /**
2174 * Maps a portion of an MMIO2 region into the hypervisor region.
2175 *
2176 * Callers of this API must never deregister the MMIO2 region before the
2177 * VM is powered off.
2178 *
2179 * @return VBox status code.
2180 * @param pDevIns The device owning the MMIO2 memory.
2181 * @param iRegion The region.
2182 * @param off The offset into the region. Will be rounded down
2183 * to closest page boundrary.
2184 * @param cb The number of bytes to map. Will be rounded up
2185 * to the closest page boundrary.
2186 * @param pszDesc Mapping description.
2187 * @param pRCPtr Where to store the RC address.
2188 */
2189 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2190 const char *pszDesc, PRTRCPTR pRCPtr));
2191
2192 /**
2193 * Maps a portion of an MMIO2 region into kernel space (host).
2194 *
2195 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2196 * or the VM is terminated.
2197 *
2198 * @return VBox status code.
2199 * @param pDevIns The device owning the MMIO2 memory.
2200 * @param iRegion The region.
2201 * @param off The offset into the region. Must be page
2202 * aligned.
2203 * @param cb The number of bytes to map. Must be page
2204 * aligned.
2205 * @param pszDesc Mapping description.
2206 * @param pR0Ptr Where to store the R0 address.
2207 */
2208 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2209 const char *pszDesc, PRTR0PTR pR0Ptr));
2210
2211 /**
2212 * Register a ROM (BIOS) region.
2213 *
2214 * It goes without saying that this is read-only memory. The memory region must be
2215 * in unassigned memory. I.e. from the top of the address space or on the PC in
2216 * the 0xa0000-0xfffff range.
2217 *
2218 * @returns VBox status.
2219 * @param pDevIns The device instance owning the ROM region.
2220 * @param GCPhysStart First physical address in the range.
2221 * Must be page aligned!
2222 * @param cbRange The size of the range (in bytes).
2223 * Must be page aligned!
2224 * @param pvBinary Pointer to the binary data backing the ROM image.
2225 * This must be cbRange bytes big.
2226 * It will be copied and doesn't have to stick around if fShadow is clear.
2227 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2228 * @param pszDesc Pointer to description string. This must not be freed.
2229 *
2230 * @remark There is no way to remove the rom, automatically on device cleanup or
2231 * manually from the device yet. At present I doubt we need such features...
2232 */
2233 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc));
2234
2235 /**
2236 * Changes the protection of shadowed ROM mapping.
2237 *
2238 * This is intented for use by the system BIOS, chipset or device in question to
2239 * change the protection of shadowed ROM code after init and on reset.
2240 *
2241 * @param pDevIns The device instance.
2242 * @param GCPhysStart Where the mapping starts.
2243 * @param cbRange The size of the mapping.
2244 * @param enmProt The new protection type.
2245 */
2246 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2247
2248 /**
2249 * Register a save state data unit.
2250 *
2251 * @returns VBox status.
2252 * @param pDevIns The device instance.
2253 * @param pszName Data unit name.
2254 * @param uInstance The instance identifier of the data unit.
2255 * This must together with the name be unique.
2256 * @param uVersion Data layout version number.
2257 * @param cbGuess The approximate amount of data in the unit.
2258 * Only for progress indicators.
2259 * @param pszBefore Name of data unit which we should be put in
2260 * front of. Optional (NULL).
2261 *
2262 * @param pfnLivePrep Prepare live save callback, optional.
2263 * @param pfnLiveExec Execute live save callback, optional.
2264 * @param pfnLiveVote Vote live save callback, optional.
2265 *
2266 * @param pfnSavePrep Prepare save callback, optional.
2267 * @param pfnSaveExec Execute save callback, optional.
2268 * @param pfnSaveDone Done save callback, optional.
2269 *
2270 * @param pfnLoadPrep Prepare load callback, optional.
2271 * @param pfnLoadExec Execute load callback, optional.
2272 * @param pfnLoadDone Done load callback, optional.
2273 */
2274 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2275 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2276 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2277 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2278
2279 /**
2280 * Creates a timer.
2281 *
2282 * @returns VBox status.
2283 * @param pDevIns The device instance.
2284 * @param enmClock The clock to use on this timer.
2285 * @param pfnCallback Callback function.
2286 * @param pvUser User argument for the callback.
2287 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2288 * @param pszDesc Pointer to description string which must stay around
2289 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2290 * @param ppTimer Where to store the timer on success.
2291 */
2292 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2293
2294 /**
2295 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2296 *
2297 * @returns pTime.
2298 * @param pDevIns The device instance.
2299 * @param pTime Where to store the time.
2300 */
2301 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2302
2303 /**
2304 * Read physical memory.
2305 *
2306 * @returns VINF_SUCCESS (for now).
2307 * @param pDevIns The device instance.
2308 * @param GCPhys Physical address start reading from.
2309 * @param pvBuf Where to put the read bits.
2310 * @param cbRead How many bytes to read.
2311 * @thread Any thread, but the call may involve the emulation thread.
2312 */
2313 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2314
2315 /**
2316 * Write to physical memory.
2317 *
2318 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2319 * @param pDevIns The device instance.
2320 * @param GCPhys Physical address to write to.
2321 * @param pvBuf What to write.
2322 * @param cbWrite How many bytes to write.
2323 * @thread Any thread, but the call may involve the emulation thread.
2324 */
2325 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2326
2327 /**
2328 * Requests the mapping of a guest page into ring-3.
2329 *
2330 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2331 * release it.
2332 *
2333 * This API will assume your intention is to write to the page, and will
2334 * therefore replace shared and zero pages. If you do not intend to modify the
2335 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2336 *
2337 * @returns VBox status code.
2338 * @retval VINF_SUCCESS on success.
2339 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2340 * backing or if the page has any active access handlers. The caller
2341 * must fall back on using PGMR3PhysWriteExternal.
2342 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2343 *
2344 * @param pVM The VM handle.
2345 * @param GCPhys The guest physical address of the page that
2346 * should be mapped.
2347 * @param fFlags Flags reserved for future use, MBZ.
2348 * @param ppv Where to store the address corresponding to
2349 * GCPhys.
2350 * @param pLock Where to store the lock information that
2351 * pfnPhysReleasePageMappingLock needs.
2352 *
2353 * @remark Avoid calling this API from within critical sections (other than the
2354 * PGM one) because of the deadlock risk when we have to delegating the
2355 * task to an EMT.
2356 * @thread Any.
2357 */
2358 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2359
2360 /**
2361 * Requests the mapping of a guest page into ring-3, external threads.
2362 *
2363 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2364 * release it.
2365 *
2366 * @returns VBox status code.
2367 * @retval VINF_SUCCESS on success.
2368 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2369 * backing or if the page as an active ALL access handler. The caller
2370 * must fall back on using PGMPhysRead.
2371 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2372 *
2373 * @param pDevIns The device instance.
2374 * @param GCPhys The guest physical address of the page that
2375 * should be mapped.
2376 * @param fFlags Flags reserved for future use, MBZ.
2377 * @param ppv Where to store the address corresponding to
2378 * GCPhys.
2379 * @param pLock Where to store the lock information that
2380 * pfnPhysReleasePageMappingLock needs.
2381 *
2382 * @remark Avoid calling this API from within critical sections.
2383 * @thread Any.
2384 */
2385 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2386
2387 /**
2388 * Release the mapping of a guest page.
2389 *
2390 * This is the counter part of pfnPhysGCPhys2CCPtr and
2391 * pfnPhysGCPhys2CCPtrReadOnly.
2392 *
2393 * @param pDevIns The device instance.
2394 * @param pLock The lock structure initialized by the mapping
2395 * function.
2396 */
2397 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2398
2399 /**
2400 * Read guest physical memory by virtual address.
2401 *
2402 * @param pDevIns The device instance.
2403 * @param pvDst Where to put the read bits.
2404 * @param GCVirtSrc Guest virtual address to start reading from.
2405 * @param cb How many bytes to read.
2406 * @thread The emulation thread.
2407 */
2408 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2409
2410 /**
2411 * Write to guest physical memory by virtual address.
2412 *
2413 * @param pDevIns The device instance.
2414 * @param GCVirtDst Guest virtual address to write to.
2415 * @param pvSrc What to write.
2416 * @param cb How many bytes to write.
2417 * @thread The emulation thread.
2418 */
2419 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2420
2421 /**
2422 * Convert a guest virtual address to a guest physical address.
2423 *
2424 * @returns VBox status code.
2425 * @param pDevIns The device instance.
2426 * @param GCPtr Guest virtual address.
2427 * @param pGCPhys Where to store the GC physical address
2428 * corresponding to GCPtr.
2429 * @thread The emulation thread.
2430 * @remark Careful with page boundraries.
2431 */
2432 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2433
2434 /**
2435 * Allocate memory which is associated with current VM instance
2436 * and automatically freed on it's destruction.
2437 *
2438 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2439 * @param pDevIns The device instance.
2440 * @param cb Number of bytes to allocate.
2441 */
2442 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2443
2444 /**
2445 * Allocate memory which is associated with current VM instance
2446 * and automatically freed on it's destruction. The memory is ZEROed.
2447 *
2448 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2449 * @param pDevIns The device instance.
2450 * @param cb Number of bytes to allocate.
2451 */
2452 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2453
2454 /**
2455 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2456 *
2457 * @param pDevIns The device instance.
2458 * @param pv Pointer to the memory to free.
2459 */
2460 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2461
2462 /**
2463 * Gets the VM state.
2464 *
2465 * @returns VM state.
2466 * @param pDevIns The device instance.
2467 * @thread Any thread (just keep in mind that it's volatile info).
2468 */
2469 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2470
2471 /**
2472 * Checks if the VM was teleported and hasn't been fully resumed yet.
2473 *
2474 * @returns true / false.
2475 * @param pDevIns The device instance.
2476 * @thread Any thread.
2477 */
2478 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2479
2480 /**
2481 * Set the VM error message
2482 *
2483 * @returns rc.
2484 * @param pDevIns The device instance.
2485 * @param rc VBox status code.
2486 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2487 * @param pszFormat Error message format string.
2488 * @param ... Error message arguments.
2489 */
2490 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2491
2492 /**
2493 * Set the VM error message
2494 *
2495 * @returns rc.
2496 * @param pDevIns The device instance.
2497 * @param rc VBox status code.
2498 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2499 * @param pszFormat Error message format string.
2500 * @param va Error message arguments.
2501 */
2502 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2503
2504 /**
2505 * Set the VM runtime error message
2506 *
2507 * @returns VBox status code.
2508 * @param pDevIns The device instance.
2509 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2510 * @param pszErrorId Error ID string.
2511 * @param pszFormat Error message format string.
2512 * @param ... Error message arguments.
2513 */
2514 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2515
2516 /**
2517 * Set the VM runtime error message
2518 *
2519 * @returns VBox status code.
2520 * @param pDevIns The device instance.
2521 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2522 * @param pszErrorId Error ID string.
2523 * @param pszFormat Error message format string.
2524 * @param va Error message arguments.
2525 */
2526 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2527
2528 /**
2529 * Stops the VM and enters the debugger to look at the guest state.
2530 *
2531 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2532 * invoking this function directly.
2533 *
2534 * @returns VBox status code which must be passed up to the VMM.
2535 * @param pDevIns The device instance.
2536 * @param pszFile Filename of the assertion location.
2537 * @param iLine The linenumber of the assertion location.
2538 * @param pszFunction Function of the assertion location.
2539 * @param pszFormat Message. (optional)
2540 * @param args Message parameters.
2541 */
2542 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2543
2544 /**
2545 * Register a info handler with DBGF,
2546 *
2547 * @returns VBox status code.
2548 * @param pDevIns The device instance.
2549 * @param pszName The identifier of the info.
2550 * @param pszDesc The description of the info and any arguments
2551 * the handler may take.
2552 * @param pfnHandler The handler function to be called to display the
2553 * info.
2554 */
2555 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2556
2557 /**
2558 * Registers a statistics sample if statistics are enabled.
2559 *
2560 * @param pDevIns Device instance of the DMA.
2561 * @param pvSample Pointer to the sample.
2562 * @param enmType Sample type. This indicates what pvSample is
2563 * pointing at.
2564 * @param pszName Sample name. The name is on this form
2565 * "/<component>/<sample>". Further nesting is
2566 * possible.
2567 * @param enmUnit Sample unit.
2568 * @param pszDesc Sample description.
2569 */
2570 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2571
2572 /**
2573 * Same as pfnSTAMRegister except that the name is specified in a
2574 * RTStrPrintf like fashion.
2575 *
2576 * @returns VBox status.
2577 * @param pDevIns Device instance of the DMA.
2578 * @param pvSample Pointer to the sample.
2579 * @param enmType Sample type. This indicates what pvSample is
2580 * pointing at.
2581 * @param enmVisibility Visibility type specifying whether unused
2582 * statistics should be visible or not.
2583 * @param enmUnit Sample unit.
2584 * @param pszDesc Sample description.
2585 * @param pszName The sample name format string.
2586 * @param ... Arguments to the format string.
2587 */
2588 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2589 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2590
2591 /**
2592 * Same as pfnSTAMRegister except that the name is specified in a
2593 * RTStrPrintfV like fashion.
2594 *
2595 * @returns VBox status.
2596 * @param pDevIns Device instance of the DMA.
2597 * @param pvSample Pointer to the sample.
2598 * @param enmType Sample type. This indicates what pvSample is
2599 * pointing at.
2600 * @param enmVisibility Visibility type specifying whether unused
2601 * statistics should be visible or not.
2602 * @param enmUnit Sample unit.
2603 * @param pszDesc Sample description.
2604 * @param pszName The sample name format string.
2605 * @param args Arguments to the format string.
2606 */
2607 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2608 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2609
2610 /**
2611 * Registers the device with the default PCI bus.
2612 *
2613 * @returns VBox status code.
2614 * @param pDevIns The device instance.
2615 * @param pPciDev The PCI device structure.
2616 * Any PCI enabled device must keep this in it's instance data!
2617 * Fill in the PCI data config before registration, please.
2618 * @remark This is the simple interface, a Ex interface will be created if
2619 * more features are needed later.
2620 */
2621 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2622
2623 /**
2624 * Initialize MSI support in a PCI device.
2625 *
2626 * @returns VBox status code.
2627 * @param pDevIns The device instance.
2628 * @param pMsiReg MSI registartion structure.
2629 */
2630 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2631
2632 /**
2633 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2634 *
2635 * @returns VBox status code.
2636 * @param pDevIns The device instance.
2637 * @param iRegion The region number.
2638 * @param cbRegion Size of the region.
2639 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2640 * @param pfnCallback Callback for doing the mapping.
2641 */
2642 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2643
2644 /**
2645 * Register PCI configuration space read/write callbacks.
2646 *
2647 * @param pDevIns The device instance.
2648 * @param pPciDev The PCI device structure.
2649 * If NULL the default PCI device for this device instance is used.
2650 * @param pfnRead Pointer to the user defined PCI config read function.
2651 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2652 * PCI config read function. This way, user can decide when (and if)
2653 * to call default PCI config read function. Can be NULL.
2654 * @param pfnWrite Pointer to the user defined PCI config write function.
2655 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2656 * PCI config write function. This way, user can decide when (and if)
2657 * to call default PCI config write function. Can be NULL.
2658 * @thread EMT
2659 */
2660 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2661 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2662
2663 /**
2664 * Set the IRQ for a PCI device.
2665 *
2666 * @param pDevIns The device instance.
2667 * @param iIrq IRQ number to set.
2668 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2669 * @thread Any thread, but will involve the emulation thread.
2670 */
2671 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2672
2673 /**
2674 * Set the IRQ for a PCI device, but don't wait for EMT to process
2675 * the request when not called from EMT.
2676 *
2677 * @param pDevIns The device instance.
2678 * @param iIrq IRQ number to set.
2679 * @param iLevel IRQ level.
2680 * @thread Any thread, but will involve the emulation thread.
2681 */
2682 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2683
2684 /**
2685 * Set ISA IRQ for a device.
2686 *
2687 * @param pDevIns The device instance.
2688 * @param iIrq IRQ number to set.
2689 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2690 * @thread Any thread, but will involve the emulation thread.
2691 */
2692 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2693
2694 /**
2695 * Set the ISA IRQ for a device, but don't wait for EMT to process
2696 * the request when not called from EMT.
2697 *
2698 * @param pDevIns The device instance.
2699 * @param iIrq IRQ number to set.
2700 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2701 * @thread Any thread, but will involve the emulation thread.
2702 */
2703 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2704
2705 /**
2706 * Attaches a driver (chain) to the device.
2707 *
2708 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2709 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2710 *
2711 * @returns VBox status code.
2712 * @param pDevIns The device instance.
2713 * @param iLun The logical unit to attach.
2714 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2715 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2716 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2717 * for the live of the device instance.
2718 */
2719 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2720
2721 /**
2722 * Create a queue.
2723 *
2724 * @returns VBox status code.
2725 * @param pDevIns The device instance.
2726 * @param cbItem The size of a queue item.
2727 * @param cItems The number of items in the queue.
2728 * @param cMilliesInterval The number of milliseconds between polling the queue.
2729 * If 0 then the emulation thread will be notified whenever an item arrives.
2730 * @param pfnCallback The consumer function.
2731 * @param fRZEnabled Set if the queue should work in RC and R0.
2732 * @param pszName The queue base name. The instance number will be
2733 * appended automatically.
2734 * @param ppQueue Where to store the queue handle on success.
2735 * @thread The emulation thread.
2736 */
2737 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2738 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2739
2740 /**
2741 * Initializes a PDM critical section.
2742 *
2743 * The PDM critical sections are derived from the IPRT critical sections, but
2744 * works in RC and R0 as well.
2745 *
2746 * @returns VBox status code.
2747 * @param pDevIns The device instance.
2748 * @param pCritSect Pointer to the critical section.
2749 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2750 * @param pszNameFmt Format string for namging the critical section.
2751 * For statistics and lock validation.
2752 * @param va Arguments for the format string.
2753 */
2754 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2755 const char *pszNameFmt, va_list va));
2756
2757 /**
2758 * Creates a PDM thread.
2759 *
2760 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2761 * resuming, and destroying the thread as the VM state changes.
2762 *
2763 * @returns VBox status code.
2764 * @param pDevIns The device instance.
2765 * @param ppThread Where to store the thread 'handle'.
2766 * @param pvUser The user argument to the thread function.
2767 * @param pfnThread The thread function.
2768 * @param pfnWakeup The wakup callback. This is called on the EMT
2769 * thread when a state change is pending.
2770 * @param cbStack See RTThreadCreate.
2771 * @param enmType See RTThreadCreate.
2772 * @param pszName See RTThreadCreate.
2773 */
2774 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2775 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2776
2777 /**
2778 * Set up asynchronous handling of a suspend, reset or power off notification.
2779 *
2780 * This shall only be called when getting the notification. It must be called
2781 * for each one.
2782 *
2783 * @returns VBox status code.
2784 * @param pDevIns The device instance.
2785 * @param pfnAsyncNotify The callback.
2786 * @thread EMT(0)
2787 */
2788 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
2789
2790 /**
2791 * Notify EMT(0) that the device has completed the asynchronous notification
2792 * handling.
2793 *
2794 * This can be called at any time, spurious calls will simply be ignored.
2795 *
2796 * @param pDevIns The device instance.
2797 * @thread Any
2798 */
2799 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
2800
2801 /**
2802 * Register the RTC device.
2803 *
2804 * @returns VBox status code.
2805 * @param pDevIns The device instance.
2806 * @param pRtcReg Pointer to a RTC registration structure.
2807 * @param ppRtcHlp Where to store the pointer to the helper
2808 * functions.
2809 */
2810 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2811
2812 /**
2813 * Register the PCI Bus.
2814 *
2815 * @returns VBox status code.
2816 * @param pDevIns The device instance.
2817 * @param pPciBusReg Pointer to PCI bus registration structure.
2818 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
2819 * helpers.
2820 */
2821 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2822
2823 /**
2824 * Register the PIC device.
2825 *
2826 * @returns VBox status code.
2827 * @param pDevIns The device instance.
2828 * @param pPicReg Pointer to a PIC registration structure.
2829 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
2830 * helpers.
2831 */
2832 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2833
2834 /**
2835 * Register the APIC device.
2836 *
2837 * @returns VBox status code.
2838 * @param pDevIns The device instance.
2839 * @param pApicReg Pointer to a APIC registration structure.
2840 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2841 */
2842 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2843
2844 /**
2845 * Register the I/O APIC device.
2846 *
2847 * @returns VBox status code.
2848 * @param pDevIns The device instance.
2849 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2850 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
2851 * helpers.
2852 */
2853 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2854
2855 /**
2856 * Register the HPET device.
2857 *
2858 * @returns VBox status code.
2859 * @param pDevIns The device instance.
2860 * @param pHpetReg Pointer to a HPET registration structure.
2861 * @param ppHpetHlpR3 Where to store the pointer to the HPET
2862 * helpers.
2863 */
2864 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
2865
2866 /**
2867 * Register the DMA device.
2868 *
2869 * @returns VBox status code.
2870 * @param pDevIns The device instance.
2871 * @param pDmacReg Pointer to a DMAC registration structure.
2872 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2873 */
2874 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2875
2876 /**
2877 * Register transfer function for DMA channel.
2878 *
2879 * @returns VBox status code.
2880 * @param pDevIns The device instance.
2881 * @param uChannel Channel number.
2882 * @param pfnTransferHandler Device specific transfer callback function.
2883 * @param pvUser User pointer to pass to the callback.
2884 * @thread EMT
2885 */
2886 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2887
2888 /**
2889 * Read memory.
2890 *
2891 * @returns VBox status code.
2892 * @param pDevIns The device instance.
2893 * @param uChannel Channel number.
2894 * @param pvBuffer Pointer to target buffer.
2895 * @param off DMA position.
2896 * @param cbBlock Block size.
2897 * @param pcbRead Where to store the number of bytes which was
2898 * read. optional.
2899 * @thread EMT
2900 */
2901 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2902
2903 /**
2904 * Write memory.
2905 *
2906 * @returns VBox status code.
2907 * @param pDevIns The device instance.
2908 * @param uChannel Channel number.
2909 * @param pvBuffer Memory to write.
2910 * @param off DMA position.
2911 * @param cbBlock Block size.
2912 * @param pcbWritten Where to store the number of bytes which was
2913 * written. optional.
2914 * @thread EMT
2915 */
2916 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2917
2918 /**
2919 * Set the DREQ line.
2920 *
2921 * @returns VBox status code.
2922 * @param pDevIns Device instance.
2923 * @param uChannel Channel number.
2924 * @param uLevel Level of the line.
2925 * @thread EMT
2926 */
2927 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2928
2929 /**
2930 * Get channel mode.
2931 *
2932 * @returns Channel mode. See specs.
2933 * @param pDevIns The device instance.
2934 * @param uChannel Channel number.
2935 * @thread EMT
2936 */
2937 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2938
2939 /**
2940 * Schedule DMA execution.
2941 *
2942 * @param pDevIns The device instance.
2943 * @thread Any thread.
2944 */
2945 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2946
2947 /**
2948 * Write CMOS value and update the checksum(s).
2949 *
2950 * @returns VBox status code.
2951 * @param pDevIns The device instance.
2952 * @param iReg The CMOS register index.
2953 * @param u8Value The CMOS register value.
2954 * @thread EMT
2955 */
2956 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2957
2958 /**
2959 * Read CMOS value.
2960 *
2961 * @returns VBox status code.
2962 * @param pDevIns The device instance.
2963 * @param iReg The CMOS register index.
2964 * @param pu8Value Where to store the CMOS register value.
2965 * @thread EMT
2966 */
2967 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2968
2969 /**
2970 * Assert that the current thread is the emulation thread.
2971 *
2972 * @returns True if correct.
2973 * @returns False if wrong.
2974 * @param pDevIns The device instance.
2975 * @param pszFile Filename of the assertion location.
2976 * @param iLine The linenumber of the assertion location.
2977 * @param pszFunction Function of the assertion location.
2978 */
2979 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2980
2981 /**
2982 * Assert that the current thread is NOT the emulation thread.
2983 *
2984 * @returns True if correct.
2985 * @returns False if wrong.
2986 * @param pDevIns The device instance.
2987 * @param pszFile Filename of the assertion location.
2988 * @param iLine The linenumber of the assertion location.
2989 * @param pszFunction Function of the assertion location.
2990 */
2991 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2992
2993 /**
2994 * Resolves the symbol for a raw-mode context interface.
2995 *
2996 * @returns VBox status code.
2997 * @param pDevIns The device instance.
2998 * @param pvInterface The interface structure.
2999 * @param cbInterface The size of the interface structure.
3000 * @param pszSymPrefix What to prefix the symbols in the list with
3001 * before resolving them. This must start with
3002 * 'dev' and contain the driver name.
3003 * @param pszSymList List of symbols corresponding to the interface.
3004 * There is generally a there is generally a define
3005 * holding this list associated with the interface
3006 * definition (INTERFACE_SYM_LIST). For more
3007 * details see PDMR3LdrGetInterfaceSymbols.
3008 * @thread EMT
3009 */
3010 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3011 const char *pszSymPrefix, const char *pszSymList));
3012
3013 /**
3014 * Resolves the symbol for a ring-0 context interface.
3015 *
3016 * @returns VBox status code.
3017 * @param pDevIns The device instance.
3018 * @param pvInterface The interface structure.
3019 * @param cbInterface The size of the interface structure.
3020 * @param pszSymPrefix What to prefix the symbols in the list with
3021 * before resolving them. This must start with
3022 * 'dev' and contain the driver name.
3023 * @param pszSymList List of symbols corresponding to the interface.
3024 * There is generally a there is generally a define
3025 * holding this list associated with the interface
3026 * definition (INTERFACE_SYM_LIST). For more
3027 * details see PDMR3LdrGetInterfaceSymbols.
3028 * @thread EMT
3029 */
3030 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3031 const char *pszSymPrefix, const char *pszSymList));
3032
3033 /**
3034 * Call the ring-0 request handler routine of the device.
3035 *
3036 * For this to work, the device must be ring-0 enabled and export a request
3037 * handler function. The name of the function must be the device name in
3038 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3039 * 'ReqHandler'. The device name will be captialized. It shall take the
3040 * exact same arguments as this function and be declared using
3041 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3042 *
3043 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3044 * or two as the handler address will be resolved on each invocation. This
3045 * is the reason for the EMT only restriction as well.
3046 *
3047 * @returns VBox status code.
3048 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3049 * handler function.
3050 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3051 *
3052 * @param pDevIns The device instance.
3053 * @param uOperation The operation to perform.
3054 * @param u64Arg 64-bit integer argument.
3055 * @thread EMT
3056 */
3057 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3058
3059 /** Space reserved for future members.
3060 * @{ */
3061 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3062 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3063 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3064 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3065 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3066 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3067 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3068 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3069 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3070 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3071 /** @} */
3072
3073
3074 /** API available to trusted devices only.
3075 *
3076 * These APIs are providing unrestricted access to the guest and the VM,
3077 * or they are interacting intimately with PDM.
3078 *
3079 * @{
3080 */
3081 /**
3082 * Gets the VM handle. Restricted API.
3083 *
3084 * @returns VM Handle.
3085 * @param pDevIns The device instance.
3086 */
3087 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3088
3089 /**
3090 * Gets the VMCPU handle. Restricted API.
3091 *
3092 * @returns VMCPU Handle.
3093 * @param pDevIns The device instance.
3094 */
3095 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3096
3097 /**
3098 * Registers the VMM device heap
3099 *
3100 * @returns VBox status code.
3101 * @param pDevIns The device instance.
3102 * @param GCPhys The physical address.
3103 * @param pvHeap Ring 3 heap pointer.
3104 * @param cbSize Size of the heap.
3105 * @thread EMT.
3106 */
3107 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3108
3109 /**
3110 * Unregisters the VMM device heap
3111 *
3112 * @returns VBox status code.
3113 * @param pDevIns The device instance.
3114 * @param GCPhys The physical address.
3115 * @thread EMT.
3116 */
3117 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3118
3119 /**
3120 * Resets the VM.
3121 *
3122 * @returns The appropriate VBox status code to pass around on reset.
3123 * @param pDevIns The device instance.
3124 * @thread The emulation thread.
3125 */
3126 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3127
3128 /**
3129 * Suspends the VM.
3130 *
3131 * @returns The appropriate VBox status code to pass around on suspend.
3132 * @param pDevIns The device instance.
3133 * @thread The emulation thread.
3134 */
3135 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3136
3137 /**
3138 * Suspends, saves and powers off the VM.
3139 *
3140 * @returns The appropriate VBox status code to pass around.
3141 * @param pDevIns The device instance.
3142 * @thread An emulation thread.
3143 */
3144 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3145
3146 /**
3147 * Power off the VM.
3148 *
3149 * @returns The appropriate VBox status code to pass around on power off.
3150 * @param pDevIns The device instance.
3151 * @thread The emulation thread.
3152 */
3153 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3154
3155 /**
3156 * Checks if the Gate A20 is enabled or not.
3157 *
3158 * @returns true if A20 is enabled.
3159 * @returns false if A20 is disabled.
3160 * @param pDevIns The device instance.
3161 * @thread The emulation thread.
3162 */
3163 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3164
3165 /**
3166 * Enables or disables the Gate A20.
3167 *
3168 * @param pDevIns The device instance.
3169 * @param fEnable Set this flag to enable the Gate A20; clear it
3170 * to disable.
3171 * @thread The emulation thread.
3172 */
3173 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3174
3175 /**
3176 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3177 * thread.
3178 *
3179 * @param pDevIns The device instance.
3180 * @param iLeaf The CPUID leaf to get.
3181 * @param pEax Where to store the EAX value.
3182 * @param pEbx Where to store the EBX value.
3183 * @param pEcx Where to store the ECX value.
3184 * @param pEdx Where to store the EDX value.
3185 * @thread EMT.
3186 */
3187 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3188
3189 /** @} */
3190
3191 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3192 uint32_t u32TheEnd;
3193} PDMDEVHLPR3;
3194#endif /* !IN_RING3 */
3195/** Pointer to the R3 PDM Device API. */
3196typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3197/** Pointer to the R3 PDM Device API, const variant. */
3198typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3199
3200/** Current PDMDEVHLPR3 version number. */
3201#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 3, 0)
3202
3203
3204/**
3205 * PDM Device API - RC Variant.
3206 */
3207typedef struct PDMDEVHLPRC
3208{
3209 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3210 uint32_t u32Version;
3211
3212 /**
3213 * Set the IRQ for a PCI device.
3214 *
3215 * @param pDevIns Device instance.
3216 * @param iIrq IRQ number to set.
3217 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3218 * @thread Any thread, but will involve the emulation thread.
3219 */
3220 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3221
3222 /**
3223 * Set ISA IRQ for a device.
3224 *
3225 * @param pDevIns Device instance.
3226 * @param iIrq IRQ number to set.
3227 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3228 * @thread Any thread, but will involve the emulation thread.
3229 */
3230 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3231
3232 /**
3233 * Read physical memory.
3234 *
3235 * @returns VINF_SUCCESS (for now).
3236 * @param pDevIns Device instance.
3237 * @param GCPhys Physical address start reading from.
3238 * @param pvBuf Where to put the read bits.
3239 * @param cbRead How many bytes to read.
3240 */
3241 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3242
3243 /**
3244 * Write to physical memory.
3245 *
3246 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3247 * @param pDevIns Device instance.
3248 * @param GCPhys Physical address to write to.
3249 * @param pvBuf What to write.
3250 * @param cbWrite How many bytes to write.
3251 */
3252 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3253
3254 /**
3255 * Checks if the Gate A20 is enabled or not.
3256 *
3257 * @returns true if A20 is enabled.
3258 * @returns false if A20 is disabled.
3259 * @param pDevIns Device instance.
3260 * @thread The emulation thread.
3261 */
3262 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3263
3264 /**
3265 * Gets the VM state.
3266 *
3267 * @returns VM state.
3268 * @param pDevIns The device instance.
3269 * @thread Any thread (just keep in mind that it's volatile info).
3270 */
3271 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3272
3273 /**
3274 * Set the VM error message
3275 *
3276 * @returns rc.
3277 * @param pDrvIns Driver instance.
3278 * @param rc VBox status code.
3279 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3280 * @param pszFormat Error message format string.
3281 * @param ... Error message arguments.
3282 */
3283 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3284
3285 /**
3286 * Set the VM error message
3287 *
3288 * @returns rc.
3289 * @param pDrvIns Driver instance.
3290 * @param rc VBox status code.
3291 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3292 * @param pszFormat Error message format string.
3293 * @param va Error message arguments.
3294 */
3295 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3296
3297 /**
3298 * Set the VM runtime error message
3299 *
3300 * @returns VBox status code.
3301 * @param pDevIns Device instance.
3302 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3303 * @param pszErrorId Error ID string.
3304 * @param pszFormat Error message format string.
3305 * @param ... Error message arguments.
3306 */
3307 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3308
3309 /**
3310 * Set the VM runtime error message
3311 *
3312 * @returns VBox status code.
3313 * @param pDevIns Device instance.
3314 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3315 * @param pszErrorId Error ID string.
3316 * @param pszFormat Error message format string.
3317 * @param va Error message arguments.
3318 */
3319 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3320
3321 /**
3322 * Set parameters for pending MMIO patch operation
3323 *
3324 * @returns VBox status code.
3325 * @param pDevIns Device instance.
3326 * @param GCPhys MMIO physical address
3327 * @param pCachedData GC pointer to cached data
3328 */
3329 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3330
3331 /**
3332 * Gets the VM handle. Restricted API.
3333 *
3334 * @returns VM Handle.
3335 * @param pDevIns Device instance.
3336 */
3337 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3338
3339 /**
3340 * Gets the VMCPU handle. Restricted API.
3341 *
3342 * @returns VMCPU Handle.
3343 * @param pDevIns The device instance.
3344 */
3345 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3346
3347 /** Just a safety precaution. */
3348 uint32_t u32TheEnd;
3349} PDMDEVHLPRC;
3350/** Pointer PDM Device RC API. */
3351typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3352/** Pointer PDM Device RC API. */
3353typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3354
3355/** Current PDMDEVHLP version number. */
3356#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 1, 0)
3357
3358
3359/**
3360 * PDM Device API - R0 Variant.
3361 */
3362typedef struct PDMDEVHLPR0
3363{
3364 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3365 uint32_t u32Version;
3366
3367 /**
3368 * Set the IRQ for a PCI device.
3369 *
3370 * @param pDevIns Device instance.
3371 * @param iIrq IRQ number to set.
3372 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3373 * @thread Any thread, but will involve the emulation thread.
3374 */
3375 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3376
3377 /**
3378 * Set ISA IRQ for a device.
3379 *
3380 * @param pDevIns Device instance.
3381 * @param iIrq IRQ number to set.
3382 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3383 * @thread Any thread, but will involve the emulation thread.
3384 */
3385 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3386
3387 /**
3388 * Read physical memory.
3389 *
3390 * @returns VINF_SUCCESS (for now).
3391 * @param pDevIns Device instance.
3392 * @param GCPhys Physical address start reading from.
3393 * @param pvBuf Where to put the read bits.
3394 * @param cbRead How many bytes to read.
3395 */
3396 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3397
3398 /**
3399 * Write to physical memory.
3400 *
3401 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3402 * @param pDevIns Device instance.
3403 * @param GCPhys Physical address to write to.
3404 * @param pvBuf What to write.
3405 * @param cbWrite How many bytes to write.
3406 */
3407 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3408
3409 /**
3410 * Checks if the Gate A20 is enabled or not.
3411 *
3412 * @returns true if A20 is enabled.
3413 * @returns false if A20 is disabled.
3414 * @param pDevIns Device instance.
3415 * @thread The emulation thread.
3416 */
3417 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3418
3419 /**
3420 * Gets the VM state.
3421 *
3422 * @returns VM state.
3423 * @param pDevIns The device instance.
3424 * @thread Any thread (just keep in mind that it's volatile info).
3425 */
3426 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3427
3428 /**
3429 * Set the VM error message
3430 *
3431 * @returns rc.
3432 * @param pDrvIns Driver instance.
3433 * @param rc VBox status code.
3434 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3435 * @param pszFormat Error message format string.
3436 * @param ... Error message arguments.
3437 */
3438 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3439
3440 /**
3441 * Set the VM error message
3442 *
3443 * @returns rc.
3444 * @param pDrvIns Driver instance.
3445 * @param rc VBox status code.
3446 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3447 * @param pszFormat Error message format string.
3448 * @param va Error message arguments.
3449 */
3450 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3451
3452 /**
3453 * Set the VM runtime error message
3454 *
3455 * @returns VBox status code.
3456 * @param pDevIns Device instance.
3457 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3458 * @param pszErrorId Error ID string.
3459 * @param pszFormat Error message format string.
3460 * @param ... Error message arguments.
3461 */
3462 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3463
3464 /**
3465 * Set the VM runtime error message
3466 *
3467 * @returns VBox status code.
3468 * @param pDevIns Device instance.
3469 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3470 * @param pszErrorId Error ID string.
3471 * @param pszFormat Error message format string.
3472 * @param va Error message arguments.
3473 */
3474 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3475
3476 /**
3477 * Set parameters for pending MMIO patch operation
3478 *
3479 * @returns rc.
3480 * @param pDevIns Device instance.
3481 * @param GCPhys MMIO physical address
3482 * @param pCachedData GC pointer to cached data
3483 */
3484 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3485
3486 /**
3487 * Gets the VM handle. Restricted API.
3488 *
3489 * @returns VM Handle.
3490 * @param pDevIns Device instance.
3491 */
3492 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3493
3494 /**
3495 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3496 *
3497 * @returns true = yes, false = no
3498 * @param pDevIns Device instance.
3499 */
3500 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3501
3502 /**
3503 * Gets the VMCPU handle. Restricted API.
3504 *
3505 * @returns VMCPU Handle.
3506 * @param pDevIns The device instance.
3507 */
3508 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3509
3510 /** Just a safety precaution. */
3511 uint32_t u32TheEnd;
3512} PDMDEVHLPR0;
3513/** Pointer PDM Device R0 API. */
3514typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3515/** Pointer PDM Device GC API. */
3516typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3517
3518/** Current PDMDEVHLP version number. */
3519#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1, 0)
3520
3521
3522
3523/**
3524 * PDM Device Instance.
3525 */
3526typedef struct PDMDEVINS
3527{
3528 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3529 uint32_t u32Version;
3530 /** Device instance number. */
3531 uint32_t iInstance;
3532
3533 /** Pointer the GC PDM Device API. */
3534 PCPDMDEVHLPRC pHlpRC;
3535 /** Pointer to device instance data. */
3536 RTRCPTR pvInstanceDataRC;
3537 /** The critical section for the device, see pCritSectR3.
3538 * This is automatically resolved by PDM when pCritSectR3 is set by the
3539 * constructor. */
3540 RCPTRTYPE(PPDMCRITSECT) pCritSectRC;
3541 /** Alignment padding. */
3542 RTRCPTR pAlignmentRC;
3543
3544 /** Pointer the R0 PDM Device API. */
3545 PCPDMDEVHLPR0 pHlpR0;
3546 /** Pointer to device instance data (R0). */
3547 RTR0PTR pvInstanceDataR0;
3548 /** The critical section for the device, see pCritSectR3.
3549 * This is automatically resolved by PDM when pCritSectR3 is set by the
3550 * constructor. */
3551 R0PTRTYPE(PPDMCRITSECT) pCritSectR0;
3552
3553 /** Pointer the HC PDM Device API. */
3554 PCPDMDEVHLPR3 pHlpR3;
3555 /** Pointer to device instance data. */
3556 RTR3PTR pvInstanceDataR3;
3557 /** The critical section for the device. (Optional)
3558 *
3559 * The device constructor initializes this if it has a critical section for
3560 * the device and desires it to be taken automatically by MMIO, I/O port
3561 * and timer callbacks to the device. The advantages using this locking
3562 * approach is both less code and avoiding the global IOM lock.
3563 *
3564 * @remarks Will not yet be taken by SSM.
3565 */
3566 R3PTRTYPE(PPDMCRITSECT) pCritSectR3;
3567
3568 /** Pointer to device registration structure. */
3569 R3PTRTYPE(PCPDMDEVREG) pReg;
3570 /** Configuration handle. */
3571 R3PTRTYPE(PCFGMNODE) pCfg;
3572
3573 /** The base interface of the device.
3574 *
3575 * The device constructor initializes this if it has any
3576 * device level interfaces to export. To obtain this interface
3577 * call PDMR3QueryDevice(). */
3578 PDMIBASE IBase;
3579 /** Align the internal data more naturally. */
3580 RTR3PTR R3PtrPadding;
3581
3582 /** Internal data. */
3583 union
3584 {
3585#ifdef PDMDEVINSINT_DECLARED
3586 PDMDEVINSINT s;
3587#endif
3588 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3589 } Internal;
3590
3591 /** Device instance data. The size of this area is defined
3592 * in the PDMDEVREG::cbInstanceData field. */
3593 char achInstanceData[8];
3594} PDMDEVINS;
3595
3596/** Current PDMDEVINS version number. */
3597#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3598
3599/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3600#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3601
3602/**
3603 * Checks the structure versions of the device instance and device helpers,
3604 * returning if they are incompatible.
3605 *
3606 * This is for use in the constructor.
3607 *
3608 * @param pDevIns The device instance pointer.
3609 */
3610#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3611 do \
3612 { \
3613 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3614 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3615 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3616 VERR_VERSION_MISMATCH); \
3617 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3618 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3619 VERR_VERSION_MISMATCH); \
3620 } while (0)
3621
3622/**
3623 * Quietly checks the structure versions of the device instance and device
3624 * helpers, returning if they are incompatible.
3625 *
3626 * This is for use in the destructor.
3627 *
3628 * @param pDevIns The device instance pointer.
3629 */
3630#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3631 do \
3632 { \
3633 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3634 if (RT_UNLIKELY( !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) \
3635 || !PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3636 return VERR_VERSION_MISMATCH; \
3637 } while (0)
3638
3639/**
3640 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
3641 * constructor - returns on failure.
3642 *
3643 * This should be invoked after having initialized the instance data
3644 * sufficiently for the correct operation of the destructor. The destructor is
3645 * always called!
3646 *
3647 * @param pDevIns Pointer to the PDM device instance.
3648 * @param pszValidValues Patterns describing the valid value names. See
3649 * RTStrSimplePatternMultiMatch for details on the
3650 * pattern syntax.
3651 * @param pszValidNodes Patterns describing the valid node (key) names.
3652 * Pass empty string if no valid nodess.
3653 */
3654#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
3655 do \
3656 { \
3657 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
3658 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
3659 if (RT_FAILURE(rcValCfg)) \
3660 return rcValCfg; \
3661 } while (0)
3662
3663/** @def PDMDEV_ASSERT_EMT
3664 * Assert that the current thread is the emulation thread.
3665 */
3666#ifdef VBOX_STRICT
3667# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3668#else
3669# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3670#endif
3671
3672/** @def PDMDEV_ASSERT_OTHER
3673 * Assert that the current thread is NOT the emulation thread.
3674 */
3675#ifdef VBOX_STRICT
3676# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3677#else
3678# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3679#endif
3680
3681/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3682 * Assert that the current thread is owner of the VM lock.
3683 */
3684#ifdef VBOX_STRICT
3685# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3686#else
3687# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3688#endif
3689
3690/** @def PDMDEV_SET_ERROR
3691 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3692 */
3693#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3694 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3695
3696/** @def PDMDEV_SET_RUNTIME_ERROR
3697 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3698 */
3699#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
3700 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
3701
3702/** @def PDMDEVINS_2_RCPTR
3703 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3704 */
3705#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3706
3707/** @def PDMDEVINS_2_R3PTR
3708 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3709 */
3710#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3711
3712/** @def PDMDEVINS_2_R0PTR
3713 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3714 */
3715#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3716
3717
3718#ifdef IN_RING3
3719
3720/**
3721 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3722 */
3723DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3724 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3725 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3726{
3727 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3728}
3729
3730/**
3731 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
3732 */
3733DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3734 const char *pszOut, const char *pszIn, const char *pszOutStr,
3735 const char *pszInStr, const char *pszDesc)
3736{
3737 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3738}
3739
3740/**
3741 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3742 */
3743DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3744 const char *pszOut, const char *pszIn, const char *pszOutStr,
3745 const char *pszInStr, const char *pszDesc)
3746{
3747 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3748}
3749
3750/**
3751 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
3752 */
3753DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
3754{
3755 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
3756}
3757
3758/**
3759 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3760 */
3761DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3762 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3763 const char *pszDesc)
3764{
3765 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3766}
3767
3768/**
3769 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
3770 */
3771DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3772 const char *pszWrite, const char *pszRead, const char *pszFill)
3773{
3774 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3775}
3776
3777/**
3778 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3779 */
3780DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3781 const char *pszWrite, const char *pszRead, const char *pszFill)
3782{
3783 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3784}
3785
3786/**
3787 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
3788 */
3789DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3790{
3791 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
3792}
3793
3794/**
3795 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3796 */
3797DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3798{
3799 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3800}
3801
3802/**
3803 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3804 */
3805DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3806{
3807 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3808}
3809
3810/**
3811 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3812 */
3813DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3814{
3815 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3816}
3817
3818/**
3819 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3820 */
3821DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3822{
3823 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3824}
3825
3826/**
3827 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3828 */
3829DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3830 const char *pszDesc, PRTRCPTR pRCPtr)
3831{
3832 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3833}
3834
3835/**
3836 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
3837 */
3838DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3839 const char *pszDesc, PRTR0PTR pR0Ptr)
3840{
3841 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
3842}
3843
3844/**
3845 * @copydoc PDMDEVHLPR3::pfnROMRegister
3846 */
3847DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
3848{
3849 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
3850}
3851
3852/**
3853 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3854 */
3855DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3856{
3857 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
3858}
3859
3860/**
3861 * Register a save state data unit.
3862 *
3863 * @returns VBox status.
3864 * @param pDevIns The device instance.
3865 * @param uVersion Data layout version number.
3866 * @param cbGuess The approximate amount of data in the unit.
3867 * Only for progress indicators.
3868 * @param pfnSaveExec Execute save callback, optional.
3869 * @param pfnLoadExec Execute load callback, optional.
3870 */
3871DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3872 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3873{
3874 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3875 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
3876 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3877 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3878}
3879
3880/**
3881 * Register a save state data unit with a live save callback as well.
3882 *
3883 * @returns VBox status.
3884 * @param pDevIns The device instance.
3885 * @param uVersion Data layout version number.
3886 * @param cbGuess The approximate amount of data in the unit.
3887 * Only for progress indicators.
3888 * @param pfnLiveExec Execute live callback, optional.
3889 * @param pfnSaveExec Execute save callback, optional.
3890 * @param pfnLoadExec Execute load callback, optional.
3891 */
3892DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
3893 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
3894{
3895 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
3896 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
3897 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
3898 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
3899}
3900
3901/**
3902 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3903 */
3904DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
3905 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
3906 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3907 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3908{
3909 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
3910 pfnLivePrep, pfnLiveExec, pfnLiveVote,
3911 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3912 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3913}
3914
3915/**
3916 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3917 */
3918DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
3919 const char *pszDesc, PPTMTIMERR3 ppTimer)
3920{
3921 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
3922}
3923
3924/**
3925 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
3926 */
3927DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3928{
3929 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
3930}
3931
3932#endif /* IN_RING3 */
3933
3934/**
3935 * @copydoc PDMDEVHLPR3::pfnPhysRead
3936 */
3937DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3938{
3939 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3940}
3941
3942/**
3943 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3944 */
3945DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3946{
3947 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3948}
3949
3950#ifdef IN_RING3
3951
3952/**
3953 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
3954 */
3955DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3956{
3957 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
3958}
3959
3960/**
3961 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
3962 */
3963DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
3964{
3965 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
3966}
3967
3968/**
3969 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
3970 */
3971DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3972{
3973 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
3974}
3975
3976/**
3977 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3978 */
3979DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3980{
3981 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3982}
3983
3984/**
3985 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3986 */
3987DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3988{
3989 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3990}
3991
3992/**
3993 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3994 */
3995DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3996{
3997 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3998}
3999
4000/**
4001 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4002 */
4003DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4004{
4005 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4006}
4007
4008/**
4009 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4010 */
4011DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4012{
4013 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4014}
4015
4016/**
4017 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4018 */
4019DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4020{
4021 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4022}
4023#endif /* IN_RING3 */
4024
4025/**
4026 * @copydoc PDMDEVHLPR3::pfnVMState
4027 */
4028DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4029{
4030 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4031}
4032
4033#ifdef IN_RING3
4034/**
4035 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4036 */
4037DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4038{
4039 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4040}
4041#endif /* IN_RING3 */
4042
4043/**
4044 * @copydoc PDMDEVHLPR3::pfnVMSetError
4045 */
4046DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4047{
4048 va_list va;
4049 va_start(va, pszFormat);
4050 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4051 va_end(va);
4052 return rc;
4053}
4054
4055/**
4056 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4057 */
4058DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4059{
4060 va_list va;
4061 int rc;
4062 va_start(va, pszFormat);
4063 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4064 va_end(va);
4065 return rc;
4066}
4067
4068/**
4069 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4070 *
4071 * @returns VBox status code which must be passed up to the VMM. This will be
4072 * VINF_SUCCESS in non-strict builds.
4073 * @param pDevIns The device instance.
4074 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4075 * @param pszFormat Message. (optional)
4076 * @param ... Message parameters.
4077 */
4078DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4079{
4080#ifdef VBOX_STRICT
4081# ifdef IN_RING3
4082 int rc;
4083 va_list args;
4084 va_start(args, pszFormat);
4085 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4086 va_end(args);
4087 return rc;
4088# else
4089 return VINF_EM_DBG_STOP;
4090# endif
4091#else
4092 NOREF(pDevIns);
4093 NOREF(pszFile);
4094 NOREF(iLine);
4095 NOREF(pszFunction);
4096 NOREF(pszFormat);
4097 return VINF_SUCCESS;
4098#endif
4099}
4100
4101#ifdef IN_RING3
4102
4103/**
4104 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4105 */
4106DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4107{
4108 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4109}
4110
4111/**
4112 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4113 */
4114DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4115{
4116 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4117}
4118
4119/**
4120 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4121 */
4122DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4123 const char *pszDesc, const char *pszName, ...)
4124{
4125 va_list va;
4126 va_start(va, pszName);
4127 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4128 va_end(va);
4129}
4130
4131/**
4132 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4133 */
4134DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4135{
4136 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4137}
4138
4139/**
4140 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4141 */
4142DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4143{
4144 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4145}
4146
4147/**
4148 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4149 */
4150DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4151{
4152 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4153}
4154
4155
4156/**
4157 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4158 */
4159DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4160 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4161{
4162 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4163}
4164
4165#endif /* IN_RING3 */
4166
4167/**
4168 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4169 */
4170DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4171{
4172 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4173}
4174
4175/**
4176 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4177 */
4178DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4179{
4180 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4181}
4182
4183/**
4184 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4185 */
4186DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4187{
4188 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4189}
4190
4191/**
4192 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4193 */
4194DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4195{
4196 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4197}
4198
4199#ifdef IN_RING3
4200
4201/**
4202 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4203 */
4204DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4205{
4206 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4207}
4208
4209/**
4210 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4211 */
4212DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4213 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4214{
4215 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4216}
4217
4218/**
4219 * Initializes a PDM critical section.
4220 *
4221 * The PDM critical sections are derived from the IPRT critical sections, but
4222 * works in RC and R0 as well.
4223 *
4224 * @returns VBox status code.
4225 * @param pDevIns The device instance.
4226 * @param pCritSect Pointer to the critical section.
4227 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4228 * @param pszNameFmt Format string for namging the critical section.
4229 * For statistics and lock validation.
4230 * @param ... Arguments for the format string.
4231 */
4232DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4233{
4234 int rc;
4235 va_list va;
4236 va_start(va, pszNameFmt);
4237 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4238 va_end(va);
4239 return rc;
4240}
4241
4242/**
4243 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4244 */
4245DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4246 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4247{
4248 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4249}
4250
4251/**
4252 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4253 */
4254DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4255{
4256 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4257}
4258
4259/**
4260 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4261 */
4262DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4263{
4264 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4265}
4266
4267/**
4268 * @copydoc PDMDEVHLPR3::pfnA20Set
4269 */
4270DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4271{
4272 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4273}
4274
4275/**
4276 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4277 */
4278DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4279{
4280 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4281}
4282
4283/**
4284 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4285 */
4286DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4287{
4288 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4289}
4290
4291/**
4292 * @copydoc PDMDEVHLPR3::pfnPICRegister
4293 */
4294DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4295{
4296 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4297}
4298
4299/**
4300 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4301 */
4302DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4303{
4304 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4305}
4306
4307/**
4308 * @copydoc PDMDEVHLPR3::pfn
4309 */
4310DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4311{
4312 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4313}
4314
4315/**
4316 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4317 */
4318DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4319{
4320 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4321}
4322
4323/**
4324 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4325 */
4326DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4327{
4328 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4329}
4330
4331/**
4332 * @copydoc PDMDEVHLPR3::pfnDMARegister
4333 */
4334DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4335{
4336 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4337}
4338
4339/**
4340 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4341 */
4342DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4343{
4344 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4345}
4346
4347/**
4348 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4349 */
4350DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4351{
4352 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4353}
4354
4355/**
4356 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4357 */
4358DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4359{
4360 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4361}
4362
4363/**
4364 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4365 */
4366DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4367{
4368 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4369}
4370
4371/**
4372 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4373 */
4374DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4375{
4376 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4377}
4378
4379/**
4380 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4381 */
4382DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4383{
4384 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4385}
4386
4387/**
4388 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4389 */
4390DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4391{
4392 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4393}
4394
4395/**
4396 * @copydoc PDMDEVHLP::pfnCallR0
4397 */
4398DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4399{
4400 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4401}
4402
4403#endif /* IN_RING3 */
4404
4405/**
4406 * @copydoc PDMDEVHLPR3::pfnGetVM
4407 */
4408DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4409{
4410 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4411}
4412
4413/**
4414 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4415 */
4416DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4417{
4418 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4419}
4420
4421#ifdef IN_RING3
4422
4423/**
4424 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4425 */
4426DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4427{
4428 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4429}
4430
4431/**
4432 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4433 */
4434DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4435{
4436 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4437}
4438
4439/**
4440 * @copydoc PDMDEVHLPR3::pfnVMReset
4441 */
4442DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4443{
4444 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4445}
4446
4447/**
4448 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4449 */
4450DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4451{
4452 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4453}
4454
4455/**
4456 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
4457 */
4458DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
4459{
4460 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
4461}
4462
4463/**
4464 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4465 */
4466DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4467{
4468 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4469}
4470
4471#endif /* IN_RING3 */
4472
4473/**
4474 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4475 */
4476DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4477{
4478 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4479}
4480
4481#ifdef IN_RING3
4482
4483/**
4484 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4485 */
4486DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4487{
4488 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4489}
4490
4491#endif /* IN_RING3 */
4492#ifdef IN_RING0
4493
4494/**
4495 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4496 */
4497DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4498{
4499 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4500}
4501
4502#endif /* IN_RING0 */
4503
4504
4505
4506
4507/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4508typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4509
4510/**
4511 * Callbacks for VBoxDeviceRegister().
4512 */
4513typedef struct PDMDEVREGCB
4514{
4515 /** Interface version.
4516 * This is set to PDM_DEVREG_CB_VERSION. */
4517 uint32_t u32Version;
4518
4519 /**
4520 * Registers a device with the current VM instance.
4521 *
4522 * @returns VBox status code.
4523 * @param pCallbacks Pointer to the callback table.
4524 * @param pReg Pointer to the device registration record.
4525 * This data must be permanent and readonly.
4526 */
4527 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4528} PDMDEVREGCB;
4529
4530/** Current version of the PDMDEVREGCB structure. */
4531#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4532
4533
4534/**
4535 * The VBoxDevicesRegister callback function.
4536 *
4537 * PDM will invoke this function after loading a device module and letting
4538 * the module decide which devices to register and how to handle conflicts.
4539 *
4540 * @returns VBox status code.
4541 * @param pCallbacks Pointer to the callback table.
4542 * @param u32Version VBox version number.
4543 */
4544typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4545
4546/** @} */
4547
4548RT_C_DECLS_END
4549
4550#endif
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