VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 3854

Last change on this file since 3854 was 3854, checked in by vboxsync, 17 years ago

Splitting up pdm.h - export the fragments.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License as published by the Free Software Foundation,
12 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13 * distribution. VirtualBox OSE is distributed in the hope that it will
14 * be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * If you received this file as part of a commercial VirtualBox
17 * distribution, then only the terms of your commercial VirtualBox
18 * license agreement apply instead of the previous paragraph.
19 */
20
21#ifndef ___VBox_pdm_h
22# include <VBox/pdm.h>
23#endif
24
25#ifndef ___VBox_pdmdev_h
26#define ___VBox_pdmdev_h
27
28__BEGIN_DECLS
29
30/** @defgroup grp_pdm_device Devices
31 * @ingroup grp_pdm
32 * @{
33 */
34
35/** @def PDMBOTHCBDECL
36 * Macro for declaring a callback which is static in HC and exported in GC.
37 */
38#if defined(IN_GC) || defined(IN_RING0)
39# define PDMBOTHCBDECL(type) DECLEXPORT(type)
40#else
41# define PDMBOTHCBDECL(type) static type
42#endif
43
44
45/**
46 * Construct a device instance for a VM.
47 *
48 * @returns VBox status.
49 * @param pDevIns The device instance data.
50 * If the registration structure is needed, pDevIns->pDevReg points to it.
51 * @param iInstance Instance number. Use this to figure out which registers and such to use.
52 * The instance number is also found in pDevIns->iInstance, but since it's
53 * likely to be freqently used PDM passes it as parameter.
54 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
55 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
56 * primary usage will in this function it's passed as a parameter.
57 */
58typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
59/** Pointer to a FNPDMDEVCONSTRUCT() function. */
60typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
61
62/**
63 * Destruct a device instance.
64 *
65 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
66 * resources can be freed correctly.
67 *
68 * @returns VBox status.
69 * @param pDevIns The device instance data.
70 */
71typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
72/** Pointer to a FNPDMDEVDESTRUCT() function. */
73typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
74
75/**
76 * Device relocation callback.
77 *
78 * When this callback is called the device instance data, and if the
79 * device have a GC component, is being relocated, or/and the selectors
80 * have been changed. The device must use the chance to perform the
81 * necessary pointer relocations and data updates.
82 *
83 * Before the GC code is executed the first time, this function will be
84 * called with a 0 delta so GC pointer calculations can be one in one place.
85 *
86 * @param pDevIns Pointer to the device instance.
87 * @param offDelta The relocation delta relative to the old location.
88 *
89 * @remark A relocation CANNOT fail.
90 */
91typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
92/** Pointer to a FNPDMDEVRELOCATE() function. */
93typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
94
95
96/**
97 * Device I/O Control interface.
98 *
99 * This is used by external components, such as the COM interface, to
100 * communicate with devices using a class wide interface or a device
101 * specific interface.
102 *
103 * @returns VBox status code.
104 * @param pDevIns Pointer to the device instance.
105 * @param uFunction Function to perform.
106 * @param pvIn Pointer to input data.
107 * @param cbIn Size of input data.
108 * @param pvOut Pointer to output data.
109 * @param cbOut Size of output data.
110 * @param pcbOut Where to store the actual size of the output data.
111 */
112typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
113 void *pvIn, RTUINT cbIn,
114 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
115/** Pointer to a FNPDMDEVIOCTL() function. */
116typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
117
118/**
119 * Power On notification.
120 *
121 * @returns VBox status.
122 * @param pDevIns The device instance data.
123 */
124typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
125/** Pointer to a FNPDMDEVPOWERON() function. */
126typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
127
128/**
129 * Reset notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVRESET() function. */
136typedef FNPDMDEVRESET *PFNPDMDEVRESET;
137
138/**
139 * Suspend notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVRESUME() function. */
156typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
157
158/**
159 * Power Off notification.
160 *
161 * @param pDevIns The device instance data.
162 */
163typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
164/** Pointer to a FNPDMDEVPOWEROFF() function. */
165typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
166
167/**
168 * Attach command.
169 *
170 * This is called to let the device attach to a driver for a specified LUN
171 * at runtime. This is not called during VM construction, the device
172 * constructor have to attach to all the available drivers.
173 *
174 * This is like plugging in the keyboard or mouse after turning on the PC.
175 *
176 * @returns VBox status code.
177 * @param pDevIns The device instance.
178 * @param iLUN The logical unit which is being detached.
179 */
180typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
181/** Pointer to a FNPDMDEVATTACH() function. */
182typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
183
184/**
185 * Detach notification.
186 *
187 * This is called when a driver is detaching itself from a LUN of the device.
188 * The device should adjust it's state to reflect this.
189 *
190 * This is like unplugging the network cable to use it for the laptop or
191 * something while the PC is still running.
192 *
193 * @param pDevIns The device instance.
194 * @param iLUN The logical unit which is being detached.
195 */
196typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
197/** Pointer to a FNPDMDEVDETACH() function. */
198typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
199
200/**
201 * Query the base interface of a logical unit.
202 *
203 * @returns VBOX status code.
204 * @param pDevIns The device instance.
205 * @param iLUN The logicial unit to query.
206 * @param ppBase Where to store the pointer to the base interface of the LUN.
207 */
208typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
209/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
210typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
211
212/**
213 * Init complete notification.
214 * This can be done to do communication with other devices and other
215 * initialization which requires everything to be in place.
216 *
217 * @returns VBOX status code.
218 * @param pDevIns The device instance.
219 */
220typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
221/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
222typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
223
224
225
226/** PDM Device Registration Structure,
227 * This structure is used when registering a device from
228 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
229 * the VM is terminated.
230 */
231typedef struct PDMDEVREG
232{
233 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
234 uint32_t u32Version;
235 /** Device name. */
236 char szDeviceName[32];
237 /** Name of guest context module (no path).
238 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
239 char szGCMod[32];
240 /** Name of guest context module (no path).
241 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
242 char szR0Mod[32];
243 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
244 * remain unchanged from registration till VM destruction. */
245 const char *pszDescription;
246
247 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
248 RTUINT fFlags;
249 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
250 RTUINT fClass;
251 /** Maximum number of instances (per VM). */
252 RTUINT cMaxInstances;
253 /** Size of the instance data. */
254 RTUINT cbInstance;
255
256 /** Construct instance - required. */
257 PFNPDMDEVCONSTRUCT pfnConstruct;
258 /** Destruct instance - optional. */
259 PFNPDMDEVDESTRUCT pfnDestruct;
260 /** Relocation command - optional. */
261 PFNPDMDEVRELOCATE pfnRelocate;
262 /** I/O Control interface - optional. */
263 PFNPDMDEVIOCTL pfnIOCtl;
264 /** Power on notification - optional. */
265 PFNPDMDEVPOWERON pfnPowerOn;
266 /** Reset notification - optional. */
267 PFNPDMDEVRESET pfnReset;
268 /** Suspend notification - optional. */
269 PFNPDMDEVSUSPEND pfnSuspend;
270 /** Resume notification - optional. */
271 PFNPDMDEVRESUME pfnResume;
272 /** Attach command - optional. */
273 PFNPDMDEVATTACH pfnAttach;
274 /** Detach notification - optional. */
275 PFNPDMDEVDETACH pfnDetach;
276 /** Query a LUN base interface - optional. */
277 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
278 /** Init complete notification - optional. */
279 PFNPDMDEVINITCOMPLETE pfnInitComplete;
280 /** Power off notification - optional. */
281 PFNPDMDEVPOWEROFF pfnPowerOff;
282} PDMDEVREG;
283/** Pointer to a PDM Device Structure. */
284typedef PDMDEVREG *PPDMDEVREG;
285/** Const pointer to a PDM Device Structure. */
286typedef PDMDEVREG const *PCPDMDEVREG;
287
288/** Current DEVREG version number. */
289#define PDM_DEVREG_VERSION 0xc0010000
290
291/** PDM Device Flags.
292 * @{ */
293/** This flag is used to indicate that the device has a GC component. */
294#define PDM_DEVREG_FLAGS_GC 0x00000001
295/** This flag is used to indicate that the device has a R0 component. */
296#define PDM_DEVREG_FLAGS_R0 0x00010000
297
298/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
299 * The bit count for the current host. */
300#if HC_ARCH_BITS == 32
301# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
302#elif HC_ARCH_BITS == 64
303# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
304#else
305# error Unsupported HC_ARCH_BITS value.
306#endif
307/** The host bit count mask. */
308#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
309
310/** The device support only 32-bit guests. */
311#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
312/** The device support only 64-bit guests. */
313#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
314/** The device support both 32-bit & 64-bit guests. */
315#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
316/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
317 * The guest bit count for the current compilation. */
318#if GC_ARCH_BITS == 32
319# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
320#elif GC_ARCH_BITS == 64
321# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
322#else
323# error Unsupported GC_ARCH_BITS value.
324#endif
325/** The guest bit count mask. */
326#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
327
328/** Indicates that the devices support PAE36 on a 32-bit guest. */
329#define PDM_DEVREG_FLAGS_PAE36 0x00000020
330/** @} */
331
332
333/** PDM Device Classes.
334 * The order is important, lower bit earlier instantiation.
335 * @{ */
336/** Architecture device. */
337#define PDM_DEVREG_CLASS_ARCH BIT(0)
338/** Architecture BIOS device. */
339#define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)
340/** PCI bus brigde. */
341#define PDM_DEVREG_CLASS_BUS_PCI BIT(2)
342/** ISA bus brigde. */
343#define PDM_DEVREG_CLASS_BUS_ISA BIT(3)
344/** Input device (mouse, keyboard, joystick,..). */
345#define PDM_DEVREG_CLASS_INPUT BIT(4)
346/** Interrupt controller (PIC). */
347#define PDM_DEVREG_CLASS_PIC BIT(5)
348/** Interval controoler (PIT). */
349#define PDM_DEVREG_CLASS_PIT BIT(6)
350/** RTC/CMOS. */
351#define PDM_DEVREG_CLASS_RTC BIT(7)
352/** DMA controller. */
353#define PDM_DEVREG_CLASS_DMA BIT(8)
354/** VMM Device. */
355#define PDM_DEVREG_CLASS_VMM_DEV BIT(9)
356/** Graphics device, like VGA. */
357#define PDM_DEVREG_CLASS_GRAPHICS BIT(10)
358/** Storage controller device. */
359#define PDM_DEVREG_CLASS_STORAGE BIT(11)
360/** Network interface controller. */
361#define PDM_DEVREG_CLASS_NETWORK BIT(12)
362/** Audio. */
363#define PDM_DEVREG_CLASS_AUDIO BIT(13)
364/** USB HIC. */
365#define PDM_DEVREG_CLASS_BUS_USB BIT(14)
366/** ACPI. */
367#define PDM_DEVREG_CLASS_ACPI BIT(15)
368/** Serial controller device. */
369#define PDM_DEVREG_CLASS_SERIAL BIT(16)
370/** Parallel controller device */
371#define PDM_DEVREG_CLASS_PARALLEL BIT(17)
372/** Misc devices (always last). */
373#define PDM_DEVREG_CLASS_MISC BIT(31)
374/** @} */
375
376
377/** @name IRQ Level for use with the *SetIrq APIs.
378 * @{
379 */
380/** Assert the IRQ (can assume value 1). */
381#define PDM_IRQ_LEVEL_HIGH BIT(0)
382/** Deassert the IRQ (can assume value 0). */
383#define PDM_IRQ_LEVEL_LOW 0
384/** flip-flop - assert and then deassert it again immediately. */
385#define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)
386/** @} */
387
388
389/**
390 * PCI Bus registaration structure.
391 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
392 */
393typedef struct PDMPCIBUSREG
394{
395 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
396 uint32_t u32Version;
397
398 /**
399 * Registers the device with the default PCI bus.
400 *
401 * @returns VBox status code.
402 * @param pDevIns Device instance of the PCI Bus.
403 * @param pPciDev The PCI device structure.
404 * Any PCI enabled device must keep this in it's instance data!
405 * Fill in the PCI data config before registration, please.
406 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
407 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
408 * If negative, the pci bus device will assign one.
409 */
410 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
411
412 /**
413 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
414 *
415 * @returns VBox status code.
416 * @param pDevIns Device instance of the PCI Bus.
417 * @param pPciDev The PCI device structure.
418 * @param iRegion The region number.
419 * @param cbRegion Size of the region.
420 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
421 * @param pfnCallback Callback for doing the mapping.
422 */
423 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
424
425 /**
426 * Register PCI configuration space read/write callbacks.
427 *
428 * @param pDevIns Device instance of the PCI Bus.
429 * @param pPciDev The PCI device structure.
430 * @param pfnRead Pointer to the user defined PCI config read function.
431 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
432 * PCI config read function. This way, user can decide when (and if)
433 * to call default PCI config read function. Can be NULL.
434 * @param pfnWrite Pointer to the user defined PCI config write function.
435 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
436 * PCI config write function. This way, user can decide when (and if)
437 * to call default PCI config write function. Can be NULL.
438 * @thread EMT
439 */
440 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
441 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
442
443 /**
444 * Set the IRQ for a PCI device.
445 *
446 * @param pDevIns Device instance of the PCI Bus.
447 * @param pPciDev The PCI device structure.
448 * @param iIrq IRQ number to set.
449 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
450 */
451 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
452
453 /**
454 * Saves a state of the PCI device.
455 *
456 * @returns VBox status code.
457 * @param pDevIns Device instance of the PCI Bus.
458 * @param pPciDev Pointer to PCI device.
459 * @param pSSMHandle The handle to save the state to.
460 */
461 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
462
463 /**
464 * Loads a saved PCI device state.
465 *
466 * @returns VBox status code.
467 * @param pDevIns Device instance of the PCI Bus.
468 * @param pPciDev Pointer to PCI device.
469 * @param pSSMHandle The handle to the saved state.
470 */
471 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
472
473 /**
474 * Called to perform the job of the bios.
475 * This is only called for the first PCI Bus - it is expected to
476 * service all the PCI buses.
477 *
478 * @returns VBox status.
479 * @param pDevIns Device instance of the first bus.
480 */
481 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
482
483 /** The name of the SetIrq GC entry point. */
484 const char *pszSetIrqGC;
485
486 /** The name of the SetIrq R0 entry point. */
487 const char *pszSetIrqR0;
488
489} PDMPCIBUSREG;
490/** Pointer to a PCI bus registration structure. */
491typedef PDMPCIBUSREG *PPDMPCIBUSREG;
492
493/** Current PDMPCIBUSREG version number. */
494#define PDM_PCIBUSREG_VERSION 0xd0020000
495
496/**
497 * PCI Bus GC helpers.
498 */
499typedef struct PDMPCIHLPGC
500{
501 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
502 uint32_t u32Version;
503
504 /**
505 * Set an ISA IRQ.
506 *
507 * @param pDevIns PCI device instance.
508 * @param iIrq IRQ number to set.
509 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
510 * @thread EMT only.
511 */
512 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
513
514 /**
515 * Set an I/O-APIC IRQ.
516 *
517 * @param pDevIns PCI device instance.
518 * @param iIrq IRQ number to set.
519 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
520 * @thread EMT only.
521 */
522 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
523
524#ifdef VBOX_WITH_PDM_LOCK
525 /**
526 * Acquires the PDM lock.
527 *
528 * @returns VINF_SUCCESS on success.
529 * @returns rc if we failed to acquire the lock.
530 * @param pDevIns The PCI device instance.
531 * @param rc What to return if we fail to acquire the lock.
532 */
533 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
534
535 /**
536 * Releases the PDM lock.
537 *
538 * @param pDevIns The PCI device instance.
539 */
540 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
541#endif
542 /** Just a safety precaution. */
543 uint32_t u32TheEnd;
544} PDMPCIHLPGC;
545/** Pointer to PCI helpers. */
546typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
547/** Pointer to const PCI helpers. */
548typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
549
550/** Current PDMPCIHLPR3 version number. */
551#define PDM_PCIHLPGC_VERSION 0xe1010000
552
553
554/**
555 * PCI Bus R0 helpers.
556 */
557typedef struct PDMPCIHLPR0
558{
559 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
560 uint32_t u32Version;
561
562 /**
563 * Set an ISA IRQ.
564 *
565 * @param pDevIns PCI device instance.
566 * @param iIrq IRQ number to set.
567 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
568 * @thread EMT only.
569 */
570 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
571
572 /**
573 * Set an I/O-APIC IRQ.
574 *
575 * @param pDevIns PCI device instance.
576 * @param iIrq IRQ number to set.
577 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
578 * @thread EMT only.
579 */
580 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
581
582#ifdef VBOX_WITH_PDM_LOCK
583 /**
584 * Acquires the PDM lock.
585 *
586 * @returns VINF_SUCCESS on success.
587 * @returns rc if we failed to acquire the lock.
588 * @param pDevIns The PCI device instance.
589 * @param rc What to return if we fail to acquire the lock.
590 */
591 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
592
593 /**
594 * Releases the PDM lock.
595 *
596 * @param pDevIns The PCI device instance.
597 */
598 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
599#endif
600
601 /** Just a safety precaution. */
602 uint32_t u32TheEnd;
603} PDMPCIHLPR0;
604/** Pointer to PCI helpers. */
605typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
606/** Pointer to const PCI helpers. */
607typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
608
609/** Current PDMPCIHLPR0 version number. */
610#define PDM_PCIHLPR0_VERSION 0xe1010000
611
612/**
613 * PCI device helpers.
614 */
615typedef struct PDMPCIHLPR3
616{
617 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
618 uint32_t u32Version;
619
620 /**
621 * Set an ISA IRQ.
622 *
623 * @param pDevIns The PCI device instance.
624 * @param iIrq IRQ number to set.
625 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
626 * @thread EMT only.
627 */
628 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
629
630 /**
631 * Set an I/O-APIC IRQ.
632 *
633 * @param pDevIns The PCI device instance.
634 * @param iIrq IRQ number to set.
635 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
636 * @thread EMT only.
637 */
638 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
639
640#ifdef VBOX_WITH_PDM_LOCK
641 /**
642 * Acquires the PDM lock.
643 *
644 * @returns VINF_SUCCESS on success.
645 * @returns Fatal error on failure.
646 * @param pDevIns The PCI device instance.
647 * @param rc Dummy for making the interface identical to the GC and R0 versions.
648 */
649 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
650
651 /**
652 * Releases the PDM lock.
653 *
654 * @param pDevIns The PCI device instance.
655 */
656 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
657#endif
658
659 /**
660 * Gets the address of the GC PCI Bus helpers.
661 *
662 * This should be called at both construction and relocation time
663 * to obtain the correct address of the GC helpers.
664 *
665 * @returns GC pointer to the PCI Bus helpers.
666 * @param pDevIns Device instance of the PCI Bus.
667 * @thread EMT only.
668 */
669 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
670
671 /**
672 * Gets the address of the R0 PCI Bus helpers.
673 *
674 * This should be called at both construction and relocation time
675 * to obtain the correct address of the GC helpers.
676 *
677 * @returns R0 pointer to the PCI Bus helpers.
678 * @param pDevIns Device instance of the PCI Bus.
679 * @thread EMT only.
680 */
681 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
682
683 /** Just a safety precaution. */
684 uint32_t u32TheEnd;
685} PDMPCIHLPR3;
686/** Pointer to PCI helpers. */
687typedef HCPTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
688/** Pointer to const PCI helpers. */
689typedef HCPTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
690
691/** Current PDMPCIHLPR3 version number. */
692#define PDM_PCIHLPR3_VERSION 0xf1010000
693
694
695/**
696 * Programmable Interrupt Controller registration structure.
697 */
698typedef struct PDMPICREG
699{
700 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
701 uint32_t u32Version;
702
703 /**
704 * Set the an IRQ.
705 *
706 * @param pDevIns Device instance of the PIC.
707 * @param iIrq IRQ number to set.
708 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
709 */
710 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
711
712 /**
713 * Get a pending interrupt.
714 *
715 * @returns Pending interrupt number.
716 * @param pDevIns Device instance of the PIC.
717 */
718 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
719
720 /** The name of the GC SetIrq entry point. */
721 const char *pszSetIrqGC;
722 /** The name of the GC GetInterrupt entry point. */
723 const char *pszGetInterruptGC;
724
725 /** The name of the R0 SetIrq entry point. */
726 const char *pszSetIrqR0;
727 /** The name of the R0 GetInterrupt entry point. */
728 const char *pszGetInterruptR0;
729} PDMPICREG;
730/** Pointer to a PIC registration structure. */
731typedef PDMPICREG *PPDMPICREG;
732
733/** Current PDMPICREG version number. */
734#define PDM_PICREG_VERSION 0xe0020000
735
736/**
737 * PIC GC helpers.
738 */
739typedef struct PDMPICHLPGC
740{
741 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
742 uint32_t u32Version;
743
744 /**
745 * Set the interrupt force action flag.
746 *
747 * @param pDevIns Device instance of the PIC.
748 */
749 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
750
751 /**
752 * Clear the interrupt force action flag.
753 *
754 * @param pDevIns Device instance of the PIC.
755 */
756 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
757
758#ifdef VBOX_WITH_PDM_LOCK
759 /**
760 * Acquires the PDM lock.
761 *
762 * @returns VINF_SUCCESS on success.
763 * @returns rc if we failed to acquire the lock.
764 * @param pDevIns The PIC device instance.
765 * @param rc What to return if we fail to acquire the lock.
766 */
767 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
768
769 /**
770 * Releases the PDM lock.
771 *
772 * @param pDevIns The PIC device instance.
773 */
774 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
775#endif
776 /** Just a safety precaution. */
777 uint32_t u32TheEnd;
778} PDMPICHLPGC;
779
780/** Pointer to PIC GC helpers. */
781typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
782/** Pointer to const PIC GC helpers. */
783typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
784
785/** Current PDMPICHLPGC version number. */
786#define PDM_PICHLPGC_VERSION 0xfc010000
787
788
789/**
790 * PIC R0 helpers.
791 */
792typedef struct PDMPICHLPR0
793{
794 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
795 uint32_t u32Version;
796
797 /**
798 * Set the interrupt force action flag.
799 *
800 * @param pDevIns Device instance of the PIC.
801 */
802 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
803
804 /**
805 * Clear the interrupt force action flag.
806 *
807 * @param pDevIns Device instance of the PIC.
808 */
809 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
810
811#ifdef VBOX_WITH_PDM_LOCK
812 /**
813 * Acquires the PDM lock.
814 *
815 * @returns VINF_SUCCESS on success.
816 * @returns rc if we failed to acquire the lock.
817 * @param pDevIns The PIC device instance.
818 * @param rc What to return if we fail to acquire the lock.
819 */
820 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
821
822 /**
823 * Releases the PDM lock.
824 *
825 * @param pDevIns The PCI device instance.
826 */
827 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
828#endif
829
830 /** Just a safety precaution. */
831 uint32_t u32TheEnd;
832} PDMPICHLPR0;
833
834/** Pointer to PIC R0 helpers. */
835typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
836/** Pointer to const PIC R0 helpers. */
837typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
838
839/** Current PDMPICHLPR0 version number. */
840#define PDM_PICHLPR0_VERSION 0xfc010000
841
842/**
843 * PIC HC helpers.
844 */
845typedef struct PDMPICHLPR3
846{
847 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
848 uint32_t u32Version;
849
850 /**
851 * Set the interrupt force action flag.
852 *
853 * @param pDevIns Device instance of the PIC.
854 */
855 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
856
857 /**
858 * Clear the interrupt force action flag.
859 *
860 * @param pDevIns Device instance of the PIC.
861 */
862 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
863
864#ifdef VBOX_WITH_PDM_LOCK
865 /**
866 * Acquires the PDM lock.
867 *
868 * @returns VINF_SUCCESS on success.
869 * @returns Fatal error on failure.
870 * @param pDevIns The PIC device instance.
871 * @param rc Dummy for making the interface identical to the GC and R0 versions.
872 */
873 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
874
875 /**
876 * Releases the PDM lock.
877 *
878 * @param pDevIns The PIC device instance.
879 */
880 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
881#endif
882
883 /**
884 * Gets the address of the GC PIC helpers.
885 *
886 * This should be called at both construction and relocation time
887 * to obtain the correct address of the GC helpers.
888 *
889 * @returns GC pointer to the PIC helpers.
890 * @param pDevIns Device instance of the PIC.
891 */
892 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
893
894 /**
895 * Gets the address of the R0 PIC helpers.
896 *
897 * This should be called at both construction and relocation time
898 * to obtain the correct address of the GC helpers.
899 *
900 * @returns R0 pointer to the PIC helpers.
901 * @param pDevIns Device instance of the PIC.
902 */
903 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
904
905 /** Just a safety precaution. */
906 uint32_t u32TheEnd;
907} PDMPICHLPR3;
908
909/** Pointer to PIC HC helpers. */
910typedef HCPTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
911/** Pointer to const PIC HC helpers. */
912typedef HCPTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
913
914/** Current PDMPICHLPR3 version number. */
915#define PDM_PICHLPR3_VERSION 0xf0010000
916
917
918
919/**
920 * Advanced Programmable Interrupt Controller registration structure.
921 */
922typedef struct PDMAPICREG
923{
924 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
925 uint32_t u32Version;
926
927 /**
928 * Get a pending interrupt.
929 *
930 * @returns Pending interrupt number.
931 * @param pDevIns Device instance of the APIC.
932 */
933 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
934
935 /**
936 * Set the APIC base.
937 *
938 * @param pDevIns Device instance of the APIC.
939 * @param u64Base The new base.
940 */
941 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
942
943 /**
944 * Get the APIC base.
945 *
946 * @returns Current base.
947 * @param pDevIns Device instance of the APIC.
948 */
949 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
950
951 /**
952 * Set the TPR (task priority register?).
953 *
954 * @param pDevIns Device instance of the APIC.
955 * @param u8TPR The new TPR.
956 */
957 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
958
959 /**
960 * Get the TPR (task priority register?).
961 *
962 * @returns The current TPR.
963 * @param pDevIns Device instance of the APIC.
964 */
965 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
966
967 /**
968 * Private interface between the IOAPIC and APIC.
969 *
970 * This is a low-level, APIC/IOAPIC implementation specific interface
971 * which is registered with PDM only because it makes life so much
972 * simpler right now (GC bits). This is a bad bad hack! The correct
973 * way of doing this would involve some way of querying GC interfaces
974 * and relocating them. Perhaps doing some kind of device init in GC...
975 *
976 * @returns The current TPR.
977 * @param pDevIns Device instance of the APIC.
978 * @param u8Dest See APIC implementation.
979 * @param u8DestMode See APIC implementation.
980 * @param u8DeliveryMode See APIC implementation.
981 * @param iVector See APIC implementation.
982 * @param u8Polarity See APIC implementation.
983 * @param u8TriggerMode See APIC implementation.
984 */
985 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
986 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
987
988 /** The name of the GC GetInterrupt entry point. */
989 const char *pszGetInterruptGC;
990 /** The name of the GC SetBase entry point. */
991 const char *pszSetBaseGC;
992 /** The name of the GC GetBase entry point. */
993 const char *pszGetBaseGC;
994 /** The name of the GC SetTPR entry point. */
995 const char *pszSetTPRGC;
996 /** The name of the GC GetTPR entry point. */
997 const char *pszGetTPRGC;
998 /** The name of the GC BusDeliver entry point. */
999 const char *pszBusDeliverGC;
1000
1001 /** The name of the R0 GetInterrupt entry point. */
1002 const char *pszGetInterruptR0;
1003 /** The name of the R0 SetBase entry point. */
1004 const char *pszSetBaseR0;
1005 /** The name of the R0 GetBase entry point. */
1006 const char *pszGetBaseR0;
1007 /** The name of the R0 SetTPR entry point. */
1008 const char *pszSetTPRR0;
1009 /** The name of the R0 GetTPR entry point. */
1010 const char *pszGetTPRR0;
1011 /** The name of the R0 BusDeliver entry point. */
1012 const char *pszBusDeliverR0;
1013
1014} PDMAPICREG;
1015/** Pointer to an APIC registration structure. */
1016typedef PDMAPICREG *PPDMAPICREG;
1017
1018/** Current PDMAPICREG version number. */
1019#define PDM_APICREG_VERSION 0x70010000
1020
1021
1022/**
1023 * APIC GC helpers.
1024 */
1025typedef struct PDMAPICHLPGC
1026{
1027 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1028 uint32_t u32Version;
1029
1030 /**
1031 * Set the interrupt force action flag.
1032 *
1033 * @param pDevIns Device instance of the APIC.
1034 */
1035 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1036
1037 /**
1038 * Clear the interrupt force action flag.
1039 *
1040 * @param pDevIns Device instance of the APIC.
1041 */
1042 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1043
1044 /**
1045 * Sets or clears the APIC bit in the CPUID feature masks.
1046 *
1047 * @param pDevIns Device instance of the APIC.
1048 * @param fEnabled If true the bit is set, else cleared.
1049 */
1050 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1051
1052#ifdef VBOX_WITH_PDM_LOCK
1053 /**
1054 * Acquires the PDM lock.
1055 *
1056 * @returns VINF_SUCCESS on success.
1057 * @returns rc if we failed to acquire the lock.
1058 * @param pDevIns The APIC device instance.
1059 * @param rc What to return if we fail to acquire the lock.
1060 */
1061 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1062
1063 /**
1064 * Releases the PDM lock.
1065 *
1066 * @param pDevIns The APIC device instance.
1067 */
1068 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1069#endif
1070 /** Just a safety precaution. */
1071 uint32_t u32TheEnd;
1072} PDMAPICHLPGC;
1073/** Pointer to APIC GC helpers. */
1074typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1075/** Pointer to const APIC helpers. */
1076typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1077
1078/** Current PDMAPICHLPGC version number. */
1079#define PDM_APICHLPGC_VERSION 0x60010000
1080
1081
1082/**
1083 * APIC R0 helpers.
1084 */
1085typedef struct PDMAPICHLPR0
1086{
1087 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1088 uint32_t u32Version;
1089
1090 /**
1091 * Set the interrupt force action flag.
1092 *
1093 * @param pDevIns Device instance of the APIC.
1094 */
1095 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1096
1097 /**
1098 * Clear the interrupt force action flag.
1099 *
1100 * @param pDevIns Device instance of the APIC.
1101 */
1102 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1103
1104 /**
1105 * Sets or clears the APIC bit in the CPUID feature masks.
1106 *
1107 * @param pDevIns Device instance of the APIC.
1108 * @param fEnabled If true the bit is set, else cleared.
1109 */
1110 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1111
1112#ifdef VBOX_WITH_PDM_LOCK
1113 /**
1114 * Acquires the PDM lock.
1115 *
1116 * @returns VINF_SUCCESS on success.
1117 * @returns rc if we failed to acquire the lock.
1118 * @param pDevIns The APIC device instance.
1119 * @param rc What to return if we fail to acquire the lock.
1120 */
1121 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1122
1123 /**
1124 * Releases the PDM lock.
1125 *
1126 * @param pDevIns The APIC device instance.
1127 */
1128 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1129#endif
1130
1131 /** Just a safety precaution. */
1132 uint32_t u32TheEnd;
1133} PDMAPICHLPR0;
1134/** Pointer to APIC GC helpers. */
1135typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1136/** Pointer to const APIC helpers. */
1137typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1138
1139/** Current PDMAPICHLPR0 version number. */
1140#define PDM_APICHLPR0_VERSION 0x60010000
1141
1142/**
1143 * APIC HC helpers.
1144 */
1145typedef struct PDMAPICHLPR3
1146{
1147 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1148 uint32_t u32Version;
1149
1150 /**
1151 * Set the interrupt force action flag.
1152 *
1153 * @param pDevIns Device instance of the APIC.
1154 */
1155 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1156
1157 /**
1158 * Clear the interrupt force action flag.
1159 *
1160 * @param pDevIns Device instance of the APIC.
1161 */
1162 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1163
1164 /**
1165 * Sets or clears the APIC bit in the CPUID feature masks.
1166 *
1167 * @param pDevIns Device instance of the APIC.
1168 * @param fEnabled If true the bit is set, else cleared.
1169 */
1170 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1171
1172#ifdef VBOX_WITH_PDM_LOCK
1173 /**
1174 * Acquires the PDM lock.
1175 *
1176 * @returns VINF_SUCCESS on success.
1177 * @returns Fatal error on failure.
1178 * @param pDevIns The APIC device instance.
1179 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1180 */
1181 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1182
1183 /**
1184 * Releases the PDM lock.
1185 *
1186 * @param pDevIns The APIC device instance.
1187 */
1188 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1189#endif
1190
1191 /**
1192 * Gets the address of the GC APIC helpers.
1193 *
1194 * This should be called at both construction and relocation time
1195 * to obtain the correct address of the GC helpers.
1196 *
1197 * @returns GC pointer to the APIC helpers.
1198 * @param pDevIns Device instance of the APIC.
1199 */
1200 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1201
1202 /**
1203 * Gets the address of the R0 APIC helpers.
1204 *
1205 * This should be called at both construction and relocation time
1206 * to obtain the correct address of the R0 helpers.
1207 *
1208 * @returns R0 pointer to the APIC helpers.
1209 * @param pDevIns Device instance of the APIC.
1210 */
1211 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1212
1213 /** Just a safety precaution. */
1214 uint32_t u32TheEnd;
1215} PDMAPICHLPR3;
1216/** Pointer to APIC helpers. */
1217typedef HCPTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1218/** Pointer to const APIC helpers. */
1219typedef HCPTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1220
1221/** Current PDMAPICHLP version number. */
1222#define PDM_APICHLPR3_VERSION 0xfd010000
1223
1224
1225/**
1226 * I/O APIC registration structure.
1227 */
1228typedef struct PDMIOAPICREG
1229{
1230 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1231 uint32_t u32Version;
1232
1233 /**
1234 * Set the an IRQ.
1235 *
1236 * @param pDevIns Device instance of the I/O APIC.
1237 * @param iIrq IRQ number to set.
1238 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1239 */
1240 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1241
1242 /** The name of the GC SetIrq entry point. */
1243 const char *pszSetIrqGC;
1244
1245 /** The name of the R0 SetIrq entry point. */
1246 const char *pszSetIrqR0;
1247} PDMIOAPICREG;
1248/** Pointer to an APIC registration structure. */
1249typedef PDMIOAPICREG *PPDMIOAPICREG;
1250
1251/** Current PDMAPICREG version number. */
1252#define PDM_IOAPICREG_VERSION 0x50010000
1253
1254
1255/**
1256 * IOAPIC GC helpers.
1257 */
1258typedef struct PDMIOAPICHLPGC
1259{
1260 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1261 uint32_t u32Version;
1262
1263 /**
1264 * Private interface between the IOAPIC and APIC.
1265 *
1266 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1267 *
1268 * @returns The current TPR.
1269 * @param pDevIns Device instance of the IOAPIC.
1270 * @param u8Dest See APIC implementation.
1271 * @param u8DestMode See APIC implementation.
1272 * @param u8DeliveryMode See APIC implementation.
1273 * @param iVector See APIC implementation.
1274 * @param u8Polarity See APIC implementation.
1275 * @param u8TriggerMode See APIC implementation.
1276 */
1277 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1278 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1279
1280#ifdef VBOX_WITH_PDM_LOCK
1281 /**
1282 * Acquires the PDM lock.
1283 *
1284 * @returns VINF_SUCCESS on success.
1285 * @returns rc if we failed to acquire the lock.
1286 * @param pDevIns The IOAPIC device instance.
1287 * @param rc What to return if we fail to acquire the lock.
1288 */
1289 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1290
1291 /**
1292 * Releases the PDM lock.
1293 *
1294 * @param pDevIns The IOAPIC device instance.
1295 */
1296 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1297#endif
1298
1299 /** Just a safety precaution. */
1300 uint32_t u32TheEnd;
1301} PDMIOAPICHLPGC;
1302/** Pointer to IOAPIC GC helpers. */
1303typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1304/** Pointer to const IOAPIC helpers. */
1305typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1306
1307/** Current PDMIOAPICHLPGC version number. */
1308#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1309
1310
1311/**
1312 * IOAPIC R0 helpers.
1313 */
1314typedef struct PDMIOAPICHLPR0
1315{
1316 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1317 uint32_t u32Version;
1318
1319 /**
1320 * Private interface between the IOAPIC and APIC.
1321 *
1322 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1323 *
1324 * @returns The current TPR.
1325 * @param pDevIns Device instance of the IOAPIC.
1326 * @param u8Dest See APIC implementation.
1327 * @param u8DestMode See APIC implementation.
1328 * @param u8DeliveryMode See APIC implementation.
1329 * @param iVector See APIC implementation.
1330 * @param u8Polarity See APIC implementation.
1331 * @param u8TriggerMode See APIC implementation.
1332 */
1333 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1334 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1335
1336#ifdef VBOX_WITH_PDM_LOCK
1337 /**
1338 * Acquires the PDM lock.
1339 *
1340 * @returns VINF_SUCCESS on success.
1341 * @returns rc if we failed to acquire the lock.
1342 * @param pDevIns The IOAPIC device instance.
1343 * @param rc What to return if we fail to acquire the lock.
1344 */
1345 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1346
1347 /**
1348 * Releases the PDM lock.
1349 *
1350 * @param pDevIns The IOAPIC device instance.
1351 */
1352 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1353#endif
1354
1355 /** Just a safety precaution. */
1356 uint32_t u32TheEnd;
1357} PDMIOAPICHLPR0;
1358/** Pointer to IOAPIC R0 helpers. */
1359typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1360/** Pointer to const IOAPIC helpers. */
1361typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1362
1363/** Current PDMIOAPICHLPR0 version number. */
1364#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1365
1366/**
1367 * IOAPIC HC helpers.
1368 */
1369typedef struct PDMIOAPICHLPR3
1370{
1371 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1372 uint32_t u32Version;
1373
1374 /**
1375 * Private interface between the IOAPIC and APIC.
1376 *
1377 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1378 *
1379 * @returns The current TPR.
1380 * @param pDevIns Device instance of the IOAPIC.
1381 * @param u8Dest See APIC implementation.
1382 * @param u8DestMode See APIC implementation.
1383 * @param u8DeliveryMode See APIC implementation.
1384 * @param iVector See APIC implementation.
1385 * @param u8Polarity See APIC implementation.
1386 * @param u8TriggerMode See APIC implementation.
1387 */
1388 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1389 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1390
1391#ifdef VBOX_WITH_PDM_LOCK
1392 /**
1393 * Acquires the PDM lock.
1394 *
1395 * @returns VINF_SUCCESS on success.
1396 * @returns Fatal error on failure.
1397 * @param pDevIns The IOAPIC device instance.
1398 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1399 */
1400 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1401
1402 /**
1403 * Releases the PDM lock.
1404 *
1405 * @param pDevIns The IOAPIC device instance.
1406 */
1407 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1408#endif
1409
1410 /**
1411 * Gets the address of the GC IOAPIC helpers.
1412 *
1413 * This should be called at both construction and relocation time
1414 * to obtain the correct address of the GC helpers.
1415 *
1416 * @returns GC pointer to the IOAPIC helpers.
1417 * @param pDevIns Device instance of the IOAPIC.
1418 */
1419 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1420
1421 /**
1422 * Gets the address of the R0 IOAPIC helpers.
1423 *
1424 * This should be called at both construction and relocation time
1425 * to obtain the correct address of the R0 helpers.
1426 *
1427 * @returns R0 pointer to the IOAPIC helpers.
1428 * @param pDevIns Device instance of the IOAPIC.
1429 */
1430 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1431
1432 /** Just a safety precaution. */
1433 uint32_t u32TheEnd;
1434} PDMIOAPICHLPR3;
1435/** Pointer to IOAPIC HC helpers. */
1436typedef HCPTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1437/** Pointer to const IOAPIC helpers. */
1438typedef HCPTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1439
1440/** Current PDMIOAPICHLPR3 version number. */
1441#define PDM_IOAPICHLPR3_VERSION 0xff010000
1442
1443
1444
1445#ifdef IN_RING3
1446
1447/**
1448 * DMA Transfer Handler.
1449 *
1450 * @returns Number of bytes transferred.
1451 * @param pDevIns Device instance of the DMA.
1452 * @param pvUser User pointer.
1453 * @param uChannel Channel number.
1454 * @param off DMA position.
1455 * @param cb Block size.
1456 */
1457typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1458/** Pointer to a FNDMATRANSFERHANDLER(). */
1459typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1460
1461/**
1462 * DMA Controller registration structure.
1463 */
1464typedef struct PDMDMAREG
1465{
1466 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1467 uint32_t u32Version;
1468
1469 /**
1470 * Execute pending transfers.
1471 *
1472 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1473 * @param pDevIns Device instance of the DMAC.
1474 */
1475 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1476
1477 /**
1478 * Register transfer function for DMA channel.
1479 *
1480 * @param pDevIns Device instance of the DMAC.
1481 * @param uChannel Channel number.
1482 * @param pfnTransferHandler Device specific transfer function.
1483 * @param pvUSer User pointer to be passed to the callback.
1484 */
1485 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1486
1487 /**
1488 * Read memory
1489 *
1490 * @returns Number of bytes read.
1491 * @param pDevIns Device instance of the DMAC.
1492 * @param pvBuffer Pointer to target buffer.
1493 * @param off DMA position.
1494 * @param cbBlock Block size.
1495 */
1496 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1497
1498 /**
1499 * Write memory
1500 *
1501 * @returns Number of bytes written.
1502 * @param pDevIns Device instance of the DMAC.
1503 * @param pvBuffer Memory to write.
1504 * @param off DMA position.
1505 * @param cbBlock Block size.
1506 */
1507 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1508
1509 /**
1510 * Set the DREQ line.
1511 *
1512 * @param pDevIns Device instance of the DMAC.
1513 * @param uChannel Channel number.
1514 * @param uLevel Level of the line.
1515 */
1516 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1517
1518 /**
1519 * Get channel mode
1520 *
1521 * @returns Channel mode.
1522 * @param pDevIns Device instance of the DMAC.
1523 * @param uChannel Channel number.
1524 */
1525 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1526
1527} PDMDMACREG;
1528/** Pointer to a DMAC registration structure. */
1529typedef PDMDMACREG *PPDMDMACREG;
1530
1531/** Current PDMDMACREG version number. */
1532#define PDM_DMACREG_VERSION 0xf5010000
1533
1534
1535/**
1536 * DMA Controller device helpers.
1537 */
1538typedef struct PDMDMACHLP
1539{
1540 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1541 uint32_t u32Version;
1542
1543 /* to-be-defined */
1544
1545} PDMDMACHLP;
1546/** Pointer to DMAC helpers. */
1547typedef PDMDMACHLP *PPDMDMACHLP;
1548/** Pointer to const DMAC helpers. */
1549typedef const PDMDMACHLP *PCPDMDMACHLP;
1550
1551/** Current PDMDMACHLP version number. */
1552#define PDM_DMACHLP_VERSION 0xf6010000
1553
1554#endif /* IN_RING3 */
1555
1556
1557
1558/**
1559 * RTC registration structure.
1560 */
1561typedef struct PDMRTCREG
1562{
1563 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1564 uint32_t u32Version;
1565 uint32_t u32Alignment; /**< structure size alignment. */
1566
1567 /**
1568 * Write to a CMOS register and update the checksum if necessary.
1569 *
1570 * @returns VBox status code.
1571 * @param pDevIns Device instance of the RTC.
1572 * @param iReg The CMOS register index.
1573 * @param u8Value The CMOS register value.
1574 */
1575 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1576
1577 /**
1578 * Read a CMOS register.
1579 *
1580 * @returns VBox status code.
1581 * @param pDevIns Device instance of the RTC.
1582 * @param iReg The CMOS register index.
1583 * @param pu8Value Where to store the CMOS register value.
1584 */
1585 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1586
1587} PDMRTCREG;
1588/** Pointer to a RTC registration structure. */
1589typedef PDMRTCREG *PPDMRTCREG;
1590/** Pointer to a const RTC registration structure. */
1591typedef const PDMRTCREG *PCPDMRTCREG;
1592
1593/** Current PDMRTCREG version number. */
1594#define PDM_RTCREG_VERSION 0xfa010000
1595
1596
1597/**
1598 * RTC device helpers.
1599 */
1600typedef struct PDMRTCHLP
1601{
1602 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1603 uint32_t u32Version;
1604
1605 /* to-be-defined */
1606
1607} PDMRTCHLP;
1608/** Pointer to RTC helpers. */
1609typedef PDMRTCHLP *PPDMRTCHLP;
1610/** Pointer to const RTC helpers. */
1611typedef const PDMRTCHLP *PCPDMRTCHLP;
1612
1613/** Current PDMRTCHLP version number. */
1614#define PDM_RTCHLP_VERSION 0xf6010000
1615
1616
1617
1618#ifdef IN_RING3
1619
1620/**
1621 * PDM Device API.
1622 */
1623typedef struct PDMDEVHLP
1624{
1625 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1626 uint32_t u32Version;
1627
1628 /**
1629 * Register a number of I/O ports with a device.
1630 *
1631 * These callbacks are of course for the host context (HC).
1632 * Register HC handlers before guest context (GC) handlers! There must be a
1633 * HC handler for every GC handler!
1634 *
1635 * @returns VBox status.
1636 * @param pDevIns The device instance to register the ports with.
1637 * @param Port First port number in the range.
1638 * @param cPorts Number of ports to register.
1639 * @param pvUser User argument.
1640 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1641 * @param pfnIn Pointer to function which is gonna handle IN operations.
1642 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1643 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1644 * @param pszDesc Pointer to description string. This must not be freed.
1645 */
1646 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1647 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1648 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1649
1650 /**
1651 * Register a number of I/O ports with a device for GC.
1652 *
1653 * These callbacks are for the host context (GC).
1654 * Register host context (HC) handlers before guest context handlers! There must be a
1655 * HC handler for every GC handler!
1656 *
1657 * @returns VBox status.
1658 * @param pDevIns The device instance to register the ports with and which GC module
1659 * to resolve the names against.
1660 * @param Port First port number in the range.
1661 * @param cPorts Number of ports to register.
1662 * @param pvUser User argument.
1663 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1664 * @param pszIn Name of the GC function which is gonna handle IN operations.
1665 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1666 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1667 * @param pszDesc Pointer to description string. This must not be freed.
1668 */
1669 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1670 const char *pszOut, const char *pszIn,
1671 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1672
1673 /**
1674 * Register a number of I/O ports with a device.
1675 *
1676 * These callbacks are of course for the ring-0 host context (R0).
1677 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1678 *
1679 * @returns VBox status.
1680 * @param pDevIns The device instance to register the ports with.
1681 * @param Port First port number in the range.
1682 * @param cPorts Number of ports to register.
1683 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1684 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1685 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1686 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1687 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1688 * @param pszDesc Pointer to description string. This must not be freed.
1689 */
1690 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1691 const char *pszOut, const char *pszIn,
1692 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1693
1694 /**
1695 * Deregister I/O ports.
1696 *
1697 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1698 *
1699 * @returns VBox status.
1700 * @param pDevIns The device instance owning the ports.
1701 * @param Port First port number in the range.
1702 * @param cPorts Number of ports to deregister.
1703 */
1704 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1705
1706
1707 /**
1708 * Register a Memory Mapped I/O (MMIO) region.
1709 *
1710 * These callbacks are of course for the host context (HC).
1711 * Register HC handlers before guest context (GC) handlers! There must be a
1712 * HC handler for every GC handler!
1713 *
1714 * @returns VBox status.
1715 * @param pDevIns The device instance to register the MMIO with.
1716 * @param GCPhysStart First physical address in the range.
1717 * @param cbRange The size of the range (in bytes).
1718 * @param pvUser User argument.
1719 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1720 * @param pfnRead Pointer to function which is gonna handle Read operations.
1721 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1722 * @param pszDesc Pointer to description string. This must not be freed.
1723 */
1724 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1725 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1726 const char *pszDesc));
1727
1728 /**
1729 * Register a Memory Mapped I/O (MMIO) region for GC.
1730 *
1731 * These callbacks are for the guest context (GC).
1732 * Register host context (HC) handlers before guest context handlers! There must be a
1733 * HC handler for every GC handler!
1734 *
1735 * @returns VBox status.
1736 * @param pDevIns The device instance to register the MMIO with.
1737 * @param GCPhysStart First physical address in the range.
1738 * @param cbRange The size of the range (in bytes).
1739 * @param pvUser User argument.
1740 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1741 * @param pszRead Name of the GC function which is gonna handle Read operations.
1742 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1743 * @param pszDesc Pointer to description string. This must not be freed.
1744 */
1745 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1746 const char *pszWrite, const char *pszRead, const char *pszFill,
1747 const char *pszDesc));
1748
1749 /**
1750 * Register a Memory Mapped I/O (MMIO) region for R0.
1751 *
1752 * These callbacks are for the ring-0 host context (R0).
1753 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1754 *
1755 * @returns VBox status.
1756 * @param pDevIns The device instance to register the MMIO with.
1757 * @param GCPhysStart First physical address in the range.
1758 * @param cbRange The size of the range (in bytes).
1759 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1760 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1761 * @param pszRead Name of the GC function which is gonna handle Read operations.
1762 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1763 * @param pszDesc Pointer to description string. This must not be freed.
1764 */
1765 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1766 const char *pszWrite, const char *pszRead, const char *pszFill,
1767 const char *pszDesc));
1768
1769 /**
1770 * Deregister a Memory Mapped I/O (MMIO) region.
1771 *
1772 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1773 *
1774 * @returns VBox status.
1775 * @param pDevIns The device instance owning the MMIO region(s).
1776 * @param GCPhysStart First physical address in the range.
1777 * @param cbRange The size of the range (in bytes).
1778 */
1779 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1780
1781 /**
1782 * Register a ROM (BIOS) region.
1783 *
1784 * It goes without saying that this is read-only memory. The memory region must be
1785 * in unassigned memory. I.e. from the top of the address space or on the PC in
1786 * the 0xa0000-0xfffff range.
1787 *
1788 * @returns VBox status.
1789 * @param pDevIns The device instance owning the ROM region.
1790 * @param GCPhysStart First physical address in the range.
1791 * Must be page aligned!
1792 * @param cbRange The size of the range (in bytes).
1793 * Must be page aligned!
1794 * @param pvBinary Pointer to the binary data backing the ROM image.
1795 * This must be cbRange bytes big.
1796 * It will be copied and doesn't have to stick around.
1797 * @param pszDesc Pointer to description string. This must not be freed.
1798 * @remark There is no way to remove the rom, automatically on device cleanup or
1799 * manually from the device yet. At present I doubt we need such features...
1800 */
1801 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc));
1802
1803 /**
1804 * Register a save state data unit.
1805 *
1806 * @returns VBox status.
1807 * @param pDevIns Device instance.
1808 * @param pszName Data unit name.
1809 * @param u32Instance The instance identifier of the data unit.
1810 * This must together with the name be unique.
1811 * @param u32Version Data layout version number.
1812 * @param cbGuess The approximate amount of data in the unit.
1813 * Only for progress indicators.
1814 * @param pfnSavePrep Prepare save callback, optional.
1815 * @param pfnSaveExec Execute save callback, optional.
1816 * @param pfnSaveDone Done save callback, optional.
1817 * @param pfnLoadPrep Prepare load callback, optional.
1818 * @param pfnLoadExec Execute load callback, optional.
1819 * @param pfnLoadDone Done load callback, optional.
1820 */
1821 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1822 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1823 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1824
1825 /**
1826 * Creates a timer.
1827 *
1828 * @returns VBox status.
1829 * @param pDevIns Device instance.
1830 * @param enmClock The clock to use on this timer.
1831 * @param pfnCallback Callback function.
1832 * @param pszDesc Pointer to description string which must stay around
1833 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1834 * @param ppTimer Where to store the timer on success.
1835 */
1836 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer));
1837
1838 /**
1839 * Creates an external timer.
1840 *
1841 * @returns timer pointer
1842 * @param pDevIns Device instance.
1843 * @param enmClock The clock to use on this timer.
1844 * @param pfnCallback Callback function.
1845 * @param pvUser User pointer
1846 * @param pszDesc Pointer to description string which must stay around
1847 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1848 */
1849 DECLR3CALLBACKMEMBER(PTMTIMERHC, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1850
1851 /**
1852 * Registers the device with the default PCI bus.
1853 *
1854 * @returns VBox status code.
1855 * @param pDevIns Device instance.
1856 * @param pPciDev The PCI device structure.
1857 * Any PCI enabled device must keep this in it's instance data!
1858 * Fill in the PCI data config before registration, please.
1859 * @remark This is the simple interface, a Ex interface will be created if
1860 * more features are needed later.
1861 */
1862 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1863
1864 /**
1865 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1866 *
1867 * @returns VBox status code.
1868 * @param pDevIns Device instance.
1869 * @param iRegion The region number.
1870 * @param cbRegion Size of the region.
1871 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1872 * @param pfnCallback Callback for doing the mapping.
1873 */
1874 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1875
1876 /**
1877 * Register PCI configuration space read/write callbacks.
1878 *
1879 * @param pDevIns Device instance.
1880 * @param pPciDev The PCI device structure.
1881 * If NULL the default PCI device for this device instance is used.
1882 * @param pfnRead Pointer to the user defined PCI config read function.
1883 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1884 * PCI config read function. This way, user can decide when (and if)
1885 * to call default PCI config read function. Can be NULL.
1886 * @param pfnWrite Pointer to the user defined PCI config write function.
1887 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1888 * PCI config write function. This way, user can decide when (and if)
1889 * to call default PCI config write function. Can be NULL.
1890 * @thread EMT
1891 */
1892 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1893 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1894
1895 /**
1896 * Set the IRQ for a PCI device.
1897 *
1898 * @param pDevIns Device instance.
1899 * @param iIrq IRQ number to set.
1900 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1901 * @thread Any thread, but will involve the emulation thread.
1902 */
1903 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1904
1905 /**
1906 * Set the IRQ for a PCI device, but don't wait for EMT to process
1907 * the request when not called from EMT.
1908 *
1909 * @param pDevIns Device instance.
1910 * @param iIrq IRQ number to set.
1911 * @param iLevel IRQ level.
1912 * @thread Any thread, but will involve the emulation thread.
1913 */
1914 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1915
1916 /**
1917 * Set ISA IRQ for a device.
1918 *
1919 * @param pDevIns Device instance.
1920 * @param iIrq IRQ number to set.
1921 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1922 * @thread Any thread, but will involve the emulation thread.
1923 */
1924 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1925
1926 /**
1927 * Set the ISA IRQ for a device, but don't wait for EMT to process
1928 * the request when not called from EMT.
1929 *
1930 * @param pDevIns Device instance.
1931 * @param iIrq IRQ number to set.
1932 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1933 * @thread Any thread, but will involve the emulation thread.
1934 */
1935 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1936
1937 /**
1938 * Attaches a driver (chain) to the device.
1939 *
1940 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1941 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1942 *
1943 * @returns VBox status code.
1944 * @param pDevIns Device instance.
1945 * @param iLun The logical unit to attach.
1946 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1947 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1948 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1949 * for the live of the device instance.
1950 */
1951 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1952
1953 /**
1954 * Allocate memory which is associated with current VM instance
1955 * and automatically freed on it's destruction.
1956 *
1957 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1958 * @param pDevIns Device instance.
1959 * @param cb Number of bytes to allocate.
1960 */
1961 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1962
1963 /**
1964 * Allocate memory which is associated with current VM instance
1965 * and automatically freed on it's destruction. The memory is ZEROed.
1966 *
1967 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1968 * @param pDevIns Device instance.
1969 * @param cb Number of bytes to allocate.
1970 */
1971 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1972
1973 /**
1974 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1975 *
1976 * @param pDevIns Device instance.
1977 * @param pv Pointer to the memory to free.
1978 */
1979 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1980
1981 /**
1982 * Set the VM error message
1983 *
1984 * @returns rc.
1985 * @param pDevIns Device instance.
1986 * @param rc VBox status code.
1987 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1988 * @param pszFormat Error message format string.
1989 * @param ... Error message arguments.
1990 */
1991 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
1992
1993 /**
1994 * Set the VM error message
1995 *
1996 * @returns rc.
1997 * @param pDevIns Device instance.
1998 * @param rc VBox status code.
1999 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2000 * @param pszFormat Error message format string.
2001 * @param va Error message arguments.
2002 */
2003 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2004
2005 /**
2006 * Set the VM runtime error message
2007 *
2008 * @returns VBox status code.
2009 * @param pDevIns Device instance.
2010 * @param fFatal Whether it is a fatal error or not.
2011 * @param pszErrorID Error ID string.
2012 * @param pszFormat Error message format string.
2013 * @param ... Error message arguments.
2014 */
2015 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2016
2017 /**
2018 * Set the VM runtime error message
2019 *
2020 * @returns VBox status code.
2021 * @param pDevIns Device instance.
2022 * @param fFatal Whether it is a fatal error or not.
2023 * @param pszErrorID Error ID string.
2024 * @param pszFormat Error message format string.
2025 * @param va Error message arguments.
2026 */
2027 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2028
2029 /**
2030 * Assert that the current thread is the emulation thread.
2031 *
2032 * @returns True if correct.
2033 * @returns False if wrong.
2034 * @param pDevIns Device instance.
2035 * @param pszFile Filename of the assertion location.
2036 * @param iLine The linenumber of the assertion location.
2037 * @param pszFunction Function of the assertion location.
2038 */
2039 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2040
2041 /**
2042 * Assert that the current thread is NOT the emulation thread.
2043 *
2044 * @returns True if correct.
2045 * @returns False if wrong.
2046 * @param pDevIns Device instance.
2047 * @param pszFile Filename of the assertion location.
2048 * @param iLine The linenumber of the assertion location.
2049 * @param pszFunction Function of the assertion location.
2050 */
2051 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2052
2053 /**
2054 * Stops the VM and enters the debugger to look at the guest state.
2055 *
2056 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2057 * invoking this function directly.
2058 *
2059 * @returns VBox status code which must be passed up to the VMM.
2060 * @param pDevIns Device instance.
2061 * @param pszFile Filename of the assertion location.
2062 * @param iLine The linenumber of the assertion location.
2063 * @param pszFunction Function of the assertion location.
2064 * @param pszFormat Message. (optional)
2065 * @param args Message parameters.
2066 */
2067 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2068
2069 /**
2070 * Register a info handler with DBGF,
2071 *
2072 * @returns VBox status code.
2073 * @param pDevIns Device instance.
2074 * @param pszName The identifier of the info.
2075 * @param pszDesc The description of the info and any arguments the handler may take.
2076 * @param pfnHandler The handler function to be called to display the info.
2077 */
2078 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2079
2080 /**
2081 * Registers a statistics sample if statistics are enabled.
2082 *
2083 * @param pDevIns Device instance of the DMA.
2084 * @param pvSample Pointer to the sample.
2085 * @param enmType Sample type. This indicates what pvSample is pointing at.
2086 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2087 * Further nesting is possible.
2088 * @param enmUnit Sample unit.
2089 * @param pszDesc Sample description.
2090 */
2091 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2092
2093 /**
2094 * Same as pfnSTAMRegister except that the name is specified in a
2095 * RTStrPrintf like fashion.
2096 *
2097 * @returns VBox status.
2098 * @param pDevIns Device instance of the DMA.
2099 * @param pvSample Pointer to the sample.
2100 * @param enmType Sample type. This indicates what pvSample is pointing at.
2101 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2102 * @param enmUnit Sample unit.
2103 * @param pszDesc Sample description.
2104 * @param pszName The sample name format string.
2105 * @param ... Arguments to the format string.
2106 */
2107 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2108 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2109
2110 /**
2111 * Same as pfnSTAMRegister except that the name is specified in a
2112 * RTStrPrintfV like fashion.
2113 *
2114 * @returns VBox status.
2115 * @param pDevIns Device instance of the DMA.
2116 * @param pvSample Pointer to the sample.
2117 * @param enmType Sample type. This indicates what pvSample is pointing at.
2118 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2119 * @param enmUnit Sample unit.
2120 * @param pszDesc Sample description.
2121 * @param pszName The sample name format string.
2122 * @param args Arguments to the format string.
2123 */
2124 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2125 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2126
2127 /**
2128 * Register the RTC device.
2129 *
2130 * @returns VBox status code.
2131 * @param pDevIns Device instance.
2132 * @param pRtcReg Pointer to a RTC registration structure.
2133 * @param ppRtcHlp Where to store the pointer to the helper functions.
2134 */
2135 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2136
2137 /**
2138 * Create a queue.
2139 *
2140 * @returns VBox status code.
2141 * @param pDevIns The device instance.
2142 * @param cbItem The size of a queue item.
2143 * @param cItems The number of items in the queue.
2144 * @param cMilliesInterval The number of milliseconds between polling the queue.
2145 * If 0 then the emulation thread will be notified whenever an item arrives.
2146 * @param pfnCallback The consumer function.
2147 * @param fGCEnabled Set if the queue should work in GC too.
2148 * @param ppQueue Where to store the queue handle on success.
2149 * @thread The emulation thread.
2150 */
2151 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2152 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2153
2154 /**
2155 * Initializes a PDM critical section.
2156 *
2157 * The PDM critical sections are derived from the IPRT critical sections, but
2158 * works in GC as well.
2159 *
2160 * @returns VBox status code.
2161 * @param pDevIns Device instance.
2162 * @param pCritSect Pointer to the critical section.
2163 * @param pszName The name of the critical section (for statistics).
2164 */
2165 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2166
2167 /**
2168 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2169 *
2170 * @returns pTime.
2171 * @param pDevIns Device instance.
2172 * @param pTime Where to store the time.
2173 */
2174 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2175
2176 /** Space reserved for future members.
2177 * @{ */
2178 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
2179 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2180 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2181 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2182 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2183 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2184 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2185 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2186 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2187 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2188 /** @} */
2189
2190
2191 /** API available to trusted devices only.
2192 *
2193 * These APIs are providing unrestricted access to the guest and the VM,
2194 * or they are interacting intimately with PDM.
2195 *
2196 * @{
2197 */
2198 /**
2199 * Gets the VM handle. Restricted API.
2200 *
2201 * @returns VM Handle.
2202 * @param pDevIns Device instance.
2203 */
2204 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2205
2206 /**
2207 * Register the PCI Bus.
2208 *
2209 * @returns VBox status code.
2210 * @param pDevIns Device instance.
2211 * @param pPciBusReg Pointer to PCI bus registration structure.
2212 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2213 */
2214 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2215
2216 /**
2217 * Register the PIC device.
2218 *
2219 * @returns VBox status code.
2220 * @param pDevIns Device instance.
2221 * @param pPicReg Pointer to a PIC registration structure.
2222 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2223 */
2224 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2225
2226 /**
2227 * Register the APIC device.
2228 *
2229 * @returns VBox status code.
2230 * @param pDevIns Device instance.
2231 * @param pApicReg Pointer to a APIC registration structure.
2232 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2233 */
2234 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2235
2236 /**
2237 * Register the I/O APIC device.
2238 *
2239 * @returns VBox status code.
2240 * @param pDevIns Device instance.
2241 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2242 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2243 */
2244 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2245
2246 /**
2247 * Register the DMA device.
2248 *
2249 * @returns VBox status code.
2250 * @param pDevIns Device instance.
2251 * @param pDmacReg Pointer to a DMAC registration structure.
2252 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2253 */
2254 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2255
2256 /**
2257 * Read physical memory.
2258 *
2259 * @param pDevIns Device instance.
2260 * @param GCPhys Physical address start reading from.
2261 * @param pvBuf Where to put the read bits.
2262 * @param cbRead How many bytes to read.
2263 * @thread Any thread, but the call may involve the emulation thread.
2264 */
2265 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2266
2267 /**
2268 * Write to physical memory.
2269 *
2270 * @param pDevIns Device instance.
2271 * @param GCPhys Physical address to write to.
2272 * @param pvBuf What to write.
2273 * @param cbWrite How many bytes to write.
2274 * @thread Any thread, but the call may involve the emulation thread.
2275 */
2276 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2277
2278 /**
2279 * Read guest physical memory by virtual address.
2280 *
2281 * @param pDevIns Device instance.
2282 * @param pvDst Where to put the read bits.
2283 * @param GCVirtSrc Guest virtual address to start reading from.
2284 * @param cb How many bytes to read.
2285 * @thread The emulation thread.
2286 */
2287 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2288
2289 /**
2290 * Write to guest physical memory by virtual address.
2291 *
2292 * @param pDevIns Device instance.
2293 * @param GCVirtDst Guest virtual address to write to.
2294 * @param pvSrc What to write.
2295 * @param cb How many bytes to write.
2296 * @thread The emulation thread.
2297 */
2298 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2299
2300 /**
2301 * Reserve physical address space for ROM and MMIO ranges.
2302 *
2303 * @returns VBox status code.
2304 * @param pDevIns Device instance.
2305 * @param GCPhys Start physical address.
2306 * @param cbRange The size of the range.
2307 * @param pszDesc Description string.
2308 * @thread The emulation thread.
2309 */
2310 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2311
2312 /**
2313 * Convert a guest physical address to a host virtual address.
2314 *
2315 * @returns VBox status code.
2316 * @param pDevIns Device instance.
2317 * @param GCPhys Start physical address.
2318 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2319 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2320 * @thread Any thread.
2321 */
2322 DECLR3CALLBACKMEMBER(int, pfnPhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2323
2324 /**
2325 * Convert a guest virtual address to a host virtual address.
2326 *
2327 * @returns VBox status code.
2328 * @param pDevIns Device instance.
2329 * @param GCPtr Guest virtual address.
2330 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2331 * @thread The emulation thread.
2332 * @remark Careful with page boundraries.
2333 */
2334 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2335
2336 /**
2337 * Checks if the Gate A20 is enabled or not.
2338 *
2339 * @returns true if A20 is enabled.
2340 * @returns false if A20 is disabled.
2341 * @param pDevIns Device instance.
2342 * @thread The emulation thread.
2343 */
2344 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2345
2346 /**
2347 * Enables or disables the Gate A20.
2348 *
2349 * @param pDevIns Device instance.
2350 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2351 * @thread The emulation thread.
2352 */
2353 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2354
2355 /**
2356 * Resets the VM.
2357 *
2358 * @returns The appropriate VBox status code to pass around on reset.
2359 * @param pDevIns Device instance.
2360 * @thread The emulation thread.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2363
2364 /**
2365 * Suspends the VM.
2366 *
2367 * @returns The appropriate VBox status code to pass around on suspend.
2368 * @param pDevIns Device instance.
2369 * @thread The emulation thread.
2370 */
2371 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2372
2373 /**
2374 * Power off the VM.
2375 *
2376 * @returns The appropriate VBox status code to pass around on power off.
2377 * @param pDevIns Device instance.
2378 * @thread The emulation thread.
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2381
2382 /**
2383 * Acquire global VM lock
2384 *
2385 * @returns VBox status code
2386 * @param pDevIns Device instance.
2387 */
2388 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2389
2390 /**
2391 * Release global VM lock
2392 *
2393 * @returns VBox status code
2394 * @param pDevIns Device instance.
2395 */
2396 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2397
2398 /**
2399 * Check that the current thread owns the global VM lock.
2400 *
2401 * @returns boolean
2402 * @param pDevIns Device instance.
2403 * @param pszFile Filename of the assertion location.
2404 * @param iLine Linenumber of the assertion location.
2405 * @param pszFunction Function of the assertion location.
2406 */
2407 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2408
2409 /**
2410 * Register transfer function for DMA channel.
2411 *
2412 * @returns VBox status code.
2413 * @param pDevIns Device instance.
2414 * @param uChannel Channel number.
2415 * @param pfnTransferHandler Device specific transfer callback function.
2416 * @param pvUser User pointer to pass to the callback.
2417 * @thread EMT
2418 */
2419 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2420
2421 /**
2422 * Read memory.
2423 *
2424 * @returns VBox status code.
2425 * @param pDevIns Device instance.
2426 * @param uChannel Channel number.
2427 * @param pvBuffer Pointer to target buffer.
2428 * @param off DMA position.
2429 * @param cbBlock Block size.
2430 * @param pcbRead Where to store the number of bytes which was read. optional.
2431 * @thread EMT
2432 */
2433 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2434
2435 /**
2436 * Write memory.
2437 *
2438 * @returns VBox status code.
2439 * @param pDevIns Device instance.
2440 * @param uChannel Channel number.
2441 * @param pvBuffer Memory to write.
2442 * @param off DMA position.
2443 * @param cbBlock Block size.
2444 * @param pcbWritten Where to store the number of bytes which was written. optional.
2445 * @thread EMT
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2448
2449 /**
2450 * Set the DREQ line.
2451 *
2452 * @returns VBox status code.
2453 * @param pDevIns Device instance.
2454 * @param uChannel Channel number.
2455 * @param uLevel Level of the line.
2456 * @thread EMT
2457 */
2458 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2459
2460 /**
2461 * Get channel mode.
2462 *
2463 * @returns Channel mode. See specs.
2464 * @param pDevIns Device instance.
2465 * @param uChannel Channel number.
2466 * @thread EMT
2467 */
2468 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2469
2470 /**
2471 * Schedule DMA execution.
2472 *
2473 * @param pDevIns Device instance.
2474 * @thread Any thread.
2475 */
2476 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2477
2478 /**
2479 * Write CMOS value and update the checksum(s).
2480 *
2481 * @returns VBox status code.
2482 * @param pDevIns Device instance.
2483 * @param iReg The CMOS register index.
2484 * @param u8Value The CMOS register value.
2485 * @thread EMT
2486 */
2487 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2488
2489 /**
2490 * Read CMOS value.
2491 *
2492 * @returns VBox status code.
2493 * @param pDevIns Device instance.
2494 * @param iReg The CMOS register index.
2495 * @param pu8Value Where to store the CMOS register value.
2496 * @thread EMT
2497 */
2498 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2499
2500 /**
2501 * Query CPUID.
2502 *
2503 * @param pDevIns Device instance.
2504 * @param iLeaf The CPUID leaf to get.
2505 * @param pEax Where to store the EAX value.
2506 * @param pEbx Where to store the EBX value.
2507 * @param pEcx Where to store the ECX value.
2508 * @param pEdx Where to store the EDX value.
2509 */
2510 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2511
2512 /** @} */
2513
2514 /** Just a safety precaution. (The value is 0.) */
2515 uint32_t u32TheEnd;
2516} PDMDEVHLP;
2517#endif /* !IN_RING3 */
2518/** Pointer PDM Device API. */
2519typedef HCPTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2520/** Pointer PDM Device API. */
2521typedef HCPTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2522
2523/** Current PDMDEVHLP version number. */
2524#define PDM_DEVHLP_VERSION 0xf2040000
2525
2526
2527/**
2528 * PDM Device API - GC Variant.
2529 */
2530typedef struct PDMDEVHLPGC
2531{
2532 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2533 uint32_t u32Version;
2534
2535 /**
2536 * Set the IRQ for a PCI device.
2537 *
2538 * @param pDevIns Device instance.
2539 * @param iIrq IRQ number to set.
2540 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2541 * @thread Any thread, but will involve the emulation thread.
2542 */
2543 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2544
2545 /**
2546 * Set ISA IRQ for a device.
2547 *
2548 * @param pDevIns Device instance.
2549 * @param iIrq IRQ number to set.
2550 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2551 * @thread Any thread, but will involve the emulation thread.
2552 */
2553 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2554
2555 /**
2556 * Read physical memory.
2557 *
2558 * @param pDevIns Device instance.
2559 * @param GCPhys Physical address start reading from.
2560 * @param pvBuf Where to put the read bits.
2561 * @param cbRead How many bytes to read.
2562 */
2563 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2564
2565 /**
2566 * Write to physical memory.
2567 *
2568 * @param pDevIns Device instance.
2569 * @param GCPhys Physical address to write to.
2570 * @param pvBuf What to write.
2571 * @param cbWrite How many bytes to write.
2572 */
2573 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2574
2575 /**
2576 * Checks if the Gate A20 is enabled or not.
2577 *
2578 * @returns true if A20 is enabled.
2579 * @returns false if A20 is disabled.
2580 * @param pDevIns Device instance.
2581 * @thread The emulation thread.
2582 */
2583 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2584
2585 /**
2586 * Set the VM error message
2587 *
2588 * @returns rc.
2589 * @param pDrvIns Driver instance.
2590 * @param rc VBox status code.
2591 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2592 * @param pszFormat Error message format string.
2593 * @param ... Error message arguments.
2594 */
2595 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2596
2597 /**
2598 * Set the VM error message
2599 *
2600 * @returns rc.
2601 * @param pDrvIns Driver instance.
2602 * @param rc VBox status code.
2603 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2604 * @param pszFormat Error message format string.
2605 * @param va Error message arguments.
2606 */
2607 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2608
2609 /**
2610 * Set the VM runtime error message
2611 *
2612 * @returns VBox status code.
2613 * @param pDevIns Device instance.
2614 * @param fFatal Whether it is a fatal error or not.
2615 * @param pszErrorID Error ID string.
2616 * @param pszFormat Error message format string.
2617 * @param ... Error message arguments.
2618 */
2619 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2620
2621 /**
2622 * Set the VM runtime error message
2623 *
2624 * @returns VBox status code.
2625 * @param pDevIns Device instance.
2626 * @param fFatal Whether it is a fatal error or not.
2627 * @param pszErrorID Error ID string.
2628 * @param pszFormat Error message format string.
2629 * @param va Error message arguments.
2630 */
2631 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2632
2633 /**
2634 * Set parameters for pending MMIO patch operation
2635 *
2636 * @returns VBox status code.
2637 * @param pDevIns Device instance.
2638 * @param GCPhys MMIO physical address
2639 * @param pCachedData GC pointer to cached data
2640 */
2641 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2642
2643 /** Just a safety precaution. */
2644 uint32_t u32TheEnd;
2645} PDMDEVHLPGC;
2646/** Pointer PDM Device GC API. */
2647typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2648/** Pointer PDM Device GC API. */
2649typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2650
2651/** Current PDMDEVHLP version number. */
2652#define PDM_DEVHLPGC_VERSION 0xfb010000
2653
2654
2655/**
2656 * PDM Device API - R0 Variant.
2657 */
2658typedef struct PDMDEVHLPR0
2659{
2660 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2661 uint32_t u32Version;
2662
2663 /**
2664 * Set the IRQ for a PCI device.
2665 *
2666 * @param pDevIns Device instance.
2667 * @param iIrq IRQ number to set.
2668 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2669 * @thread Any thread, but will involve the emulation thread.
2670 */
2671 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2672
2673 /**
2674 * Set ISA IRQ for a device.
2675 *
2676 * @param pDevIns Device instance.
2677 * @param iIrq IRQ number to set.
2678 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2679 * @thread Any thread, but will involve the emulation thread.
2680 */
2681 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2682
2683 /**
2684 * Read physical memory.
2685 *
2686 * @param pDevIns Device instance.
2687 * @param GCPhys Physical address start reading from.
2688 * @param pvBuf Where to put the read bits.
2689 * @param cbRead How many bytes to read.
2690 */
2691 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2692
2693 /**
2694 * Write to physical memory.
2695 *
2696 * @param pDevIns Device instance.
2697 * @param GCPhys Physical address to write to.
2698 * @param pvBuf What to write.
2699 * @param cbWrite How many bytes to write.
2700 */
2701 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2702
2703 /**
2704 * Checks if the Gate A20 is enabled or not.
2705 *
2706 * @returns true if A20 is enabled.
2707 * @returns false if A20 is disabled.
2708 * @param pDevIns Device instance.
2709 * @thread The emulation thread.
2710 */
2711 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2712
2713 /**
2714 * Set the VM error message
2715 *
2716 * @returns rc.
2717 * @param pDrvIns Driver instance.
2718 * @param rc VBox status code.
2719 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2720 * @param pszFormat Error message format string.
2721 * @param ... Error message arguments.
2722 */
2723 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2724
2725 /**
2726 * Set the VM error message
2727 *
2728 * @returns rc.
2729 * @param pDrvIns Driver instance.
2730 * @param rc VBox status code.
2731 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2732 * @param pszFormat Error message format string.
2733 * @param va Error message arguments.
2734 */
2735 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2736
2737 /**
2738 * Set the VM runtime error message
2739 *
2740 * @returns VBox status code.
2741 * @param pDevIns Device instance.
2742 * @param fFatal Whether it is a fatal error or not.
2743 * @param pszErrorID Error ID string.
2744 * @param pszFormat Error message format string.
2745 * @param ... Error message arguments.
2746 */
2747 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2748
2749 /**
2750 * Set the VM runtime error message
2751 *
2752 * @returns VBox status code.
2753 * @param pDevIns Device instance.
2754 * @param fFatal Whether it is a fatal error or not.
2755 * @param pszErrorID Error ID string.
2756 * @param pszFormat Error message format string.
2757 * @param va Error message arguments.
2758 */
2759 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2760
2761 /**
2762 * Set parameters for pending MMIO patch operation
2763 *
2764 * @returns rc.
2765 * @param pDevIns Device instance.
2766 * @param GCPhys MMIO physical address
2767 * @param pCachedData GC pointer to cached data
2768 */
2769 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2770
2771 /** Just a safety precaution. */
2772 uint32_t u32TheEnd;
2773} PDMDEVHLPR0;
2774/** Pointer PDM Device R0 API. */
2775typedef HCPTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2776/** Pointer PDM Device GC API. */
2777typedef HCPTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2778
2779/** Current PDMDEVHLP version number. */
2780#define PDM_DEVHLPR0_VERSION 0xfb010000
2781
2782
2783
2784/**
2785 * PDM Device Instance.
2786 */
2787typedef struct PDMDEVINS
2788{
2789 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2790 uint32_t u32Version;
2791 /** Device instance number. */
2792 RTUINT iInstance;
2793 /** The base interface of the device.
2794 * The device constructor initializes this if it has any
2795 * device level interfaces to export. To obtain this interface
2796 * call PDMR3QueryDevice(). */
2797 PDMIBASE IBase;
2798
2799 /** Internal data. */
2800 union
2801 {
2802#ifdef PDMDEVINSINT_DECLARED
2803 PDMDEVINSINT s;
2804#endif
2805 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2806 } Internal;
2807
2808 /** Pointer the HC PDM Device API. */
2809 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2810 /** Pointer the R0 PDM Device API. */
2811 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2812 /** Pointer to device registration structure. */
2813 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2814 /** Configuration handle. */
2815 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2816 /** Pointer to device instance data. */
2817 R3PTRTYPE(void *) pvInstanceDataR3;
2818 /** Pointer to device instance data. */
2819 R0PTRTYPE(void *) pvInstanceDataR0;
2820 /** Pointer the GC PDM Device API. */
2821 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2822 /** Pointer to device instance data. */
2823 GCPTRTYPE(void *) pvInstanceDataGC;
2824 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2825 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2826 /** Device instance data. The size of this area is defined
2827 * in the PDMDEVREG::cbInstanceData field. */
2828 char achInstanceData[8];
2829} PDMDEVINS;
2830
2831/** Current DEVREG version number. */
2832#define PDM_DEVINS_VERSION 0xf3010000
2833
2834/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2835#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2836
2837
2838/** @def PDMDEV_ASSERT_EMT
2839 * Assert that the current thread is the emulation thread.
2840 */
2841#ifdef VBOX_STRICT
2842# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2843#else
2844# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2845#endif
2846
2847/** @def PDMDEV_ASSERT_OTHER
2848 * Assert that the current thread is NOT the emulation thread.
2849 */
2850#ifdef VBOX_STRICT
2851# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2852#else
2853# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2854#endif
2855
2856/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2857 * Assert that the current thread is owner of the VM lock.
2858 */
2859#ifdef VBOX_STRICT
2860# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2861#else
2862# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
2863#endif
2864
2865/** @def PDMDEV_SET_ERROR
2866 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
2867 */
2868#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
2869 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
2870
2871/** @def PDMDEV_SET_RUNTIME_ERROR
2872 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
2873 */
2874#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
2875 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
2876
2877/** @def PDMINS2DATA
2878 * Converts a PDM Device or Driver instance pointer to a pointer to the instance data.
2879 */
2880#define PDMINS2DATA(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] )
2881
2882/** @def PDMINS2DATA_GCPTR
2883 * Converts a PDM Device or Driver instance pointer to a GC pointer to the instance data.
2884 */
2885#define PDMINS2DATA_GCPTR(pIns) ( (pIns)->pvInstanceDataGC )
2886
2887/** @def PDMINS2DATA_R3PTR
2888 * Converts a PDM Device or Driver instance pointer to a HC pointer to the instance data.
2889 */
2890#define PDMINS2DATA_R3PTR(pIns) ( (pIns)->pvInstanceDataR3 )
2891
2892 /** @def PDMINS2DATA_R0PTR
2893 * Converts a PDM Device or Driver instance pointer to a R0 pointer to the instance data.
2894 */
2895#define PDMINS2DATA_R0PTR(pIns) ( (pIns)->pvInstanceDataR0 )
2896
2897/** @def PDMDEVINS_2_GCPTR
2898 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
2899 */
2900#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2901
2902/** @def PDMDEVINS_2_R3PTR
2903 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
2904 */
2905#define PDMDEVINS_2_R3PTR(pDevIns) ( (HCPTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2906
2907/** @def PDMDEVINS_2_R0PTR
2908 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
2909 */
2910#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2911
2912
2913/**
2914 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
2915 *
2916 * @returns VBox status code which must be passed up to the VMM.
2917 * @param pDevIns Device instance.
2918 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2919 * @param pszFormat Message. (optional)
2920 * @param ... Message parameters.
2921 */
2922DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
2923{
2924#ifdef VBOX_STRICT
2925# ifdef IN_RING3
2926 int rc;
2927 va_list args;
2928 va_start(args, pszFormat);
2929 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
2930 va_end(args);
2931 return rc;
2932# else
2933 return VINF_EM_DBG_STOP;
2934# endif
2935#else
2936 return VINF_SUCCESS;
2937#endif
2938}
2939
2940
2941#ifdef IN_RING3
2942/**
2943 * @copydoc PDMDEVHLP::pfnIOPortRegister
2944 */
2945DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2946 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2947 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
2948{
2949 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
2950}
2951
2952/**
2953 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
2954 */
2955DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
2956 const char *pszOut, const char *pszIn, const char *pszOutStr,
2957 const char *pszInStr, const char *pszDesc)
2958{
2959 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2960}
2961
2962/**
2963 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
2964 */
2965DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2966 const char *pszOut, const char *pszIn, const char *pszOutStr,
2967 const char *pszInStr, const char *pszDesc)
2968{
2969 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2970}
2971
2972/**
2973 * @copydoc PDMDEVHLP::pfnMMIORegister
2974 */
2975DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2976 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2977 const char *pszDesc)
2978{
2979 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
2980}
2981
2982/**
2983 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
2984 */
2985DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2986 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2987{
2988 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2989}
2990
2991/**
2992 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
2993 */
2994DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2995 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2996{
2997 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2998}
2999
3000/**
3001 * @copydoc PDMDEVHLP::pfnROMRegister
3002 */
3003DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
3004{
3005 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
3006}
3007
3008/**
3009 * @copydoc PDMDEVHLP::pfnSSMRegister
3010 */
3011DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3012 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3013 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3014{
3015 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3016 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3017 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3018}
3019
3020/**
3021 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3022 */
3023DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
3024{
3025 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3026}
3027
3028/**
3029 * @copydoc PDMDEVHLP::pfnPCIRegister
3030 */
3031DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3032{
3033 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3034}
3035
3036/**
3037 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3038 */
3039DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3040{
3041 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3042}
3043
3044/**
3045 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3046 */
3047DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3048 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3049{
3050 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3051}
3052
3053/**
3054 * @copydoc PDMDEVHLP::pfnDriverAttach
3055 */
3056DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3057{
3058 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3059}
3060
3061/**
3062 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3063 */
3064DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3065{
3066 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3067}
3068
3069/**
3070 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3071 */
3072DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3073{
3074 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3075}
3076
3077/**
3078 * @copydoc PDMDEVHLP::pfnMMHeapFree
3079 */
3080DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3081{
3082 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3083}
3084
3085/**
3086 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3087 */
3088DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3089{
3090 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3091}
3092
3093/**
3094 * @copydoc PDMDEVHLP::pfnSTAMRegister
3095 */
3096DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3097{
3098 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3099}
3100
3101/**
3102 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3103 */
3104DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3105 const char *pszDesc, const char *pszName, ...)
3106{
3107 va_list va;
3108 va_start(va, pszName);
3109 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3110 va_end(va);
3111}
3112
3113/**
3114 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3115 */
3116DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3117 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3118{
3119 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3120}
3121
3122/**
3123 * @copydoc PDMDEVHLP::pfnCritSectInit
3124 */
3125DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3126{
3127 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3128}
3129
3130/**
3131 * @copydoc PDMDEVHLP::pfnUTCNow
3132 */
3133DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3134{
3135 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3136}
3137
3138/**
3139 * @copydoc PDMDEVHLP::pfnGetVM
3140 */
3141DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3142{
3143 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3144}
3145
3146/**
3147 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3148 */
3149DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3150{
3151 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3152}
3153
3154/**
3155 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3156 */
3157DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3158{
3159 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3160}
3161
3162/**
3163 * @copydoc PDMDEVHLP::pfnPhysReserve
3164 */
3165DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3166{
3167 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3168}
3169
3170/**
3171 * @copydoc PDMDEVHLP::pfnPhys2HCVirt
3172 */
3173DECLINLINE(int) PDMDevHlpPhys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3174{
3175 return pDevIns->pDevHlp->pfnPhys2HCVirt(pDevIns, GCPhys, cbRange, ppvHC);
3176}
3177
3178/**
3179 * @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr
3180 */
3181DECLINLINE(int) PDMDevHlpPhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3182{
3183 return pDevIns->pDevHlp->pfnPhysGCPtr2HCPtr(pDevIns, GCPtr, pHCPtr);
3184}
3185
3186/**
3187 * @copydoc PDMDEVHLP::pfnA20Set
3188 */
3189DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3190{
3191 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3192}
3193
3194/**
3195 * @copydoc PDMDEVHLP::pfnVMReset
3196 */
3197DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3198{
3199 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3200}
3201
3202/**
3203 * @copydoc PDMDEVHLP::pfnVMSuspend
3204 */
3205DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3206{
3207 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3208}
3209
3210/**
3211 * @copydoc PDMDEVHLP::pfnVMPowerOff
3212 */
3213DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3214{
3215 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3216}
3217
3218/**
3219 * @copydoc PDMDEVHLP::pfnDMARegister
3220 */
3221DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3222{
3223 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3224}
3225
3226/**
3227 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3228 */
3229DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3230{
3231 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3232}
3233
3234/**
3235 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3236 */
3237DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3238{
3239 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3240}
3241
3242/**
3243 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3244 */
3245DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3246{
3247 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3248}
3249
3250/**
3251 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3252 */
3253DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3254{
3255 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3256}
3257
3258/**
3259 * @copydoc PDMDEVHLP::pfnDMASchedule
3260 */
3261DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3262{
3263 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3264}
3265
3266/**
3267 * @copydoc PDMDEVHLP::pfnCMOSWrite
3268 */
3269DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3270{
3271 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3272}
3273
3274/**
3275 * @copydoc PDMDEVHLP::pfnCMOSRead
3276 */
3277DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3278{
3279 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3280}
3281
3282/**
3283 * @copydoc PDMDEVHLP::pfnGetCpuId
3284 */
3285DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3286{
3287 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3288}
3289#endif /* IN_RING3 */
3290
3291
3292/**
3293 * @copydoc PDMDEVHLP::pfnPCISetIrq
3294 */
3295DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3296{
3297#ifdef IN_GC
3298 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3299#elif defined(IN_RING0)
3300 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3301#else
3302 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3303#endif
3304}
3305
3306/**
3307 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3308 */
3309DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3310{
3311#ifdef IN_GC
3312 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3313#elif defined(IN_RING0)
3314 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3315#else
3316 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3317#endif
3318}
3319
3320/**
3321 * @copydoc PDMDEVHLP::pfnISASetIrq
3322 */
3323DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3324{
3325#ifdef IN_GC
3326 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3327#elif defined(IN_RING0)
3328 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3329#else
3330 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3331#endif
3332}
3333
3334/**
3335 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3336 */
3337DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3338{
3339#ifdef IN_GC
3340 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3341#elif defined(IN_RING0)
3342 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3343#else
3344 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3345#endif
3346}
3347
3348/**
3349 * @copydoc PDMDEVHLP::pfnPhysRead
3350 */
3351DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3352{
3353#ifdef IN_GC
3354 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3355#elif defined(IN_RING0)
3356 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3357#else
3358 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3359#endif
3360}
3361
3362/**
3363 * @copydoc PDMDEVHLP::pfnPhysWrite
3364 */
3365DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3366{
3367#ifdef IN_GC
3368 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3369#elif defined(IN_RING0)
3370 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3371#else
3372 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3373#endif
3374}
3375
3376/**
3377 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3378 */
3379DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3380{
3381#ifdef IN_GC
3382 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3383#elif defined(IN_RING0)
3384 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3385#else
3386 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3387#endif
3388}
3389
3390/**
3391 * @copydoc PDMDEVHLP::pfnVMSetError
3392 */
3393DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3394{
3395 va_list va;
3396 va_start(va, pszFormat);
3397#ifdef IN_GC
3398 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3399#elif defined(IN_RING0)
3400 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3401#else
3402 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3403#endif
3404 va_end(va);
3405 return rc;
3406}
3407
3408/**
3409 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3410 */
3411DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3412{
3413 va_list va;
3414 int rc;
3415 va_start(va, pszFormat);
3416#ifdef IN_GC
3417 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3418#elif defined(IN_RING0)
3419 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3420#else
3421 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3422#endif
3423 va_end(va);
3424 return rc;
3425}
3426
3427
3428
3429/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3430typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3431
3432/**
3433 * Callbacks for VBoxDeviceRegister().
3434 */
3435typedef struct PDMDEVREGCB
3436{
3437 /** Interface version.
3438 * This is set to PDM_DEVREG_CB_VERSION. */
3439 uint32_t u32Version;
3440
3441 /**
3442 * Registers a device with the current VM instance.
3443 *
3444 * @returns VBox status code.
3445 * @param pCallbacks Pointer to the callback table.
3446 * @param pDevReg Pointer to the device registration record.
3447 * This data must be permanent and readonly.
3448 */
3449 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3450
3451 /**
3452 * Allocate memory which is associated with current VM instance
3453 * and automatically freed on it's destruction.
3454 *
3455 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3456 * @param pCallbacks Pointer to the callback table.
3457 * @param cb Number of bytes to allocate.
3458 */
3459 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3460} PDMDEVREGCB;
3461
3462/** Current version of the PDMDEVREGCB structure. */
3463#define PDM_DEVREG_CB_VERSION 0xf4010000
3464
3465
3466/**
3467 * The VBoxDevicesRegister callback function.
3468 *
3469 * PDM will invoke this function after loading a device module and letting
3470 * the module decide which devices to register and how to handle conflicts.
3471 *
3472 * @returns VBox status code.
3473 * @param pCallbacks Pointer to the callback table.
3474 * @param u32Version VBox version number.
3475 */
3476typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3477
3478/** @} */
3479
3480__END_DECLS
3481
3482#endif
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