VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 4011

Last change on this file since 4011 was 4011, checked in by vboxsync, 17 years ago

fixed some header hacks.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 126.6 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License as published by the Free Software Foundation,
12 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13 * distribution. VirtualBox OSE is distributed in the hope that it will
14 * be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * If you received this file as part of a commercial VirtualBox
17 * distribution, then only the terms of your commercial VirtualBox
18 * license agreement apply instead of the previous paragraph.
19 */
20
21#ifndef ___VBox_pdmdev_h
22#define ___VBox_pdmdev_h
23
24#include <VBox/pdmqueue.h>
25#include <VBox/pdmcritsect.h>
26#include <VBox/pdmthread.h>
27#include <VBox/pdmifs.h>
28#include <VBox/iom.h>
29#include <VBox/tm.h>
30#include <VBox/ssm.h>
31#include <VBox/cfgm.h>
32#include <VBox/dbgf.h>
33#include <VBox/err.h>
34#include <VBox/pci.h>
35#include <iprt/stdarg.h>
36
37__BEGIN_DECLS
38
39/** @defgroup grp_pdm_device Devices
40 * @ingroup grp_pdm
41 * @{
42 */
43
44/** @def PDMBOTHCBDECL
45 * Macro for declaring a callback which is static in HC and exported in GC.
46 */
47#if defined(IN_GC) || defined(IN_RING0)
48# define PDMBOTHCBDECL(type) DECLEXPORT(type)
49#else
50# define PDMBOTHCBDECL(type) static type
51#endif
52
53
54/**
55 * Construct a device instance for a VM.
56 *
57 * @returns VBox status.
58 * @param pDevIns The device instance data.
59 * If the registration structure is needed, pDevIns->pDevReg points to it.
60 * @param iInstance Instance number. Use this to figure out which registers and such to use.
61 * The instance number is also found in pDevIns->iInstance, but since it's
62 * likely to be freqently used PDM passes it as parameter.
63 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
64 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
65 * primary usage will in this function it's passed as a parameter.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 */
80typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
81/** Pointer to a FNPDMDEVDESTRUCT() function. */
82typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
83
84/**
85 * Device relocation callback.
86 *
87 * When this callback is called the device instance data, and if the
88 * device have a GC component, is being relocated, or/and the selectors
89 * have been changed. The device must use the chance to perform the
90 * necessary pointer relocations and data updates.
91 *
92 * Before the GC code is executed the first time, this function will be
93 * called with a 0 delta so GC pointer calculations can be one in one place.
94 *
95 * @param pDevIns Pointer to the device instance.
96 * @param offDelta The relocation delta relative to the old location.
97 *
98 * @remark A relocation CANNOT fail.
99 */
100typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
101/** Pointer to a FNPDMDEVRELOCATE() function. */
102typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
103
104
105/**
106 * Device I/O Control interface.
107 *
108 * This is used by external components, such as the COM interface, to
109 * communicate with devices using a class wide interface or a device
110 * specific interface.
111 *
112 * @returns VBox status code.
113 * @param pDevIns Pointer to the device instance.
114 * @param uFunction Function to perform.
115 * @param pvIn Pointer to input data.
116 * @param cbIn Size of input data.
117 * @param pvOut Pointer to output data.
118 * @param cbOut Size of output data.
119 * @param pcbOut Where to store the actual size of the output data.
120 */
121typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
122 void *pvIn, RTUINT cbIn,
123 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
124/** Pointer to a FNPDMDEVIOCTL() function. */
125typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
126
127/**
128 * Power On notification.
129 *
130 * @returns VBox status.
131 * @param pDevIns The device instance data.
132 */
133typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
134/** Pointer to a FNPDMDEVPOWERON() function. */
135typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
136
137/**
138 * Reset notification.
139 *
140 * @returns VBox status.
141 * @param pDevIns The device instance data.
142 */
143typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
144/** Pointer to a FNPDMDEVRESET() function. */
145typedef FNPDMDEVRESET *PFNPDMDEVRESET;
146
147/**
148 * Suspend notification.
149 *
150 * @returns VBox status.
151 * @param pDevIns The device instance data.
152 */
153typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
154/** Pointer to a FNPDMDEVSUSPEND() function. */
155typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
156
157/**
158 * Resume notification.
159 *
160 * @returns VBox status.
161 * @param pDevIns The device instance data.
162 */
163typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
164/** Pointer to a FNPDMDEVRESUME() function. */
165typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
166
167/**
168 * Power Off notification.
169 *
170 * @param pDevIns The device instance data.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 */
189typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
190/** Pointer to a FNPDMDEVATTACH() function. */
191typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
192
193/**
194 * Detach notification.
195 *
196 * This is called when a driver is detaching itself from a LUN of the device.
197 * The device should adjust it's state to reflect this.
198 *
199 * This is like unplugging the network cable to use it for the laptop or
200 * something while the PC is still running.
201 *
202 * @param pDevIns The device instance.
203 * @param iLUN The logical unit which is being detached.
204 */
205typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
206/** Pointer to a FNPDMDEVDETACH() function. */
207typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
208
209/**
210 * Query the base interface of a logical unit.
211 *
212 * @returns VBOX status code.
213 * @param pDevIns The device instance.
214 * @param iLUN The logicial unit to query.
215 * @param ppBase Where to store the pointer to the base interface of the LUN.
216 */
217typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
218/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
219typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
220
221/**
222 * Init complete notification.
223 * This can be done to do communication with other devices and other
224 * initialization which requires everything to be in place.
225 *
226 * @returns VBOX status code.
227 * @param pDevIns The device instance.
228 */
229typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
230/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
231typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
232
233
234
235/** PDM Device Registration Structure,
236 * This structure is used when registering a device from
237 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
238 * the VM is terminated.
239 */
240typedef struct PDMDEVREG
241{
242 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
243 uint32_t u32Version;
244 /** Device name. */
245 char szDeviceName[32];
246 /** Name of guest context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
248 char szGCMod[32];
249 /** Name of guest context module (no path).
250 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
251 char szR0Mod[32];
252 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
253 * remain unchanged from registration till VM destruction. */
254 const char *pszDescription;
255
256 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
257 RTUINT fFlags;
258 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
259 RTUINT fClass;
260 /** Maximum number of instances (per VM). */
261 RTUINT cMaxInstances;
262 /** Size of the instance data. */
263 RTUINT cbInstance;
264
265 /** Construct instance - required. */
266 PFNPDMDEVCONSTRUCT pfnConstruct;
267 /** Destruct instance - optional. */
268 PFNPDMDEVDESTRUCT pfnDestruct;
269 /** Relocation command - optional. */
270 PFNPDMDEVRELOCATE pfnRelocate;
271 /** I/O Control interface - optional. */
272 PFNPDMDEVIOCTL pfnIOCtl;
273 /** Power on notification - optional. */
274 PFNPDMDEVPOWERON pfnPowerOn;
275 /** Reset notification - optional. */
276 PFNPDMDEVRESET pfnReset;
277 /** Suspend notification - optional. */
278 PFNPDMDEVSUSPEND pfnSuspend;
279 /** Resume notification - optional. */
280 PFNPDMDEVRESUME pfnResume;
281 /** Attach command - optional. */
282 PFNPDMDEVATTACH pfnAttach;
283 /** Detach notification - optional. */
284 PFNPDMDEVDETACH pfnDetach;
285 /** Query a LUN base interface - optional. */
286 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
287 /** Init complete notification - optional. */
288 PFNPDMDEVINITCOMPLETE pfnInitComplete;
289 /** Power off notification - optional. */
290 PFNPDMDEVPOWEROFF pfnPowerOff;
291} PDMDEVREG;
292/** Pointer to a PDM Device Structure. */
293typedef PDMDEVREG *PPDMDEVREG;
294/** Const pointer to a PDM Device Structure. */
295typedef PDMDEVREG const *PCPDMDEVREG;
296
297/** Current DEVREG version number. */
298#define PDM_DEVREG_VERSION 0xc0010000
299
300/** PDM Device Flags.
301 * @{ */
302/** This flag is used to indicate that the device has a GC component. */
303#define PDM_DEVREG_FLAGS_GC 0x00000001
304/** This flag is used to indicate that the device has a R0 component. */
305#define PDM_DEVREG_FLAGS_R0 0x00010000
306
307/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
308 * The bit count for the current host. */
309#if HC_ARCH_BITS == 32
310# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
311#elif HC_ARCH_BITS == 64
312# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
313#else
314# error Unsupported HC_ARCH_BITS value.
315#endif
316/** The host bit count mask. */
317#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
318
319/** The device support only 32-bit guests. */
320#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
321/** The device support only 64-bit guests. */
322#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
323/** The device support both 32-bit & 64-bit guests. */
324#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
325/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
326 * The guest bit count for the current compilation. */
327#if GC_ARCH_BITS == 32
328# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
329#elif GC_ARCH_BITS == 64
330# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
331#else
332# error Unsupported GC_ARCH_BITS value.
333#endif
334/** The guest bit count mask. */
335#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
336
337/** Indicates that the devices support PAE36 on a 32-bit guest. */
338#define PDM_DEVREG_FLAGS_PAE36 0x00000020
339/** @} */
340
341
342/** PDM Device Classes.
343 * The order is important, lower bit earlier instantiation.
344 * @{ */
345/** Architecture device. */
346#define PDM_DEVREG_CLASS_ARCH BIT(0)
347/** Architecture BIOS device. */
348#define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)
349/** PCI bus brigde. */
350#define PDM_DEVREG_CLASS_BUS_PCI BIT(2)
351/** ISA bus brigde. */
352#define PDM_DEVREG_CLASS_BUS_ISA BIT(3)
353/** Input device (mouse, keyboard, joystick,..). */
354#define PDM_DEVREG_CLASS_INPUT BIT(4)
355/** Interrupt controller (PIC). */
356#define PDM_DEVREG_CLASS_PIC BIT(5)
357/** Interval controoler (PIT). */
358#define PDM_DEVREG_CLASS_PIT BIT(6)
359/** RTC/CMOS. */
360#define PDM_DEVREG_CLASS_RTC BIT(7)
361/** DMA controller. */
362#define PDM_DEVREG_CLASS_DMA BIT(8)
363/** VMM Device. */
364#define PDM_DEVREG_CLASS_VMM_DEV BIT(9)
365/** Graphics device, like VGA. */
366#define PDM_DEVREG_CLASS_GRAPHICS BIT(10)
367/** Storage controller device. */
368#define PDM_DEVREG_CLASS_STORAGE BIT(11)
369/** Network interface controller. */
370#define PDM_DEVREG_CLASS_NETWORK BIT(12)
371/** Audio. */
372#define PDM_DEVREG_CLASS_AUDIO BIT(13)
373/** USB HIC. */
374#define PDM_DEVREG_CLASS_BUS_USB BIT(14)
375/** ACPI. */
376#define PDM_DEVREG_CLASS_ACPI BIT(15)
377/** Serial controller device. */
378#define PDM_DEVREG_CLASS_SERIAL BIT(16)
379/** Parallel controller device */
380#define PDM_DEVREG_CLASS_PARALLEL BIT(17)
381/** Misc devices (always last). */
382#define PDM_DEVREG_CLASS_MISC BIT(31)
383/** @} */
384
385
386/** @name IRQ Level for use with the *SetIrq APIs.
387 * @{
388 */
389/** Assert the IRQ (can assume value 1). */
390#define PDM_IRQ_LEVEL_HIGH BIT(0)
391/** Deassert the IRQ (can assume value 0). */
392#define PDM_IRQ_LEVEL_LOW 0
393/** flip-flop - assert and then deassert it again immediately. */
394#define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)
395/** @} */
396
397
398/**
399 * PCI Bus registaration structure.
400 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
401 */
402typedef struct PDMPCIBUSREG
403{
404 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
405 uint32_t u32Version;
406
407 /**
408 * Registers the device with the default PCI bus.
409 *
410 * @returns VBox status code.
411 * @param pDevIns Device instance of the PCI Bus.
412 * @param pPciDev The PCI device structure.
413 * Any PCI enabled device must keep this in it's instance data!
414 * Fill in the PCI data config before registration, please.
415 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
416 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
417 * If negative, the pci bus device will assign one.
418 */
419 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
420
421 /**
422 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
423 *
424 * @returns VBox status code.
425 * @param pDevIns Device instance of the PCI Bus.
426 * @param pPciDev The PCI device structure.
427 * @param iRegion The region number.
428 * @param cbRegion Size of the region.
429 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
430 * @param pfnCallback Callback for doing the mapping.
431 */
432 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
433
434 /**
435 * Register PCI configuration space read/write callbacks.
436 *
437 * @param pDevIns Device instance of the PCI Bus.
438 * @param pPciDev The PCI device structure.
439 * @param pfnRead Pointer to the user defined PCI config read function.
440 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
441 * PCI config read function. This way, user can decide when (and if)
442 * to call default PCI config read function. Can be NULL.
443 * @param pfnWrite Pointer to the user defined PCI config write function.
444 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
445 * PCI config write function. This way, user can decide when (and if)
446 * to call default PCI config write function. Can be NULL.
447 * @thread EMT
448 */
449 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
450 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
451
452 /**
453 * Set the IRQ for a PCI device.
454 *
455 * @param pDevIns Device instance of the PCI Bus.
456 * @param pPciDev The PCI device structure.
457 * @param iIrq IRQ number to set.
458 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
459 */
460 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
461
462 /**
463 * Saves a state of the PCI device.
464 *
465 * @returns VBox status code.
466 * @param pDevIns Device instance of the PCI Bus.
467 * @param pPciDev Pointer to PCI device.
468 * @param pSSMHandle The handle to save the state to.
469 */
470 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
471
472 /**
473 * Loads a saved PCI device state.
474 *
475 * @returns VBox status code.
476 * @param pDevIns Device instance of the PCI Bus.
477 * @param pPciDev Pointer to PCI device.
478 * @param pSSMHandle The handle to the saved state.
479 */
480 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
481
482 /**
483 * Called to perform the job of the bios.
484 * This is only called for the first PCI Bus - it is expected to
485 * service all the PCI buses.
486 *
487 * @returns VBox status.
488 * @param pDevIns Device instance of the first bus.
489 */
490 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
491
492 /** The name of the SetIrq GC entry point. */
493 const char *pszSetIrqGC;
494
495 /** The name of the SetIrq R0 entry point. */
496 const char *pszSetIrqR0;
497
498} PDMPCIBUSREG;
499/** Pointer to a PCI bus registration structure. */
500typedef PDMPCIBUSREG *PPDMPCIBUSREG;
501
502/** Current PDMPCIBUSREG version number. */
503#define PDM_PCIBUSREG_VERSION 0xd0020000
504
505/**
506 * PCI Bus GC helpers.
507 */
508typedef struct PDMPCIHLPGC
509{
510 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
511 uint32_t u32Version;
512
513 /**
514 * Set an ISA IRQ.
515 *
516 * @param pDevIns PCI device instance.
517 * @param iIrq IRQ number to set.
518 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
519 * @thread EMT only.
520 */
521 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
522
523 /**
524 * Set an I/O-APIC IRQ.
525 *
526 * @param pDevIns PCI device instance.
527 * @param iIrq IRQ number to set.
528 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
529 * @thread EMT only.
530 */
531 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
532
533#ifdef VBOX_WITH_PDM_LOCK
534 /**
535 * Acquires the PDM lock.
536 *
537 * @returns VINF_SUCCESS on success.
538 * @returns rc if we failed to acquire the lock.
539 * @param pDevIns The PCI device instance.
540 * @param rc What to return if we fail to acquire the lock.
541 */
542 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
543
544 /**
545 * Releases the PDM lock.
546 *
547 * @param pDevIns The PCI device instance.
548 */
549 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
550#endif
551 /** Just a safety precaution. */
552 uint32_t u32TheEnd;
553} PDMPCIHLPGC;
554/** Pointer to PCI helpers. */
555typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
556/** Pointer to const PCI helpers. */
557typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
558
559/** Current PDMPCIHLPR3 version number. */
560#define PDM_PCIHLPGC_VERSION 0xe1010000
561
562
563/**
564 * PCI Bus R0 helpers.
565 */
566typedef struct PDMPCIHLPR0
567{
568 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
569 uint32_t u32Version;
570
571 /**
572 * Set an ISA IRQ.
573 *
574 * @param pDevIns PCI device instance.
575 * @param iIrq IRQ number to set.
576 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
577 * @thread EMT only.
578 */
579 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
580
581 /**
582 * Set an I/O-APIC IRQ.
583 *
584 * @param pDevIns PCI device instance.
585 * @param iIrq IRQ number to set.
586 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
587 * @thread EMT only.
588 */
589 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
590
591#ifdef VBOX_WITH_PDM_LOCK
592 /**
593 * Acquires the PDM lock.
594 *
595 * @returns VINF_SUCCESS on success.
596 * @returns rc if we failed to acquire the lock.
597 * @param pDevIns The PCI device instance.
598 * @param rc What to return if we fail to acquire the lock.
599 */
600 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
601
602 /**
603 * Releases the PDM lock.
604 *
605 * @param pDevIns The PCI device instance.
606 */
607 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
608#endif
609
610 /** Just a safety precaution. */
611 uint32_t u32TheEnd;
612} PDMPCIHLPR0;
613/** Pointer to PCI helpers. */
614typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
615/** Pointer to const PCI helpers. */
616typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
617
618/** Current PDMPCIHLPR0 version number. */
619#define PDM_PCIHLPR0_VERSION 0xe1010000
620
621/**
622 * PCI device helpers.
623 */
624typedef struct PDMPCIHLPR3
625{
626 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
627 uint32_t u32Version;
628
629 /**
630 * Set an ISA IRQ.
631 *
632 * @param pDevIns The PCI device instance.
633 * @param iIrq IRQ number to set.
634 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
635 * @thread EMT only.
636 */
637 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
638
639 /**
640 * Set an I/O-APIC IRQ.
641 *
642 * @param pDevIns The PCI device instance.
643 * @param iIrq IRQ number to set.
644 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
645 * @thread EMT only.
646 */
647 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
648
649#ifdef VBOX_WITH_PDM_LOCK
650 /**
651 * Acquires the PDM lock.
652 *
653 * @returns VINF_SUCCESS on success.
654 * @returns Fatal error on failure.
655 * @param pDevIns The PCI device instance.
656 * @param rc Dummy for making the interface identical to the GC and R0 versions.
657 */
658 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
659
660 /**
661 * Releases the PDM lock.
662 *
663 * @param pDevIns The PCI device instance.
664 */
665 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
666#endif
667
668 /**
669 * Gets the address of the GC PCI Bus helpers.
670 *
671 * This should be called at both construction and relocation time
672 * to obtain the correct address of the GC helpers.
673 *
674 * @returns GC pointer to the PCI Bus helpers.
675 * @param pDevIns Device instance of the PCI Bus.
676 * @thread EMT only.
677 */
678 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
679
680 /**
681 * Gets the address of the R0 PCI Bus helpers.
682 *
683 * This should be called at both construction and relocation time
684 * to obtain the correct address of the GC helpers.
685 *
686 * @returns R0 pointer to the PCI Bus helpers.
687 * @param pDevIns Device instance of the PCI Bus.
688 * @thread EMT only.
689 */
690 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
691
692 /** Just a safety precaution. */
693 uint32_t u32TheEnd;
694} PDMPCIHLPR3;
695/** Pointer to PCI helpers. */
696typedef HCPTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
697/** Pointer to const PCI helpers. */
698typedef HCPTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
699
700/** Current PDMPCIHLPR3 version number. */
701#define PDM_PCIHLPR3_VERSION 0xf1010000
702
703
704/**
705 * Programmable Interrupt Controller registration structure.
706 */
707typedef struct PDMPICREG
708{
709 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
710 uint32_t u32Version;
711
712 /**
713 * Set the an IRQ.
714 *
715 * @param pDevIns Device instance of the PIC.
716 * @param iIrq IRQ number to set.
717 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
718 */
719 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
720
721 /**
722 * Get a pending interrupt.
723 *
724 * @returns Pending interrupt number.
725 * @param pDevIns Device instance of the PIC.
726 */
727 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
728
729 /** The name of the GC SetIrq entry point. */
730 const char *pszSetIrqGC;
731 /** The name of the GC GetInterrupt entry point. */
732 const char *pszGetInterruptGC;
733
734 /** The name of the R0 SetIrq entry point. */
735 const char *pszSetIrqR0;
736 /** The name of the R0 GetInterrupt entry point. */
737 const char *pszGetInterruptR0;
738} PDMPICREG;
739/** Pointer to a PIC registration structure. */
740typedef PDMPICREG *PPDMPICREG;
741
742/** Current PDMPICREG version number. */
743#define PDM_PICREG_VERSION 0xe0020000
744
745/**
746 * PIC GC helpers.
747 */
748typedef struct PDMPICHLPGC
749{
750 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
751 uint32_t u32Version;
752
753 /**
754 * Set the interrupt force action flag.
755 *
756 * @param pDevIns Device instance of the PIC.
757 */
758 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
759
760 /**
761 * Clear the interrupt force action flag.
762 *
763 * @param pDevIns Device instance of the PIC.
764 */
765 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
766
767#ifdef VBOX_WITH_PDM_LOCK
768 /**
769 * Acquires the PDM lock.
770 *
771 * @returns VINF_SUCCESS on success.
772 * @returns rc if we failed to acquire the lock.
773 * @param pDevIns The PIC device instance.
774 * @param rc What to return if we fail to acquire the lock.
775 */
776 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
777
778 /**
779 * Releases the PDM lock.
780 *
781 * @param pDevIns The PIC device instance.
782 */
783 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
784#endif
785 /** Just a safety precaution. */
786 uint32_t u32TheEnd;
787} PDMPICHLPGC;
788
789/** Pointer to PIC GC helpers. */
790typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
791/** Pointer to const PIC GC helpers. */
792typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
793
794/** Current PDMPICHLPGC version number. */
795#define PDM_PICHLPGC_VERSION 0xfc010000
796
797
798/**
799 * PIC R0 helpers.
800 */
801typedef struct PDMPICHLPR0
802{
803 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
804 uint32_t u32Version;
805
806 /**
807 * Set the interrupt force action flag.
808 *
809 * @param pDevIns Device instance of the PIC.
810 */
811 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
812
813 /**
814 * Clear the interrupt force action flag.
815 *
816 * @param pDevIns Device instance of the PIC.
817 */
818 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
819
820#ifdef VBOX_WITH_PDM_LOCK
821 /**
822 * Acquires the PDM lock.
823 *
824 * @returns VINF_SUCCESS on success.
825 * @returns rc if we failed to acquire the lock.
826 * @param pDevIns The PIC device instance.
827 * @param rc What to return if we fail to acquire the lock.
828 */
829 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
830
831 /**
832 * Releases the PDM lock.
833 *
834 * @param pDevIns The PCI device instance.
835 */
836 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
837#endif
838
839 /** Just a safety precaution. */
840 uint32_t u32TheEnd;
841} PDMPICHLPR0;
842
843/** Pointer to PIC R0 helpers. */
844typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
845/** Pointer to const PIC R0 helpers. */
846typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
847
848/** Current PDMPICHLPR0 version number. */
849#define PDM_PICHLPR0_VERSION 0xfc010000
850
851/**
852 * PIC HC helpers.
853 */
854typedef struct PDMPICHLPR3
855{
856 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
857 uint32_t u32Version;
858
859 /**
860 * Set the interrupt force action flag.
861 *
862 * @param pDevIns Device instance of the PIC.
863 */
864 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
865
866 /**
867 * Clear the interrupt force action flag.
868 *
869 * @param pDevIns Device instance of the PIC.
870 */
871 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
872
873#ifdef VBOX_WITH_PDM_LOCK
874 /**
875 * Acquires the PDM lock.
876 *
877 * @returns VINF_SUCCESS on success.
878 * @returns Fatal error on failure.
879 * @param pDevIns The PIC device instance.
880 * @param rc Dummy for making the interface identical to the GC and R0 versions.
881 */
882 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
883
884 /**
885 * Releases the PDM lock.
886 *
887 * @param pDevIns The PIC device instance.
888 */
889 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
890#endif
891
892 /**
893 * Gets the address of the GC PIC helpers.
894 *
895 * This should be called at both construction and relocation time
896 * to obtain the correct address of the GC helpers.
897 *
898 * @returns GC pointer to the PIC helpers.
899 * @param pDevIns Device instance of the PIC.
900 */
901 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
902
903 /**
904 * Gets the address of the R0 PIC helpers.
905 *
906 * This should be called at both construction and relocation time
907 * to obtain the correct address of the GC helpers.
908 *
909 * @returns R0 pointer to the PIC helpers.
910 * @param pDevIns Device instance of the PIC.
911 */
912 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
913
914 /** Just a safety precaution. */
915 uint32_t u32TheEnd;
916} PDMPICHLPR3;
917
918/** Pointer to PIC HC helpers. */
919typedef HCPTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
920/** Pointer to const PIC HC helpers. */
921typedef HCPTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
922
923/** Current PDMPICHLPR3 version number. */
924#define PDM_PICHLPR3_VERSION 0xf0010000
925
926
927
928/**
929 * Advanced Programmable Interrupt Controller registration structure.
930 */
931typedef struct PDMAPICREG
932{
933 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
934 uint32_t u32Version;
935
936 /**
937 * Get a pending interrupt.
938 *
939 * @returns Pending interrupt number.
940 * @param pDevIns Device instance of the APIC.
941 */
942 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
943
944 /**
945 * Set the APIC base.
946 *
947 * @param pDevIns Device instance of the APIC.
948 * @param u64Base The new base.
949 */
950 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
951
952 /**
953 * Get the APIC base.
954 *
955 * @returns Current base.
956 * @param pDevIns Device instance of the APIC.
957 */
958 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
959
960 /**
961 * Set the TPR (task priority register?).
962 *
963 * @param pDevIns Device instance of the APIC.
964 * @param u8TPR The new TPR.
965 */
966 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
967
968 /**
969 * Get the TPR (task priority register?).
970 *
971 * @returns The current TPR.
972 * @param pDevIns Device instance of the APIC.
973 */
974 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
975
976 /**
977 * Private interface between the IOAPIC and APIC.
978 *
979 * This is a low-level, APIC/IOAPIC implementation specific interface
980 * which is registered with PDM only because it makes life so much
981 * simpler right now (GC bits). This is a bad bad hack! The correct
982 * way of doing this would involve some way of querying GC interfaces
983 * and relocating them. Perhaps doing some kind of device init in GC...
984 *
985 * @returns The current TPR.
986 * @param pDevIns Device instance of the APIC.
987 * @param u8Dest See APIC implementation.
988 * @param u8DestMode See APIC implementation.
989 * @param u8DeliveryMode See APIC implementation.
990 * @param iVector See APIC implementation.
991 * @param u8Polarity See APIC implementation.
992 * @param u8TriggerMode See APIC implementation.
993 */
994 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
995 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
996
997 /** The name of the GC GetInterrupt entry point. */
998 const char *pszGetInterruptGC;
999 /** The name of the GC SetBase entry point. */
1000 const char *pszSetBaseGC;
1001 /** The name of the GC GetBase entry point. */
1002 const char *pszGetBaseGC;
1003 /** The name of the GC SetTPR entry point. */
1004 const char *pszSetTPRGC;
1005 /** The name of the GC GetTPR entry point. */
1006 const char *pszGetTPRGC;
1007 /** The name of the GC BusDeliver entry point. */
1008 const char *pszBusDeliverGC;
1009
1010 /** The name of the R0 GetInterrupt entry point. */
1011 const char *pszGetInterruptR0;
1012 /** The name of the R0 SetBase entry point. */
1013 const char *pszSetBaseR0;
1014 /** The name of the R0 GetBase entry point. */
1015 const char *pszGetBaseR0;
1016 /** The name of the R0 SetTPR entry point. */
1017 const char *pszSetTPRR0;
1018 /** The name of the R0 GetTPR entry point. */
1019 const char *pszGetTPRR0;
1020 /** The name of the R0 BusDeliver entry point. */
1021 const char *pszBusDeliverR0;
1022
1023} PDMAPICREG;
1024/** Pointer to an APIC registration structure. */
1025typedef PDMAPICREG *PPDMAPICREG;
1026
1027/** Current PDMAPICREG version number. */
1028#define PDM_APICREG_VERSION 0x70010000
1029
1030
1031/**
1032 * APIC GC helpers.
1033 */
1034typedef struct PDMAPICHLPGC
1035{
1036 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1037 uint32_t u32Version;
1038
1039 /**
1040 * Set the interrupt force action flag.
1041 *
1042 * @param pDevIns Device instance of the APIC.
1043 */
1044 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1045
1046 /**
1047 * Clear the interrupt force action flag.
1048 *
1049 * @param pDevIns Device instance of the APIC.
1050 */
1051 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1052
1053 /**
1054 * Sets or clears the APIC bit in the CPUID feature masks.
1055 *
1056 * @param pDevIns Device instance of the APIC.
1057 * @param fEnabled If true the bit is set, else cleared.
1058 */
1059 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1060
1061#ifdef VBOX_WITH_PDM_LOCK
1062 /**
1063 * Acquires the PDM lock.
1064 *
1065 * @returns VINF_SUCCESS on success.
1066 * @returns rc if we failed to acquire the lock.
1067 * @param pDevIns The APIC device instance.
1068 * @param rc What to return if we fail to acquire the lock.
1069 */
1070 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1071
1072 /**
1073 * Releases the PDM lock.
1074 *
1075 * @param pDevIns The APIC device instance.
1076 */
1077 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1078#endif
1079 /** Just a safety precaution. */
1080 uint32_t u32TheEnd;
1081} PDMAPICHLPGC;
1082/** Pointer to APIC GC helpers. */
1083typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1084/** Pointer to const APIC helpers. */
1085typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1086
1087/** Current PDMAPICHLPGC version number. */
1088#define PDM_APICHLPGC_VERSION 0x60010000
1089
1090
1091/**
1092 * APIC R0 helpers.
1093 */
1094typedef struct PDMAPICHLPR0
1095{
1096 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1097 uint32_t u32Version;
1098
1099 /**
1100 * Set the interrupt force action flag.
1101 *
1102 * @param pDevIns Device instance of the APIC.
1103 */
1104 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1105
1106 /**
1107 * Clear the interrupt force action flag.
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 */
1111 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1112
1113 /**
1114 * Sets or clears the APIC bit in the CPUID feature masks.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 * @param fEnabled If true the bit is set, else cleared.
1118 */
1119 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1120
1121#ifdef VBOX_WITH_PDM_LOCK
1122 /**
1123 * Acquires the PDM lock.
1124 *
1125 * @returns VINF_SUCCESS on success.
1126 * @returns rc if we failed to acquire the lock.
1127 * @param pDevIns The APIC device instance.
1128 * @param rc What to return if we fail to acquire the lock.
1129 */
1130 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1131
1132 /**
1133 * Releases the PDM lock.
1134 *
1135 * @param pDevIns The APIC device instance.
1136 */
1137 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1138#endif
1139
1140 /** Just a safety precaution. */
1141 uint32_t u32TheEnd;
1142} PDMAPICHLPR0;
1143/** Pointer to APIC GC helpers. */
1144typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1145/** Pointer to const APIC helpers. */
1146typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1147
1148/** Current PDMAPICHLPR0 version number. */
1149#define PDM_APICHLPR0_VERSION 0x60010000
1150
1151/**
1152 * APIC HC helpers.
1153 */
1154typedef struct PDMAPICHLPR3
1155{
1156 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1157 uint32_t u32Version;
1158
1159 /**
1160 * Set the interrupt force action flag.
1161 *
1162 * @param pDevIns Device instance of the APIC.
1163 */
1164 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1165
1166 /**
1167 * Clear the interrupt force action flag.
1168 *
1169 * @param pDevIns Device instance of the APIC.
1170 */
1171 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1172
1173 /**
1174 * Sets or clears the APIC bit in the CPUID feature masks.
1175 *
1176 * @param pDevIns Device instance of the APIC.
1177 * @param fEnabled If true the bit is set, else cleared.
1178 */
1179 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1180
1181#ifdef VBOX_WITH_PDM_LOCK
1182 /**
1183 * Acquires the PDM lock.
1184 *
1185 * @returns VINF_SUCCESS on success.
1186 * @returns Fatal error on failure.
1187 * @param pDevIns The APIC device instance.
1188 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1189 */
1190 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1191
1192 /**
1193 * Releases the PDM lock.
1194 *
1195 * @param pDevIns The APIC device instance.
1196 */
1197 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1198#endif
1199
1200 /**
1201 * Gets the address of the GC APIC helpers.
1202 *
1203 * This should be called at both construction and relocation time
1204 * to obtain the correct address of the GC helpers.
1205 *
1206 * @returns GC pointer to the APIC helpers.
1207 * @param pDevIns Device instance of the APIC.
1208 */
1209 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1210
1211 /**
1212 * Gets the address of the R0 APIC helpers.
1213 *
1214 * This should be called at both construction and relocation time
1215 * to obtain the correct address of the R0 helpers.
1216 *
1217 * @returns R0 pointer to the APIC helpers.
1218 * @param pDevIns Device instance of the APIC.
1219 */
1220 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1221
1222 /** Just a safety precaution. */
1223 uint32_t u32TheEnd;
1224} PDMAPICHLPR3;
1225/** Pointer to APIC helpers. */
1226typedef HCPTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1227/** Pointer to const APIC helpers. */
1228typedef HCPTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1229
1230/** Current PDMAPICHLP version number. */
1231#define PDM_APICHLPR3_VERSION 0xfd010000
1232
1233
1234/**
1235 * I/O APIC registration structure.
1236 */
1237typedef struct PDMIOAPICREG
1238{
1239 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1240 uint32_t u32Version;
1241
1242 /**
1243 * Set the an IRQ.
1244 *
1245 * @param pDevIns Device instance of the I/O APIC.
1246 * @param iIrq IRQ number to set.
1247 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1248 */
1249 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1250
1251 /** The name of the GC SetIrq entry point. */
1252 const char *pszSetIrqGC;
1253
1254 /** The name of the R0 SetIrq entry point. */
1255 const char *pszSetIrqR0;
1256} PDMIOAPICREG;
1257/** Pointer to an APIC registration structure. */
1258typedef PDMIOAPICREG *PPDMIOAPICREG;
1259
1260/** Current PDMAPICREG version number. */
1261#define PDM_IOAPICREG_VERSION 0x50010000
1262
1263
1264/**
1265 * IOAPIC GC helpers.
1266 */
1267typedef struct PDMIOAPICHLPGC
1268{
1269 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1270 uint32_t u32Version;
1271
1272 /**
1273 * Private interface between the IOAPIC and APIC.
1274 *
1275 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1276 *
1277 * @returns The current TPR.
1278 * @param pDevIns Device instance of the IOAPIC.
1279 * @param u8Dest See APIC implementation.
1280 * @param u8DestMode See APIC implementation.
1281 * @param u8DeliveryMode See APIC implementation.
1282 * @param iVector See APIC implementation.
1283 * @param u8Polarity See APIC implementation.
1284 * @param u8TriggerMode See APIC implementation.
1285 */
1286 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1287 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1288
1289#ifdef VBOX_WITH_PDM_LOCK
1290 /**
1291 * Acquires the PDM lock.
1292 *
1293 * @returns VINF_SUCCESS on success.
1294 * @returns rc if we failed to acquire the lock.
1295 * @param pDevIns The IOAPIC device instance.
1296 * @param rc What to return if we fail to acquire the lock.
1297 */
1298 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1299
1300 /**
1301 * Releases the PDM lock.
1302 *
1303 * @param pDevIns The IOAPIC device instance.
1304 */
1305 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1306#endif
1307
1308 /** Just a safety precaution. */
1309 uint32_t u32TheEnd;
1310} PDMIOAPICHLPGC;
1311/** Pointer to IOAPIC GC helpers. */
1312typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1313/** Pointer to const IOAPIC helpers. */
1314typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1315
1316/** Current PDMIOAPICHLPGC version number. */
1317#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1318
1319
1320/**
1321 * IOAPIC R0 helpers.
1322 */
1323typedef struct PDMIOAPICHLPR0
1324{
1325 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1326 uint32_t u32Version;
1327
1328 /**
1329 * Private interface between the IOAPIC and APIC.
1330 *
1331 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1332 *
1333 * @returns The current TPR.
1334 * @param pDevIns Device instance of the IOAPIC.
1335 * @param u8Dest See APIC implementation.
1336 * @param u8DestMode See APIC implementation.
1337 * @param u8DeliveryMode See APIC implementation.
1338 * @param iVector See APIC implementation.
1339 * @param u8Polarity See APIC implementation.
1340 * @param u8TriggerMode See APIC implementation.
1341 */
1342 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1343 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1344
1345#ifdef VBOX_WITH_PDM_LOCK
1346 /**
1347 * Acquires the PDM lock.
1348 *
1349 * @returns VINF_SUCCESS on success.
1350 * @returns rc if we failed to acquire the lock.
1351 * @param pDevIns The IOAPIC device instance.
1352 * @param rc What to return if we fail to acquire the lock.
1353 */
1354 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1355
1356 /**
1357 * Releases the PDM lock.
1358 *
1359 * @param pDevIns The IOAPIC device instance.
1360 */
1361 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1362#endif
1363
1364 /** Just a safety precaution. */
1365 uint32_t u32TheEnd;
1366} PDMIOAPICHLPR0;
1367/** Pointer to IOAPIC R0 helpers. */
1368typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1369/** Pointer to const IOAPIC helpers. */
1370typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1371
1372/** Current PDMIOAPICHLPR0 version number. */
1373#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1374
1375/**
1376 * IOAPIC HC helpers.
1377 */
1378typedef struct PDMIOAPICHLPR3
1379{
1380 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1381 uint32_t u32Version;
1382
1383 /**
1384 * Private interface between the IOAPIC and APIC.
1385 *
1386 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1387 *
1388 * @returns The current TPR.
1389 * @param pDevIns Device instance of the IOAPIC.
1390 * @param u8Dest See APIC implementation.
1391 * @param u8DestMode See APIC implementation.
1392 * @param u8DeliveryMode See APIC implementation.
1393 * @param iVector See APIC implementation.
1394 * @param u8Polarity See APIC implementation.
1395 * @param u8TriggerMode See APIC implementation.
1396 */
1397 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1398 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1399
1400#ifdef VBOX_WITH_PDM_LOCK
1401 /**
1402 * Acquires the PDM lock.
1403 *
1404 * @returns VINF_SUCCESS on success.
1405 * @returns Fatal error on failure.
1406 * @param pDevIns The IOAPIC device instance.
1407 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1408 */
1409 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1410
1411 /**
1412 * Releases the PDM lock.
1413 *
1414 * @param pDevIns The IOAPIC device instance.
1415 */
1416 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1417#endif
1418
1419 /**
1420 * Gets the address of the GC IOAPIC helpers.
1421 *
1422 * This should be called at both construction and relocation time
1423 * to obtain the correct address of the GC helpers.
1424 *
1425 * @returns GC pointer to the IOAPIC helpers.
1426 * @param pDevIns Device instance of the IOAPIC.
1427 */
1428 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1429
1430 /**
1431 * Gets the address of the R0 IOAPIC helpers.
1432 *
1433 * This should be called at both construction and relocation time
1434 * to obtain the correct address of the R0 helpers.
1435 *
1436 * @returns R0 pointer to the IOAPIC helpers.
1437 * @param pDevIns Device instance of the IOAPIC.
1438 */
1439 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1440
1441 /** Just a safety precaution. */
1442 uint32_t u32TheEnd;
1443} PDMIOAPICHLPR3;
1444/** Pointer to IOAPIC HC helpers. */
1445typedef HCPTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1446/** Pointer to const IOAPIC helpers. */
1447typedef HCPTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1448
1449/** Current PDMIOAPICHLPR3 version number. */
1450#define PDM_IOAPICHLPR3_VERSION 0xff010000
1451
1452
1453
1454#ifdef IN_RING3
1455
1456/**
1457 * DMA Transfer Handler.
1458 *
1459 * @returns Number of bytes transferred.
1460 * @param pDevIns Device instance of the DMA.
1461 * @param pvUser User pointer.
1462 * @param uChannel Channel number.
1463 * @param off DMA position.
1464 * @param cb Block size.
1465 */
1466typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1467/** Pointer to a FNDMATRANSFERHANDLER(). */
1468typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1469
1470/**
1471 * DMA Controller registration structure.
1472 */
1473typedef struct PDMDMAREG
1474{
1475 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1476 uint32_t u32Version;
1477
1478 /**
1479 * Execute pending transfers.
1480 *
1481 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1482 * @param pDevIns Device instance of the DMAC.
1483 */
1484 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1485
1486 /**
1487 * Register transfer function for DMA channel.
1488 *
1489 * @param pDevIns Device instance of the DMAC.
1490 * @param uChannel Channel number.
1491 * @param pfnTransferHandler Device specific transfer function.
1492 * @param pvUSer User pointer to be passed to the callback.
1493 */
1494 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1495
1496 /**
1497 * Read memory
1498 *
1499 * @returns Number of bytes read.
1500 * @param pDevIns Device instance of the DMAC.
1501 * @param pvBuffer Pointer to target buffer.
1502 * @param off DMA position.
1503 * @param cbBlock Block size.
1504 */
1505 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1506
1507 /**
1508 * Write memory
1509 *
1510 * @returns Number of bytes written.
1511 * @param pDevIns Device instance of the DMAC.
1512 * @param pvBuffer Memory to write.
1513 * @param off DMA position.
1514 * @param cbBlock Block size.
1515 */
1516 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1517
1518 /**
1519 * Set the DREQ line.
1520 *
1521 * @param pDevIns Device instance of the DMAC.
1522 * @param uChannel Channel number.
1523 * @param uLevel Level of the line.
1524 */
1525 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1526
1527 /**
1528 * Get channel mode
1529 *
1530 * @returns Channel mode.
1531 * @param pDevIns Device instance of the DMAC.
1532 * @param uChannel Channel number.
1533 */
1534 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1535
1536} PDMDMACREG;
1537/** Pointer to a DMAC registration structure. */
1538typedef PDMDMACREG *PPDMDMACREG;
1539
1540/** Current PDMDMACREG version number. */
1541#define PDM_DMACREG_VERSION 0xf5010000
1542
1543
1544/**
1545 * DMA Controller device helpers.
1546 */
1547typedef struct PDMDMACHLP
1548{
1549 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1550 uint32_t u32Version;
1551
1552 /* to-be-defined */
1553
1554} PDMDMACHLP;
1555/** Pointer to DMAC helpers. */
1556typedef PDMDMACHLP *PPDMDMACHLP;
1557/** Pointer to const DMAC helpers. */
1558typedef const PDMDMACHLP *PCPDMDMACHLP;
1559
1560/** Current PDMDMACHLP version number. */
1561#define PDM_DMACHLP_VERSION 0xf6010000
1562
1563#endif /* IN_RING3 */
1564
1565
1566
1567/**
1568 * RTC registration structure.
1569 */
1570typedef struct PDMRTCREG
1571{
1572 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1573 uint32_t u32Version;
1574 uint32_t u32Alignment; /**< structure size alignment. */
1575
1576 /**
1577 * Write to a CMOS register and update the checksum if necessary.
1578 *
1579 * @returns VBox status code.
1580 * @param pDevIns Device instance of the RTC.
1581 * @param iReg The CMOS register index.
1582 * @param u8Value The CMOS register value.
1583 */
1584 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1585
1586 /**
1587 * Read a CMOS register.
1588 *
1589 * @returns VBox status code.
1590 * @param pDevIns Device instance of the RTC.
1591 * @param iReg The CMOS register index.
1592 * @param pu8Value Where to store the CMOS register value.
1593 */
1594 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1595
1596} PDMRTCREG;
1597/** Pointer to a RTC registration structure. */
1598typedef PDMRTCREG *PPDMRTCREG;
1599/** Pointer to a const RTC registration structure. */
1600typedef const PDMRTCREG *PCPDMRTCREG;
1601
1602/** Current PDMRTCREG version number. */
1603#define PDM_RTCREG_VERSION 0xfa010000
1604
1605
1606/**
1607 * RTC device helpers.
1608 */
1609typedef struct PDMRTCHLP
1610{
1611 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1612 uint32_t u32Version;
1613
1614 /* to-be-defined */
1615
1616} PDMRTCHLP;
1617/** Pointer to RTC helpers. */
1618typedef PDMRTCHLP *PPDMRTCHLP;
1619/** Pointer to const RTC helpers. */
1620typedef const PDMRTCHLP *PCPDMRTCHLP;
1621
1622/** Current PDMRTCHLP version number. */
1623#define PDM_RTCHLP_VERSION 0xf6010000
1624
1625
1626
1627#ifdef IN_RING3
1628
1629/**
1630 * PDM Device API.
1631 */
1632typedef struct PDMDEVHLP
1633{
1634 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1635 uint32_t u32Version;
1636
1637 /**
1638 * Register a number of I/O ports with a device.
1639 *
1640 * These callbacks are of course for the host context (HC).
1641 * Register HC handlers before guest context (GC) handlers! There must be a
1642 * HC handler for every GC handler!
1643 *
1644 * @returns VBox status.
1645 * @param pDevIns The device instance to register the ports with.
1646 * @param Port First port number in the range.
1647 * @param cPorts Number of ports to register.
1648 * @param pvUser User argument.
1649 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1650 * @param pfnIn Pointer to function which is gonna handle IN operations.
1651 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1652 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1653 * @param pszDesc Pointer to description string. This must not be freed.
1654 */
1655 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1656 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1657 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1658
1659 /**
1660 * Register a number of I/O ports with a device for GC.
1661 *
1662 * These callbacks are for the host context (GC).
1663 * Register host context (HC) handlers before guest context handlers! There must be a
1664 * HC handler for every GC handler!
1665 *
1666 * @returns VBox status.
1667 * @param pDevIns The device instance to register the ports with and which GC module
1668 * to resolve the names against.
1669 * @param Port First port number in the range.
1670 * @param cPorts Number of ports to register.
1671 * @param pvUser User argument.
1672 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1673 * @param pszIn Name of the GC function which is gonna handle IN operations.
1674 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1675 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1676 * @param pszDesc Pointer to description string. This must not be freed.
1677 */
1678 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1679 const char *pszOut, const char *pszIn,
1680 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1681
1682 /**
1683 * Register a number of I/O ports with a device.
1684 *
1685 * These callbacks are of course for the ring-0 host context (R0).
1686 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1687 *
1688 * @returns VBox status.
1689 * @param pDevIns The device instance to register the ports with.
1690 * @param Port First port number in the range.
1691 * @param cPorts Number of ports to register.
1692 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1693 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1694 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1695 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1696 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1697 * @param pszDesc Pointer to description string. This must not be freed.
1698 */
1699 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1700 const char *pszOut, const char *pszIn,
1701 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1702
1703 /**
1704 * Deregister I/O ports.
1705 *
1706 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1707 *
1708 * @returns VBox status.
1709 * @param pDevIns The device instance owning the ports.
1710 * @param Port First port number in the range.
1711 * @param cPorts Number of ports to deregister.
1712 */
1713 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1714
1715
1716 /**
1717 * Register a Memory Mapped I/O (MMIO) region.
1718 *
1719 * These callbacks are of course for the host context (HC).
1720 * Register HC handlers before guest context (GC) handlers! There must be a
1721 * HC handler for every GC handler!
1722 *
1723 * @returns VBox status.
1724 * @param pDevIns The device instance to register the MMIO with.
1725 * @param GCPhysStart First physical address in the range.
1726 * @param cbRange The size of the range (in bytes).
1727 * @param pvUser User argument.
1728 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1729 * @param pfnRead Pointer to function which is gonna handle Read operations.
1730 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1731 * @param pszDesc Pointer to description string. This must not be freed.
1732 */
1733 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1734 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1735 const char *pszDesc));
1736
1737 /**
1738 * Register a Memory Mapped I/O (MMIO) region for GC.
1739 *
1740 * These callbacks are for the guest context (GC).
1741 * Register host context (HC) handlers before guest context handlers! There must be a
1742 * HC handler for every GC handler!
1743 *
1744 * @returns VBox status.
1745 * @param pDevIns The device instance to register the MMIO with.
1746 * @param GCPhysStart First physical address in the range.
1747 * @param cbRange The size of the range (in bytes).
1748 * @param pvUser User argument.
1749 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1750 * @param pszRead Name of the GC function which is gonna handle Read operations.
1751 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1752 * @param pszDesc Pointer to description string. This must not be freed.
1753 */
1754 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1755 const char *pszWrite, const char *pszRead, const char *pszFill,
1756 const char *pszDesc));
1757
1758 /**
1759 * Register a Memory Mapped I/O (MMIO) region for R0.
1760 *
1761 * These callbacks are for the ring-0 host context (R0).
1762 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1763 *
1764 * @returns VBox status.
1765 * @param pDevIns The device instance to register the MMIO with.
1766 * @param GCPhysStart First physical address in the range.
1767 * @param cbRange The size of the range (in bytes).
1768 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1769 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1770 * @param pszRead Name of the GC function which is gonna handle Read operations.
1771 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1772 * @param pszDesc Pointer to description string. This must not be freed.
1773 */
1774 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1775 const char *pszWrite, const char *pszRead, const char *pszFill,
1776 const char *pszDesc));
1777
1778 /**
1779 * Deregister a Memory Mapped I/O (MMIO) region.
1780 *
1781 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1782 *
1783 * @returns VBox status.
1784 * @param pDevIns The device instance owning the MMIO region(s).
1785 * @param GCPhysStart First physical address in the range.
1786 * @param cbRange The size of the range (in bytes).
1787 */
1788 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1789
1790 /**
1791 * Register a ROM (BIOS) region.
1792 *
1793 * It goes without saying that this is read-only memory. The memory region must be
1794 * in unassigned memory. I.e. from the top of the address space or on the PC in
1795 * the 0xa0000-0xfffff range.
1796 *
1797 * @returns VBox status.
1798 * @param pDevIns The device instance owning the ROM region.
1799 * @param GCPhysStart First physical address in the range.
1800 * Must be page aligned!
1801 * @param cbRange The size of the range (in bytes).
1802 * Must be page aligned!
1803 * @param pvBinary Pointer to the binary data backing the ROM image.
1804 * This must be cbRange bytes big.
1805 * It will be copied and doesn't have to stick around.
1806 * @param pszDesc Pointer to description string. This must not be freed.
1807 * @remark There is no way to remove the rom, automatically on device cleanup or
1808 * manually from the device yet. At present I doubt we need such features...
1809 */
1810 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc));
1811
1812 /**
1813 * Register a save state data unit.
1814 *
1815 * @returns VBox status.
1816 * @param pDevIns Device instance.
1817 * @param pszName Data unit name.
1818 * @param u32Instance The instance identifier of the data unit.
1819 * This must together with the name be unique.
1820 * @param u32Version Data layout version number.
1821 * @param cbGuess The approximate amount of data in the unit.
1822 * Only for progress indicators.
1823 * @param pfnSavePrep Prepare save callback, optional.
1824 * @param pfnSaveExec Execute save callback, optional.
1825 * @param pfnSaveDone Done save callback, optional.
1826 * @param pfnLoadPrep Prepare load callback, optional.
1827 * @param pfnLoadExec Execute load callback, optional.
1828 * @param pfnLoadDone Done load callback, optional.
1829 */
1830 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1831 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1832 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1833
1834 /**
1835 * Creates a timer.
1836 *
1837 * @returns VBox status.
1838 * @param pDevIns Device instance.
1839 * @param enmClock The clock to use on this timer.
1840 * @param pfnCallback Callback function.
1841 * @param pszDesc Pointer to description string which must stay around
1842 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1843 * @param ppTimer Where to store the timer on success.
1844 */
1845 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer));
1846
1847 /**
1848 * Creates an external timer.
1849 *
1850 * @returns timer pointer
1851 * @param pDevIns Device instance.
1852 * @param enmClock The clock to use on this timer.
1853 * @param pfnCallback Callback function.
1854 * @param pvUser User pointer
1855 * @param pszDesc Pointer to description string which must stay around
1856 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1857 */
1858 DECLR3CALLBACKMEMBER(PTMTIMERHC, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1859
1860 /**
1861 * Registers the device with the default PCI bus.
1862 *
1863 * @returns VBox status code.
1864 * @param pDevIns Device instance.
1865 * @param pPciDev The PCI device structure.
1866 * Any PCI enabled device must keep this in it's instance data!
1867 * Fill in the PCI data config before registration, please.
1868 * @remark This is the simple interface, a Ex interface will be created if
1869 * more features are needed later.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1872
1873 /**
1874 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1875 *
1876 * @returns VBox status code.
1877 * @param pDevIns Device instance.
1878 * @param iRegion The region number.
1879 * @param cbRegion Size of the region.
1880 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1881 * @param pfnCallback Callback for doing the mapping.
1882 */
1883 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1884
1885 /**
1886 * Register PCI configuration space read/write callbacks.
1887 *
1888 * @param pDevIns Device instance.
1889 * @param pPciDev The PCI device structure.
1890 * If NULL the default PCI device for this device instance is used.
1891 * @param pfnRead Pointer to the user defined PCI config read function.
1892 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1893 * PCI config read function. This way, user can decide when (and if)
1894 * to call default PCI config read function. Can be NULL.
1895 * @param pfnWrite Pointer to the user defined PCI config write function.
1896 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1897 * PCI config write function. This way, user can decide when (and if)
1898 * to call default PCI config write function. Can be NULL.
1899 * @thread EMT
1900 */
1901 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1902 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1903
1904 /**
1905 * Set the IRQ for a PCI device.
1906 *
1907 * @param pDevIns Device instance.
1908 * @param iIrq IRQ number to set.
1909 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1910 * @thread Any thread, but will involve the emulation thread.
1911 */
1912 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1913
1914 /**
1915 * Set the IRQ for a PCI device, but don't wait for EMT to process
1916 * the request when not called from EMT.
1917 *
1918 * @param pDevIns Device instance.
1919 * @param iIrq IRQ number to set.
1920 * @param iLevel IRQ level.
1921 * @thread Any thread, but will involve the emulation thread.
1922 */
1923 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1924
1925 /**
1926 * Set ISA IRQ for a device.
1927 *
1928 * @param pDevIns Device instance.
1929 * @param iIrq IRQ number to set.
1930 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1931 * @thread Any thread, but will involve the emulation thread.
1932 */
1933 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1934
1935 /**
1936 * Set the ISA IRQ for a device, but don't wait for EMT to process
1937 * the request when not called from EMT.
1938 *
1939 * @param pDevIns Device instance.
1940 * @param iIrq IRQ number to set.
1941 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1942 * @thread Any thread, but will involve the emulation thread.
1943 */
1944 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1945
1946 /**
1947 * Attaches a driver (chain) to the device.
1948 *
1949 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1950 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1951 *
1952 * @returns VBox status code.
1953 * @param pDevIns Device instance.
1954 * @param iLun The logical unit to attach.
1955 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1956 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1957 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1958 * for the live of the device instance.
1959 */
1960 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1961
1962 /**
1963 * Allocate memory which is associated with current VM instance
1964 * and automatically freed on it's destruction.
1965 *
1966 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1967 * @param pDevIns Device instance.
1968 * @param cb Number of bytes to allocate.
1969 */
1970 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1971
1972 /**
1973 * Allocate memory which is associated with current VM instance
1974 * and automatically freed on it's destruction. The memory is ZEROed.
1975 *
1976 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1977 * @param pDevIns Device instance.
1978 * @param cb Number of bytes to allocate.
1979 */
1980 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1981
1982 /**
1983 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1984 *
1985 * @param pDevIns Device instance.
1986 * @param pv Pointer to the memory to free.
1987 */
1988 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1989
1990 /**
1991 * Set the VM error message
1992 *
1993 * @returns rc.
1994 * @param pDevIns Device instance.
1995 * @param rc VBox status code.
1996 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1997 * @param pszFormat Error message format string.
1998 * @param ... Error message arguments.
1999 */
2000 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2001
2002 /**
2003 * Set the VM error message
2004 *
2005 * @returns rc.
2006 * @param pDevIns Device instance.
2007 * @param rc VBox status code.
2008 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2009 * @param pszFormat Error message format string.
2010 * @param va Error message arguments.
2011 */
2012 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2013
2014 /**
2015 * Set the VM runtime error message
2016 *
2017 * @returns VBox status code.
2018 * @param pDevIns Device instance.
2019 * @param fFatal Whether it is a fatal error or not.
2020 * @param pszErrorID Error ID string.
2021 * @param pszFormat Error message format string.
2022 * @param ... Error message arguments.
2023 */
2024 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2025
2026 /**
2027 * Set the VM runtime error message
2028 *
2029 * @returns VBox status code.
2030 * @param pDevIns Device instance.
2031 * @param fFatal Whether it is a fatal error or not.
2032 * @param pszErrorID Error ID string.
2033 * @param pszFormat Error message format string.
2034 * @param va Error message arguments.
2035 */
2036 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2037
2038 /**
2039 * Assert that the current thread is the emulation thread.
2040 *
2041 * @returns True if correct.
2042 * @returns False if wrong.
2043 * @param pDevIns Device instance.
2044 * @param pszFile Filename of the assertion location.
2045 * @param iLine The linenumber of the assertion location.
2046 * @param pszFunction Function of the assertion location.
2047 */
2048 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2049
2050 /**
2051 * Assert that the current thread is NOT the emulation thread.
2052 *
2053 * @returns True if correct.
2054 * @returns False if wrong.
2055 * @param pDevIns Device instance.
2056 * @param pszFile Filename of the assertion location.
2057 * @param iLine The linenumber of the assertion location.
2058 * @param pszFunction Function of the assertion location.
2059 */
2060 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2061
2062 /**
2063 * Stops the VM and enters the debugger to look at the guest state.
2064 *
2065 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2066 * invoking this function directly.
2067 *
2068 * @returns VBox status code which must be passed up to the VMM.
2069 * @param pDevIns Device instance.
2070 * @param pszFile Filename of the assertion location.
2071 * @param iLine The linenumber of the assertion location.
2072 * @param pszFunction Function of the assertion location.
2073 * @param pszFormat Message. (optional)
2074 * @param args Message parameters.
2075 */
2076 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2077
2078 /**
2079 * Register a info handler with DBGF,
2080 *
2081 * @returns VBox status code.
2082 * @param pDevIns Device instance.
2083 * @param pszName The identifier of the info.
2084 * @param pszDesc The description of the info and any arguments the handler may take.
2085 * @param pfnHandler The handler function to be called to display the info.
2086 */
2087 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2088
2089 /**
2090 * Registers a statistics sample if statistics are enabled.
2091 *
2092 * @param pDevIns Device instance of the DMA.
2093 * @param pvSample Pointer to the sample.
2094 * @param enmType Sample type. This indicates what pvSample is pointing at.
2095 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2096 * Further nesting is possible.
2097 * @param enmUnit Sample unit.
2098 * @param pszDesc Sample description.
2099 */
2100 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2101
2102 /**
2103 * Same as pfnSTAMRegister except that the name is specified in a
2104 * RTStrPrintf like fashion.
2105 *
2106 * @returns VBox status.
2107 * @param pDevIns Device instance of the DMA.
2108 * @param pvSample Pointer to the sample.
2109 * @param enmType Sample type. This indicates what pvSample is pointing at.
2110 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2111 * @param enmUnit Sample unit.
2112 * @param pszDesc Sample description.
2113 * @param pszName The sample name format string.
2114 * @param ... Arguments to the format string.
2115 */
2116 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2117 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2118
2119 /**
2120 * Same as pfnSTAMRegister except that the name is specified in a
2121 * RTStrPrintfV like fashion.
2122 *
2123 * @returns VBox status.
2124 * @param pDevIns Device instance of the DMA.
2125 * @param pvSample Pointer to the sample.
2126 * @param enmType Sample type. This indicates what pvSample is pointing at.
2127 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2128 * @param enmUnit Sample unit.
2129 * @param pszDesc Sample description.
2130 * @param pszName The sample name format string.
2131 * @param args Arguments to the format string.
2132 */
2133 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2134 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2135
2136 /**
2137 * Register the RTC device.
2138 *
2139 * @returns VBox status code.
2140 * @param pDevIns Device instance.
2141 * @param pRtcReg Pointer to a RTC registration structure.
2142 * @param ppRtcHlp Where to store the pointer to the helper functions.
2143 */
2144 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2145
2146 /**
2147 * Create a queue.
2148 *
2149 * @returns VBox status code.
2150 * @param pDevIns The device instance.
2151 * @param cbItem The size of a queue item.
2152 * @param cItems The number of items in the queue.
2153 * @param cMilliesInterval The number of milliseconds between polling the queue.
2154 * If 0 then the emulation thread will be notified whenever an item arrives.
2155 * @param pfnCallback The consumer function.
2156 * @param fGCEnabled Set if the queue should work in GC too.
2157 * @param ppQueue Where to store the queue handle on success.
2158 * @thread The emulation thread.
2159 */
2160 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2161 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2162
2163 /**
2164 * Initializes a PDM critical section.
2165 *
2166 * The PDM critical sections are derived from the IPRT critical sections, but
2167 * works in GC as well.
2168 *
2169 * @returns VBox status code.
2170 * @param pDevIns Device instance.
2171 * @param pCritSect Pointer to the critical section.
2172 * @param pszName The name of the critical section (for statistics).
2173 */
2174 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2175
2176 /**
2177 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2178 *
2179 * @returns pTime.
2180 * @param pDevIns Device instance.
2181 * @param pTime Where to store the time.
2182 */
2183 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2184
2185 /** Space reserved for future members.
2186 * @{ */
2187 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
2188 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2189 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2190 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2191 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2192 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2193 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2194 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2195 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2196 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2197 /** @} */
2198
2199
2200 /** API available to trusted devices only.
2201 *
2202 * These APIs are providing unrestricted access to the guest and the VM,
2203 * or they are interacting intimately with PDM.
2204 *
2205 * @{
2206 */
2207 /**
2208 * Gets the VM handle. Restricted API.
2209 *
2210 * @returns VM Handle.
2211 * @param pDevIns Device instance.
2212 */
2213 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2214
2215 /**
2216 * Register the PCI Bus.
2217 *
2218 * @returns VBox status code.
2219 * @param pDevIns Device instance.
2220 * @param pPciBusReg Pointer to PCI bus registration structure.
2221 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2222 */
2223 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2224
2225 /**
2226 * Register the PIC device.
2227 *
2228 * @returns VBox status code.
2229 * @param pDevIns Device instance.
2230 * @param pPicReg Pointer to a PIC registration structure.
2231 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2232 */
2233 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2234
2235 /**
2236 * Register the APIC device.
2237 *
2238 * @returns VBox status code.
2239 * @param pDevIns Device instance.
2240 * @param pApicReg Pointer to a APIC registration structure.
2241 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2242 */
2243 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2244
2245 /**
2246 * Register the I/O APIC device.
2247 *
2248 * @returns VBox status code.
2249 * @param pDevIns Device instance.
2250 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2251 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2252 */
2253 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2254
2255 /**
2256 * Register the DMA device.
2257 *
2258 * @returns VBox status code.
2259 * @param pDevIns Device instance.
2260 * @param pDmacReg Pointer to a DMAC registration structure.
2261 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2262 */
2263 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2264
2265 /**
2266 * Read physical memory.
2267 *
2268 * @param pDevIns Device instance.
2269 * @param GCPhys Physical address start reading from.
2270 * @param pvBuf Where to put the read bits.
2271 * @param cbRead How many bytes to read.
2272 * @thread Any thread, but the call may involve the emulation thread.
2273 */
2274 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2275
2276 /**
2277 * Write to physical memory.
2278 *
2279 * @param pDevIns Device instance.
2280 * @param GCPhys Physical address to write to.
2281 * @param pvBuf What to write.
2282 * @param cbWrite How many bytes to write.
2283 * @thread Any thread, but the call may involve the emulation thread.
2284 */
2285 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2286
2287 /**
2288 * Read guest physical memory by virtual address.
2289 *
2290 * @param pDevIns Device instance.
2291 * @param pvDst Where to put the read bits.
2292 * @param GCVirtSrc Guest virtual address to start reading from.
2293 * @param cb How many bytes to read.
2294 * @thread The emulation thread.
2295 */
2296 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2297
2298 /**
2299 * Write to guest physical memory by virtual address.
2300 *
2301 * @param pDevIns Device instance.
2302 * @param GCVirtDst Guest virtual address to write to.
2303 * @param pvSrc What to write.
2304 * @param cb How many bytes to write.
2305 * @thread The emulation thread.
2306 */
2307 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2308
2309 /**
2310 * Reserve physical address space for ROM and MMIO ranges.
2311 *
2312 * @returns VBox status code.
2313 * @param pDevIns Device instance.
2314 * @param GCPhys Start physical address.
2315 * @param cbRange The size of the range.
2316 * @param pszDesc Description string.
2317 * @thread The emulation thread.
2318 */
2319 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2320
2321 /**
2322 * Convert a guest physical address to a host virtual address.
2323 *
2324 * @returns VBox status code.
2325 * @param pDevIns Device instance.
2326 * @param GCPhys Start physical address.
2327 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2328 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2329 * @thread Any thread.
2330 */
2331 DECLR3CALLBACKMEMBER(int, pfnPhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2332
2333 /**
2334 * Convert a guest virtual address to a host virtual address.
2335 *
2336 * @returns VBox status code.
2337 * @param pDevIns Device instance.
2338 * @param GCPtr Guest virtual address.
2339 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2340 * @thread The emulation thread.
2341 * @remark Careful with page boundraries.
2342 */
2343 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2344
2345 /**
2346 * Checks if the Gate A20 is enabled or not.
2347 *
2348 * @returns true if A20 is enabled.
2349 * @returns false if A20 is disabled.
2350 * @param pDevIns Device instance.
2351 * @thread The emulation thread.
2352 */
2353 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2354
2355 /**
2356 * Enables or disables the Gate A20.
2357 *
2358 * @param pDevIns Device instance.
2359 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2360 * @thread The emulation thread.
2361 */
2362 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2363
2364 /**
2365 * Resets the VM.
2366 *
2367 * @returns The appropriate VBox status code to pass around on reset.
2368 * @param pDevIns Device instance.
2369 * @thread The emulation thread.
2370 */
2371 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2372
2373 /**
2374 * Suspends the VM.
2375 *
2376 * @returns The appropriate VBox status code to pass around on suspend.
2377 * @param pDevIns Device instance.
2378 * @thread The emulation thread.
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2381
2382 /**
2383 * Power off the VM.
2384 *
2385 * @returns The appropriate VBox status code to pass around on power off.
2386 * @param pDevIns Device instance.
2387 * @thread The emulation thread.
2388 */
2389 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2390
2391 /**
2392 * Acquire global VM lock
2393 *
2394 * @returns VBox status code
2395 * @param pDevIns Device instance.
2396 */
2397 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2398
2399 /**
2400 * Release global VM lock
2401 *
2402 * @returns VBox status code
2403 * @param pDevIns Device instance.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2406
2407 /**
2408 * Check that the current thread owns the global VM lock.
2409 *
2410 * @returns boolean
2411 * @param pDevIns Device instance.
2412 * @param pszFile Filename of the assertion location.
2413 * @param iLine Linenumber of the assertion location.
2414 * @param pszFunction Function of the assertion location.
2415 */
2416 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2417
2418 /**
2419 * Register transfer function for DMA channel.
2420 *
2421 * @returns VBox status code.
2422 * @param pDevIns Device instance.
2423 * @param uChannel Channel number.
2424 * @param pfnTransferHandler Device specific transfer callback function.
2425 * @param pvUser User pointer to pass to the callback.
2426 * @thread EMT
2427 */
2428 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2429
2430 /**
2431 * Read memory.
2432 *
2433 * @returns VBox status code.
2434 * @param pDevIns Device instance.
2435 * @param uChannel Channel number.
2436 * @param pvBuffer Pointer to target buffer.
2437 * @param off DMA position.
2438 * @param cbBlock Block size.
2439 * @param pcbRead Where to store the number of bytes which was read. optional.
2440 * @thread EMT
2441 */
2442 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2443
2444 /**
2445 * Write memory.
2446 *
2447 * @returns VBox status code.
2448 * @param pDevIns Device instance.
2449 * @param uChannel Channel number.
2450 * @param pvBuffer Memory to write.
2451 * @param off DMA position.
2452 * @param cbBlock Block size.
2453 * @param pcbWritten Where to store the number of bytes which was written. optional.
2454 * @thread EMT
2455 */
2456 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2457
2458 /**
2459 * Set the DREQ line.
2460 *
2461 * @returns VBox status code.
2462 * @param pDevIns Device instance.
2463 * @param uChannel Channel number.
2464 * @param uLevel Level of the line.
2465 * @thread EMT
2466 */
2467 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2468
2469 /**
2470 * Get channel mode.
2471 *
2472 * @returns Channel mode. See specs.
2473 * @param pDevIns Device instance.
2474 * @param uChannel Channel number.
2475 * @thread EMT
2476 */
2477 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2478
2479 /**
2480 * Schedule DMA execution.
2481 *
2482 * @param pDevIns Device instance.
2483 * @thread Any thread.
2484 */
2485 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2486
2487 /**
2488 * Write CMOS value and update the checksum(s).
2489 *
2490 * @returns VBox status code.
2491 * @param pDevIns Device instance.
2492 * @param iReg The CMOS register index.
2493 * @param u8Value The CMOS register value.
2494 * @thread EMT
2495 */
2496 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2497
2498 /**
2499 * Read CMOS value.
2500 *
2501 * @returns VBox status code.
2502 * @param pDevIns Device instance.
2503 * @param iReg The CMOS register index.
2504 * @param pu8Value Where to store the CMOS register value.
2505 * @thread EMT
2506 */
2507 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2508
2509 /**
2510 * Query CPUID.
2511 *
2512 * @param pDevIns Device instance.
2513 * @param iLeaf The CPUID leaf to get.
2514 * @param pEax Where to store the EAX value.
2515 * @param pEbx Where to store the EBX value.
2516 * @param pEcx Where to store the ECX value.
2517 * @param pEdx Where to store the EDX value.
2518 */
2519 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2520
2521 /** @} */
2522
2523 /** Just a safety precaution. (The value is 0.) */
2524 uint32_t u32TheEnd;
2525} PDMDEVHLP;
2526#endif /* !IN_RING3 */
2527/** Pointer PDM Device API. */
2528typedef HCPTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2529/** Pointer PDM Device API. */
2530typedef HCPTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2531
2532/** Current PDMDEVHLP version number. */
2533#define PDM_DEVHLP_VERSION 0xf2040000
2534
2535
2536/**
2537 * PDM Device API - GC Variant.
2538 */
2539typedef struct PDMDEVHLPGC
2540{
2541 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2542 uint32_t u32Version;
2543
2544 /**
2545 * Set the IRQ for a PCI device.
2546 *
2547 * @param pDevIns Device instance.
2548 * @param iIrq IRQ number to set.
2549 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2550 * @thread Any thread, but will involve the emulation thread.
2551 */
2552 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2553
2554 /**
2555 * Set ISA IRQ for a device.
2556 *
2557 * @param pDevIns Device instance.
2558 * @param iIrq IRQ number to set.
2559 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2560 * @thread Any thread, but will involve the emulation thread.
2561 */
2562 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2563
2564 /**
2565 * Read physical memory.
2566 *
2567 * @param pDevIns Device instance.
2568 * @param GCPhys Physical address start reading from.
2569 * @param pvBuf Where to put the read bits.
2570 * @param cbRead How many bytes to read.
2571 */
2572 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2573
2574 /**
2575 * Write to physical memory.
2576 *
2577 * @param pDevIns Device instance.
2578 * @param GCPhys Physical address to write to.
2579 * @param pvBuf What to write.
2580 * @param cbWrite How many bytes to write.
2581 */
2582 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2583
2584 /**
2585 * Checks if the Gate A20 is enabled or not.
2586 *
2587 * @returns true if A20 is enabled.
2588 * @returns false if A20 is disabled.
2589 * @param pDevIns Device instance.
2590 * @thread The emulation thread.
2591 */
2592 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2593
2594 /**
2595 * Set the VM error message
2596 *
2597 * @returns rc.
2598 * @param pDrvIns Driver instance.
2599 * @param rc VBox status code.
2600 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2601 * @param pszFormat Error message format string.
2602 * @param ... Error message arguments.
2603 */
2604 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2605
2606 /**
2607 * Set the VM error message
2608 *
2609 * @returns rc.
2610 * @param pDrvIns Driver instance.
2611 * @param rc VBox status code.
2612 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2613 * @param pszFormat Error message format string.
2614 * @param va Error message arguments.
2615 */
2616 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2617
2618 /**
2619 * Set the VM runtime error message
2620 *
2621 * @returns VBox status code.
2622 * @param pDevIns Device instance.
2623 * @param fFatal Whether it is a fatal error or not.
2624 * @param pszErrorID Error ID string.
2625 * @param pszFormat Error message format string.
2626 * @param ... Error message arguments.
2627 */
2628 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2629
2630 /**
2631 * Set the VM runtime error message
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns Device instance.
2635 * @param fFatal Whether it is a fatal error or not.
2636 * @param pszErrorID Error ID string.
2637 * @param pszFormat Error message format string.
2638 * @param va Error message arguments.
2639 */
2640 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2641
2642 /**
2643 * Set parameters for pending MMIO patch operation
2644 *
2645 * @returns VBox status code.
2646 * @param pDevIns Device instance.
2647 * @param GCPhys MMIO physical address
2648 * @param pCachedData GC pointer to cached data
2649 */
2650 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2651
2652 /** Just a safety precaution. */
2653 uint32_t u32TheEnd;
2654} PDMDEVHLPGC;
2655/** Pointer PDM Device GC API. */
2656typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2657/** Pointer PDM Device GC API. */
2658typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2659
2660/** Current PDMDEVHLP version number. */
2661#define PDM_DEVHLPGC_VERSION 0xfb010000
2662
2663
2664/**
2665 * PDM Device API - R0 Variant.
2666 */
2667typedef struct PDMDEVHLPR0
2668{
2669 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2670 uint32_t u32Version;
2671
2672 /**
2673 * Set the IRQ for a PCI device.
2674 *
2675 * @param pDevIns Device instance.
2676 * @param iIrq IRQ number to set.
2677 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2678 * @thread Any thread, but will involve the emulation thread.
2679 */
2680 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2681
2682 /**
2683 * Set ISA IRQ for a device.
2684 *
2685 * @param pDevIns Device instance.
2686 * @param iIrq IRQ number to set.
2687 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2688 * @thread Any thread, but will involve the emulation thread.
2689 */
2690 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2691
2692 /**
2693 * Read physical memory.
2694 *
2695 * @param pDevIns Device instance.
2696 * @param GCPhys Physical address start reading from.
2697 * @param pvBuf Where to put the read bits.
2698 * @param cbRead How many bytes to read.
2699 */
2700 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2701
2702 /**
2703 * Write to physical memory.
2704 *
2705 * @param pDevIns Device instance.
2706 * @param GCPhys Physical address to write to.
2707 * @param pvBuf What to write.
2708 * @param cbWrite How many bytes to write.
2709 */
2710 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2711
2712 /**
2713 * Checks if the Gate A20 is enabled or not.
2714 *
2715 * @returns true if A20 is enabled.
2716 * @returns false if A20 is disabled.
2717 * @param pDevIns Device instance.
2718 * @thread The emulation thread.
2719 */
2720 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2721
2722 /**
2723 * Set the VM error message
2724 *
2725 * @returns rc.
2726 * @param pDrvIns Driver instance.
2727 * @param rc VBox status code.
2728 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2729 * @param pszFormat Error message format string.
2730 * @param ... Error message arguments.
2731 */
2732 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2733
2734 /**
2735 * Set the VM error message
2736 *
2737 * @returns rc.
2738 * @param pDrvIns Driver instance.
2739 * @param rc VBox status code.
2740 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2741 * @param pszFormat Error message format string.
2742 * @param va Error message arguments.
2743 */
2744 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2745
2746 /**
2747 * Set the VM runtime error message
2748 *
2749 * @returns VBox status code.
2750 * @param pDevIns Device instance.
2751 * @param fFatal Whether it is a fatal error or not.
2752 * @param pszErrorID Error ID string.
2753 * @param pszFormat Error message format string.
2754 * @param ... Error message arguments.
2755 */
2756 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2757
2758 /**
2759 * Set the VM runtime error message
2760 *
2761 * @returns VBox status code.
2762 * @param pDevIns Device instance.
2763 * @param fFatal Whether it is a fatal error or not.
2764 * @param pszErrorID Error ID string.
2765 * @param pszFormat Error message format string.
2766 * @param va Error message arguments.
2767 */
2768 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2769
2770 /**
2771 * Set parameters for pending MMIO patch operation
2772 *
2773 * @returns rc.
2774 * @param pDevIns Device instance.
2775 * @param GCPhys MMIO physical address
2776 * @param pCachedData GC pointer to cached data
2777 */
2778 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2779
2780 /** Just a safety precaution. */
2781 uint32_t u32TheEnd;
2782} PDMDEVHLPR0;
2783/** Pointer PDM Device R0 API. */
2784typedef HCPTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2785/** Pointer PDM Device GC API. */
2786typedef HCPTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2787
2788/** Current PDMDEVHLP version number. */
2789#define PDM_DEVHLPR0_VERSION 0xfb010000
2790
2791
2792
2793/**
2794 * PDM Device Instance.
2795 */
2796typedef struct PDMDEVINS
2797{
2798 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2799 uint32_t u32Version;
2800 /** Device instance number. */
2801 RTUINT iInstance;
2802 /** The base interface of the device.
2803 * The device constructor initializes this if it has any
2804 * device level interfaces to export. To obtain this interface
2805 * call PDMR3QueryDevice(). */
2806 PDMIBASE IBase;
2807
2808 /** Internal data. */
2809 union
2810 {
2811#ifdef PDMDEVINSINT_DECLARED
2812 PDMDEVINSINT s;
2813#endif
2814 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2815 } Internal;
2816
2817 /** Pointer the HC PDM Device API. */
2818 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2819 /** Pointer the R0 PDM Device API. */
2820 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2821 /** Pointer to device registration structure. */
2822 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2823 /** Configuration handle. */
2824 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2825 /** Pointer to device instance data. */
2826 R3PTRTYPE(void *) pvInstanceDataR3;
2827 /** Pointer to device instance data. */
2828 R0PTRTYPE(void *) pvInstanceDataR0;
2829 /** Pointer the GC PDM Device API. */
2830 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2831 /** Pointer to device instance data. */
2832 GCPTRTYPE(void *) pvInstanceDataGC;
2833 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2834 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2835 /** Device instance data. The size of this area is defined
2836 * in the PDMDEVREG::cbInstanceData field. */
2837 char achInstanceData[8];
2838} PDMDEVINS;
2839
2840/** Current DEVREG version number. */
2841#define PDM_DEVINS_VERSION 0xf3010000
2842
2843/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2844#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2845
2846
2847/** @def PDMDEV_ASSERT_EMT
2848 * Assert that the current thread is the emulation thread.
2849 */
2850#ifdef VBOX_STRICT
2851# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2852#else
2853# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2854#endif
2855
2856/** @def PDMDEV_ASSERT_OTHER
2857 * Assert that the current thread is NOT the emulation thread.
2858 */
2859#ifdef VBOX_STRICT
2860# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2861#else
2862# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2863#endif
2864
2865/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2866 * Assert that the current thread is owner of the VM lock.
2867 */
2868#ifdef VBOX_STRICT
2869# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2870#else
2871# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
2872#endif
2873
2874/** @def PDMDEV_SET_ERROR
2875 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
2876 */
2877#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
2878 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
2879
2880/** @def PDMDEV_SET_RUNTIME_ERROR
2881 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
2882 */
2883#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
2884 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
2885
2886/** @def PDMINS2DATA
2887 * Converts a PDM Device or Driver instance pointer to a pointer to the instance data.
2888 */
2889#define PDMINS2DATA(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] )
2890
2891/** @def PDMINS2DATA_GCPTR
2892 * Converts a PDM Device or Driver instance pointer to a GC pointer to the instance data.
2893 */
2894#define PDMINS2DATA_GCPTR(pIns) ( (pIns)->pvInstanceDataGC )
2895
2896/** @def PDMINS2DATA_R3PTR
2897 * Converts a PDM Device or Driver instance pointer to a HC pointer to the instance data.
2898 */
2899#define PDMINS2DATA_R3PTR(pIns) ( (pIns)->pvInstanceDataR3 )
2900
2901 /** @def PDMINS2DATA_R0PTR
2902 * Converts a PDM Device or Driver instance pointer to a R0 pointer to the instance data.
2903 */
2904#define PDMINS2DATA_R0PTR(pIns) ( (pIns)->pvInstanceDataR0 )
2905
2906/** @def PDMDEVINS_2_GCPTR
2907 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
2908 */
2909#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2910
2911/** @def PDMDEVINS_2_R3PTR
2912 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
2913 */
2914#define PDMDEVINS_2_R3PTR(pDevIns) ( (HCPTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2915
2916/** @def PDMDEVINS_2_R0PTR
2917 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
2918 */
2919#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2920
2921
2922/**
2923 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
2924 *
2925 * @returns VBox status code which must be passed up to the VMM.
2926 * @param pDevIns Device instance.
2927 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2928 * @param pszFormat Message. (optional)
2929 * @param ... Message parameters.
2930 */
2931DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
2932{
2933#ifdef VBOX_STRICT
2934# ifdef IN_RING3
2935 int rc;
2936 va_list args;
2937 va_start(args, pszFormat);
2938 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
2939 va_end(args);
2940 return rc;
2941# else
2942 return VINF_EM_DBG_STOP;
2943# endif
2944#else
2945 return VINF_SUCCESS;
2946#endif
2947}
2948
2949
2950#ifdef IN_RING3
2951/**
2952 * @copydoc PDMDEVHLP::pfnIOPortRegister
2953 */
2954DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2955 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2956 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
2957{
2958 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
2959}
2960
2961/**
2962 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
2963 */
2964DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
2965 const char *pszOut, const char *pszIn, const char *pszOutStr,
2966 const char *pszInStr, const char *pszDesc)
2967{
2968 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2969}
2970
2971/**
2972 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
2973 */
2974DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2975 const char *pszOut, const char *pszIn, const char *pszOutStr,
2976 const char *pszInStr, const char *pszDesc)
2977{
2978 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2979}
2980
2981/**
2982 * @copydoc PDMDEVHLP::pfnMMIORegister
2983 */
2984DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2985 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2986 const char *pszDesc)
2987{
2988 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
2989}
2990
2991/**
2992 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
2993 */
2994DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2995 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2996{
2997 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2998}
2999
3000/**
3001 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3002 */
3003DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3004 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
3005{
3006 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
3007}
3008
3009/**
3010 * @copydoc PDMDEVHLP::pfnROMRegister
3011 */
3012DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
3013{
3014 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
3015}
3016
3017/**
3018 * @copydoc PDMDEVHLP::pfnSSMRegister
3019 */
3020DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3021 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3022 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3023{
3024 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3025 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3026 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3027}
3028
3029/**
3030 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3031 */
3032DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
3033{
3034 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3035}
3036
3037/**
3038 * @copydoc PDMDEVHLP::pfnPCIRegister
3039 */
3040DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3041{
3042 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3043}
3044
3045/**
3046 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3047 */
3048DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3049{
3050 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3051}
3052
3053/**
3054 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3055 */
3056DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3057 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3058{
3059 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3060}
3061
3062/**
3063 * @copydoc PDMDEVHLP::pfnDriverAttach
3064 */
3065DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3066{
3067 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3068}
3069
3070/**
3071 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3072 */
3073DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3074{
3075 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3076}
3077
3078/**
3079 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3080 */
3081DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3082{
3083 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3084}
3085
3086/**
3087 * @copydoc PDMDEVHLP::pfnMMHeapFree
3088 */
3089DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3090{
3091 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3092}
3093
3094/**
3095 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3096 */
3097DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3098{
3099 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3100}
3101
3102/**
3103 * @copydoc PDMDEVHLP::pfnSTAMRegister
3104 */
3105DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3106{
3107 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3108}
3109
3110/**
3111 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3112 */
3113DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3114 const char *pszDesc, const char *pszName, ...)
3115{
3116 va_list va;
3117 va_start(va, pszName);
3118 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3119 va_end(va);
3120}
3121
3122/**
3123 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3124 */
3125DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3126 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3127{
3128 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3129}
3130
3131/**
3132 * @copydoc PDMDEVHLP::pfnCritSectInit
3133 */
3134DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3135{
3136 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3137}
3138
3139/**
3140 * @copydoc PDMDEVHLP::pfnUTCNow
3141 */
3142DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3143{
3144 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3145}
3146
3147/**
3148 * @copydoc PDMDEVHLP::pfnGetVM
3149 */
3150DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3151{
3152 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3153}
3154
3155/**
3156 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3157 */
3158DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3159{
3160 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3161}
3162
3163/**
3164 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3165 */
3166DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3167{
3168 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3169}
3170
3171/**
3172 * @copydoc PDMDEVHLP::pfnPhysReserve
3173 */
3174DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3175{
3176 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3177}
3178
3179/**
3180 * @copydoc PDMDEVHLP::pfnPhys2HCVirt
3181 */
3182DECLINLINE(int) PDMDevHlpPhys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3183{
3184 return pDevIns->pDevHlp->pfnPhys2HCVirt(pDevIns, GCPhys, cbRange, ppvHC);
3185}
3186
3187/**
3188 * @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr
3189 */
3190DECLINLINE(int) PDMDevHlpPhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3191{
3192 return pDevIns->pDevHlp->pfnPhysGCPtr2HCPtr(pDevIns, GCPtr, pHCPtr);
3193}
3194
3195/**
3196 * @copydoc PDMDEVHLP::pfnA20Set
3197 */
3198DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3199{
3200 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3201}
3202
3203/**
3204 * @copydoc PDMDEVHLP::pfnVMReset
3205 */
3206DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3207{
3208 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3209}
3210
3211/**
3212 * @copydoc PDMDEVHLP::pfnVMSuspend
3213 */
3214DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3215{
3216 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3217}
3218
3219/**
3220 * @copydoc PDMDEVHLP::pfnVMPowerOff
3221 */
3222DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3223{
3224 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3225}
3226
3227/**
3228 * @copydoc PDMDEVHLP::pfnDMARegister
3229 */
3230DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3231{
3232 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3233}
3234
3235/**
3236 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3237 */
3238DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3239{
3240 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3241}
3242
3243/**
3244 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3245 */
3246DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3247{
3248 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3249}
3250
3251/**
3252 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3253 */
3254DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3255{
3256 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3257}
3258
3259/**
3260 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3261 */
3262DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3263{
3264 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3265}
3266
3267/**
3268 * @copydoc PDMDEVHLP::pfnDMASchedule
3269 */
3270DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3271{
3272 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3273}
3274
3275/**
3276 * @copydoc PDMDEVHLP::pfnCMOSWrite
3277 */
3278DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3279{
3280 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3281}
3282
3283/**
3284 * @copydoc PDMDEVHLP::pfnCMOSRead
3285 */
3286DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3287{
3288 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3289}
3290
3291/**
3292 * @copydoc PDMDEVHLP::pfnGetCpuId
3293 */
3294DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3295{
3296 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3297}
3298#endif /* IN_RING3 */
3299
3300
3301/**
3302 * @copydoc PDMDEVHLP::pfnPCISetIrq
3303 */
3304DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3305{
3306#ifdef IN_GC
3307 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3308#elif defined(IN_RING0)
3309 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3310#else
3311 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3312#endif
3313}
3314
3315/**
3316 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3317 */
3318DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3319{
3320#ifdef IN_GC
3321 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3322#elif defined(IN_RING0)
3323 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3324#else
3325 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3326#endif
3327}
3328
3329/**
3330 * @copydoc PDMDEVHLP::pfnISASetIrq
3331 */
3332DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3333{
3334#ifdef IN_GC
3335 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3336#elif defined(IN_RING0)
3337 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3338#else
3339 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3340#endif
3341}
3342
3343/**
3344 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3345 */
3346DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3347{
3348#ifdef IN_GC
3349 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3350#elif defined(IN_RING0)
3351 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3352#else
3353 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3354#endif
3355}
3356
3357/**
3358 * @copydoc PDMDEVHLP::pfnPhysRead
3359 */
3360DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3361{
3362#ifdef IN_GC
3363 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3364#elif defined(IN_RING0)
3365 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3366#else
3367 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3368#endif
3369}
3370
3371/**
3372 * @copydoc PDMDEVHLP::pfnPhysWrite
3373 */
3374DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3375{
3376#ifdef IN_GC
3377 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3378#elif defined(IN_RING0)
3379 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3380#else
3381 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3382#endif
3383}
3384
3385/**
3386 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3387 */
3388DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3389{
3390#ifdef IN_GC
3391 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3392#elif defined(IN_RING0)
3393 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3394#else
3395 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3396#endif
3397}
3398
3399/**
3400 * @copydoc PDMDEVHLP::pfnVMSetError
3401 */
3402DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3403{
3404 va_list va;
3405 va_start(va, pszFormat);
3406#ifdef IN_GC
3407 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3408#elif defined(IN_RING0)
3409 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3410#else
3411 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3412#endif
3413 va_end(va);
3414 return rc;
3415}
3416
3417/**
3418 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3419 */
3420DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3421{
3422 va_list va;
3423 int rc;
3424 va_start(va, pszFormat);
3425#ifdef IN_GC
3426 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3427#elif defined(IN_RING0)
3428 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3429#else
3430 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3431#endif
3432 va_end(va);
3433 return rc;
3434}
3435
3436
3437
3438/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3439typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3440
3441/**
3442 * Callbacks for VBoxDeviceRegister().
3443 */
3444typedef struct PDMDEVREGCB
3445{
3446 /** Interface version.
3447 * This is set to PDM_DEVREG_CB_VERSION. */
3448 uint32_t u32Version;
3449
3450 /**
3451 * Registers a device with the current VM instance.
3452 *
3453 * @returns VBox status code.
3454 * @param pCallbacks Pointer to the callback table.
3455 * @param pDevReg Pointer to the device registration record.
3456 * This data must be permanent and readonly.
3457 */
3458 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3459
3460 /**
3461 * Allocate memory which is associated with current VM instance
3462 * and automatically freed on it's destruction.
3463 *
3464 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3465 * @param pCallbacks Pointer to the callback table.
3466 * @param cb Number of bytes to allocate.
3467 */
3468 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3469} PDMDEVREGCB;
3470
3471/** Current version of the PDMDEVREGCB structure. */
3472#define PDM_DEVREG_CB_VERSION 0xf4010000
3473
3474
3475/**
3476 * The VBoxDevicesRegister callback function.
3477 *
3478 * PDM will invoke this function after loading a device module and letting
3479 * the module decide which devices to register and how to handle conflicts.
3480 *
3481 * @returns VBox status code.
3482 * @param pCallbacks Pointer to the callback table.
3483 * @param u32Version VBox version number.
3484 */
3485typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3486
3487/** @} */
3488
3489__END_DECLS
3490
3491#endif
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