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source: vbox/trunk/include/VBox/pdmdev.h@ 4108

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License as published by the Free Software Foundation,
12 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13 * distribution. VirtualBox OSE is distributed in the hope that it will
14 * be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef ___VBox_pdmdev_h
18#define ___VBox_pdmdev_h
19
20#include <VBox/pdmqueue.h>
21#include <VBox/pdmcritsect.h>
22#include <VBox/pdmthread.h>
23#include <VBox/pdmifs.h>
24#include <VBox/pdmins.h>
25#include <VBox/iom.h>
26#include <VBox/tm.h>
27#include <VBox/ssm.h>
28#include <VBox/cfgm.h>
29#include <VBox/dbgf.h>
30#include <VBox/mm.h>
31#include <VBox/err.h>
32#include <VBox/pci.h>
33#include <iprt/stdarg.h>
34
35__BEGIN_DECLS
36
37/** @defgroup grp_pdm_device Devices
38 * @ingroup grp_pdm
39 * @{
40 */
41
42/**
43 * Construct a device instance for a VM.
44 *
45 * @returns VBox status.
46 * @param pDevIns The device instance data.
47 * If the registration structure is needed, pDevIns->pDevReg points to it.
48 * @param iInstance Instance number. Use this to figure out which registers and such to use.
49 * The instance number is also found in pDevIns->iInstance, but since it's
50 * likely to be freqently used PDM passes it as parameter.
51 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
52 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
53 * primary usage will in this function it's passed as a parameter.
54 */
55typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
56/** Pointer to a FNPDMDEVCONSTRUCT() function. */
57typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
58
59/**
60 * Destruct a device instance.
61 *
62 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
63 * resources can be freed correctly.
64 *
65 * @returns VBox status.
66 * @param pDevIns The device instance data.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
69/** Pointer to a FNPDMDEVDESTRUCT() function. */
70typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
71
72/**
73 * Device relocation callback.
74 *
75 * When this callback is called the device instance data, and if the
76 * device have a GC component, is being relocated, or/and the selectors
77 * have been changed. The device must use the chance to perform the
78 * necessary pointer relocations and data updates.
79 *
80 * Before the GC code is executed the first time, this function will be
81 * called with a 0 delta so GC pointer calculations can be one in one place.
82 *
83 * @param pDevIns Pointer to the device instance.
84 * @param offDelta The relocation delta relative to the old location.
85 *
86 * @remark A relocation CANNOT fail.
87 */
88typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
89/** Pointer to a FNPDMDEVRELOCATE() function. */
90typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
91
92
93/**
94 * Device I/O Control interface.
95 *
96 * This is used by external components, such as the COM interface, to
97 * communicate with devices using a class wide interface or a device
98 * specific interface.
99 *
100 * @returns VBox status code.
101 * @param pDevIns Pointer to the device instance.
102 * @param uFunction Function to perform.
103 * @param pvIn Pointer to input data.
104 * @param cbIn Size of input data.
105 * @param pvOut Pointer to output data.
106 * @param cbOut Size of output data.
107 * @param pcbOut Where to store the actual size of the output data.
108 */
109typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
110 void *pvIn, RTUINT cbIn,
111 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
112/** Pointer to a FNPDMDEVIOCTL() function. */
113typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
114
115/**
116 * Power On notification.
117 *
118 * @returns VBox status.
119 * @param pDevIns The device instance data.
120 */
121typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
122/** Pointer to a FNPDMDEVPOWERON() function. */
123typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
124
125/**
126 * Reset notification.
127 *
128 * @returns VBox status.
129 * @param pDevIns The device instance data.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 */
141typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
142/** Pointer to a FNPDMDEVSUSPEND() function. */
143typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
144
145/**
146 * Resume notification.
147 *
148 * @returns VBox status.
149 * @param pDevIns The device instance data.
150 */
151typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
152/** Pointer to a FNPDMDEVRESUME() function. */
153typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
154
155/**
156 * Power Off notification.
157 *
158 * @param pDevIns The device instance data.
159 */
160typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
161/** Pointer to a FNPDMDEVPOWEROFF() function. */
162typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
163
164/**
165 * Attach command.
166 *
167 * This is called to let the device attach to a driver for a specified LUN
168 * at runtime. This is not called during VM construction, the device
169 * constructor have to attach to all the available drivers.
170 *
171 * This is like plugging in the keyboard or mouse after turning on the PC.
172 *
173 * @returns VBox status code.
174 * @param pDevIns The device instance.
175 * @param iLUN The logical unit which is being detached.
176 */
177typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
178/** Pointer to a FNPDMDEVATTACH() function. */
179typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
180
181/**
182 * Detach notification.
183 *
184 * This is called when a driver is detaching itself from a LUN of the device.
185 * The device should adjust it's state to reflect this.
186 *
187 * This is like unplugging the network cable to use it for the laptop or
188 * something while the PC is still running.
189 *
190 * @param pDevIns The device instance.
191 * @param iLUN The logical unit which is being detached.
192 */
193typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
194/** Pointer to a FNPDMDEVDETACH() function. */
195typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
196
197/**
198 * Query the base interface of a logical unit.
199 *
200 * @returns VBOX status code.
201 * @param pDevIns The device instance.
202 * @param iLUN The logicial unit to query.
203 * @param ppBase Where to store the pointer to the base interface of the LUN.
204 */
205typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
206/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
207typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
208
209/**
210 * Init complete notification.
211 * This can be done to do communication with other devices and other
212 * initialization which requires everything to be in place.
213 *
214 * @returns VBOX status code.
215 * @param pDevIns The device instance.
216 */
217typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
218/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
219typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
220
221
222
223/** PDM Device Registration Structure,
224 * This structure is used when registering a device from
225 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
226 * the VM is terminated.
227 */
228typedef struct PDMDEVREG
229{
230 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
231 uint32_t u32Version;
232 /** Device name. */
233 char szDeviceName[32];
234 /** Name of guest context module (no path).
235 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
236 char szGCMod[32];
237 /** Name of guest context module (no path).
238 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
239 char szR0Mod[32];
240 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
241 * remain unchanged from registration till VM destruction. */
242 const char *pszDescription;
243
244 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
245 RTUINT fFlags;
246 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
247 RTUINT fClass;
248 /** Maximum number of instances (per VM). */
249 RTUINT cMaxInstances;
250 /** Size of the instance data. */
251 RTUINT cbInstance;
252
253 /** Construct instance - required. */
254 PFNPDMDEVCONSTRUCT pfnConstruct;
255 /** Destruct instance - optional. */
256 PFNPDMDEVDESTRUCT pfnDestruct;
257 /** Relocation command - optional. */
258 PFNPDMDEVRELOCATE pfnRelocate;
259 /** I/O Control interface - optional. */
260 PFNPDMDEVIOCTL pfnIOCtl;
261 /** Power on notification - optional. */
262 PFNPDMDEVPOWERON pfnPowerOn;
263 /** Reset notification - optional. */
264 PFNPDMDEVRESET pfnReset;
265 /** Suspend notification - optional. */
266 PFNPDMDEVSUSPEND pfnSuspend;
267 /** Resume notification - optional. */
268 PFNPDMDEVRESUME pfnResume;
269 /** Attach command - optional. */
270 PFNPDMDEVATTACH pfnAttach;
271 /** Detach notification - optional. */
272 PFNPDMDEVDETACH pfnDetach;
273 /** Query a LUN base interface - optional. */
274 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
275 /** Init complete notification - optional. */
276 PFNPDMDEVINITCOMPLETE pfnInitComplete;
277 /** Power off notification - optional. */
278 PFNPDMDEVPOWEROFF pfnPowerOff;
279} PDMDEVREG;
280/** Pointer to a PDM Device Structure. */
281typedef PDMDEVREG *PPDMDEVREG;
282/** Const pointer to a PDM Device Structure. */
283typedef PDMDEVREG const *PCPDMDEVREG;
284
285/** Current DEVREG version number. */
286#define PDM_DEVREG_VERSION 0xc0010000
287
288/** PDM Device Flags.
289 * @{ */
290/** This flag is used to indicate that the device has a GC component. */
291#define PDM_DEVREG_FLAGS_GC 0x00000001
292/** This flag is used to indicate that the device has a R0 component. */
293#define PDM_DEVREG_FLAGS_R0 0x00010000
294
295/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
296 * The bit count for the current host. */
297#if HC_ARCH_BITS == 32
298# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
299#elif HC_ARCH_BITS == 64
300# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
301#else
302# error Unsupported HC_ARCH_BITS value.
303#endif
304/** The host bit count mask. */
305#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
306
307/** The device support only 32-bit guests. */
308#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
309/** The device support only 64-bit guests. */
310#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
311/** The device support both 32-bit & 64-bit guests. */
312#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
313/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
314 * The guest bit count for the current compilation. */
315#if GC_ARCH_BITS == 32
316# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
317#elif GC_ARCH_BITS == 64
318# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
319#else
320# error Unsupported GC_ARCH_BITS value.
321#endif
322/** The guest bit count mask. */
323#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
324
325/** Indicates that the devices support PAE36 on a 32-bit guest. */
326#define PDM_DEVREG_FLAGS_PAE36 0x00000020
327/** @} */
328
329
330/** PDM Device Classes.
331 * The order is important, lower bit earlier instantiation.
332 * @{ */
333/** Architecture device. */
334#define PDM_DEVREG_CLASS_ARCH BIT(0)
335/** Architecture BIOS device. */
336#define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)
337/** PCI bus brigde. */
338#define PDM_DEVREG_CLASS_BUS_PCI BIT(2)
339/** ISA bus brigde. */
340#define PDM_DEVREG_CLASS_BUS_ISA BIT(3)
341/** Input device (mouse, keyboard, joystick,..). */
342#define PDM_DEVREG_CLASS_INPUT BIT(4)
343/** Interrupt controller (PIC). */
344#define PDM_DEVREG_CLASS_PIC BIT(5)
345/** Interval controoler (PIT). */
346#define PDM_DEVREG_CLASS_PIT BIT(6)
347/** RTC/CMOS. */
348#define PDM_DEVREG_CLASS_RTC BIT(7)
349/** DMA controller. */
350#define PDM_DEVREG_CLASS_DMA BIT(8)
351/** VMM Device. */
352#define PDM_DEVREG_CLASS_VMM_DEV BIT(9)
353/** Graphics device, like VGA. */
354#define PDM_DEVREG_CLASS_GRAPHICS BIT(10)
355/** Storage controller device. */
356#define PDM_DEVREG_CLASS_STORAGE BIT(11)
357/** Network interface controller. */
358#define PDM_DEVREG_CLASS_NETWORK BIT(12)
359/** Audio. */
360#define PDM_DEVREG_CLASS_AUDIO BIT(13)
361/** USB HIC. */
362#define PDM_DEVREG_CLASS_BUS_USB BIT(14)
363/** ACPI. */
364#define PDM_DEVREG_CLASS_ACPI BIT(15)
365/** Serial controller device. */
366#define PDM_DEVREG_CLASS_SERIAL BIT(16)
367/** Parallel controller device */
368#define PDM_DEVREG_CLASS_PARALLEL BIT(17)
369/** Misc devices (always last). */
370#define PDM_DEVREG_CLASS_MISC BIT(31)
371/** @} */
372
373
374/** @name IRQ Level for use with the *SetIrq APIs.
375 * @{
376 */
377/** Assert the IRQ (can assume value 1). */
378#define PDM_IRQ_LEVEL_HIGH BIT(0)
379/** Deassert the IRQ (can assume value 0). */
380#define PDM_IRQ_LEVEL_LOW 0
381/** flip-flop - assert and then deassert it again immediately. */
382#define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)
383/** @} */
384
385
386/**
387 * PCI Bus registaration structure.
388 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
389 */
390typedef struct PDMPCIBUSREG
391{
392 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
393 uint32_t u32Version;
394
395 /**
396 * Registers the device with the default PCI bus.
397 *
398 * @returns VBox status code.
399 * @param pDevIns Device instance of the PCI Bus.
400 * @param pPciDev The PCI device structure.
401 * Any PCI enabled device must keep this in it's instance data!
402 * Fill in the PCI data config before registration, please.
403 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
404 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
405 * If negative, the pci bus device will assign one.
406 */
407 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
408
409 /**
410 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
411 *
412 * @returns VBox status code.
413 * @param pDevIns Device instance of the PCI Bus.
414 * @param pPciDev The PCI device structure.
415 * @param iRegion The region number.
416 * @param cbRegion Size of the region.
417 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
418 * @param pfnCallback Callback for doing the mapping.
419 */
420 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
421
422 /**
423 * Register PCI configuration space read/write callbacks.
424 *
425 * @param pDevIns Device instance of the PCI Bus.
426 * @param pPciDev The PCI device structure.
427 * @param pfnRead Pointer to the user defined PCI config read function.
428 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
429 * PCI config read function. This way, user can decide when (and if)
430 * to call default PCI config read function. Can be NULL.
431 * @param pfnWrite Pointer to the user defined PCI config write function.
432 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
433 * PCI config write function. This way, user can decide when (and if)
434 * to call default PCI config write function. Can be NULL.
435 * @thread EMT
436 */
437 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
438 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
439
440 /**
441 * Set the IRQ for a PCI device.
442 *
443 * @param pDevIns Device instance of the PCI Bus.
444 * @param pPciDev The PCI device structure.
445 * @param iIrq IRQ number to set.
446 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
447 */
448 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
449
450 /**
451 * Saves a state of the PCI device.
452 *
453 * @returns VBox status code.
454 * @param pDevIns Device instance of the PCI Bus.
455 * @param pPciDev Pointer to PCI device.
456 * @param pSSMHandle The handle to save the state to.
457 */
458 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
459
460 /**
461 * Loads a saved PCI device state.
462 *
463 * @returns VBox status code.
464 * @param pDevIns Device instance of the PCI Bus.
465 * @param pPciDev Pointer to PCI device.
466 * @param pSSMHandle The handle to the saved state.
467 */
468 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
469
470 /**
471 * Called to perform the job of the bios.
472 * This is only called for the first PCI Bus - it is expected to
473 * service all the PCI buses.
474 *
475 * @returns VBox status.
476 * @param pDevIns Device instance of the first bus.
477 */
478 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
479
480 /** The name of the SetIrq GC entry point. */
481 const char *pszSetIrqGC;
482
483 /** The name of the SetIrq R0 entry point. */
484 const char *pszSetIrqR0;
485
486} PDMPCIBUSREG;
487/** Pointer to a PCI bus registration structure. */
488typedef PDMPCIBUSREG *PPDMPCIBUSREG;
489
490/** Current PDMPCIBUSREG version number. */
491#define PDM_PCIBUSREG_VERSION 0xd0020000
492
493/**
494 * PCI Bus GC helpers.
495 */
496typedef struct PDMPCIHLPGC
497{
498 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
499 uint32_t u32Version;
500
501 /**
502 * Set an ISA IRQ.
503 *
504 * @param pDevIns PCI device instance.
505 * @param iIrq IRQ number to set.
506 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
507 * @thread EMT only.
508 */
509 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
510
511 /**
512 * Set an I/O-APIC IRQ.
513 *
514 * @param pDevIns PCI device instance.
515 * @param iIrq IRQ number to set.
516 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
517 * @thread EMT only.
518 */
519 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
520
521#ifdef VBOX_WITH_PDM_LOCK
522 /**
523 * Acquires the PDM lock.
524 *
525 * @returns VINF_SUCCESS on success.
526 * @returns rc if we failed to acquire the lock.
527 * @param pDevIns The PCI device instance.
528 * @param rc What to return if we fail to acquire the lock.
529 */
530 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
531
532 /**
533 * Releases the PDM lock.
534 *
535 * @param pDevIns The PCI device instance.
536 */
537 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
538#endif
539 /** Just a safety precaution. */
540 uint32_t u32TheEnd;
541} PDMPCIHLPGC;
542/** Pointer to PCI helpers. */
543typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
544/** Pointer to const PCI helpers. */
545typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
546
547/** Current PDMPCIHLPR3 version number. */
548#define PDM_PCIHLPGC_VERSION 0xe1010000
549
550
551/**
552 * PCI Bus R0 helpers.
553 */
554typedef struct PDMPCIHLPR0
555{
556 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
557 uint32_t u32Version;
558
559 /**
560 * Set an ISA IRQ.
561 *
562 * @param pDevIns PCI device instance.
563 * @param iIrq IRQ number to set.
564 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
565 * @thread EMT only.
566 */
567 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
568
569 /**
570 * Set an I/O-APIC IRQ.
571 *
572 * @param pDevIns PCI device instance.
573 * @param iIrq IRQ number to set.
574 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
575 * @thread EMT only.
576 */
577 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
578
579#ifdef VBOX_WITH_PDM_LOCK
580 /**
581 * Acquires the PDM lock.
582 *
583 * @returns VINF_SUCCESS on success.
584 * @returns rc if we failed to acquire the lock.
585 * @param pDevIns The PCI device instance.
586 * @param rc What to return if we fail to acquire the lock.
587 */
588 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
589
590 /**
591 * Releases the PDM lock.
592 *
593 * @param pDevIns The PCI device instance.
594 */
595 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
596#endif
597
598 /** Just a safety precaution. */
599 uint32_t u32TheEnd;
600} PDMPCIHLPR0;
601/** Pointer to PCI helpers. */
602typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
603/** Pointer to const PCI helpers. */
604typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
605
606/** Current PDMPCIHLPR0 version number. */
607#define PDM_PCIHLPR0_VERSION 0xe1010000
608
609/**
610 * PCI device helpers.
611 */
612typedef struct PDMPCIHLPR3
613{
614 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
615 uint32_t u32Version;
616
617 /**
618 * Set an ISA IRQ.
619 *
620 * @param pDevIns The PCI device instance.
621 * @param iIrq IRQ number to set.
622 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
623 * @thread EMT only.
624 */
625 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
626
627 /**
628 * Set an I/O-APIC IRQ.
629 *
630 * @param pDevIns The PCI device instance.
631 * @param iIrq IRQ number to set.
632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
633 * @thread EMT only.
634 */
635 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
636
637#ifdef VBOX_WITH_PDM_LOCK
638 /**
639 * Acquires the PDM lock.
640 *
641 * @returns VINF_SUCCESS on success.
642 * @returns Fatal error on failure.
643 * @param pDevIns The PCI device instance.
644 * @param rc Dummy for making the interface identical to the GC and R0 versions.
645 */
646 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
647
648 /**
649 * Releases the PDM lock.
650 *
651 * @param pDevIns The PCI device instance.
652 */
653 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
654#endif
655
656 /**
657 * Gets the address of the GC PCI Bus helpers.
658 *
659 * This should be called at both construction and relocation time
660 * to obtain the correct address of the GC helpers.
661 *
662 * @returns GC pointer to the PCI Bus helpers.
663 * @param pDevIns Device instance of the PCI Bus.
664 * @thread EMT only.
665 */
666 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
667
668 /**
669 * Gets the address of the R0 PCI Bus helpers.
670 *
671 * This should be called at both construction and relocation time
672 * to obtain the correct address of the GC helpers.
673 *
674 * @returns R0 pointer to the PCI Bus helpers.
675 * @param pDevIns Device instance of the PCI Bus.
676 * @thread EMT only.
677 */
678 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
679
680 /** Just a safety precaution. */
681 uint32_t u32TheEnd;
682} PDMPCIHLPR3;
683/** Pointer to PCI helpers. */
684typedef HCPTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
685/** Pointer to const PCI helpers. */
686typedef HCPTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
687
688/** Current PDMPCIHLPR3 version number. */
689#define PDM_PCIHLPR3_VERSION 0xf1010000
690
691
692/**
693 * Programmable Interrupt Controller registration structure.
694 */
695typedef struct PDMPICREG
696{
697 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
698 uint32_t u32Version;
699
700 /**
701 * Set the an IRQ.
702 *
703 * @param pDevIns Device instance of the PIC.
704 * @param iIrq IRQ number to set.
705 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
706 */
707 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
708
709 /**
710 * Get a pending interrupt.
711 *
712 * @returns Pending interrupt number.
713 * @param pDevIns Device instance of the PIC.
714 */
715 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
716
717 /** The name of the GC SetIrq entry point. */
718 const char *pszSetIrqGC;
719 /** The name of the GC GetInterrupt entry point. */
720 const char *pszGetInterruptGC;
721
722 /** The name of the R0 SetIrq entry point. */
723 const char *pszSetIrqR0;
724 /** The name of the R0 GetInterrupt entry point. */
725 const char *pszGetInterruptR0;
726} PDMPICREG;
727/** Pointer to a PIC registration structure. */
728typedef PDMPICREG *PPDMPICREG;
729
730/** Current PDMPICREG version number. */
731#define PDM_PICREG_VERSION 0xe0020000
732
733/**
734 * PIC GC helpers.
735 */
736typedef struct PDMPICHLPGC
737{
738 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
739 uint32_t u32Version;
740
741 /**
742 * Set the interrupt force action flag.
743 *
744 * @param pDevIns Device instance of the PIC.
745 */
746 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
747
748 /**
749 * Clear the interrupt force action flag.
750 *
751 * @param pDevIns Device instance of the PIC.
752 */
753 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
754
755#ifdef VBOX_WITH_PDM_LOCK
756 /**
757 * Acquires the PDM lock.
758 *
759 * @returns VINF_SUCCESS on success.
760 * @returns rc if we failed to acquire the lock.
761 * @param pDevIns The PIC device instance.
762 * @param rc What to return if we fail to acquire the lock.
763 */
764 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
765
766 /**
767 * Releases the PDM lock.
768 *
769 * @param pDevIns The PIC device instance.
770 */
771 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
772#endif
773 /** Just a safety precaution. */
774 uint32_t u32TheEnd;
775} PDMPICHLPGC;
776
777/** Pointer to PIC GC helpers. */
778typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
779/** Pointer to const PIC GC helpers. */
780typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
781
782/** Current PDMPICHLPGC version number. */
783#define PDM_PICHLPGC_VERSION 0xfc010000
784
785
786/**
787 * PIC R0 helpers.
788 */
789typedef struct PDMPICHLPR0
790{
791 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
792 uint32_t u32Version;
793
794 /**
795 * Set the interrupt force action flag.
796 *
797 * @param pDevIns Device instance of the PIC.
798 */
799 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
800
801 /**
802 * Clear the interrupt force action flag.
803 *
804 * @param pDevIns Device instance of the PIC.
805 */
806 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
807
808#ifdef VBOX_WITH_PDM_LOCK
809 /**
810 * Acquires the PDM lock.
811 *
812 * @returns VINF_SUCCESS on success.
813 * @returns rc if we failed to acquire the lock.
814 * @param pDevIns The PIC device instance.
815 * @param rc What to return if we fail to acquire the lock.
816 */
817 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
818
819 /**
820 * Releases the PDM lock.
821 *
822 * @param pDevIns The PCI device instance.
823 */
824 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
825#endif
826
827 /** Just a safety precaution. */
828 uint32_t u32TheEnd;
829} PDMPICHLPR0;
830
831/** Pointer to PIC R0 helpers. */
832typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
833/** Pointer to const PIC R0 helpers. */
834typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
835
836/** Current PDMPICHLPR0 version number. */
837#define PDM_PICHLPR0_VERSION 0xfc010000
838
839/**
840 * PIC HC helpers.
841 */
842typedef struct PDMPICHLPR3
843{
844 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
845 uint32_t u32Version;
846
847 /**
848 * Set the interrupt force action flag.
849 *
850 * @param pDevIns Device instance of the PIC.
851 */
852 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
853
854 /**
855 * Clear the interrupt force action flag.
856 *
857 * @param pDevIns Device instance of the PIC.
858 */
859 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
860
861#ifdef VBOX_WITH_PDM_LOCK
862 /**
863 * Acquires the PDM lock.
864 *
865 * @returns VINF_SUCCESS on success.
866 * @returns Fatal error on failure.
867 * @param pDevIns The PIC device instance.
868 * @param rc Dummy for making the interface identical to the GC and R0 versions.
869 */
870 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
871
872 /**
873 * Releases the PDM lock.
874 *
875 * @param pDevIns The PIC device instance.
876 */
877 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
878#endif
879
880 /**
881 * Gets the address of the GC PIC helpers.
882 *
883 * This should be called at both construction and relocation time
884 * to obtain the correct address of the GC helpers.
885 *
886 * @returns GC pointer to the PIC helpers.
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
890
891 /**
892 * Gets the address of the R0 PIC helpers.
893 *
894 * This should be called at both construction and relocation time
895 * to obtain the correct address of the GC helpers.
896 *
897 * @returns R0 pointer to the PIC helpers.
898 * @param pDevIns Device instance of the PIC.
899 */
900 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
901
902 /** Just a safety precaution. */
903 uint32_t u32TheEnd;
904} PDMPICHLPR3;
905
906/** Pointer to PIC HC helpers. */
907typedef HCPTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
908/** Pointer to const PIC HC helpers. */
909typedef HCPTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
910
911/** Current PDMPICHLPR3 version number. */
912#define PDM_PICHLPR3_VERSION 0xf0010000
913
914
915
916/**
917 * Advanced Programmable Interrupt Controller registration structure.
918 */
919typedef struct PDMAPICREG
920{
921 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
922 uint32_t u32Version;
923
924 /**
925 * Get a pending interrupt.
926 *
927 * @returns Pending interrupt number.
928 * @param pDevIns Device instance of the APIC.
929 */
930 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
931
932 /**
933 * Set the APIC base.
934 *
935 * @param pDevIns Device instance of the APIC.
936 * @param u64Base The new base.
937 */
938 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
939
940 /**
941 * Get the APIC base.
942 *
943 * @returns Current base.
944 * @param pDevIns Device instance of the APIC.
945 */
946 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
947
948 /**
949 * Set the TPR (task priority register?).
950 *
951 * @param pDevIns Device instance of the APIC.
952 * @param u8TPR The new TPR.
953 */
954 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
955
956 /**
957 * Get the TPR (task priority register?).
958 *
959 * @returns The current TPR.
960 * @param pDevIns Device instance of the APIC.
961 */
962 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
963
964 /**
965 * Private interface between the IOAPIC and APIC.
966 *
967 * This is a low-level, APIC/IOAPIC implementation specific interface
968 * which is registered with PDM only because it makes life so much
969 * simpler right now (GC bits). This is a bad bad hack! The correct
970 * way of doing this would involve some way of querying GC interfaces
971 * and relocating them. Perhaps doing some kind of device init in GC...
972 *
973 * @returns The current TPR.
974 * @param pDevIns Device instance of the APIC.
975 * @param u8Dest See APIC implementation.
976 * @param u8DestMode See APIC implementation.
977 * @param u8DeliveryMode See APIC implementation.
978 * @param iVector See APIC implementation.
979 * @param u8Polarity See APIC implementation.
980 * @param u8TriggerMode See APIC implementation.
981 */
982 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
983 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
984
985 /** The name of the GC GetInterrupt entry point. */
986 const char *pszGetInterruptGC;
987 /** The name of the GC SetBase entry point. */
988 const char *pszSetBaseGC;
989 /** The name of the GC GetBase entry point. */
990 const char *pszGetBaseGC;
991 /** The name of the GC SetTPR entry point. */
992 const char *pszSetTPRGC;
993 /** The name of the GC GetTPR entry point. */
994 const char *pszGetTPRGC;
995 /** The name of the GC BusDeliver entry point. */
996 const char *pszBusDeliverGC;
997
998 /** The name of the R0 GetInterrupt entry point. */
999 const char *pszGetInterruptR0;
1000 /** The name of the R0 SetBase entry point. */
1001 const char *pszSetBaseR0;
1002 /** The name of the R0 GetBase entry point. */
1003 const char *pszGetBaseR0;
1004 /** The name of the R0 SetTPR entry point. */
1005 const char *pszSetTPRR0;
1006 /** The name of the R0 GetTPR entry point. */
1007 const char *pszGetTPRR0;
1008 /** The name of the R0 BusDeliver entry point. */
1009 const char *pszBusDeliverR0;
1010
1011} PDMAPICREG;
1012/** Pointer to an APIC registration structure. */
1013typedef PDMAPICREG *PPDMAPICREG;
1014
1015/** Current PDMAPICREG version number. */
1016#define PDM_APICREG_VERSION 0x70010000
1017
1018
1019/**
1020 * APIC GC helpers.
1021 */
1022typedef struct PDMAPICHLPGC
1023{
1024 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1025 uint32_t u32Version;
1026
1027 /**
1028 * Set the interrupt force action flag.
1029 *
1030 * @param pDevIns Device instance of the APIC.
1031 */
1032 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1033
1034 /**
1035 * Clear the interrupt force action flag.
1036 *
1037 * @param pDevIns Device instance of the APIC.
1038 */
1039 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1040
1041 /**
1042 * Sets or clears the APIC bit in the CPUID feature masks.
1043 *
1044 * @param pDevIns Device instance of the APIC.
1045 * @param fEnabled If true the bit is set, else cleared.
1046 */
1047 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1048
1049#ifdef VBOX_WITH_PDM_LOCK
1050 /**
1051 * Acquires the PDM lock.
1052 *
1053 * @returns VINF_SUCCESS on success.
1054 * @returns rc if we failed to acquire the lock.
1055 * @param pDevIns The APIC device instance.
1056 * @param rc What to return if we fail to acquire the lock.
1057 */
1058 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1059
1060 /**
1061 * Releases the PDM lock.
1062 *
1063 * @param pDevIns The APIC device instance.
1064 */
1065 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1066#endif
1067 /** Just a safety precaution. */
1068 uint32_t u32TheEnd;
1069} PDMAPICHLPGC;
1070/** Pointer to APIC GC helpers. */
1071typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1072/** Pointer to const APIC helpers. */
1073typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1074
1075/** Current PDMAPICHLPGC version number. */
1076#define PDM_APICHLPGC_VERSION 0x60010000
1077
1078
1079/**
1080 * APIC R0 helpers.
1081 */
1082typedef struct PDMAPICHLPR0
1083{
1084 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1085 uint32_t u32Version;
1086
1087 /**
1088 * Set the interrupt force action flag.
1089 *
1090 * @param pDevIns Device instance of the APIC.
1091 */
1092 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1093
1094 /**
1095 * Clear the interrupt force action flag.
1096 *
1097 * @param pDevIns Device instance of the APIC.
1098 */
1099 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1100
1101 /**
1102 * Sets or clears the APIC bit in the CPUID feature masks.
1103 *
1104 * @param pDevIns Device instance of the APIC.
1105 * @param fEnabled If true the bit is set, else cleared.
1106 */
1107 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1108
1109#ifdef VBOX_WITH_PDM_LOCK
1110 /**
1111 * Acquires the PDM lock.
1112 *
1113 * @returns VINF_SUCCESS on success.
1114 * @returns rc if we failed to acquire the lock.
1115 * @param pDevIns The APIC device instance.
1116 * @param rc What to return if we fail to acquire the lock.
1117 */
1118 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1119
1120 /**
1121 * Releases the PDM lock.
1122 *
1123 * @param pDevIns The APIC device instance.
1124 */
1125 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1126#endif
1127
1128 /** Just a safety precaution. */
1129 uint32_t u32TheEnd;
1130} PDMAPICHLPR0;
1131/** Pointer to APIC GC helpers. */
1132typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1133/** Pointer to const APIC helpers. */
1134typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1135
1136/** Current PDMAPICHLPR0 version number. */
1137#define PDM_APICHLPR0_VERSION 0x60010000
1138
1139/**
1140 * APIC HC helpers.
1141 */
1142typedef struct PDMAPICHLPR3
1143{
1144 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1145 uint32_t u32Version;
1146
1147 /**
1148 * Set the interrupt force action flag.
1149 *
1150 * @param pDevIns Device instance of the APIC.
1151 */
1152 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1153
1154 /**
1155 * Clear the interrupt force action flag.
1156 *
1157 * @param pDevIns Device instance of the APIC.
1158 */
1159 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1160
1161 /**
1162 * Sets or clears the APIC bit in the CPUID feature masks.
1163 *
1164 * @param pDevIns Device instance of the APIC.
1165 * @param fEnabled If true the bit is set, else cleared.
1166 */
1167 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1168
1169#ifdef VBOX_WITH_PDM_LOCK
1170 /**
1171 * Acquires the PDM lock.
1172 *
1173 * @returns VINF_SUCCESS on success.
1174 * @returns Fatal error on failure.
1175 * @param pDevIns The APIC device instance.
1176 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1177 */
1178 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1179
1180 /**
1181 * Releases the PDM lock.
1182 *
1183 * @param pDevIns The APIC device instance.
1184 */
1185 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1186#endif
1187
1188 /**
1189 * Gets the address of the GC APIC helpers.
1190 *
1191 * This should be called at both construction and relocation time
1192 * to obtain the correct address of the GC helpers.
1193 *
1194 * @returns GC pointer to the APIC helpers.
1195 * @param pDevIns Device instance of the APIC.
1196 */
1197 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1198
1199 /**
1200 * Gets the address of the R0 APIC helpers.
1201 *
1202 * This should be called at both construction and relocation time
1203 * to obtain the correct address of the R0 helpers.
1204 *
1205 * @returns R0 pointer to the APIC helpers.
1206 * @param pDevIns Device instance of the APIC.
1207 */
1208 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1209
1210 /** Just a safety precaution. */
1211 uint32_t u32TheEnd;
1212} PDMAPICHLPR3;
1213/** Pointer to APIC helpers. */
1214typedef HCPTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1215/** Pointer to const APIC helpers. */
1216typedef HCPTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1217
1218/** Current PDMAPICHLP version number. */
1219#define PDM_APICHLPR3_VERSION 0xfd010000
1220
1221
1222/**
1223 * I/O APIC registration structure.
1224 */
1225typedef struct PDMIOAPICREG
1226{
1227 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1228 uint32_t u32Version;
1229
1230 /**
1231 * Set the an IRQ.
1232 *
1233 * @param pDevIns Device instance of the I/O APIC.
1234 * @param iIrq IRQ number to set.
1235 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1236 */
1237 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1238
1239 /** The name of the GC SetIrq entry point. */
1240 const char *pszSetIrqGC;
1241
1242 /** The name of the R0 SetIrq entry point. */
1243 const char *pszSetIrqR0;
1244} PDMIOAPICREG;
1245/** Pointer to an APIC registration structure. */
1246typedef PDMIOAPICREG *PPDMIOAPICREG;
1247
1248/** Current PDMAPICREG version number. */
1249#define PDM_IOAPICREG_VERSION 0x50010000
1250
1251
1252/**
1253 * IOAPIC GC helpers.
1254 */
1255typedef struct PDMIOAPICHLPGC
1256{
1257 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1258 uint32_t u32Version;
1259
1260 /**
1261 * Private interface between the IOAPIC and APIC.
1262 *
1263 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1264 *
1265 * @returns The current TPR.
1266 * @param pDevIns Device instance of the IOAPIC.
1267 * @param u8Dest See APIC implementation.
1268 * @param u8DestMode See APIC implementation.
1269 * @param u8DeliveryMode See APIC implementation.
1270 * @param iVector See APIC implementation.
1271 * @param u8Polarity See APIC implementation.
1272 * @param u8TriggerMode See APIC implementation.
1273 */
1274 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1275 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1276
1277#ifdef VBOX_WITH_PDM_LOCK
1278 /**
1279 * Acquires the PDM lock.
1280 *
1281 * @returns VINF_SUCCESS on success.
1282 * @returns rc if we failed to acquire the lock.
1283 * @param pDevIns The IOAPIC device instance.
1284 * @param rc What to return if we fail to acquire the lock.
1285 */
1286 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1287
1288 /**
1289 * Releases the PDM lock.
1290 *
1291 * @param pDevIns The IOAPIC device instance.
1292 */
1293 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1294#endif
1295
1296 /** Just a safety precaution. */
1297 uint32_t u32TheEnd;
1298} PDMIOAPICHLPGC;
1299/** Pointer to IOAPIC GC helpers. */
1300typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1301/** Pointer to const IOAPIC helpers. */
1302typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1303
1304/** Current PDMIOAPICHLPGC version number. */
1305#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1306
1307
1308/**
1309 * IOAPIC R0 helpers.
1310 */
1311typedef struct PDMIOAPICHLPR0
1312{
1313 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1314 uint32_t u32Version;
1315
1316 /**
1317 * Private interface between the IOAPIC and APIC.
1318 *
1319 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1320 *
1321 * @returns The current TPR.
1322 * @param pDevIns Device instance of the IOAPIC.
1323 * @param u8Dest See APIC implementation.
1324 * @param u8DestMode See APIC implementation.
1325 * @param u8DeliveryMode See APIC implementation.
1326 * @param iVector See APIC implementation.
1327 * @param u8Polarity See APIC implementation.
1328 * @param u8TriggerMode See APIC implementation.
1329 */
1330 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1331 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1332
1333#ifdef VBOX_WITH_PDM_LOCK
1334 /**
1335 * Acquires the PDM lock.
1336 *
1337 * @returns VINF_SUCCESS on success.
1338 * @returns rc if we failed to acquire the lock.
1339 * @param pDevIns The IOAPIC device instance.
1340 * @param rc What to return if we fail to acquire the lock.
1341 */
1342 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1343
1344 /**
1345 * Releases the PDM lock.
1346 *
1347 * @param pDevIns The IOAPIC device instance.
1348 */
1349 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1350#endif
1351
1352 /** Just a safety precaution. */
1353 uint32_t u32TheEnd;
1354} PDMIOAPICHLPR0;
1355/** Pointer to IOAPIC R0 helpers. */
1356typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1357/** Pointer to const IOAPIC helpers. */
1358typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1359
1360/** Current PDMIOAPICHLPR0 version number. */
1361#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1362
1363/**
1364 * IOAPIC HC helpers.
1365 */
1366typedef struct PDMIOAPICHLPR3
1367{
1368 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1369 uint32_t u32Version;
1370
1371 /**
1372 * Private interface between the IOAPIC and APIC.
1373 *
1374 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1375 *
1376 * @returns The current TPR.
1377 * @param pDevIns Device instance of the IOAPIC.
1378 * @param u8Dest See APIC implementation.
1379 * @param u8DestMode See APIC implementation.
1380 * @param u8DeliveryMode See APIC implementation.
1381 * @param iVector See APIC implementation.
1382 * @param u8Polarity See APIC implementation.
1383 * @param u8TriggerMode See APIC implementation.
1384 */
1385 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1386 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1387
1388#ifdef VBOX_WITH_PDM_LOCK
1389 /**
1390 * Acquires the PDM lock.
1391 *
1392 * @returns VINF_SUCCESS on success.
1393 * @returns Fatal error on failure.
1394 * @param pDevIns The IOAPIC device instance.
1395 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1396 */
1397 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1398
1399 /**
1400 * Releases the PDM lock.
1401 *
1402 * @param pDevIns The IOAPIC device instance.
1403 */
1404 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1405#endif
1406
1407 /**
1408 * Gets the address of the GC IOAPIC helpers.
1409 *
1410 * This should be called at both construction and relocation time
1411 * to obtain the correct address of the GC helpers.
1412 *
1413 * @returns GC pointer to the IOAPIC helpers.
1414 * @param pDevIns Device instance of the IOAPIC.
1415 */
1416 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1417
1418 /**
1419 * Gets the address of the R0 IOAPIC helpers.
1420 *
1421 * This should be called at both construction and relocation time
1422 * to obtain the correct address of the R0 helpers.
1423 *
1424 * @returns R0 pointer to the IOAPIC helpers.
1425 * @param pDevIns Device instance of the IOAPIC.
1426 */
1427 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1428
1429 /** Just a safety precaution. */
1430 uint32_t u32TheEnd;
1431} PDMIOAPICHLPR3;
1432/** Pointer to IOAPIC HC helpers. */
1433typedef HCPTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1434/** Pointer to const IOAPIC helpers. */
1435typedef HCPTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1436
1437/** Current PDMIOAPICHLPR3 version number. */
1438#define PDM_IOAPICHLPR3_VERSION 0xff010000
1439
1440
1441
1442#ifdef IN_RING3
1443
1444/**
1445 * DMA Transfer Handler.
1446 *
1447 * @returns Number of bytes transferred.
1448 * @param pDevIns Device instance of the DMA.
1449 * @param pvUser User pointer.
1450 * @param uChannel Channel number.
1451 * @param off DMA position.
1452 * @param cb Block size.
1453 */
1454typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1455/** Pointer to a FNDMATRANSFERHANDLER(). */
1456typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1457
1458/**
1459 * DMA Controller registration structure.
1460 */
1461typedef struct PDMDMAREG
1462{
1463 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1464 uint32_t u32Version;
1465
1466 /**
1467 * Execute pending transfers.
1468 *
1469 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1470 * @param pDevIns Device instance of the DMAC.
1471 */
1472 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1473
1474 /**
1475 * Register transfer function for DMA channel.
1476 *
1477 * @param pDevIns Device instance of the DMAC.
1478 * @param uChannel Channel number.
1479 * @param pfnTransferHandler Device specific transfer function.
1480 * @param pvUSer User pointer to be passed to the callback.
1481 */
1482 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1483
1484 /**
1485 * Read memory
1486 *
1487 * @returns Number of bytes read.
1488 * @param pDevIns Device instance of the DMAC.
1489 * @param pvBuffer Pointer to target buffer.
1490 * @param off DMA position.
1491 * @param cbBlock Block size.
1492 */
1493 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1494
1495 /**
1496 * Write memory
1497 *
1498 * @returns Number of bytes written.
1499 * @param pDevIns Device instance of the DMAC.
1500 * @param pvBuffer Memory to write.
1501 * @param off DMA position.
1502 * @param cbBlock Block size.
1503 */
1504 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1505
1506 /**
1507 * Set the DREQ line.
1508 *
1509 * @param pDevIns Device instance of the DMAC.
1510 * @param uChannel Channel number.
1511 * @param uLevel Level of the line.
1512 */
1513 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1514
1515 /**
1516 * Get channel mode
1517 *
1518 * @returns Channel mode.
1519 * @param pDevIns Device instance of the DMAC.
1520 * @param uChannel Channel number.
1521 */
1522 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1523
1524} PDMDMACREG;
1525/** Pointer to a DMAC registration structure. */
1526typedef PDMDMACREG *PPDMDMACREG;
1527
1528/** Current PDMDMACREG version number. */
1529#define PDM_DMACREG_VERSION 0xf5010000
1530
1531
1532/**
1533 * DMA Controller device helpers.
1534 */
1535typedef struct PDMDMACHLP
1536{
1537 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1538 uint32_t u32Version;
1539
1540 /* to-be-defined */
1541
1542} PDMDMACHLP;
1543/** Pointer to DMAC helpers. */
1544typedef PDMDMACHLP *PPDMDMACHLP;
1545/** Pointer to const DMAC helpers. */
1546typedef const PDMDMACHLP *PCPDMDMACHLP;
1547
1548/** Current PDMDMACHLP version number. */
1549#define PDM_DMACHLP_VERSION 0xf6010000
1550
1551#endif /* IN_RING3 */
1552
1553
1554
1555/**
1556 * RTC registration structure.
1557 */
1558typedef struct PDMRTCREG
1559{
1560 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1561 uint32_t u32Version;
1562 uint32_t u32Alignment; /**< structure size alignment. */
1563
1564 /**
1565 * Write to a CMOS register and update the checksum if necessary.
1566 *
1567 * @returns VBox status code.
1568 * @param pDevIns Device instance of the RTC.
1569 * @param iReg The CMOS register index.
1570 * @param u8Value The CMOS register value.
1571 */
1572 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1573
1574 /**
1575 * Read a CMOS register.
1576 *
1577 * @returns VBox status code.
1578 * @param pDevIns Device instance of the RTC.
1579 * @param iReg The CMOS register index.
1580 * @param pu8Value Where to store the CMOS register value.
1581 */
1582 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1583
1584} PDMRTCREG;
1585/** Pointer to a RTC registration structure. */
1586typedef PDMRTCREG *PPDMRTCREG;
1587/** Pointer to a const RTC registration structure. */
1588typedef const PDMRTCREG *PCPDMRTCREG;
1589
1590/** Current PDMRTCREG version number. */
1591#define PDM_RTCREG_VERSION 0xfa010000
1592
1593
1594/**
1595 * RTC device helpers.
1596 */
1597typedef struct PDMRTCHLP
1598{
1599 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1600 uint32_t u32Version;
1601
1602 /* to-be-defined */
1603
1604} PDMRTCHLP;
1605/** Pointer to RTC helpers. */
1606typedef PDMRTCHLP *PPDMRTCHLP;
1607/** Pointer to const RTC helpers. */
1608typedef const PDMRTCHLP *PCPDMRTCHLP;
1609
1610/** Current PDMRTCHLP version number. */
1611#define PDM_RTCHLP_VERSION 0xf6010000
1612
1613
1614
1615#ifdef IN_RING3
1616
1617/**
1618 * PDM Device API.
1619 */
1620typedef struct PDMDEVHLP
1621{
1622 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1623 uint32_t u32Version;
1624
1625 /**
1626 * Register a number of I/O ports with a device.
1627 *
1628 * These callbacks are of course for the host context (HC).
1629 * Register HC handlers before guest context (GC) handlers! There must be a
1630 * HC handler for every GC handler!
1631 *
1632 * @returns VBox status.
1633 * @param pDevIns The device instance to register the ports with.
1634 * @param Port First port number in the range.
1635 * @param cPorts Number of ports to register.
1636 * @param pvUser User argument.
1637 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1638 * @param pfnIn Pointer to function which is gonna handle IN operations.
1639 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1640 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1641 * @param pszDesc Pointer to description string. This must not be freed.
1642 */
1643 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1644 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1645 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1646
1647 /**
1648 * Register a number of I/O ports with a device for GC.
1649 *
1650 * These callbacks are for the host context (GC).
1651 * Register host context (HC) handlers before guest context handlers! There must be a
1652 * HC handler for every GC handler!
1653 *
1654 * @returns VBox status.
1655 * @param pDevIns The device instance to register the ports with and which GC module
1656 * to resolve the names against.
1657 * @param Port First port number in the range.
1658 * @param cPorts Number of ports to register.
1659 * @param pvUser User argument.
1660 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1661 * @param pszIn Name of the GC function which is gonna handle IN operations.
1662 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1663 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1664 * @param pszDesc Pointer to description string. This must not be freed.
1665 */
1666 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1667 const char *pszOut, const char *pszIn,
1668 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1669
1670 /**
1671 * Register a number of I/O ports with a device.
1672 *
1673 * These callbacks are of course for the ring-0 host context (R0).
1674 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1675 *
1676 * @returns VBox status.
1677 * @param pDevIns The device instance to register the ports with.
1678 * @param Port First port number in the range.
1679 * @param cPorts Number of ports to register.
1680 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1681 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1682 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1683 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1684 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1685 * @param pszDesc Pointer to description string. This must not be freed.
1686 */
1687 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1688 const char *pszOut, const char *pszIn,
1689 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1690
1691 /**
1692 * Deregister I/O ports.
1693 *
1694 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1695 *
1696 * @returns VBox status.
1697 * @param pDevIns The device instance owning the ports.
1698 * @param Port First port number in the range.
1699 * @param cPorts Number of ports to deregister.
1700 */
1701 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1702
1703
1704 /**
1705 * Register a Memory Mapped I/O (MMIO) region.
1706 *
1707 * These callbacks are of course for the host context (HC).
1708 * Register HC handlers before guest context (GC) handlers! There must be a
1709 * HC handler for every GC handler!
1710 *
1711 * @returns VBox status.
1712 * @param pDevIns The device instance to register the MMIO with.
1713 * @param GCPhysStart First physical address in the range.
1714 * @param cbRange The size of the range (in bytes).
1715 * @param pvUser User argument.
1716 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1717 * @param pfnRead Pointer to function which is gonna handle Read operations.
1718 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1719 * @param pszDesc Pointer to description string. This must not be freed.
1720 */
1721 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1722 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1723 const char *pszDesc));
1724
1725 /**
1726 * Register a Memory Mapped I/O (MMIO) region for GC.
1727 *
1728 * These callbacks are for the guest context (GC).
1729 * Register host context (HC) handlers before guest context handlers! There must be a
1730 * HC handler for every GC handler!
1731 *
1732 * @returns VBox status.
1733 * @param pDevIns The device instance to register the MMIO with.
1734 * @param GCPhysStart First physical address in the range.
1735 * @param cbRange The size of the range (in bytes).
1736 * @param pvUser User argument.
1737 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1738 * @param pszRead Name of the GC function which is gonna handle Read operations.
1739 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1740 * @param pszDesc Pointer to description string. This must not be freed.
1741 */
1742 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1743 const char *pszWrite, const char *pszRead, const char *pszFill,
1744 const char *pszDesc));
1745
1746 /**
1747 * Register a Memory Mapped I/O (MMIO) region for R0.
1748 *
1749 * These callbacks are for the ring-0 host context (R0).
1750 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1751 *
1752 * @returns VBox status.
1753 * @param pDevIns The device instance to register the MMIO with.
1754 * @param GCPhysStart First physical address in the range.
1755 * @param cbRange The size of the range (in bytes).
1756 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1757 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1758 * @param pszRead Name of the GC function which is gonna handle Read operations.
1759 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1760 * @param pszDesc Pointer to description string. This must not be freed.
1761 */
1762 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1763 const char *pszWrite, const char *pszRead, const char *pszFill,
1764 const char *pszDesc));
1765
1766 /**
1767 * Deregister a Memory Mapped I/O (MMIO) region.
1768 *
1769 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1770 *
1771 * @returns VBox status.
1772 * @param pDevIns The device instance owning the MMIO region(s).
1773 * @param GCPhysStart First physical address in the range.
1774 * @param cbRange The size of the range (in bytes).
1775 */
1776 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1777
1778 /**
1779 * Register a ROM (BIOS) region.
1780 *
1781 * It goes without saying that this is read-only memory. The memory region must be
1782 * in unassigned memory. I.e. from the top of the address space or on the PC in
1783 * the 0xa0000-0xfffff range.
1784 *
1785 * @returns VBox status.
1786 * @param pDevIns The device instance owning the ROM region.
1787 * @param GCPhysStart First physical address in the range.
1788 * Must be page aligned!
1789 * @param cbRange The size of the range (in bytes).
1790 * Must be page aligned!
1791 * @param pvBinary Pointer to the binary data backing the ROM image.
1792 * This must be cbRange bytes big.
1793 * It will be copied and doesn't have to stick around.
1794 * @param pszDesc Pointer to description string. This must not be freed.
1795 * @remark There is no way to remove the rom, automatically on device cleanup or
1796 * manually from the device yet. At present I doubt we need such features...
1797 */
1798 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc));
1799
1800 /**
1801 * Register a save state data unit.
1802 *
1803 * @returns VBox status.
1804 * @param pDevIns Device instance.
1805 * @param pszName Data unit name.
1806 * @param u32Instance The instance identifier of the data unit.
1807 * This must together with the name be unique.
1808 * @param u32Version Data layout version number.
1809 * @param cbGuess The approximate amount of data in the unit.
1810 * Only for progress indicators.
1811 * @param pfnSavePrep Prepare save callback, optional.
1812 * @param pfnSaveExec Execute save callback, optional.
1813 * @param pfnSaveDone Done save callback, optional.
1814 * @param pfnLoadPrep Prepare load callback, optional.
1815 * @param pfnLoadExec Execute load callback, optional.
1816 * @param pfnLoadDone Done load callback, optional.
1817 */
1818 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1819 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1820 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1821
1822 /**
1823 * Creates a timer.
1824 *
1825 * @returns VBox status.
1826 * @param pDevIns Device instance.
1827 * @param enmClock The clock to use on this timer.
1828 * @param pfnCallback Callback function.
1829 * @param pszDesc Pointer to description string which must stay around
1830 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1831 * @param ppTimer Where to store the timer on success.
1832 */
1833 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer));
1834
1835 /**
1836 * Creates an external timer.
1837 *
1838 * @returns timer pointer
1839 * @param pDevIns Device instance.
1840 * @param enmClock The clock to use on this timer.
1841 * @param pfnCallback Callback function.
1842 * @param pvUser User pointer
1843 * @param pszDesc Pointer to description string which must stay around
1844 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1845 */
1846 DECLR3CALLBACKMEMBER(PTMTIMERHC, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1847
1848 /**
1849 * Registers the device with the default PCI bus.
1850 *
1851 * @returns VBox status code.
1852 * @param pDevIns Device instance.
1853 * @param pPciDev The PCI device structure.
1854 * Any PCI enabled device must keep this in it's instance data!
1855 * Fill in the PCI data config before registration, please.
1856 * @remark This is the simple interface, a Ex interface will be created if
1857 * more features are needed later.
1858 */
1859 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1860
1861 /**
1862 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1863 *
1864 * @returns VBox status code.
1865 * @param pDevIns Device instance.
1866 * @param iRegion The region number.
1867 * @param cbRegion Size of the region.
1868 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1869 * @param pfnCallback Callback for doing the mapping.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1872
1873 /**
1874 * Register PCI configuration space read/write callbacks.
1875 *
1876 * @param pDevIns Device instance.
1877 * @param pPciDev The PCI device structure.
1878 * If NULL the default PCI device for this device instance is used.
1879 * @param pfnRead Pointer to the user defined PCI config read function.
1880 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1881 * PCI config read function. This way, user can decide when (and if)
1882 * to call default PCI config read function. Can be NULL.
1883 * @param pfnWrite Pointer to the user defined PCI config write function.
1884 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1885 * PCI config write function. This way, user can decide when (and if)
1886 * to call default PCI config write function. Can be NULL.
1887 * @thread EMT
1888 */
1889 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1890 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1891
1892 /**
1893 * Set the IRQ for a PCI device.
1894 *
1895 * @param pDevIns Device instance.
1896 * @param iIrq IRQ number to set.
1897 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1898 * @thread Any thread, but will involve the emulation thread.
1899 */
1900 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1901
1902 /**
1903 * Set the IRQ for a PCI device, but don't wait for EMT to process
1904 * the request when not called from EMT.
1905 *
1906 * @param pDevIns Device instance.
1907 * @param iIrq IRQ number to set.
1908 * @param iLevel IRQ level.
1909 * @thread Any thread, but will involve the emulation thread.
1910 */
1911 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1912
1913 /**
1914 * Set ISA IRQ for a device.
1915 *
1916 * @param pDevIns Device instance.
1917 * @param iIrq IRQ number to set.
1918 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1919 * @thread Any thread, but will involve the emulation thread.
1920 */
1921 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1922
1923 /**
1924 * Set the ISA IRQ for a device, but don't wait for EMT to process
1925 * the request when not called from EMT.
1926 *
1927 * @param pDevIns Device instance.
1928 * @param iIrq IRQ number to set.
1929 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1930 * @thread Any thread, but will involve the emulation thread.
1931 */
1932 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1933
1934 /**
1935 * Attaches a driver (chain) to the device.
1936 *
1937 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1938 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1939 *
1940 * @returns VBox status code.
1941 * @param pDevIns Device instance.
1942 * @param iLun The logical unit to attach.
1943 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1944 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1945 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1946 * for the live of the device instance.
1947 */
1948 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1949
1950 /**
1951 * Allocate memory which is associated with current VM instance
1952 * and automatically freed on it's destruction.
1953 *
1954 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1955 * @param pDevIns Device instance.
1956 * @param cb Number of bytes to allocate.
1957 */
1958 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1959
1960 /**
1961 * Allocate memory which is associated with current VM instance
1962 * and automatically freed on it's destruction. The memory is ZEROed.
1963 *
1964 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1965 * @param pDevIns Device instance.
1966 * @param cb Number of bytes to allocate.
1967 */
1968 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1969
1970 /**
1971 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1972 *
1973 * @param pDevIns Device instance.
1974 * @param pv Pointer to the memory to free.
1975 */
1976 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
1977
1978 /**
1979 * Set the VM error message
1980 *
1981 * @returns rc.
1982 * @param pDevIns Device instance.
1983 * @param rc VBox status code.
1984 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1985 * @param pszFormat Error message format string.
1986 * @param ... Error message arguments.
1987 */
1988 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
1989
1990 /**
1991 * Set the VM error message
1992 *
1993 * @returns rc.
1994 * @param pDevIns Device instance.
1995 * @param rc VBox status code.
1996 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
1997 * @param pszFormat Error message format string.
1998 * @param va Error message arguments.
1999 */
2000 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2001
2002 /**
2003 * Set the VM runtime error message
2004 *
2005 * @returns VBox status code.
2006 * @param pDevIns Device instance.
2007 * @param fFatal Whether it is a fatal error or not.
2008 * @param pszErrorID Error ID string.
2009 * @param pszFormat Error message format string.
2010 * @param ... Error message arguments.
2011 */
2012 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2013
2014 /**
2015 * Set the VM runtime error message
2016 *
2017 * @returns VBox status code.
2018 * @param pDevIns Device instance.
2019 * @param fFatal Whether it is a fatal error or not.
2020 * @param pszErrorID Error ID string.
2021 * @param pszFormat Error message format string.
2022 * @param va Error message arguments.
2023 */
2024 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2025
2026 /**
2027 * Assert that the current thread is the emulation thread.
2028 *
2029 * @returns True if correct.
2030 * @returns False if wrong.
2031 * @param pDevIns Device instance.
2032 * @param pszFile Filename of the assertion location.
2033 * @param iLine The linenumber of the assertion location.
2034 * @param pszFunction Function of the assertion location.
2035 */
2036 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2037
2038 /**
2039 * Assert that the current thread is NOT the emulation thread.
2040 *
2041 * @returns True if correct.
2042 * @returns False if wrong.
2043 * @param pDevIns Device instance.
2044 * @param pszFile Filename of the assertion location.
2045 * @param iLine The linenumber of the assertion location.
2046 * @param pszFunction Function of the assertion location.
2047 */
2048 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2049
2050 /**
2051 * Stops the VM and enters the debugger to look at the guest state.
2052 *
2053 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2054 * invoking this function directly.
2055 *
2056 * @returns VBox status code which must be passed up to the VMM.
2057 * @param pDevIns Device instance.
2058 * @param pszFile Filename of the assertion location.
2059 * @param iLine The linenumber of the assertion location.
2060 * @param pszFunction Function of the assertion location.
2061 * @param pszFormat Message. (optional)
2062 * @param args Message parameters.
2063 */
2064 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2065
2066 /**
2067 * Register a info handler with DBGF,
2068 *
2069 * @returns VBox status code.
2070 * @param pDevIns Device instance.
2071 * @param pszName The identifier of the info.
2072 * @param pszDesc The description of the info and any arguments the handler may take.
2073 * @param pfnHandler The handler function to be called to display the info.
2074 */
2075 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2076
2077 /**
2078 * Registers a statistics sample if statistics are enabled.
2079 *
2080 * @param pDevIns Device instance of the DMA.
2081 * @param pvSample Pointer to the sample.
2082 * @param enmType Sample type. This indicates what pvSample is pointing at.
2083 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2084 * Further nesting is possible.
2085 * @param enmUnit Sample unit.
2086 * @param pszDesc Sample description.
2087 */
2088 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2089
2090 /**
2091 * Same as pfnSTAMRegister except that the name is specified in a
2092 * RTStrPrintf like fashion.
2093 *
2094 * @returns VBox status.
2095 * @param pDevIns Device instance of the DMA.
2096 * @param pvSample Pointer to the sample.
2097 * @param enmType Sample type. This indicates what pvSample is pointing at.
2098 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2099 * @param enmUnit Sample unit.
2100 * @param pszDesc Sample description.
2101 * @param pszName The sample name format string.
2102 * @param ... Arguments to the format string.
2103 */
2104 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2105 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2106
2107 /**
2108 * Same as pfnSTAMRegister except that the name is specified in a
2109 * RTStrPrintfV like fashion.
2110 *
2111 * @returns VBox status.
2112 * @param pDevIns Device instance of the DMA.
2113 * @param pvSample Pointer to the sample.
2114 * @param enmType Sample type. This indicates what pvSample is pointing at.
2115 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2116 * @param enmUnit Sample unit.
2117 * @param pszDesc Sample description.
2118 * @param pszName The sample name format string.
2119 * @param args Arguments to the format string.
2120 */
2121 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2122 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2123
2124 /**
2125 * Register the RTC device.
2126 *
2127 * @returns VBox status code.
2128 * @param pDevIns Device instance.
2129 * @param pRtcReg Pointer to a RTC registration structure.
2130 * @param ppRtcHlp Where to store the pointer to the helper functions.
2131 */
2132 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2133
2134 /**
2135 * Create a queue.
2136 *
2137 * @returns VBox status code.
2138 * @param pDevIns The device instance.
2139 * @param cbItem The size of a queue item.
2140 * @param cItems The number of items in the queue.
2141 * @param cMilliesInterval The number of milliseconds between polling the queue.
2142 * If 0 then the emulation thread will be notified whenever an item arrives.
2143 * @param pfnCallback The consumer function.
2144 * @param fGCEnabled Set if the queue should work in GC too.
2145 * @param ppQueue Where to store the queue handle on success.
2146 * @thread The emulation thread.
2147 */
2148 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2149 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2150
2151 /**
2152 * Initializes a PDM critical section.
2153 *
2154 * The PDM critical sections are derived from the IPRT critical sections, but
2155 * works in GC as well.
2156 *
2157 * @returns VBox status code.
2158 * @param pDevIns Device instance.
2159 * @param pCritSect Pointer to the critical section.
2160 * @param pszName The name of the critical section (for statistics).
2161 */
2162 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2163
2164 /**
2165 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2166 *
2167 * @returns pTime.
2168 * @param pDevIns Device instance.
2169 * @param pTime Where to store the time.
2170 */
2171 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2172
2173 /**
2174 * Creates a PDM thread.
2175 *
2176 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2177 * resuming, and destroying the thread as the VM state changes.
2178 *
2179 * @returns VBox status code.
2180 * @param pDevIns The device instance.
2181 * @param ppThread Where to store the thread 'handle'.
2182 * @param pvUser The user argument to the thread function.
2183 * @param pfnThread The thread function.
2184 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2185 * a state change is pending.
2186 * @param cbStack See RTThreadCreate.
2187 * @param enmType See RTThreadCreate.
2188 * @param pszName See RTThreadCreate.
2189 */
2190 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2191 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2192
2193
2194 /** Space reserved for future members.
2195 * @{ */
2196 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
2197 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2198 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2199 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2200 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2201 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2202 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2203 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2204 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2205 /** @} */
2206
2207
2208 /** API available to trusted devices only.
2209 *
2210 * These APIs are providing unrestricted access to the guest and the VM,
2211 * or they are interacting intimately with PDM.
2212 *
2213 * @{
2214 */
2215 /**
2216 * Gets the VM handle. Restricted API.
2217 *
2218 * @returns VM Handle.
2219 * @param pDevIns Device instance.
2220 */
2221 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2222
2223 /**
2224 * Register the PCI Bus.
2225 *
2226 * @returns VBox status code.
2227 * @param pDevIns Device instance.
2228 * @param pPciBusReg Pointer to PCI bus registration structure.
2229 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2230 */
2231 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2232
2233 /**
2234 * Register the PIC device.
2235 *
2236 * @returns VBox status code.
2237 * @param pDevIns Device instance.
2238 * @param pPicReg Pointer to a PIC registration structure.
2239 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2240 */
2241 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2242
2243 /**
2244 * Register the APIC device.
2245 *
2246 * @returns VBox status code.
2247 * @param pDevIns Device instance.
2248 * @param pApicReg Pointer to a APIC registration structure.
2249 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2250 */
2251 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2252
2253 /**
2254 * Register the I/O APIC device.
2255 *
2256 * @returns VBox status code.
2257 * @param pDevIns Device instance.
2258 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2259 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2260 */
2261 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2262
2263 /**
2264 * Register the DMA device.
2265 *
2266 * @returns VBox status code.
2267 * @param pDevIns Device instance.
2268 * @param pDmacReg Pointer to a DMAC registration structure.
2269 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2270 */
2271 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2272
2273 /**
2274 * Read physical memory.
2275 *
2276 * @param pDevIns Device instance.
2277 * @param GCPhys Physical address start reading from.
2278 * @param pvBuf Where to put the read bits.
2279 * @param cbRead How many bytes to read.
2280 * @thread Any thread, but the call may involve the emulation thread.
2281 */
2282 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2283
2284 /**
2285 * Write to physical memory.
2286 *
2287 * @param pDevIns Device instance.
2288 * @param GCPhys Physical address to write to.
2289 * @param pvBuf What to write.
2290 * @param cbWrite How many bytes to write.
2291 * @thread Any thread, but the call may involve the emulation thread.
2292 */
2293 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2294
2295 /**
2296 * Read guest physical memory by virtual address.
2297 *
2298 * @param pDevIns Device instance.
2299 * @param pvDst Where to put the read bits.
2300 * @param GCVirtSrc Guest virtual address to start reading from.
2301 * @param cb How many bytes to read.
2302 * @thread The emulation thread.
2303 */
2304 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2305
2306 /**
2307 * Write to guest physical memory by virtual address.
2308 *
2309 * @param pDevIns Device instance.
2310 * @param GCVirtDst Guest virtual address to write to.
2311 * @param pvSrc What to write.
2312 * @param cb How many bytes to write.
2313 * @thread The emulation thread.
2314 */
2315 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2316
2317 /**
2318 * Reserve physical address space for ROM and MMIO ranges.
2319 *
2320 * @returns VBox status code.
2321 * @param pDevIns Device instance.
2322 * @param GCPhys Start physical address.
2323 * @param cbRange The size of the range.
2324 * @param pszDesc Description string.
2325 * @thread The emulation thread.
2326 */
2327 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2328
2329 /**
2330 * Convert a guest physical address to a host virtual address.
2331 *
2332 * @returns VBox status code.
2333 * @param pDevIns Device instance.
2334 * @param GCPhys Start physical address.
2335 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2336 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2337 * @thread Any thread.
2338 */
2339 DECLR3CALLBACKMEMBER(int, pfnPhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2340
2341 /**
2342 * Convert a guest virtual address to a host virtual address.
2343 *
2344 * @returns VBox status code.
2345 * @param pDevIns Device instance.
2346 * @param GCPtr Guest virtual address.
2347 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2348 * @thread The emulation thread.
2349 * @remark Careful with page boundraries.
2350 */
2351 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2352
2353 /**
2354 * Checks if the Gate A20 is enabled or not.
2355 *
2356 * @returns true if A20 is enabled.
2357 * @returns false if A20 is disabled.
2358 * @param pDevIns Device instance.
2359 * @thread The emulation thread.
2360 */
2361 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2362
2363 /**
2364 * Enables or disables the Gate A20.
2365 *
2366 * @param pDevIns Device instance.
2367 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2368 * @thread The emulation thread.
2369 */
2370 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2371
2372 /**
2373 * Resets the VM.
2374 *
2375 * @returns The appropriate VBox status code to pass around on reset.
2376 * @param pDevIns Device instance.
2377 * @thread The emulation thread.
2378 */
2379 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2380
2381 /**
2382 * Suspends the VM.
2383 *
2384 * @returns The appropriate VBox status code to pass around on suspend.
2385 * @param pDevIns Device instance.
2386 * @thread The emulation thread.
2387 */
2388 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2389
2390 /**
2391 * Power off the VM.
2392 *
2393 * @returns The appropriate VBox status code to pass around on power off.
2394 * @param pDevIns Device instance.
2395 * @thread The emulation thread.
2396 */
2397 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2398
2399 /**
2400 * Acquire global VM lock
2401 *
2402 * @returns VBox status code
2403 * @param pDevIns Device instance.
2404 */
2405 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2406
2407 /**
2408 * Release global VM lock
2409 *
2410 * @returns VBox status code
2411 * @param pDevIns Device instance.
2412 */
2413 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2414
2415 /**
2416 * Check that the current thread owns the global VM lock.
2417 *
2418 * @returns boolean
2419 * @param pDevIns Device instance.
2420 * @param pszFile Filename of the assertion location.
2421 * @param iLine Linenumber of the assertion location.
2422 * @param pszFunction Function of the assertion location.
2423 */
2424 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2425
2426 /**
2427 * Register transfer function for DMA channel.
2428 *
2429 * @returns VBox status code.
2430 * @param pDevIns Device instance.
2431 * @param uChannel Channel number.
2432 * @param pfnTransferHandler Device specific transfer callback function.
2433 * @param pvUser User pointer to pass to the callback.
2434 * @thread EMT
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2437
2438 /**
2439 * Read memory.
2440 *
2441 * @returns VBox status code.
2442 * @param pDevIns Device instance.
2443 * @param uChannel Channel number.
2444 * @param pvBuffer Pointer to target buffer.
2445 * @param off DMA position.
2446 * @param cbBlock Block size.
2447 * @param pcbRead Where to store the number of bytes which was read. optional.
2448 * @thread EMT
2449 */
2450 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2451
2452 /**
2453 * Write memory.
2454 *
2455 * @returns VBox status code.
2456 * @param pDevIns Device instance.
2457 * @param uChannel Channel number.
2458 * @param pvBuffer Memory to write.
2459 * @param off DMA position.
2460 * @param cbBlock Block size.
2461 * @param pcbWritten Where to store the number of bytes which was written. optional.
2462 * @thread EMT
2463 */
2464 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2465
2466 /**
2467 * Set the DREQ line.
2468 *
2469 * @returns VBox status code.
2470 * @param pDevIns Device instance.
2471 * @param uChannel Channel number.
2472 * @param uLevel Level of the line.
2473 * @thread EMT
2474 */
2475 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2476
2477 /**
2478 * Get channel mode.
2479 *
2480 * @returns Channel mode. See specs.
2481 * @param pDevIns Device instance.
2482 * @param uChannel Channel number.
2483 * @thread EMT
2484 */
2485 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2486
2487 /**
2488 * Schedule DMA execution.
2489 *
2490 * @param pDevIns Device instance.
2491 * @thread Any thread.
2492 */
2493 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2494
2495 /**
2496 * Write CMOS value and update the checksum(s).
2497 *
2498 * @returns VBox status code.
2499 * @param pDevIns Device instance.
2500 * @param iReg The CMOS register index.
2501 * @param u8Value The CMOS register value.
2502 * @thread EMT
2503 */
2504 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2505
2506 /**
2507 * Read CMOS value.
2508 *
2509 * @returns VBox status code.
2510 * @param pDevIns Device instance.
2511 * @param iReg The CMOS register index.
2512 * @param pu8Value Where to store the CMOS register value.
2513 * @thread EMT
2514 */
2515 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2516
2517 /**
2518 * Query CPUID.
2519 *
2520 * @param pDevIns Device instance.
2521 * @param iLeaf The CPUID leaf to get.
2522 * @param pEax Where to store the EAX value.
2523 * @param pEbx Where to store the EBX value.
2524 * @param pEcx Where to store the ECX value.
2525 * @param pEdx Where to store the EDX value.
2526 */
2527 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2528
2529 /** @} */
2530
2531 /** Just a safety precaution. (The value is 0.) */
2532 uint32_t u32TheEnd;
2533} PDMDEVHLP;
2534#endif /* !IN_RING3 */
2535/** Pointer PDM Device API. */
2536typedef HCPTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2537/** Pointer PDM Device API. */
2538typedef HCPTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2539
2540/** Current PDMDEVHLP version number. */
2541#define PDM_DEVHLP_VERSION 0xf2040000
2542
2543
2544/**
2545 * PDM Device API - GC Variant.
2546 */
2547typedef struct PDMDEVHLPGC
2548{
2549 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2550 uint32_t u32Version;
2551
2552 /**
2553 * Set the IRQ for a PCI device.
2554 *
2555 * @param pDevIns Device instance.
2556 * @param iIrq IRQ number to set.
2557 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2558 * @thread Any thread, but will involve the emulation thread.
2559 */
2560 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2561
2562 /**
2563 * Set ISA IRQ for a device.
2564 *
2565 * @param pDevIns Device instance.
2566 * @param iIrq IRQ number to set.
2567 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2568 * @thread Any thread, but will involve the emulation thread.
2569 */
2570 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2571
2572 /**
2573 * Read physical memory.
2574 *
2575 * @param pDevIns Device instance.
2576 * @param GCPhys Physical address start reading from.
2577 * @param pvBuf Where to put the read bits.
2578 * @param cbRead How many bytes to read.
2579 */
2580 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2581
2582 /**
2583 * Write to physical memory.
2584 *
2585 * @param pDevIns Device instance.
2586 * @param GCPhys Physical address to write to.
2587 * @param pvBuf What to write.
2588 * @param cbWrite How many bytes to write.
2589 */
2590 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2591
2592 /**
2593 * Checks if the Gate A20 is enabled or not.
2594 *
2595 * @returns true if A20 is enabled.
2596 * @returns false if A20 is disabled.
2597 * @param pDevIns Device instance.
2598 * @thread The emulation thread.
2599 */
2600 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2601
2602 /**
2603 * Set the VM error message
2604 *
2605 * @returns rc.
2606 * @param pDrvIns Driver instance.
2607 * @param rc VBox status code.
2608 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2609 * @param pszFormat Error message format string.
2610 * @param ... Error message arguments.
2611 */
2612 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2613
2614 /**
2615 * Set the VM error message
2616 *
2617 * @returns rc.
2618 * @param pDrvIns Driver instance.
2619 * @param rc VBox status code.
2620 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2621 * @param pszFormat Error message format string.
2622 * @param va Error message arguments.
2623 */
2624 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2625
2626 /**
2627 * Set the VM runtime error message
2628 *
2629 * @returns VBox status code.
2630 * @param pDevIns Device instance.
2631 * @param fFatal Whether it is a fatal error or not.
2632 * @param pszErrorID Error ID string.
2633 * @param pszFormat Error message format string.
2634 * @param ... Error message arguments.
2635 */
2636 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2637
2638 /**
2639 * Set the VM runtime error message
2640 *
2641 * @returns VBox status code.
2642 * @param pDevIns Device instance.
2643 * @param fFatal Whether it is a fatal error or not.
2644 * @param pszErrorID Error ID string.
2645 * @param pszFormat Error message format string.
2646 * @param va Error message arguments.
2647 */
2648 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2649
2650 /**
2651 * Set parameters for pending MMIO patch operation
2652 *
2653 * @returns VBox status code.
2654 * @param pDevIns Device instance.
2655 * @param GCPhys MMIO physical address
2656 * @param pCachedData GC pointer to cached data
2657 */
2658 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2659
2660 /** Just a safety precaution. */
2661 uint32_t u32TheEnd;
2662} PDMDEVHLPGC;
2663/** Pointer PDM Device GC API. */
2664typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2665/** Pointer PDM Device GC API. */
2666typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2667
2668/** Current PDMDEVHLP version number. */
2669#define PDM_DEVHLPGC_VERSION 0xfb010000
2670
2671
2672/**
2673 * PDM Device API - R0 Variant.
2674 */
2675typedef struct PDMDEVHLPR0
2676{
2677 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2678 uint32_t u32Version;
2679
2680 /**
2681 * Set the IRQ for a PCI device.
2682 *
2683 * @param pDevIns Device instance.
2684 * @param iIrq IRQ number to set.
2685 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2686 * @thread Any thread, but will involve the emulation thread.
2687 */
2688 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2689
2690 /**
2691 * Set ISA IRQ for a device.
2692 *
2693 * @param pDevIns Device instance.
2694 * @param iIrq IRQ number to set.
2695 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2696 * @thread Any thread, but will involve the emulation thread.
2697 */
2698 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2699
2700 /**
2701 * Read physical memory.
2702 *
2703 * @param pDevIns Device instance.
2704 * @param GCPhys Physical address start reading from.
2705 * @param pvBuf Where to put the read bits.
2706 * @param cbRead How many bytes to read.
2707 */
2708 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2709
2710 /**
2711 * Write to physical memory.
2712 *
2713 * @param pDevIns Device instance.
2714 * @param GCPhys Physical address to write to.
2715 * @param pvBuf What to write.
2716 * @param cbWrite How many bytes to write.
2717 */
2718 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2719
2720 /**
2721 * Checks if the Gate A20 is enabled or not.
2722 *
2723 * @returns true if A20 is enabled.
2724 * @returns false if A20 is disabled.
2725 * @param pDevIns Device instance.
2726 * @thread The emulation thread.
2727 */
2728 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2729
2730 /**
2731 * Set the VM error message
2732 *
2733 * @returns rc.
2734 * @param pDrvIns Driver instance.
2735 * @param rc VBox status code.
2736 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2737 * @param pszFormat Error message format string.
2738 * @param ... Error message arguments.
2739 */
2740 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2741
2742 /**
2743 * Set the VM error message
2744 *
2745 * @returns rc.
2746 * @param pDrvIns Driver instance.
2747 * @param rc VBox status code.
2748 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2749 * @param pszFormat Error message format string.
2750 * @param va Error message arguments.
2751 */
2752 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2753
2754 /**
2755 * Set the VM runtime error message
2756 *
2757 * @returns VBox status code.
2758 * @param pDevIns Device instance.
2759 * @param fFatal Whether it is a fatal error or not.
2760 * @param pszErrorID Error ID string.
2761 * @param pszFormat Error message format string.
2762 * @param ... Error message arguments.
2763 */
2764 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2765
2766 /**
2767 * Set the VM runtime error message
2768 *
2769 * @returns VBox status code.
2770 * @param pDevIns Device instance.
2771 * @param fFatal Whether it is a fatal error or not.
2772 * @param pszErrorID Error ID string.
2773 * @param pszFormat Error message format string.
2774 * @param va Error message arguments.
2775 */
2776 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2777
2778 /**
2779 * Set parameters for pending MMIO patch operation
2780 *
2781 * @returns rc.
2782 * @param pDevIns Device instance.
2783 * @param GCPhys MMIO physical address
2784 * @param pCachedData GC pointer to cached data
2785 */
2786 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2787
2788 /** Just a safety precaution. */
2789 uint32_t u32TheEnd;
2790} PDMDEVHLPR0;
2791/** Pointer PDM Device R0 API. */
2792typedef HCPTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2793/** Pointer PDM Device GC API. */
2794typedef HCPTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2795
2796/** Current PDMDEVHLP version number. */
2797#define PDM_DEVHLPR0_VERSION 0xfb010000
2798
2799
2800
2801/**
2802 * PDM Device Instance.
2803 */
2804typedef struct PDMDEVINS
2805{
2806 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2807 uint32_t u32Version;
2808 /** Device instance number. */
2809 RTUINT iInstance;
2810 /** The base interface of the device.
2811 * The device constructor initializes this if it has any
2812 * device level interfaces to export. To obtain this interface
2813 * call PDMR3QueryDevice(). */
2814 PDMIBASE IBase;
2815
2816 /** Internal data. */
2817 union
2818 {
2819#ifdef PDMDEVINSINT_DECLARED
2820 PDMDEVINSINT s;
2821#endif
2822 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2823 } Internal;
2824
2825 /** Pointer the HC PDM Device API. */
2826 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2827 /** Pointer the R0 PDM Device API. */
2828 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2829 /** Pointer to device registration structure. */
2830 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2831 /** Configuration handle. */
2832 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2833 /** Pointer to device instance data. */
2834 R3PTRTYPE(void *) pvInstanceDataR3;
2835 /** Pointer to device instance data. */
2836 R0PTRTYPE(void *) pvInstanceDataR0;
2837 /** Pointer the GC PDM Device API. */
2838 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2839 /** Pointer to device instance data. */
2840 GCPTRTYPE(void *) pvInstanceDataGC;
2841 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2842 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2843 /** Device instance data. The size of this area is defined
2844 * in the PDMDEVREG::cbInstanceData field. */
2845 char achInstanceData[8];
2846} PDMDEVINS;
2847
2848/** Current DEVREG version number. */
2849#define PDM_DEVINS_VERSION 0xf3010000
2850
2851/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2852#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2853
2854
2855/** @def PDMDEV_ASSERT_EMT
2856 * Assert that the current thread is the emulation thread.
2857 */
2858#ifdef VBOX_STRICT
2859# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2860#else
2861# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2862#endif
2863
2864/** @def PDMDEV_ASSERT_OTHER
2865 * Assert that the current thread is NOT the emulation thread.
2866 */
2867#ifdef VBOX_STRICT
2868# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2869#else
2870# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
2871#endif
2872
2873/** @def PDMDEV_ASSERT_VMLOCK_OWNER
2874 * Assert that the current thread is owner of the VM lock.
2875 */
2876#ifdef VBOX_STRICT
2877# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2878#else
2879# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
2880#endif
2881
2882/** @def PDMDEV_SET_ERROR
2883 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
2884 */
2885#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
2886 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
2887
2888/** @def PDMDEV_SET_RUNTIME_ERROR
2889 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
2890 */
2891#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
2892 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
2893
2894/** @def PDMDEVINS_2_GCPTR
2895 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
2896 */
2897#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2898
2899/** @def PDMDEVINS_2_R3PTR
2900 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
2901 */
2902#define PDMDEVINS_2_R3PTR(pDevIns) ( (HCPTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2903
2904/** @def PDMDEVINS_2_R0PTR
2905 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
2906 */
2907#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
2908
2909
2910/**
2911 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
2912 *
2913 * @returns VBox status code which must be passed up to the VMM.
2914 * @param pDevIns Device instance.
2915 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2916 * @param pszFormat Message. (optional)
2917 * @param ... Message parameters.
2918 */
2919DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
2920{
2921#ifdef VBOX_STRICT
2922# ifdef IN_RING3
2923 int rc;
2924 va_list args;
2925 va_start(args, pszFormat);
2926 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
2927 va_end(args);
2928 return rc;
2929# else
2930 return VINF_EM_DBG_STOP;
2931# endif
2932#else
2933 return VINF_SUCCESS;
2934#endif
2935}
2936
2937
2938#ifdef IN_RING3
2939/**
2940 * @copydoc PDMDEVHLP::pfnIOPortRegister
2941 */
2942DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2943 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2944 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
2945{
2946 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
2947}
2948
2949/**
2950 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
2951 */
2952DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
2953 const char *pszOut, const char *pszIn, const char *pszOutStr,
2954 const char *pszInStr, const char *pszDesc)
2955{
2956 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2957}
2958
2959/**
2960 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
2961 */
2962DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2963 const char *pszOut, const char *pszIn, const char *pszOutStr,
2964 const char *pszInStr, const char *pszDesc)
2965{
2966 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
2967}
2968
2969/**
2970 * @copydoc PDMDEVHLP::pfnMMIORegister
2971 */
2972DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2973 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2974 const char *pszDesc)
2975{
2976 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
2977}
2978
2979/**
2980 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
2981 */
2982DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2983 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2984{
2985 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2986}
2987
2988/**
2989 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
2990 */
2991DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2992 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
2993{
2994 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
2995}
2996
2997/**
2998 * @copydoc PDMDEVHLP::pfnROMRegister
2999 */
3000DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
3001{
3002 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
3003}
3004
3005/**
3006 * @copydoc PDMDEVHLP::pfnSSMRegister
3007 */
3008DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3009 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3010 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3011{
3012 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3013 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3014 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3015}
3016
3017/**
3018 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3019 */
3020DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
3021{
3022 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3023}
3024
3025/**
3026 * @copydoc PDMDEVHLP::pfnPCIRegister
3027 */
3028DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3029{
3030 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3031}
3032
3033/**
3034 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3035 */
3036DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3037{
3038 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3039}
3040
3041/**
3042 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3043 */
3044DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3045 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3046{
3047 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3048}
3049
3050/**
3051 * @copydoc PDMDEVHLP::pfnDriverAttach
3052 */
3053DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3054{
3055 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3056}
3057
3058/**
3059 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3060 */
3061DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3062{
3063 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3064}
3065
3066/**
3067 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3068 */
3069DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3070{
3071 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3072}
3073
3074/**
3075 * @copydoc PDMDEVHLP::pfnMMHeapFree
3076 */
3077DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3078{
3079 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3080}
3081
3082/**
3083 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3084 */
3085DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3086{
3087 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3088}
3089
3090/**
3091 * @copydoc PDMDEVHLP::pfnSTAMRegister
3092 */
3093DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3094{
3095 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3096}
3097
3098/**
3099 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3100 */
3101DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3102 const char *pszDesc, const char *pszName, ...)
3103{
3104 va_list va;
3105 va_start(va, pszName);
3106 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3107 va_end(va);
3108}
3109
3110/**
3111 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3112 */
3113DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3114 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3115{
3116 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3117}
3118
3119/**
3120 * @copydoc PDMDEVHLP::pfnCritSectInit
3121 */
3122DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3123{
3124 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3125}
3126
3127/**
3128 * @copydoc PDMDEVHLP::pfnUTCNow
3129 */
3130DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3131{
3132 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3133}
3134
3135/**
3136 * @copydoc PDMDEVHLP::pfnGetVM
3137 */
3138DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3139{
3140 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3141}
3142
3143/**
3144 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3145 */
3146DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3147{
3148 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3149}
3150
3151/**
3152 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3153 */
3154DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3155{
3156 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3157}
3158
3159/**
3160 * @copydoc PDMDEVHLP::pfnPhysReserve
3161 */
3162DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3163{
3164 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3165}
3166
3167/**
3168 * @copydoc PDMDEVHLP::pfnPhys2HCVirt
3169 */
3170DECLINLINE(int) PDMDevHlpPhys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3171{
3172 return pDevIns->pDevHlp->pfnPhys2HCVirt(pDevIns, GCPhys, cbRange, ppvHC);
3173}
3174
3175/**
3176 * @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr
3177 */
3178DECLINLINE(int) PDMDevHlpPhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3179{
3180 return pDevIns->pDevHlp->pfnPhysGCPtr2HCPtr(pDevIns, GCPtr, pHCPtr);
3181}
3182
3183/**
3184 * @copydoc PDMDEVHLP::pfnA20Set
3185 */
3186DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3187{
3188 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3189}
3190
3191/**
3192 * @copydoc PDMDEVHLP::pfnVMReset
3193 */
3194DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3195{
3196 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3197}
3198
3199/**
3200 * @copydoc PDMDEVHLP::pfnVMSuspend
3201 */
3202DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3203{
3204 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3205}
3206
3207/**
3208 * @copydoc PDMDEVHLP::pfnVMPowerOff
3209 */
3210DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3211{
3212 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3213}
3214
3215/**
3216 * @copydoc PDMDEVHLP::pfnDMARegister
3217 */
3218DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3219{
3220 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3221}
3222
3223/**
3224 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3225 */
3226DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3227{
3228 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3229}
3230
3231/**
3232 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3233 */
3234DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3235{
3236 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3237}
3238
3239/**
3240 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3241 */
3242DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3243{
3244 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3245}
3246
3247/**
3248 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3249 */
3250DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3251{
3252 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3253}
3254
3255/**
3256 * @copydoc PDMDEVHLP::pfnDMASchedule
3257 */
3258DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3259{
3260 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3261}
3262
3263/**
3264 * @copydoc PDMDEVHLP::pfnCMOSWrite
3265 */
3266DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3267{
3268 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3269}
3270
3271/**
3272 * @copydoc PDMDEVHLP::pfnCMOSRead
3273 */
3274DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3275{
3276 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3277}
3278
3279/**
3280 * @copydoc PDMDEVHLP::pfnGetCpuId
3281 */
3282DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3283{
3284 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3285}
3286
3287/**
3288 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3289 */
3290DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3291 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3292{
3293 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3294}
3295#endif /* IN_RING3 */
3296
3297
3298/**
3299 * @copydoc PDMDEVHLP::pfnPCISetIrq
3300 */
3301DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3302{
3303#ifdef IN_GC
3304 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3305#elif defined(IN_RING0)
3306 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3307#else
3308 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3309#endif
3310}
3311
3312/**
3313 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3314 */
3315DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3316{
3317#ifdef IN_GC
3318 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3319#elif defined(IN_RING0)
3320 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3321#else
3322 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3323#endif
3324}
3325
3326/**
3327 * @copydoc PDMDEVHLP::pfnISASetIrq
3328 */
3329DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3330{
3331#ifdef IN_GC
3332 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3333#elif defined(IN_RING0)
3334 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3335#else
3336 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3337#endif
3338}
3339
3340/**
3341 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3342 */
3343DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3344{
3345#ifdef IN_GC
3346 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3347#elif defined(IN_RING0)
3348 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3349#else
3350 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3351#endif
3352}
3353
3354/**
3355 * @copydoc PDMDEVHLP::pfnPhysRead
3356 */
3357DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3358{
3359#ifdef IN_GC
3360 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3361#elif defined(IN_RING0)
3362 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3363#else
3364 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3365#endif
3366}
3367
3368/**
3369 * @copydoc PDMDEVHLP::pfnPhysWrite
3370 */
3371DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3372{
3373#ifdef IN_GC
3374 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3375#elif defined(IN_RING0)
3376 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3377#else
3378 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3379#endif
3380}
3381
3382/**
3383 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3384 */
3385DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3386{
3387#ifdef IN_GC
3388 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3389#elif defined(IN_RING0)
3390 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3391#else
3392 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3393#endif
3394}
3395
3396/**
3397 * @copydoc PDMDEVHLP::pfnVMSetError
3398 */
3399DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3400{
3401 va_list va;
3402 va_start(va, pszFormat);
3403#ifdef IN_GC
3404 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3405#elif defined(IN_RING0)
3406 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3407#else
3408 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3409#endif
3410 va_end(va);
3411 return rc;
3412}
3413
3414/**
3415 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3416 */
3417DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3418{
3419 va_list va;
3420 int rc;
3421 va_start(va, pszFormat);
3422#ifdef IN_GC
3423 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3424#elif defined(IN_RING0)
3425 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3426#else
3427 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3428#endif
3429 va_end(va);
3430 return rc;
3431}
3432
3433
3434
3435/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3436typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3437
3438/**
3439 * Callbacks for VBoxDeviceRegister().
3440 */
3441typedef struct PDMDEVREGCB
3442{
3443 /** Interface version.
3444 * This is set to PDM_DEVREG_CB_VERSION. */
3445 uint32_t u32Version;
3446
3447 /**
3448 * Registers a device with the current VM instance.
3449 *
3450 * @returns VBox status code.
3451 * @param pCallbacks Pointer to the callback table.
3452 * @param pDevReg Pointer to the device registration record.
3453 * This data must be permanent and readonly.
3454 */
3455 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3456
3457 /**
3458 * Allocate memory which is associated with current VM instance
3459 * and automatically freed on it's destruction.
3460 *
3461 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3462 * @param pCallbacks Pointer to the callback table.
3463 * @param cb Number of bytes to allocate.
3464 */
3465 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3466} PDMDEVREGCB;
3467
3468/** Current version of the PDMDEVREGCB structure. */
3469#define PDM_DEVREG_CB_VERSION 0xf4010000
3470
3471
3472/**
3473 * The VBoxDevicesRegister callback function.
3474 *
3475 * PDM will invoke this function after loading a device module and letting
3476 * the module decide which devices to register and how to handle conflicts.
3477 *
3478 * @returns VBox status code.
3479 * @param pCallbacks Pointer to the callback table.
3480 * @param u32Version VBox version number.
3481 */
3482typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3483
3484/** @} */
3485
3486__END_DECLS
3487
3488#endif
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