VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 7635

Last change on this file since 7635 was 7635, checked in by vboxsync, 17 years ago

The new MMIO2 code.
WARNING! This changes the pci mapping protocol for MMIO2 so it's working the same way as I/O ports and normal MMIO memory. External users of the interface will have to update their mapping routines.

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File size: 134.3 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pdmdev_h
27#define ___VBox_pdmdev_h
28
29#include <VBox/pdmqueue.h>
30#include <VBox/pdmcritsect.h>
31#include <VBox/pdmthread.h>
32#include <VBox/pdmifs.h>
33#include <VBox/pdmins.h>
34#include <VBox/iom.h>
35#include <VBox/tm.h>
36#include <VBox/ssm.h>
37#include <VBox/cfgm.h>
38#include <VBox/dbgf.h>
39#include <VBox/mm.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44__BEGIN_DECLS
45
46/** @defgroup grp_pdm_device Devices
47 * @ingroup grp_pdm
48 * @{
49 */
50
51/**
52 * Construct a device instance for a VM.
53 *
54 * @returns VBox status.
55 * @param pDevIns The device instance data.
56 * If the registration structure is needed, pDevIns->pDevReg points to it.
57 * @param iInstance Instance number. Use this to figure out which registers and such to use.
58 * The instance number is also found in pDevIns->iInstance, but since it's
59 * likely to be freqently used PDM passes it as parameter.
60 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
61 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
62 * primary usage will in this function it's passed as a parameter.
63 */
64typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
65/** Pointer to a FNPDMDEVCONSTRUCT() function. */
66typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
67
68/**
69 * Destruct a device instance.
70 *
71 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
72 * resources can be freed correctly.
73 *
74 * @returns VBox status.
75 * @param pDevIns The device instance data.
76 */
77typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
78/** Pointer to a FNPDMDEVDESTRUCT() function. */
79typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
80
81/**
82 * Device relocation callback.
83 *
84 * When this callback is called the device instance data, and if the
85 * device have a GC component, is being relocated, or/and the selectors
86 * have been changed. The device must use the chance to perform the
87 * necessary pointer relocations and data updates.
88 *
89 * Before the GC code is executed the first time, this function will be
90 * called with a 0 delta so GC pointer calculations can be one in one place.
91 *
92 * @param pDevIns Pointer to the device instance.
93 * @param offDelta The relocation delta relative to the old location.
94 *
95 * @remark A relocation CANNOT fail.
96 */
97typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
98/** Pointer to a FNPDMDEVRELOCATE() function. */
99typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
100
101
102/**
103 * Device I/O Control interface.
104 *
105 * This is used by external components, such as the COM interface, to
106 * communicate with devices using a class wide interface or a device
107 * specific interface.
108 *
109 * @returns VBox status code.
110 * @param pDevIns Pointer to the device instance.
111 * @param uFunction Function to perform.
112 * @param pvIn Pointer to input data.
113 * @param cbIn Size of input data.
114 * @param pvOut Pointer to output data.
115 * @param cbOut Size of output data.
116 * @param pcbOut Where to store the actual size of the output data.
117 */
118typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
119 void *pvIn, RTUINT cbIn,
120 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
121/** Pointer to a FNPDMDEVIOCTL() function. */
122typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
123
124/**
125 * Power On notification.
126 *
127 * @returns VBox status.
128 * @param pDevIns The device instance data.
129 */
130typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
131/** Pointer to a FNPDMDEVPOWERON() function. */
132typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
133
134/**
135 * Reset notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 */
140typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
141/** Pointer to a FNPDMDEVRESET() function. */
142typedef FNPDMDEVRESET *PFNPDMDEVRESET;
143
144/**
145 * Suspend notification.
146 *
147 * @returns VBox status.
148 * @param pDevIns The device instance data.
149 */
150typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
151/** Pointer to a FNPDMDEVSUSPEND() function. */
152typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
153
154/**
155 * Resume notification.
156 *
157 * @returns VBox status.
158 * @param pDevIns The device instance data.
159 */
160typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
161/** Pointer to a FNPDMDEVRESUME() function. */
162typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
163
164/**
165 * Power Off notification.
166 *
167 * @param pDevIns The device instance data.
168 */
169typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
170/** Pointer to a FNPDMDEVPOWEROFF() function. */
171typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
172
173/**
174 * Attach command.
175 *
176 * This is called to let the device attach to a driver for a specified LUN
177 * at runtime. This is not called during VM construction, the device
178 * constructor have to attach to all the available drivers.
179 *
180 * This is like plugging in the keyboard or mouse after turning on the PC.
181 *
182 * @returns VBox status code.
183 * @param pDevIns The device instance.
184 * @param iLUN The logical unit which is being detached.
185 */
186typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
187/** Pointer to a FNPDMDEVATTACH() function. */
188typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
189
190/**
191 * Detach notification.
192 *
193 * This is called when a driver is detaching itself from a LUN of the device.
194 * The device should adjust it's state to reflect this.
195 *
196 * This is like unplugging the network cable to use it for the laptop or
197 * something while the PC is still running.
198 *
199 * @param pDevIns The device instance.
200 * @param iLUN The logical unit which is being detached.
201 */
202typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
203/** Pointer to a FNPDMDEVDETACH() function. */
204typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
205
206/**
207 * Query the base interface of a logical unit.
208 *
209 * @returns VBOX status code.
210 * @param pDevIns The device instance.
211 * @param iLUN The logicial unit to query.
212 * @param ppBase Where to store the pointer to the base interface of the LUN.
213 */
214typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
215/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
216typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
217
218/**
219 * Init complete notification.
220 * This can be done to do communication with other devices and other
221 * initialization which requires everything to be in place.
222 *
223 * @returns VBOX status code.
224 * @param pDevIns The device instance.
225 */
226typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
227/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
228typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
229
230
231
232/** PDM Device Registration Structure,
233 * This structure is used when registering a device from
234 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
235 * the VM is terminated.
236 */
237typedef struct PDMDEVREG
238{
239 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
240 uint32_t u32Version;
241 /** Device name. */
242 char szDeviceName[32];
243 /** Name of guest context module (no path).
244 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
245 char szGCMod[32];
246 /** Name of guest context module (no path).
247 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
248 char szR0Mod[32];
249 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
250 * remain unchanged from registration till VM destruction. */
251 const char *pszDescription;
252
253 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
254 RTUINT fFlags;
255 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
256 RTUINT fClass;
257 /** Maximum number of instances (per VM). */
258 RTUINT cMaxInstances;
259 /** Size of the instance data. */
260 RTUINT cbInstance;
261
262 /** Construct instance - required. */
263 PFNPDMDEVCONSTRUCT pfnConstruct;
264 /** Destruct instance - optional. */
265 PFNPDMDEVDESTRUCT pfnDestruct;
266 /** Relocation command - optional. */
267 PFNPDMDEVRELOCATE pfnRelocate;
268 /** I/O Control interface - optional. */
269 PFNPDMDEVIOCTL pfnIOCtl;
270 /** Power on notification - optional. */
271 PFNPDMDEVPOWERON pfnPowerOn;
272 /** Reset notification - optional. */
273 PFNPDMDEVRESET pfnReset;
274 /** Suspend notification - optional. */
275 PFNPDMDEVSUSPEND pfnSuspend;
276 /** Resume notification - optional. */
277 PFNPDMDEVRESUME pfnResume;
278 /** Attach command - optional. */
279 PFNPDMDEVATTACH pfnAttach;
280 /** Detach notification - optional. */
281 PFNPDMDEVDETACH pfnDetach;
282 /** Query a LUN base interface - optional. */
283 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
284 /** Init complete notification - optional. */
285 PFNPDMDEVINITCOMPLETE pfnInitComplete;
286 /** Power off notification - optional. */
287 PFNPDMDEVPOWEROFF pfnPowerOff;
288} PDMDEVREG;
289/** Pointer to a PDM Device Structure. */
290typedef PDMDEVREG *PPDMDEVREG;
291/** Const pointer to a PDM Device Structure. */
292typedef PDMDEVREG const *PCPDMDEVREG;
293
294/** Current DEVREG version number. */
295#define PDM_DEVREG_VERSION 0xc0010000
296
297/** PDM Device Flags.
298 * @{ */
299/** This flag is used to indicate that the device has a GC component. */
300#define PDM_DEVREG_FLAGS_GC 0x00000001
301/** This flag is used to indicate that the device has a R0 component. */
302#define PDM_DEVREG_FLAGS_R0 0x00010000
303
304/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
305 * The bit count for the current host. */
306#if HC_ARCH_BITS == 32
307# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
308#elif HC_ARCH_BITS == 64
309# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
310#else
311# error Unsupported HC_ARCH_BITS value.
312#endif
313/** The host bit count mask. */
314#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
315
316/** The device support only 32-bit guests. */
317#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
318/** The device support only 64-bit guests. */
319#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
320/** The device support both 32-bit & 64-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
322/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
323 * The guest bit count for the current compilation. */
324#if GC_ARCH_BITS == 32
325# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
326#elif GC_ARCH_BITS == 64
327# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64
328#else
329# error Unsupported GC_ARCH_BITS value.
330#endif
331/** The guest bit count mask. */
332#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
333
334/** Indicates that the devices support PAE36 on a 32-bit guest. */
335#define PDM_DEVREG_FLAGS_PAE36 0x00000020
336/** @} */
337
338
339/** PDM Device Classes.
340 * The order is important, lower bit earlier instantiation.
341 * @{ */
342/** Architecture device. */
343#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
344/** Architecture BIOS device. */
345#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
346/** PCI bus brigde. */
347#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
348/** ISA bus brigde. */
349#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
350/** Input device (mouse, keyboard, joystick,..). */
351#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
352/** Interrupt controller (PIC). */
353#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
354/** Interval controoler (PIT). */
355#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
356/** RTC/CMOS. */
357#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
358/** DMA controller. */
359#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
360/** VMM Device. */
361#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
362/** Graphics device, like VGA. */
363#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
364/** Storage controller device. */
365#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
366/** Network interface controller. */
367#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
368/** Audio. */
369#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
370/** USB HIC. */
371#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
372/** ACPI. */
373#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
374/** Serial controller device. */
375#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
376/** Parallel controller device */
377#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
378/** Misc devices (always last). */
379#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
380/** @} */
381
382
383/** @name IRQ Level for use with the *SetIrq APIs.
384 * @{
385 */
386/** Assert the IRQ (can assume value 1). */
387#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
388/** Deassert the IRQ (can assume value 0). */
389#define PDM_IRQ_LEVEL_LOW 0
390/** flip-flop - assert and then deassert it again immediately. */
391#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
392/** @} */
393
394
395/**
396 * PCI Bus registration structure.
397 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
398 */
399typedef struct PDMPCIBUSREG
400{
401 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
402 uint32_t u32Version;
403
404 /**
405 * Registers the device with the default PCI bus.
406 *
407 * @returns VBox status code.
408 * @param pDevIns Device instance of the PCI Bus.
409 * @param pPciDev The PCI device structure.
410 * Any PCI enabled device must keep this in it's instance data!
411 * Fill in the PCI data config before registration, please.
412 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
413 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
414 * If negative, the pci bus device will assign one.
415 */
416 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
417
418 /**
419 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
420 *
421 * @returns VBox status code.
422 * @param pDevIns Device instance of the PCI Bus.
423 * @param pPciDev The PCI device structure.
424 * @param iRegion The region number.
425 * @param cbRegion Size of the region.
426 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
427 * @param pfnCallback Callback for doing the mapping.
428 */
429 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
430
431 /**
432 * Register PCI configuration space read/write callbacks.
433 *
434 * @param pDevIns Device instance of the PCI Bus.
435 * @param pPciDev The PCI device structure.
436 * @param pfnRead Pointer to the user defined PCI config read function.
437 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
438 * PCI config read function. This way, user can decide when (and if)
439 * to call default PCI config read function. Can be NULL.
440 * @param pfnWrite Pointer to the user defined PCI config write function.
441 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
442 * PCI config write function. This way, user can decide when (and if)
443 * to call default PCI config write function. Can be NULL.
444 * @thread EMT
445 */
446 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
447 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
448
449 /**
450 * Set the IRQ for a PCI device.
451 *
452 * @param pDevIns Device instance of the PCI Bus.
453 * @param pPciDev The PCI device structure.
454 * @param iIrq IRQ number to set.
455 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
456 */
457 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
458
459 /**
460 * Saves a state of the PCI device.
461 *
462 * @returns VBox status code.
463 * @param pDevIns Device instance of the PCI Bus.
464 * @param pPciDev Pointer to PCI device.
465 * @param pSSMHandle The handle to save the state to.
466 */
467 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
468
469 /**
470 * Loads a saved PCI device state.
471 *
472 * @returns VBox status code.
473 * @param pDevIns Device instance of the PCI Bus.
474 * @param pPciDev Pointer to PCI device.
475 * @param pSSMHandle The handle to the saved state.
476 */
477 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
478
479 /**
480 * Called to perform the job of the bios.
481 * This is only called for the first PCI Bus - it is expected to
482 * service all the PCI buses.
483 *
484 * @returns VBox status.
485 * @param pDevIns Device instance of the first bus.
486 */
487 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));
488
489 /** The name of the SetIrq GC entry point. */
490 const char *pszSetIrqGC;
491
492 /** The name of the SetIrq R0 entry point. */
493 const char *pszSetIrqR0;
494
495} PDMPCIBUSREG;
496/** Pointer to a PCI bus registration structure. */
497typedef PDMPCIBUSREG *PPDMPCIBUSREG;
498
499/** Current PDMPCIBUSREG version number. */
500#define PDM_PCIBUSREG_VERSION 0xd0020000
501
502/**
503 * PCI Bus GC helpers.
504 */
505typedef struct PDMPCIHLPGC
506{
507 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */
508 uint32_t u32Version;
509
510 /**
511 * Set an ISA IRQ.
512 *
513 * @param pDevIns PCI device instance.
514 * @param iIrq IRQ number to set.
515 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
516 * @thread EMT only.
517 */
518 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
519
520 /**
521 * Set an I/O-APIC IRQ.
522 *
523 * @param pDevIns PCI device instance.
524 * @param iIrq IRQ number to set.
525 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
526 * @thread EMT only.
527 */
528 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
529
530#ifdef VBOX_WITH_PDM_LOCK
531 /**
532 * Acquires the PDM lock.
533 *
534 * @returns VINF_SUCCESS on success.
535 * @returns rc if we failed to acquire the lock.
536 * @param pDevIns The PCI device instance.
537 * @param rc What to return if we fail to acquire the lock.
538 */
539 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
540
541 /**
542 * Releases the PDM lock.
543 *
544 * @param pDevIns The PCI device instance.
545 */
546 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
547#endif
548 /** Just a safety precaution. */
549 uint32_t u32TheEnd;
550} PDMPCIHLPGC;
551/** Pointer to PCI helpers. */
552typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;
553/** Pointer to const PCI helpers. */
554typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;
555
556/** Current PDMPCIHLPR3 version number. */
557#define PDM_PCIHLPGC_VERSION 0xe1010000
558
559
560/**
561 * PCI Bus R0 helpers.
562 */
563typedef struct PDMPCIHLPR0
564{
565 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
566 uint32_t u32Version;
567
568 /**
569 * Set an ISA IRQ.
570 *
571 * @param pDevIns PCI device instance.
572 * @param iIrq IRQ number to set.
573 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
574 * @thread EMT only.
575 */
576 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
577
578 /**
579 * Set an I/O-APIC IRQ.
580 *
581 * @param pDevIns PCI device instance.
582 * @param iIrq IRQ number to set.
583 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
584 * @thread EMT only.
585 */
586 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
587
588#ifdef VBOX_WITH_PDM_LOCK
589 /**
590 * Acquires the PDM lock.
591 *
592 * @returns VINF_SUCCESS on success.
593 * @returns rc if we failed to acquire the lock.
594 * @param pDevIns The PCI device instance.
595 * @param rc What to return if we fail to acquire the lock.
596 */
597 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
598
599 /**
600 * Releases the PDM lock.
601 *
602 * @param pDevIns The PCI device instance.
603 */
604 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
605#endif
606
607 /** Just a safety precaution. */
608 uint32_t u32TheEnd;
609} PDMPCIHLPR0;
610/** Pointer to PCI helpers. */
611typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
612/** Pointer to const PCI helpers. */
613typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
614
615/** Current PDMPCIHLPR0 version number. */
616#define PDM_PCIHLPR0_VERSION 0xe1010000
617
618/**
619 * PCI device helpers.
620 */
621typedef struct PDMPCIHLPR3
622{
623 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
624 uint32_t u32Version;
625
626 /**
627 * Set an ISA IRQ.
628 *
629 * @param pDevIns The PCI device instance.
630 * @param iIrq IRQ number to set.
631 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
632 * @thread EMT only.
633 */
634 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
635
636 /**
637 * Set an I/O-APIC IRQ.
638 *
639 * @param pDevIns The PCI device instance.
640 * @param iIrq IRQ number to set.
641 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
642 * @thread EMT only.
643 */
644 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
645
646 /**
647 * Checks if the given address is an MMIO2 base address or not.
648 *
649 * @returns true/false accordingly.
650 * @param pDevIns The PCI device instance.
651 * @param pOwner The owner of the memory, optional.
652 * @param GCPhys The address to check.
653 */
654 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
655
656 /**
657 * Gets the address of the GC PCI Bus helpers.
658 *
659 * This should be called at both construction and relocation time
660 * to obtain the correct address of the GC helpers.
661 *
662 * @returns GC pointer to the PCI Bus helpers.
663 * @param pDevIns Device instance of the PCI Bus.
664 * @thread EMT only.
665 */
666 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
667
668 /**
669 * Gets the address of the R0 PCI Bus helpers.
670 *
671 * This should be called at both construction and relocation time
672 * to obtain the correct address of the GC helpers.
673 *
674 * @returns R0 pointer to the PCI Bus helpers.
675 * @param pDevIns Device instance of the PCI Bus.
676 * @thread EMT only.
677 */
678 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
679
680#ifdef VBOX_WITH_PDM_LOCK
681 /**
682 * Acquires the PDM lock.
683 *
684 * @returns VINF_SUCCESS on success.
685 * @returns Fatal error on failure.
686 * @param pDevIns The PCI device instance.
687 * @param rc Dummy for making the interface identical to the GC and R0 versions.
688 */
689 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
690
691 /**
692 * Releases the PDM lock.
693 *
694 * @param pDevIns The PCI device instance.
695 */
696 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
697#endif
698
699 /** Just a safety precaution. */
700 uint32_t u32TheEnd;
701} PDMPCIHLPR3;
702/** Pointer to PCI helpers. */
703typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
704/** Pointer to const PCI helpers. */
705typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
706
707/** Current PDMPCIHLPR3 version number. */
708#define PDM_PCIHLPR3_VERSION 0xf1020000
709
710
711/**
712 * Programmable Interrupt Controller registration structure.
713 */
714typedef struct PDMPICREG
715{
716 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
717 uint32_t u32Version;
718
719 /**
720 * Set the an IRQ.
721 *
722 * @param pDevIns Device instance of the PIC.
723 * @param iIrq IRQ number to set.
724 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
725 */
726 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
727
728 /**
729 * Get a pending interrupt.
730 *
731 * @returns Pending interrupt number.
732 * @param pDevIns Device instance of the PIC.
733 */
734 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
735
736 /** The name of the GC SetIrq entry point. */
737 const char *pszSetIrqGC;
738 /** The name of the GC GetInterrupt entry point. */
739 const char *pszGetInterruptGC;
740
741 /** The name of the R0 SetIrq entry point. */
742 const char *pszSetIrqR0;
743 /** The name of the R0 GetInterrupt entry point. */
744 const char *pszGetInterruptR0;
745} PDMPICREG;
746/** Pointer to a PIC registration structure. */
747typedef PDMPICREG *PPDMPICREG;
748
749/** Current PDMPICREG version number. */
750#define PDM_PICREG_VERSION 0xe0020000
751
752/**
753 * PIC GC helpers.
754 */
755typedef struct PDMPICHLPGC
756{
757 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */
758 uint32_t u32Version;
759
760 /**
761 * Set the interrupt force action flag.
762 *
763 * @param pDevIns Device instance of the PIC.
764 */
765 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
766
767 /**
768 * Clear the interrupt force action flag.
769 *
770 * @param pDevIns Device instance of the PIC.
771 */
772 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
773
774#ifdef VBOX_WITH_PDM_LOCK
775 /**
776 * Acquires the PDM lock.
777 *
778 * @returns VINF_SUCCESS on success.
779 * @returns rc if we failed to acquire the lock.
780 * @param pDevIns The PIC device instance.
781 * @param rc What to return if we fail to acquire the lock.
782 */
783 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
784
785 /**
786 * Releases the PDM lock.
787 *
788 * @param pDevIns The PIC device instance.
789 */
790 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
791#endif
792 /** Just a safety precaution. */
793 uint32_t u32TheEnd;
794} PDMPICHLPGC;
795
796/** Pointer to PIC GC helpers. */
797typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;
798/** Pointer to const PIC GC helpers. */
799typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;
800
801/** Current PDMPICHLPGC version number. */
802#define PDM_PICHLPGC_VERSION 0xfc010000
803
804
805/**
806 * PIC R0 helpers.
807 */
808typedef struct PDMPICHLPR0
809{
810 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
811 uint32_t u32Version;
812
813 /**
814 * Set the interrupt force action flag.
815 *
816 * @param pDevIns Device instance of the PIC.
817 */
818 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
819
820 /**
821 * Clear the interrupt force action flag.
822 *
823 * @param pDevIns Device instance of the PIC.
824 */
825 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
826
827#ifdef VBOX_WITH_PDM_LOCK
828 /**
829 * Acquires the PDM lock.
830 *
831 * @returns VINF_SUCCESS on success.
832 * @returns rc if we failed to acquire the lock.
833 * @param pDevIns The PIC device instance.
834 * @param rc What to return if we fail to acquire the lock.
835 */
836 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
837
838 /**
839 * Releases the PDM lock.
840 *
841 * @param pDevIns The PCI device instance.
842 */
843 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
844#endif
845
846 /** Just a safety precaution. */
847 uint32_t u32TheEnd;
848} PDMPICHLPR0;
849
850/** Pointer to PIC R0 helpers. */
851typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
852/** Pointer to const PIC R0 helpers. */
853typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
854
855/** Current PDMPICHLPR0 version number. */
856#define PDM_PICHLPR0_VERSION 0xfc010000
857
858/**
859 * PIC HC helpers.
860 */
861typedef struct PDMPICHLPR3
862{
863 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
864 uint32_t u32Version;
865
866 /**
867 * Set the interrupt force action flag.
868 *
869 * @param pDevIns Device instance of the PIC.
870 */
871 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
872
873 /**
874 * Clear the interrupt force action flag.
875 *
876 * @param pDevIns Device instance of the PIC.
877 */
878 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
879
880#ifdef VBOX_WITH_PDM_LOCK
881 /**
882 * Acquires the PDM lock.
883 *
884 * @returns VINF_SUCCESS on success.
885 * @returns Fatal error on failure.
886 * @param pDevIns The PIC device instance.
887 * @param rc Dummy for making the interface identical to the GC and R0 versions.
888 */
889 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
890
891 /**
892 * Releases the PDM lock.
893 *
894 * @param pDevIns The PIC device instance.
895 */
896 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
897#endif
898
899 /**
900 * Gets the address of the GC PIC helpers.
901 *
902 * This should be called at both construction and relocation time
903 * to obtain the correct address of the GC helpers.
904 *
905 * @returns GC pointer to the PIC helpers.
906 * @param pDevIns Device instance of the PIC.
907 */
908 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
909
910 /**
911 * Gets the address of the R0 PIC helpers.
912 *
913 * This should be called at both construction and relocation time
914 * to obtain the correct address of the GC helpers.
915 *
916 * @returns R0 pointer to the PIC helpers.
917 * @param pDevIns Device instance of the PIC.
918 */
919 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
920
921 /** Just a safety precaution. */
922 uint32_t u32TheEnd;
923} PDMPICHLPR3;
924
925/** Pointer to PIC HC helpers. */
926typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
927/** Pointer to const PIC HC helpers. */
928typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
929
930/** Current PDMPICHLPR3 version number. */
931#define PDM_PICHLPR3_VERSION 0xf0010000
932
933
934
935/**
936 * Advanced Programmable Interrupt Controller registration structure.
937 */
938typedef struct PDMAPICREG
939{
940 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
941 uint32_t u32Version;
942
943 /**
944 * Get a pending interrupt.
945 *
946 * @returns Pending interrupt number.
947 * @param pDevIns Device instance of the APIC.
948 */
949 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));
950
951 /**
952 * Set the APIC base.
953 *
954 * @param pDevIns Device instance of the APIC.
955 * @param u64Base The new base.
956 */
957 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));
958
959 /**
960 * Get the APIC base.
961 *
962 * @returns Current base.
963 * @param pDevIns Device instance of the APIC.
964 */
965 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));
966
967 /**
968 * Set the TPR (task priority register?).
969 *
970 * @param pDevIns Device instance of the APIC.
971 * @param u8TPR The new TPR.
972 */
973 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
974
975 /**
976 * Get the TPR (task priority register?).
977 *
978 * @returns The current TPR.
979 * @param pDevIns Device instance of the APIC.
980 */
981 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));
982
983 /**
984 * Private interface between the IOAPIC and APIC.
985 *
986 * This is a low-level, APIC/IOAPIC implementation specific interface
987 * which is registered with PDM only because it makes life so much
988 * simpler right now (GC bits). This is a bad bad hack! The correct
989 * way of doing this would involve some way of querying GC interfaces
990 * and relocating them. Perhaps doing some kind of device init in GC...
991 *
992 * @returns The current TPR.
993 * @param pDevIns Device instance of the APIC.
994 * @param u8Dest See APIC implementation.
995 * @param u8DestMode See APIC implementation.
996 * @param u8DeliveryMode See APIC implementation.
997 * @param iVector See APIC implementation.
998 * @param u8Polarity See APIC implementation.
999 * @param u8TriggerMode See APIC implementation.
1000 */
1001 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1002 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1003
1004 /** The name of the GC GetInterrupt entry point. */
1005 const char *pszGetInterruptGC;
1006 /** The name of the GC SetBase entry point. */
1007 const char *pszSetBaseGC;
1008 /** The name of the GC GetBase entry point. */
1009 const char *pszGetBaseGC;
1010 /** The name of the GC SetTPR entry point. */
1011 const char *pszSetTPRGC;
1012 /** The name of the GC GetTPR entry point. */
1013 const char *pszGetTPRGC;
1014 /** The name of the GC BusDeliver entry point. */
1015 const char *pszBusDeliverGC;
1016
1017 /** The name of the R0 GetInterrupt entry point. */
1018 const char *pszGetInterruptR0;
1019 /** The name of the R0 SetBase entry point. */
1020 const char *pszSetBaseR0;
1021 /** The name of the R0 GetBase entry point. */
1022 const char *pszGetBaseR0;
1023 /** The name of the R0 SetTPR entry point. */
1024 const char *pszSetTPRR0;
1025 /** The name of the R0 GetTPR entry point. */
1026 const char *pszGetTPRR0;
1027 /** The name of the R0 BusDeliver entry point. */
1028 const char *pszBusDeliverR0;
1029
1030} PDMAPICREG;
1031/** Pointer to an APIC registration structure. */
1032typedef PDMAPICREG *PPDMAPICREG;
1033
1034/** Current PDMAPICREG version number. */
1035#define PDM_APICREG_VERSION 0x70010000
1036
1037
1038/**
1039 * APIC GC helpers.
1040 */
1041typedef struct PDMAPICHLPGC
1042{
1043 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */
1044 uint32_t u32Version;
1045
1046 /**
1047 * Set the interrupt force action flag.
1048 *
1049 * @param pDevIns Device instance of the APIC.
1050 */
1051 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1052
1053 /**
1054 * Clear the interrupt force action flag.
1055 *
1056 * @param pDevIns Device instance of the APIC.
1057 */
1058 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1059
1060 /**
1061 * Sets or clears the APIC bit in the CPUID feature masks.
1062 *
1063 * @param pDevIns Device instance of the APIC.
1064 * @param fEnabled If true the bit is set, else cleared.
1065 */
1066 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1067
1068#ifdef VBOX_WITH_PDM_LOCK
1069 /**
1070 * Acquires the PDM lock.
1071 *
1072 * @returns VINF_SUCCESS on success.
1073 * @returns rc if we failed to acquire the lock.
1074 * @param pDevIns The APIC device instance.
1075 * @param rc What to return if we fail to acquire the lock.
1076 */
1077 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1078
1079 /**
1080 * Releases the PDM lock.
1081 *
1082 * @param pDevIns The APIC device instance.
1083 */
1084 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1085#endif
1086 /** Just a safety precaution. */
1087 uint32_t u32TheEnd;
1088} PDMAPICHLPGC;
1089/** Pointer to APIC GC helpers. */
1090typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;
1091/** Pointer to const APIC helpers. */
1092typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;
1093
1094/** Current PDMAPICHLPGC version number. */
1095#define PDM_APICHLPGC_VERSION 0x60010000
1096
1097
1098/**
1099 * APIC R0 helpers.
1100 */
1101typedef struct PDMAPICHLPR0
1102{
1103 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1104 uint32_t u32Version;
1105
1106 /**
1107 * Set the interrupt force action flag.
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 */
1111 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1112
1113 /**
1114 * Clear the interrupt force action flag.
1115 *
1116 * @param pDevIns Device instance of the APIC.
1117 */
1118 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1119
1120 /**
1121 * Sets or clears the APIC bit in the CPUID feature masks.
1122 *
1123 * @param pDevIns Device instance of the APIC.
1124 * @param fEnabled If true the bit is set, else cleared.
1125 */
1126 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1127
1128#ifdef VBOX_WITH_PDM_LOCK
1129 /**
1130 * Acquires the PDM lock.
1131 *
1132 * @returns VINF_SUCCESS on success.
1133 * @returns rc if we failed to acquire the lock.
1134 * @param pDevIns The APIC device instance.
1135 * @param rc What to return if we fail to acquire the lock.
1136 */
1137 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1138
1139 /**
1140 * Releases the PDM lock.
1141 *
1142 * @param pDevIns The APIC device instance.
1143 */
1144 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1145#endif
1146
1147 /** Just a safety precaution. */
1148 uint32_t u32TheEnd;
1149} PDMAPICHLPR0;
1150/** Pointer to APIC GC helpers. */
1151typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1152/** Pointer to const APIC helpers. */
1153typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1154
1155/** Current PDMAPICHLPR0 version number. */
1156#define PDM_APICHLPR0_VERSION 0x60010000
1157
1158/**
1159 * APIC HC helpers.
1160 */
1161typedef struct PDMAPICHLPR3
1162{
1163 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1164 uint32_t u32Version;
1165
1166 /**
1167 * Set the interrupt force action flag.
1168 *
1169 * @param pDevIns Device instance of the APIC.
1170 */
1171 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1172
1173 /**
1174 * Clear the interrupt force action flag.
1175 *
1176 * @param pDevIns Device instance of the APIC.
1177 */
1178 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1179
1180 /**
1181 * Sets or clears the APIC bit in the CPUID feature masks.
1182 *
1183 * @param pDevIns Device instance of the APIC.
1184 * @param fEnabled If true the bit is set, else cleared.
1185 */
1186 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1187
1188#ifdef VBOX_WITH_PDM_LOCK
1189 /**
1190 * Acquires the PDM lock.
1191 *
1192 * @returns VINF_SUCCESS on success.
1193 * @returns Fatal error on failure.
1194 * @param pDevIns The APIC device instance.
1195 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1196 */
1197 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1198
1199 /**
1200 * Releases the PDM lock.
1201 *
1202 * @param pDevIns The APIC device instance.
1203 */
1204 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1205#endif
1206
1207 /**
1208 * Gets the address of the GC APIC helpers.
1209 *
1210 * This should be called at both construction and relocation time
1211 * to obtain the correct address of the GC helpers.
1212 *
1213 * @returns GC pointer to the APIC helpers.
1214 * @param pDevIns Device instance of the APIC.
1215 */
1216 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1217
1218 /**
1219 * Gets the address of the R0 APIC helpers.
1220 *
1221 * This should be called at both construction and relocation time
1222 * to obtain the correct address of the R0 helpers.
1223 *
1224 * @returns R0 pointer to the APIC helpers.
1225 * @param pDevIns Device instance of the APIC.
1226 */
1227 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1228
1229 /** Just a safety precaution. */
1230 uint32_t u32TheEnd;
1231} PDMAPICHLPR3;
1232/** Pointer to APIC helpers. */
1233typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1234/** Pointer to const APIC helpers. */
1235typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1236
1237/** Current PDMAPICHLP version number. */
1238#define PDM_APICHLPR3_VERSION 0xfd010000
1239
1240
1241/**
1242 * I/O APIC registration structure.
1243 */
1244typedef struct PDMIOAPICREG
1245{
1246 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1247 uint32_t u32Version;
1248
1249 /**
1250 * Set the an IRQ.
1251 *
1252 * @param pDevIns Device instance of the I/O APIC.
1253 * @param iIrq IRQ number to set.
1254 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1255 */
1256 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1257
1258 /** The name of the GC SetIrq entry point. */
1259 const char *pszSetIrqGC;
1260
1261 /** The name of the R0 SetIrq entry point. */
1262 const char *pszSetIrqR0;
1263} PDMIOAPICREG;
1264/** Pointer to an APIC registration structure. */
1265typedef PDMIOAPICREG *PPDMIOAPICREG;
1266
1267/** Current PDMAPICREG version number. */
1268#define PDM_IOAPICREG_VERSION 0x50010000
1269
1270
1271/**
1272 * IOAPIC GC helpers.
1273 */
1274typedef struct PDMIOAPICHLPGC
1275{
1276 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */
1277 uint32_t u32Version;
1278
1279 /**
1280 * Private interface between the IOAPIC and APIC.
1281 *
1282 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1283 *
1284 * @returns The current TPR.
1285 * @param pDevIns Device instance of the IOAPIC.
1286 * @param u8Dest See APIC implementation.
1287 * @param u8DestMode See APIC implementation.
1288 * @param u8DeliveryMode See APIC implementation.
1289 * @param iVector See APIC implementation.
1290 * @param u8Polarity See APIC implementation.
1291 * @param u8TriggerMode See APIC implementation.
1292 */
1293 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1294 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1295
1296#ifdef VBOX_WITH_PDM_LOCK
1297 /**
1298 * Acquires the PDM lock.
1299 *
1300 * @returns VINF_SUCCESS on success.
1301 * @returns rc if we failed to acquire the lock.
1302 * @param pDevIns The IOAPIC device instance.
1303 * @param rc What to return if we fail to acquire the lock.
1304 */
1305 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1306
1307 /**
1308 * Releases the PDM lock.
1309 *
1310 * @param pDevIns The IOAPIC device instance.
1311 */
1312 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1313#endif
1314
1315 /** Just a safety precaution. */
1316 uint32_t u32TheEnd;
1317} PDMIOAPICHLPGC;
1318/** Pointer to IOAPIC GC helpers. */
1319typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;
1320/** Pointer to const IOAPIC helpers. */
1321typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;
1322
1323/** Current PDMIOAPICHLPGC version number. */
1324#define PDM_IOAPICHLPGC_VERSION 0xfe010000
1325
1326
1327/**
1328 * IOAPIC R0 helpers.
1329 */
1330typedef struct PDMIOAPICHLPR0
1331{
1332 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1333 uint32_t u32Version;
1334
1335 /**
1336 * Private interface between the IOAPIC and APIC.
1337 *
1338 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1339 *
1340 * @returns The current TPR.
1341 * @param pDevIns Device instance of the IOAPIC.
1342 * @param u8Dest See APIC implementation.
1343 * @param u8DestMode See APIC implementation.
1344 * @param u8DeliveryMode See APIC implementation.
1345 * @param iVector See APIC implementation.
1346 * @param u8Polarity See APIC implementation.
1347 * @param u8TriggerMode See APIC implementation.
1348 */
1349 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1350 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1351
1352#ifdef VBOX_WITH_PDM_LOCK
1353 /**
1354 * Acquires the PDM lock.
1355 *
1356 * @returns VINF_SUCCESS on success.
1357 * @returns rc if we failed to acquire the lock.
1358 * @param pDevIns The IOAPIC device instance.
1359 * @param rc What to return if we fail to acquire the lock.
1360 */
1361 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1362
1363 /**
1364 * Releases the PDM lock.
1365 *
1366 * @param pDevIns The IOAPIC device instance.
1367 */
1368 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1369#endif
1370
1371 /** Just a safety precaution. */
1372 uint32_t u32TheEnd;
1373} PDMIOAPICHLPR0;
1374/** Pointer to IOAPIC R0 helpers. */
1375typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;
1376/** Pointer to const IOAPIC helpers. */
1377typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1378
1379/** Current PDMIOAPICHLPR0 version number. */
1380#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1381
1382/**
1383 * IOAPIC HC helpers.
1384 */
1385typedef struct PDMIOAPICHLPR3
1386{
1387 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1388 uint32_t u32Version;
1389
1390 /**
1391 * Private interface between the IOAPIC and APIC.
1392 *
1393 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.
1394 *
1395 * @returns The current TPR.
1396 * @param pDevIns Device instance of the IOAPIC.
1397 * @param u8Dest See APIC implementation.
1398 * @param u8DestMode See APIC implementation.
1399 * @param u8DeliveryMode See APIC implementation.
1400 * @param iVector See APIC implementation.
1401 * @param u8Polarity See APIC implementation.
1402 * @param u8TriggerMode See APIC implementation.
1403 */
1404 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1405 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1406
1407#ifdef VBOX_WITH_PDM_LOCK
1408 /**
1409 * Acquires the PDM lock.
1410 *
1411 * @returns VINF_SUCCESS on success.
1412 * @returns Fatal error on failure.
1413 * @param pDevIns The IOAPIC device instance.
1414 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1415 */
1416 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1417
1418 /**
1419 * Releases the PDM lock.
1420 *
1421 * @param pDevIns The IOAPIC device instance.
1422 */
1423 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1424#endif
1425
1426 /**
1427 * Gets the address of the GC IOAPIC helpers.
1428 *
1429 * This should be called at both construction and relocation time
1430 * to obtain the correct address of the GC helpers.
1431 *
1432 * @returns GC pointer to the IOAPIC helpers.
1433 * @param pDevIns Device instance of the IOAPIC.
1434 */
1435 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));
1436
1437 /**
1438 * Gets the address of the R0 IOAPIC helpers.
1439 *
1440 * This should be called at both construction and relocation time
1441 * to obtain the correct address of the R0 helpers.
1442 *
1443 * @returns R0 pointer to the IOAPIC helpers.
1444 * @param pDevIns Device instance of the IOAPIC.
1445 */
1446 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1447
1448 /** Just a safety precaution. */
1449 uint32_t u32TheEnd;
1450} PDMIOAPICHLPR3;
1451/** Pointer to IOAPIC HC helpers. */
1452typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1453/** Pointer to const IOAPIC helpers. */
1454typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1455
1456/** Current PDMIOAPICHLPR3 version number. */
1457#define PDM_IOAPICHLPR3_VERSION 0xff010000
1458
1459
1460
1461#ifdef IN_RING3
1462
1463/**
1464 * DMA Transfer Handler.
1465 *
1466 * @returns Number of bytes transferred.
1467 * @param pDevIns Device instance of the DMA.
1468 * @param pvUser User pointer.
1469 * @param uChannel Channel number.
1470 * @param off DMA position.
1471 * @param cb Block size.
1472 */
1473typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1474/** Pointer to a FNDMATRANSFERHANDLER(). */
1475typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1476
1477/**
1478 * DMA Controller registration structure.
1479 */
1480typedef struct PDMDMAREG
1481{
1482 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1483 uint32_t u32Version;
1484
1485 /**
1486 * Execute pending transfers.
1487 *
1488 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1489 * @param pDevIns Device instance of the DMAC.
1490 */
1491 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1492
1493 /**
1494 * Register transfer function for DMA channel.
1495 *
1496 * @param pDevIns Device instance of the DMAC.
1497 * @param uChannel Channel number.
1498 * @param pfnTransferHandler Device specific transfer function.
1499 * @param pvUSer User pointer to be passed to the callback.
1500 */
1501 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1502
1503 /**
1504 * Read memory
1505 *
1506 * @returns Number of bytes read.
1507 * @param pDevIns Device instance of the DMAC.
1508 * @param pvBuffer Pointer to target buffer.
1509 * @param off DMA position.
1510 * @param cbBlock Block size.
1511 */
1512 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1513
1514 /**
1515 * Write memory
1516 *
1517 * @returns Number of bytes written.
1518 * @param pDevIns Device instance of the DMAC.
1519 * @param pvBuffer Memory to write.
1520 * @param off DMA position.
1521 * @param cbBlock Block size.
1522 */
1523 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1524
1525 /**
1526 * Set the DREQ line.
1527 *
1528 * @param pDevIns Device instance of the DMAC.
1529 * @param uChannel Channel number.
1530 * @param uLevel Level of the line.
1531 */
1532 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1533
1534 /**
1535 * Get channel mode
1536 *
1537 * @returns Channel mode.
1538 * @param pDevIns Device instance of the DMAC.
1539 * @param uChannel Channel number.
1540 */
1541 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1542
1543} PDMDMACREG;
1544/** Pointer to a DMAC registration structure. */
1545typedef PDMDMACREG *PPDMDMACREG;
1546
1547/** Current PDMDMACREG version number. */
1548#define PDM_DMACREG_VERSION 0xf5010000
1549
1550
1551/**
1552 * DMA Controller device helpers.
1553 */
1554typedef struct PDMDMACHLP
1555{
1556 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1557 uint32_t u32Version;
1558
1559 /* to-be-defined */
1560
1561} PDMDMACHLP;
1562/** Pointer to DMAC helpers. */
1563typedef PDMDMACHLP *PPDMDMACHLP;
1564/** Pointer to const DMAC helpers. */
1565typedef const PDMDMACHLP *PCPDMDMACHLP;
1566
1567/** Current PDMDMACHLP version number. */
1568#define PDM_DMACHLP_VERSION 0xf6010000
1569
1570#endif /* IN_RING3 */
1571
1572
1573
1574/**
1575 * RTC registration structure.
1576 */
1577typedef struct PDMRTCREG
1578{
1579 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1580 uint32_t u32Version;
1581 uint32_t u32Alignment; /**< structure size alignment. */
1582
1583 /**
1584 * Write to a CMOS register and update the checksum if necessary.
1585 *
1586 * @returns VBox status code.
1587 * @param pDevIns Device instance of the RTC.
1588 * @param iReg The CMOS register index.
1589 * @param u8Value The CMOS register value.
1590 */
1591 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1592
1593 /**
1594 * Read a CMOS register.
1595 *
1596 * @returns VBox status code.
1597 * @param pDevIns Device instance of the RTC.
1598 * @param iReg The CMOS register index.
1599 * @param pu8Value Where to store the CMOS register value.
1600 */
1601 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1602
1603} PDMRTCREG;
1604/** Pointer to a RTC registration structure. */
1605typedef PDMRTCREG *PPDMRTCREG;
1606/** Pointer to a const RTC registration structure. */
1607typedef const PDMRTCREG *PCPDMRTCREG;
1608
1609/** Current PDMRTCREG version number. */
1610#define PDM_RTCREG_VERSION 0xfa010000
1611
1612
1613/**
1614 * RTC device helpers.
1615 */
1616typedef struct PDMRTCHLP
1617{
1618 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1619 uint32_t u32Version;
1620
1621 /* to-be-defined */
1622
1623} PDMRTCHLP;
1624/** Pointer to RTC helpers. */
1625typedef PDMRTCHLP *PPDMRTCHLP;
1626/** Pointer to const RTC helpers. */
1627typedef const PDMRTCHLP *PCPDMRTCHLP;
1628
1629/** Current PDMRTCHLP version number. */
1630#define PDM_RTCHLP_VERSION 0xf6010000
1631
1632
1633
1634#ifdef IN_RING3
1635
1636/**
1637 * PDM Device API.
1638 */
1639typedef struct PDMDEVHLP
1640{
1641 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1642 uint32_t u32Version;
1643
1644 /**
1645 * Register a number of I/O ports with a device.
1646 *
1647 * These callbacks are of course for the host context (HC).
1648 * Register HC handlers before guest context (GC) handlers! There must be a
1649 * HC handler for every GC handler!
1650 *
1651 * @returns VBox status.
1652 * @param pDevIns The device instance to register the ports with.
1653 * @param Port First port number in the range.
1654 * @param cPorts Number of ports to register.
1655 * @param pvUser User argument.
1656 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1657 * @param pfnIn Pointer to function which is gonna handle IN operations.
1658 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1659 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1660 * @param pszDesc Pointer to description string. This must not be freed.
1661 */
1662 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1663 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1664 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1665
1666 /**
1667 * Register a number of I/O ports with a device for GC.
1668 *
1669 * These callbacks are for the host context (GC).
1670 * Register host context (HC) handlers before guest context handlers! There must be a
1671 * HC handler for every GC handler!
1672 *
1673 * @returns VBox status.
1674 * @param pDevIns The device instance to register the ports with and which GC module
1675 * to resolve the names against.
1676 * @param Port First port number in the range.
1677 * @param cPorts Number of ports to register.
1678 * @param pvUser User argument.
1679 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1680 * @param pszIn Name of the GC function which is gonna handle IN operations.
1681 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1682 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1683 * @param pszDesc Pointer to description string. This must not be freed.
1684 */
1685 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1686 const char *pszOut, const char *pszIn,
1687 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1688
1689 /**
1690 * Register a number of I/O ports with a device.
1691 *
1692 * These callbacks are of course for the ring-0 host context (R0).
1693 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1694 *
1695 * @returns VBox status.
1696 * @param pDevIns The device instance to register the ports with.
1697 * @param Port First port number in the range.
1698 * @param cPorts Number of ports to register.
1699 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1700 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1701 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1702 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1703 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1704 * @param pszDesc Pointer to description string. This must not be freed.
1705 */
1706 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1707 const char *pszOut, const char *pszIn,
1708 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1709
1710 /**
1711 * Deregister I/O ports.
1712 *
1713 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1714 *
1715 * @returns VBox status.
1716 * @param pDevIns The device instance owning the ports.
1717 * @param Port First port number in the range.
1718 * @param cPorts Number of ports to deregister.
1719 */
1720 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1721
1722 /**
1723 * Register a Memory Mapped I/O (MMIO) region.
1724 *
1725 * These callbacks are of course for the host context (HC).
1726 * Register HC handlers before guest context (GC) handlers! There must be a
1727 * HC handler for every GC handler!
1728 *
1729 * @returns VBox status.
1730 * @param pDevIns The device instance to register the MMIO with.
1731 * @param GCPhysStart First physical address in the range.
1732 * @param cbRange The size of the range (in bytes).
1733 * @param pvUser User argument.
1734 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1735 * @param pfnRead Pointer to function which is gonna handle Read operations.
1736 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1737 * @param pszDesc Pointer to description string. This must not be freed.
1738 */
1739 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1740 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1741 const char *pszDesc));
1742
1743 /**
1744 * Register a Memory Mapped I/O (MMIO) region for GC.
1745 *
1746 * These callbacks are for the guest context (GC).
1747 * Register host context (HC) handlers before guest context handlers! There must be a
1748 * HC handler for every GC handler!
1749 *
1750 * @returns VBox status.
1751 * @param pDevIns The device instance to register the MMIO with.
1752 * @param GCPhysStart First physical address in the range.
1753 * @param cbRange The size of the range (in bytes).
1754 * @param pvUser User argument.
1755 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1756 * @param pszRead Name of the GC function which is gonna handle Read operations.
1757 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1758 * @param pszDesc Pointer to description string. This must not be freed.
1759 */
1760 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1761 const char *pszWrite, const char *pszRead, const char *pszFill,
1762 const char *pszDesc));
1763
1764 /**
1765 * Register a Memory Mapped I/O (MMIO) region for R0.
1766 *
1767 * These callbacks are for the ring-0 host context (R0).
1768 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1769 *
1770 * @returns VBox status.
1771 * @param pDevIns The device instance to register the MMIO with.
1772 * @param GCPhysStart First physical address in the range.
1773 * @param cbRange The size of the range (in bytes).
1774 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1775 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1776 * @param pszRead Name of the GC function which is gonna handle Read operations.
1777 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1778 * @param pszDesc Pointer to description string. This must not be freed.
1779 */
1780 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1781 const char *pszWrite, const char *pszRead, const char *pszFill,
1782 const char *pszDesc));
1783
1784 /**
1785 * Deregister a Memory Mapped I/O (MMIO) region.
1786 *
1787 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1788 *
1789 * @returns VBox status.
1790 * @param pDevIns The device instance owning the MMIO region(s).
1791 * @param GCPhysStart First physical address in the range.
1792 * @param cbRange The size of the range (in bytes).
1793 */
1794 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1795
1796 /**
1797 * Register a ROM (BIOS) region.
1798 *
1799 * It goes without saying that this is read-only memory. The memory region must be
1800 * in unassigned memory. I.e. from the top of the address space or on the PC in
1801 * the 0xa0000-0xfffff range.
1802 *
1803 * @returns VBox status.
1804 * @param pDevIns The device instance owning the ROM region.
1805 * @param GCPhysStart First physical address in the range.
1806 * Must be page aligned!
1807 * @param cbRange The size of the range (in bytes).
1808 * Must be page aligned!
1809 * @param pvBinary Pointer to the binary data backing the ROM image.
1810 * This must be cbRange bytes big.
1811 * It will be copied and doesn't have to stick around if fShadow is clear.
1812 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1813 * the ROM writable for a while during the POST and refreshing
1814 * it at reset. When this flag is set, the memory pointed to by
1815 * pvBinary has to stick around for the lifespan of the VM.
1816 * @param pszDesc Pointer to description string. This must not be freed.
1817 *
1818 * @remark There is no way to remove the rom, automatically on device cleanup or
1819 * manually from the device yet. At present I doubt we need such features...
1820 */
1821 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1822
1823 /**
1824 * Register a save state data unit.
1825 *
1826 * @returns VBox status.
1827 * @param pDevIns Device instance.
1828 * @param pszName Data unit name.
1829 * @param u32Instance The instance identifier of the data unit.
1830 * This must together with the name be unique.
1831 * @param u32Version Data layout version number.
1832 * @param cbGuess The approximate amount of data in the unit.
1833 * Only for progress indicators.
1834 * @param pfnSavePrep Prepare save callback, optional.
1835 * @param pfnSaveExec Execute save callback, optional.
1836 * @param pfnSaveDone Done save callback, optional.
1837 * @param pfnLoadPrep Prepare load callback, optional.
1838 * @param pfnLoadExec Execute load callback, optional.
1839 * @param pfnLoadDone Done load callback, optional.
1840 */
1841 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1842 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1843 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1844
1845 /**
1846 * Creates a timer.
1847 *
1848 * @returns VBox status.
1849 * @param pDevIns Device instance.
1850 * @param enmClock The clock to use on this timer.
1851 * @param pfnCallback Callback function.
1852 * @param pszDesc Pointer to description string which must stay around
1853 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1854 * @param ppTimer Where to store the timer on success.
1855 */
1856 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1857
1858 /**
1859 * Creates an external timer.
1860 *
1861 * @returns timer pointer
1862 * @param pDevIns Device instance.
1863 * @param enmClock The clock to use on this timer.
1864 * @param pfnCallback Callback function.
1865 * @param pvUser User pointer
1866 * @param pszDesc Pointer to description string which must stay around
1867 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1868 */
1869 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1870
1871 /**
1872 * Registers the device with the default PCI bus.
1873 *
1874 * @returns VBox status code.
1875 * @param pDevIns Device instance.
1876 * @param pPciDev The PCI device structure.
1877 * Any PCI enabled device must keep this in it's instance data!
1878 * Fill in the PCI data config before registration, please.
1879 * @remark This is the simple interface, a Ex interface will be created if
1880 * more features are needed later.
1881 */
1882 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1883
1884 /**
1885 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1886 *
1887 * @returns VBox status code.
1888 * @param pDevIns Device instance.
1889 * @param iRegion The region number.
1890 * @param cbRegion Size of the region.
1891 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1892 * @param pfnCallback Callback for doing the mapping.
1893 */
1894 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1895
1896 /**
1897 * Register PCI configuration space read/write callbacks.
1898 *
1899 * @param pDevIns Device instance.
1900 * @param pPciDev The PCI device structure.
1901 * If NULL the default PCI device for this device instance is used.
1902 * @param pfnRead Pointer to the user defined PCI config read function.
1903 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1904 * PCI config read function. This way, user can decide when (and if)
1905 * to call default PCI config read function. Can be NULL.
1906 * @param pfnWrite Pointer to the user defined PCI config write function.
1907 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1908 * PCI config write function. This way, user can decide when (and if)
1909 * to call default PCI config write function. Can be NULL.
1910 * @thread EMT
1911 */
1912 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1913 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1914
1915 /**
1916 * Set the IRQ for a PCI device.
1917 *
1918 * @param pDevIns Device instance.
1919 * @param iIrq IRQ number to set.
1920 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1921 * @thread Any thread, but will involve the emulation thread.
1922 */
1923 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1924
1925 /**
1926 * Set the IRQ for a PCI device, but don't wait for EMT to process
1927 * the request when not called from EMT.
1928 *
1929 * @param pDevIns Device instance.
1930 * @param iIrq IRQ number to set.
1931 * @param iLevel IRQ level.
1932 * @thread Any thread, but will involve the emulation thread.
1933 */
1934 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1935
1936 /**
1937 * Set ISA IRQ for a device.
1938 *
1939 * @param pDevIns Device instance.
1940 * @param iIrq IRQ number to set.
1941 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1942 * @thread Any thread, but will involve the emulation thread.
1943 */
1944 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1945
1946 /**
1947 * Set the ISA IRQ for a device, but don't wait for EMT to process
1948 * the request when not called from EMT.
1949 *
1950 * @param pDevIns Device instance.
1951 * @param iIrq IRQ number to set.
1952 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1953 * @thread Any thread, but will involve the emulation thread.
1954 */
1955 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1956
1957 /**
1958 * Attaches a driver (chain) to the device.
1959 *
1960 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1961 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1962 *
1963 * @returns VBox status code.
1964 * @param pDevIns Device instance.
1965 * @param iLun The logical unit to attach.
1966 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1967 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1968 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1969 * for the live of the device instance.
1970 */
1971 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1972
1973 /**
1974 * Allocate memory which is associated with current VM instance
1975 * and automatically freed on it's destruction.
1976 *
1977 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1978 * @param pDevIns Device instance.
1979 * @param cb Number of bytes to allocate.
1980 */
1981 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
1982
1983 /**
1984 * Allocate memory which is associated with current VM instance
1985 * and automatically freed on it's destruction. The memory is ZEROed.
1986 *
1987 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1988 * @param pDevIns Device instance.
1989 * @param cb Number of bytes to allocate.
1990 */
1991 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
1992
1993 /**
1994 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
1995 *
1996 * @param pDevIns Device instance.
1997 * @param pv Pointer to the memory to free.
1998 */
1999 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2000
2001 /**
2002 * Set the VM error message
2003 *
2004 * @returns rc.
2005 * @param pDevIns Device instance.
2006 * @param rc VBox status code.
2007 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2008 * @param pszFormat Error message format string.
2009 * @param ... Error message arguments.
2010 */
2011 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2012
2013 /**
2014 * Set the VM error message
2015 *
2016 * @returns rc.
2017 * @param pDevIns Device instance.
2018 * @param rc VBox status code.
2019 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2020 * @param pszFormat Error message format string.
2021 * @param va Error message arguments.
2022 */
2023 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2024
2025 /**
2026 * Set the VM runtime error message
2027 *
2028 * @returns VBox status code.
2029 * @param pDevIns Device instance.
2030 * @param fFatal Whether it is a fatal error or not.
2031 * @param pszErrorID Error ID string.
2032 * @param pszFormat Error message format string.
2033 * @param ... Error message arguments.
2034 */
2035 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2036
2037 /**
2038 * Set the VM runtime error message
2039 *
2040 * @returns VBox status code.
2041 * @param pDevIns Device instance.
2042 * @param fFatal Whether it is a fatal error or not.
2043 * @param pszErrorID Error ID string.
2044 * @param pszFormat Error message format string.
2045 * @param va Error message arguments.
2046 */
2047 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2048
2049 /**
2050 * Assert that the current thread is the emulation thread.
2051 *
2052 * @returns True if correct.
2053 * @returns False if wrong.
2054 * @param pDevIns Device instance.
2055 * @param pszFile Filename of the assertion location.
2056 * @param iLine The linenumber of the assertion location.
2057 * @param pszFunction Function of the assertion location.
2058 */
2059 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2060
2061 /**
2062 * Assert that the current thread is NOT the emulation thread.
2063 *
2064 * @returns True if correct.
2065 * @returns False if wrong.
2066 * @param pDevIns Device instance.
2067 * @param pszFile Filename of the assertion location.
2068 * @param iLine The linenumber of the assertion location.
2069 * @param pszFunction Function of the assertion location.
2070 */
2071 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2072
2073 /**
2074 * Stops the VM and enters the debugger to look at the guest state.
2075 *
2076 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2077 * invoking this function directly.
2078 *
2079 * @returns VBox status code which must be passed up to the VMM.
2080 * @param pDevIns Device instance.
2081 * @param pszFile Filename of the assertion location.
2082 * @param iLine The linenumber of the assertion location.
2083 * @param pszFunction Function of the assertion location.
2084 * @param pszFormat Message. (optional)
2085 * @param args Message parameters.
2086 */
2087 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2088
2089 /**
2090 * Register a info handler with DBGF,
2091 *
2092 * @returns VBox status code.
2093 * @param pDevIns Device instance.
2094 * @param pszName The identifier of the info.
2095 * @param pszDesc The description of the info and any arguments the handler may take.
2096 * @param pfnHandler The handler function to be called to display the info.
2097 */
2098 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2099
2100 /**
2101 * Registers a statistics sample if statistics are enabled.
2102 *
2103 * @param pDevIns Device instance of the DMA.
2104 * @param pvSample Pointer to the sample.
2105 * @param enmType Sample type. This indicates what pvSample is pointing at.
2106 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2107 * Further nesting is possible.
2108 * @param enmUnit Sample unit.
2109 * @param pszDesc Sample description.
2110 */
2111 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2112
2113 /**
2114 * Same as pfnSTAMRegister except that the name is specified in a
2115 * RTStrPrintf like fashion.
2116 *
2117 * @returns VBox status.
2118 * @param pDevIns Device instance of the DMA.
2119 * @param pvSample Pointer to the sample.
2120 * @param enmType Sample type. This indicates what pvSample is pointing at.
2121 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2122 * @param enmUnit Sample unit.
2123 * @param pszDesc Sample description.
2124 * @param pszName The sample name format string.
2125 * @param ... Arguments to the format string.
2126 */
2127 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2128 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2129
2130 /**
2131 * Same as pfnSTAMRegister except that the name is specified in a
2132 * RTStrPrintfV like fashion.
2133 *
2134 * @returns VBox status.
2135 * @param pDevIns Device instance of the DMA.
2136 * @param pvSample Pointer to the sample.
2137 * @param enmType Sample type. This indicates what pvSample is pointing at.
2138 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2139 * @param enmUnit Sample unit.
2140 * @param pszDesc Sample description.
2141 * @param pszName The sample name format string.
2142 * @param args Arguments to the format string.
2143 */
2144 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2145 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2146
2147 /**
2148 * Register the RTC device.
2149 *
2150 * @returns VBox status code.
2151 * @param pDevIns Device instance.
2152 * @param pRtcReg Pointer to a RTC registration structure.
2153 * @param ppRtcHlp Where to store the pointer to the helper functions.
2154 */
2155 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2156
2157 /**
2158 * Create a queue.
2159 *
2160 * @returns VBox status code.
2161 * @param pDevIns The device instance.
2162 * @param cbItem The size of a queue item.
2163 * @param cItems The number of items in the queue.
2164 * @param cMilliesInterval The number of milliseconds between polling the queue.
2165 * If 0 then the emulation thread will be notified whenever an item arrives.
2166 * @param pfnCallback The consumer function.
2167 * @param fGCEnabled Set if the queue should work in GC too.
2168 * @param ppQueue Where to store the queue handle on success.
2169 * @thread The emulation thread.
2170 */
2171 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2172 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2173
2174 /**
2175 * Initializes a PDM critical section.
2176 *
2177 * The PDM critical sections are derived from the IPRT critical sections, but
2178 * works in GC as well.
2179 *
2180 * @returns VBox status code.
2181 * @param pDevIns Device instance.
2182 * @param pCritSect Pointer to the critical section.
2183 * @param pszName The name of the critical section (for statistics).
2184 */
2185 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2186
2187 /**
2188 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2189 *
2190 * @returns pTime.
2191 * @param pDevIns Device instance.
2192 * @param pTime Where to store the time.
2193 */
2194 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2195
2196 /**
2197 * Creates a PDM thread.
2198 *
2199 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2200 * resuming, and destroying the thread as the VM state changes.
2201 *
2202 * @returns VBox status code.
2203 * @param pDevIns The device instance.
2204 * @param ppThread Where to store the thread 'handle'.
2205 * @param pvUser The user argument to the thread function.
2206 * @param pfnThread The thread function.
2207 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2208 * a state change is pending.
2209 * @param cbStack See RTThreadCreate.
2210 * @param enmType See RTThreadCreate.
2211 * @param pszName See RTThreadCreate.
2212 */
2213 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2214 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2215
2216 /**
2217 * Convert a guest virtual address to a guest physical address.
2218 *
2219 * @returns VBox status code.
2220 * @param pDevIns Device instance.
2221 * @param GCPtr Guest virtual address.
2222 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2223 * @thread The emulation thread.
2224 * @remark Careful with page boundraries.
2225 */
2226 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2227
2228 /** Space reserved for future members.
2229 * @{ */
2230 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
2231 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2232 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2233 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2234 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2235 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2236 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2237 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2238 /** @} */
2239
2240
2241 /** API available to trusted devices only.
2242 *
2243 * These APIs are providing unrestricted access to the guest and the VM,
2244 * or they are interacting intimately with PDM.
2245 *
2246 * @{
2247 */
2248 /**
2249 * Gets the VM handle. Restricted API.
2250 *
2251 * @returns VM Handle.
2252 * @param pDevIns Device instance.
2253 */
2254 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2255
2256 /**
2257 * Register the PCI Bus.
2258 *
2259 * @returns VBox status code.
2260 * @param pDevIns Device instance.
2261 * @param pPciBusReg Pointer to PCI bus registration structure.
2262 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2263 */
2264 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2265
2266 /**
2267 * Register the PIC device.
2268 *
2269 * @returns VBox status code.
2270 * @param pDevIns Device instance.
2271 * @param pPicReg Pointer to a PIC registration structure.
2272 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2273 */
2274 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2275
2276 /**
2277 * Register the APIC device.
2278 *
2279 * @returns VBox status code.
2280 * @param pDevIns Device instance.
2281 * @param pApicReg Pointer to a APIC registration structure.
2282 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2283 */
2284 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2285
2286 /**
2287 * Register the I/O APIC device.
2288 *
2289 * @returns VBox status code.
2290 * @param pDevIns Device instance.
2291 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2292 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2293 */
2294 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2295
2296 /**
2297 * Register the DMA device.
2298 *
2299 * @returns VBox status code.
2300 * @param pDevIns Device instance.
2301 * @param pDmacReg Pointer to a DMAC registration structure.
2302 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2303 */
2304 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2305
2306 /**
2307 * Read physical memory.
2308 *
2309 * @param pDevIns Device instance.
2310 * @param GCPhys Physical address start reading from.
2311 * @param pvBuf Where to put the read bits.
2312 * @param cbRead How many bytes to read.
2313 * @thread Any thread, but the call may involve the emulation thread.
2314 */
2315 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2316
2317 /**
2318 * Write to physical memory.
2319 *
2320 * @param pDevIns Device instance.
2321 * @param GCPhys Physical address to write to.
2322 * @param pvBuf What to write.
2323 * @param cbWrite How many bytes to write.
2324 * @thread Any thread, but the call may involve the emulation thread.
2325 */
2326 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2327
2328 /**
2329 * Read guest physical memory by virtual address.
2330 *
2331 * @param pDevIns Device instance.
2332 * @param pvDst Where to put the read bits.
2333 * @param GCVirtSrc Guest virtual address to start reading from.
2334 * @param cb How many bytes to read.
2335 * @thread The emulation thread.
2336 */
2337 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2338
2339 /**
2340 * Write to guest physical memory by virtual address.
2341 *
2342 * @param pDevIns Device instance.
2343 * @param GCVirtDst Guest virtual address to write to.
2344 * @param pvSrc What to write.
2345 * @param cb How many bytes to write.
2346 * @thread The emulation thread.
2347 */
2348 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2349
2350 /**
2351 * Reserve physical address space for ROM and MMIO ranges.
2352 *
2353 * @returns VBox status code.
2354 * @param pDevIns Device instance.
2355 * @param GCPhys Start physical address.
2356 * @param cbRange The size of the range.
2357 * @param pszDesc Description string.
2358 * @thread The emulation thread.
2359 */
2360 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2361
2362 /**
2363 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2364 *
2365 * @returns VBox status code.
2366 * @param pDevIns Device instance.
2367 * @param GCPhys Start physical address.
2368 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2369 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2370 * @thread The emulation thread.
2371 *
2372 * @remark Careful with page boundraries.
2373 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2374 */
2375 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2376
2377 /**
2378 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2379 *
2380 * @returns VBox status code.
2381 * @param pDevIns Device instance.
2382 * @param GCPtr Guest virtual address.
2383 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2384 * @thread The emulation thread.
2385 *
2386 * @remark Careful with page boundraries.
2387 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2388 */
2389 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2390
2391 /**
2392 * Checks if the Gate A20 is enabled or not.
2393 *
2394 * @returns true if A20 is enabled.
2395 * @returns false if A20 is disabled.
2396 * @param pDevIns Device instance.
2397 * @thread The emulation thread.
2398 */
2399 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2400
2401 /**
2402 * Enables or disables the Gate A20.
2403 *
2404 * @param pDevIns Device instance.
2405 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2406 * @thread The emulation thread.
2407 */
2408 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2409
2410 /**
2411 * Resets the VM.
2412 *
2413 * @returns The appropriate VBox status code to pass around on reset.
2414 * @param pDevIns Device instance.
2415 * @thread The emulation thread.
2416 */
2417 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2418
2419 /**
2420 * Suspends the VM.
2421 *
2422 * @returns The appropriate VBox status code to pass around on suspend.
2423 * @param pDevIns Device instance.
2424 * @thread The emulation thread.
2425 */
2426 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2427
2428 /**
2429 * Power off the VM.
2430 *
2431 * @returns The appropriate VBox status code to pass around on power off.
2432 * @param pDevIns Device instance.
2433 * @thread The emulation thread.
2434 */
2435 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2436
2437 /**
2438 * Acquire global VM lock
2439 *
2440 * @returns VBox status code
2441 * @param pDevIns Device instance.
2442 */
2443 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2444
2445 /**
2446 * Release global VM lock
2447 *
2448 * @returns VBox status code
2449 * @param pDevIns Device instance.
2450 */
2451 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2452
2453 /**
2454 * Check that the current thread owns the global VM lock.
2455 *
2456 * @returns boolean
2457 * @param pDevIns Device instance.
2458 * @param pszFile Filename of the assertion location.
2459 * @param iLine Linenumber of the assertion location.
2460 * @param pszFunction Function of the assertion location.
2461 */
2462 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2463
2464 /**
2465 * Register transfer function for DMA channel.
2466 *
2467 * @returns VBox status code.
2468 * @param pDevIns Device instance.
2469 * @param uChannel Channel number.
2470 * @param pfnTransferHandler Device specific transfer callback function.
2471 * @param pvUser User pointer to pass to the callback.
2472 * @thread EMT
2473 */
2474 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2475
2476 /**
2477 * Read memory.
2478 *
2479 * @returns VBox status code.
2480 * @param pDevIns Device instance.
2481 * @param uChannel Channel number.
2482 * @param pvBuffer Pointer to target buffer.
2483 * @param off DMA position.
2484 * @param cbBlock Block size.
2485 * @param pcbRead Where to store the number of bytes which was read. optional.
2486 * @thread EMT
2487 */
2488 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2489
2490 /**
2491 * Write memory.
2492 *
2493 * @returns VBox status code.
2494 * @param pDevIns Device instance.
2495 * @param uChannel Channel number.
2496 * @param pvBuffer Memory to write.
2497 * @param off DMA position.
2498 * @param cbBlock Block size.
2499 * @param pcbWritten Where to store the number of bytes which was written. optional.
2500 * @thread EMT
2501 */
2502 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2503
2504 /**
2505 * Set the DREQ line.
2506 *
2507 * @returns VBox status code.
2508 * @param pDevIns Device instance.
2509 * @param uChannel Channel number.
2510 * @param uLevel Level of the line.
2511 * @thread EMT
2512 */
2513 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2514
2515 /**
2516 * Get channel mode.
2517 *
2518 * @returns Channel mode. See specs.
2519 * @param pDevIns Device instance.
2520 * @param uChannel Channel number.
2521 * @thread EMT
2522 */
2523 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2524
2525 /**
2526 * Schedule DMA execution.
2527 *
2528 * @param pDevIns Device instance.
2529 * @thread Any thread.
2530 */
2531 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2532
2533 /**
2534 * Write CMOS value and update the checksum(s).
2535 *
2536 * @returns VBox status code.
2537 * @param pDevIns Device instance.
2538 * @param iReg The CMOS register index.
2539 * @param u8Value The CMOS register value.
2540 * @thread EMT
2541 */
2542 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2543
2544 /**
2545 * Read CMOS value.
2546 *
2547 * @returns VBox status code.
2548 * @param pDevIns Device instance.
2549 * @param iReg The CMOS register index.
2550 * @param pu8Value Where to store the CMOS register value.
2551 * @thread EMT
2552 */
2553 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2554
2555 /**
2556 * Query CPUID.
2557 *
2558 * @param pDevIns Device instance.
2559 * @param iLeaf The CPUID leaf to get.
2560 * @param pEax Where to store the EAX value.
2561 * @param pEbx Where to store the EBX value.
2562 * @param pEcx Where to store the ECX value.
2563 * @param pEdx Where to store the EDX value.
2564 */
2565 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2566
2567 /**
2568 * Write protects a shadow ROM mapping.
2569 *
2570 * This is intented for use by the system BIOS or by the device that
2571 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2572 * write protected once the POST is over.
2573 *
2574 * @param pDevIns Device instance.
2575 * @param GCPhysStart Where the shadow ROM mapping starts.
2576 * @param cbRange The size of the shadow ROM mapping.
2577 */
2578 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2579
2580 /**
2581 * Allocate and register a MMIO2 region.
2582 *
2583 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2584 * RAM associated with a device. It is also non-shared memory with a
2585 * permanent ring-3 mapping and page backing (presently).
2586 *
2587 * @returns VBox status.
2588 * @param pDevIns The device instance.
2589 * @param iRegion The region number. Use the PCI region number as
2590 * this must be known to the PCI bus device too. If it's not associated
2591 * with the PCI device, then any number up to UINT8_MAX is fine.
2592 * @param cb The size (in bytes) of the region.
2593 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2594 * @param pszDesc Pointer to description string. This must not be freed.
2595 * @thread EMT.
2596 */
2597 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, void **ppv, const char *pszDesc));
2598
2599 /**
2600 * Deregisters and frees a MMIO2 region.
2601 *
2602 * Any physical (and virtual) access handlers registered for the region must
2603 * be deregistered before calling this function.
2604 *
2605 * @returns VBox status code.
2606 * @param pDevIns The device instance.
2607 * @param iRegion The region number used during registration.
2608 * @thread EMT.
2609 */
2610 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2611
2612 /**
2613 * Maps a MMIO2 region into the physical memory space.
2614 *
2615 * A MMIO2 range may overlap with base memory if a lot of RAM
2616 * is configured for the VM, in which case we'll drop the base
2617 * memory pages. Presently we will make no attempt to preserve
2618 * anything that happens to be present in the base memory that
2619 * is replaced, this is of course incorrectly but it's too much
2620 * effort.
2621 *
2622 * @returns VBox status code.
2623 * @param pDevIns The device instance.
2624 * @param iRegion The region number used during registration.
2625 * @param GCPhys The physical address to map it at.
2626 * @thread EMT.
2627 */
2628 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2629
2630 /**
2631 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2632 *
2633 * @returns VBox status code.
2634 * @param pDevIns The device instance.
2635 * @param iRegion The region number used during registration.
2636 * @param GCPhys The physical address it's currently mapped at.
2637 * @thread EMT.
2638 */
2639 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2640
2641 /**
2642 * Maps a portion of an MMIO2 region into the hypervisor region.
2643 *
2644 * Callers of this API must never deregister the MMIO2 region before the
2645 * VM is powered off.
2646 *
2647 * @return VBox status code.
2648 * @param pDevIns The device owning the MMIO2 memory.
2649 * @param iRegion The region.
2650 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2651 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2652 * @param pszDesc Mapping description.
2653 * @param pGCPtr Where to store the GC address.
2654 */
2655 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2656 const char *pszDesc, PRTGCPTR pGCPtr));
2657
2658 /** @} */
2659
2660 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2661 uint32_t u32TheEnd;
2662} PDMDEVHLP;
2663#endif /* !IN_RING3 */
2664/** Pointer PDM Device API. */
2665typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
2666/** Pointer PDM Device API. */
2667typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
2668
2669/** Current PDMDEVHLP version number. */
2670#define PDM_DEVHLP_VERSION 0xf2050001
2671
2672
2673/**
2674 * PDM Device API - GC Variant.
2675 */
2676typedef struct PDMDEVHLPGC
2677{
2678 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
2679 uint32_t u32Version;
2680
2681 /**
2682 * Set the IRQ for a PCI device.
2683 *
2684 * @param pDevIns Device instance.
2685 * @param iIrq IRQ number to set.
2686 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2687 * @thread Any thread, but will involve the emulation thread.
2688 */
2689 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2690
2691 /**
2692 * Set ISA IRQ for a device.
2693 *
2694 * @param pDevIns Device instance.
2695 * @param iIrq IRQ number to set.
2696 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2697 * @thread Any thread, but will involve the emulation thread.
2698 */
2699 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2700
2701 /**
2702 * Read physical memory.
2703 *
2704 * @param pDevIns Device instance.
2705 * @param GCPhys Physical address start reading from.
2706 * @param pvBuf Where to put the read bits.
2707 * @param cbRead How many bytes to read.
2708 */
2709 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2710
2711 /**
2712 * Write to physical memory.
2713 *
2714 * @param pDevIns Device instance.
2715 * @param GCPhys Physical address to write to.
2716 * @param pvBuf What to write.
2717 * @param cbWrite How many bytes to write.
2718 */
2719 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2720
2721 /**
2722 * Checks if the Gate A20 is enabled or not.
2723 *
2724 * @returns true if A20 is enabled.
2725 * @returns false if A20 is disabled.
2726 * @param pDevIns Device instance.
2727 * @thread The emulation thread.
2728 */
2729 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2730
2731 /**
2732 * Set the VM error message
2733 *
2734 * @returns rc.
2735 * @param pDrvIns Driver instance.
2736 * @param rc VBox status code.
2737 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2738 * @param pszFormat Error message format string.
2739 * @param ... Error message arguments.
2740 */
2741 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2742
2743 /**
2744 * Set the VM error message
2745 *
2746 * @returns rc.
2747 * @param pDrvIns Driver instance.
2748 * @param rc VBox status code.
2749 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2750 * @param pszFormat Error message format string.
2751 * @param va Error message arguments.
2752 */
2753 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2754
2755 /**
2756 * Set the VM runtime error message
2757 *
2758 * @returns VBox status code.
2759 * @param pDevIns Device instance.
2760 * @param fFatal Whether it is a fatal error or not.
2761 * @param pszErrorID Error ID string.
2762 * @param pszFormat Error message format string.
2763 * @param ... Error message arguments.
2764 */
2765 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2766
2767 /**
2768 * Set the VM runtime error message
2769 *
2770 * @returns VBox status code.
2771 * @param pDevIns Device instance.
2772 * @param fFatal Whether it is a fatal error or not.
2773 * @param pszErrorID Error ID string.
2774 * @param pszFormat Error message format string.
2775 * @param va Error message arguments.
2776 */
2777 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2778
2779 /**
2780 * Set parameters for pending MMIO patch operation
2781 *
2782 * @returns VBox status code.
2783 * @param pDevIns Device instance.
2784 * @param GCPhys MMIO physical address
2785 * @param pCachedData GC pointer to cached data
2786 */
2787 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2788
2789 /** Just a safety precaution. */
2790 uint32_t u32TheEnd;
2791} PDMDEVHLPGC;
2792/** Pointer PDM Device GC API. */
2793typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
2794/** Pointer PDM Device GC API. */
2795typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
2796
2797/** Current PDMDEVHLP version number. */
2798#define PDM_DEVHLPGC_VERSION 0xfb010000
2799
2800
2801/**
2802 * PDM Device API - R0 Variant.
2803 */
2804typedef struct PDMDEVHLPR0
2805{
2806 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2807 uint32_t u32Version;
2808
2809 /**
2810 * Set the IRQ for a PCI device.
2811 *
2812 * @param pDevIns Device instance.
2813 * @param iIrq IRQ number to set.
2814 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2815 * @thread Any thread, but will involve the emulation thread.
2816 */
2817 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2818
2819 /**
2820 * Set ISA IRQ for a device.
2821 *
2822 * @param pDevIns Device instance.
2823 * @param iIrq IRQ number to set.
2824 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2825 * @thread Any thread, but will involve the emulation thread.
2826 */
2827 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2828
2829 /**
2830 * Read physical memory.
2831 *
2832 * @param pDevIns Device instance.
2833 * @param GCPhys Physical address start reading from.
2834 * @param pvBuf Where to put the read bits.
2835 * @param cbRead How many bytes to read.
2836 */
2837 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2838
2839 /**
2840 * Write to physical memory.
2841 *
2842 * @param pDevIns Device instance.
2843 * @param GCPhys Physical address to write to.
2844 * @param pvBuf What to write.
2845 * @param cbWrite How many bytes to write.
2846 */
2847 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2848
2849 /**
2850 * Checks if the Gate A20 is enabled or not.
2851 *
2852 * @returns true if A20 is enabled.
2853 * @returns false if A20 is disabled.
2854 * @param pDevIns Device instance.
2855 * @thread The emulation thread.
2856 */
2857 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2858
2859 /**
2860 * Set the VM error message
2861 *
2862 * @returns rc.
2863 * @param pDrvIns Driver instance.
2864 * @param rc VBox status code.
2865 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2866 * @param pszFormat Error message format string.
2867 * @param ... Error message arguments.
2868 */
2869 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2870
2871 /**
2872 * Set the VM error message
2873 *
2874 * @returns rc.
2875 * @param pDrvIns Driver instance.
2876 * @param rc VBox status code.
2877 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2878 * @param pszFormat Error message format string.
2879 * @param va Error message arguments.
2880 */
2881 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2882
2883 /**
2884 * Set the VM runtime error message
2885 *
2886 * @returns VBox status code.
2887 * @param pDevIns Device instance.
2888 * @param fFatal Whether it is a fatal error or not.
2889 * @param pszErrorID Error ID string.
2890 * @param pszFormat Error message format string.
2891 * @param ... Error message arguments.
2892 */
2893 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2894
2895 /**
2896 * Set the VM runtime error message
2897 *
2898 * @returns VBox status code.
2899 * @param pDevIns Device instance.
2900 * @param fFatal Whether it is a fatal error or not.
2901 * @param pszErrorID Error ID string.
2902 * @param pszFormat Error message format string.
2903 * @param va Error message arguments.
2904 */
2905 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2906
2907 /**
2908 * Set parameters for pending MMIO patch operation
2909 *
2910 * @returns rc.
2911 * @param pDevIns Device instance.
2912 * @param GCPhys MMIO physical address
2913 * @param pCachedData GC pointer to cached data
2914 */
2915 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2916
2917 /** Just a safety precaution. */
2918 uint32_t u32TheEnd;
2919} PDMDEVHLPR0;
2920/** Pointer PDM Device R0 API. */
2921typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2922/** Pointer PDM Device GC API. */
2923typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2924
2925/** Current PDMDEVHLP version number. */
2926#define PDM_DEVHLPR0_VERSION 0xfb010000
2927
2928
2929
2930/**
2931 * PDM Device Instance.
2932 */
2933typedef struct PDMDEVINS
2934{
2935 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2936 uint32_t u32Version;
2937 /** Device instance number. */
2938 RTUINT iInstance;
2939 /** The base interface of the device.
2940 * The device constructor initializes this if it has any
2941 * device level interfaces to export. To obtain this interface
2942 * call PDMR3QueryDevice(). */
2943 PDMIBASE IBase;
2944
2945 /** Internal data. */
2946 union
2947 {
2948#ifdef PDMDEVINSINT_DECLARED
2949 PDMDEVINSINT s;
2950#endif
2951 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];
2952 } Internal;
2953
2954 /** Pointer the HC PDM Device API. */
2955 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;
2956 /** Pointer the R0 PDM Device API. */
2957 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
2958 /** Pointer to device registration structure. */
2959 R3PTRTYPE(PCPDMDEVREG) pDevReg;
2960 /** Configuration handle. */
2961 R3PTRTYPE(PCFGMNODE) pCfgHandle;
2962 /** Pointer to device instance data. */
2963 R3PTRTYPE(void *) pvInstanceDataR3;
2964 /** Pointer to device instance data. */
2965 R0PTRTYPE(void *) pvInstanceDataR0;
2966 /** Pointer the GC PDM Device API. */
2967 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
2968 /** Pointer to device instance data. */
2969 GCPTRTYPE(void *) pvInstanceDataGC;
2970 /* padding to make achInstanceData aligned at 32 byte boundrary. */
2971 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
2972 /** Device instance data. The size of this area is defined
2973 * in the PDMDEVREG::cbInstanceData field. */
2974 char achInstanceData[8];
2975} PDMDEVINS;
2976
2977/** Current DEVREG version number. */
2978#define PDM_DEVINS_VERSION 0xf3010000
2979
2980/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
2981#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
2982
2983
2984/** @def PDMDEV_ASSERT_EMT
2985 * Assert that the current thread is the emulation thread.
2986 */
2987#ifdef VBOX_STRICT
2988# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2989#else
2990# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
2991#endif
2992
2993/** @def PDMDEV_ASSERT_OTHER
2994 * Assert that the current thread is NOT the emulation thread.
2995 */
2996#ifdef VBOX_STRICT
2997# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
2998#else
2999# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3000#endif
3001
3002/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3003 * Assert that the current thread is owner of the VM lock.
3004 */
3005#ifdef VBOX_STRICT
3006# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3007#else
3008# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3009#endif
3010
3011/** @def PDMDEV_SET_ERROR
3012 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3013 */
3014#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3015 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3016
3017/** @def PDMDEV_SET_RUNTIME_ERROR
3018 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3019 */
3020#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3021 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3022
3023/** @def PDMDEVINS_2_GCPTR
3024 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.
3025 */
3026#define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3027
3028/** @def PDMDEVINS_2_R3PTR
3029 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.
3030 */
3031#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3032
3033/** @def PDMDEVINS_2_R0PTR
3034 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3035 */
3036#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3037
3038
3039/**
3040 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3041 *
3042 * @returns VBox status code which must be passed up to the VMM.
3043 * @param pDevIns Device instance.
3044 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3045 * @param pszFormat Message. (optional)
3046 * @param ... Message parameters.
3047 */
3048DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3049{
3050#ifdef VBOX_STRICT
3051# ifdef IN_RING3
3052 int rc;
3053 va_list args;
3054 va_start(args, pszFormat);
3055 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3056 va_end(args);
3057 return rc;
3058# else
3059 return VINF_EM_DBG_STOP;
3060# endif
3061#else
3062 return VINF_SUCCESS;
3063#endif
3064}
3065
3066
3067#ifdef IN_RING3
3068/**
3069 * @copydoc PDMDEVHLP::pfnIOPortRegister
3070 */
3071DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3072 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3073 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3074{
3075 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3076}
3077
3078/**
3079 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
3080 */
3081DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
3082 const char *pszOut, const char *pszIn, const char *pszOutStr,
3083 const char *pszInStr, const char *pszDesc)
3084{
3085 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3086}
3087
3088/**
3089 * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
3090 */
3091DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3092 const char *pszOut, const char *pszIn, const char *pszOutStr,
3093 const char *pszInStr, const char *pszDesc)
3094{
3095 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3096}
3097
3098/**
3099 * @copydoc PDMDEVHLP::pfnMMIORegister
3100 */
3101DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3102 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3103 const char *pszDesc)
3104{
3105 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3106}
3107
3108/**
3109 * @copydoc PDMDEVHLP::pfnMMIORegisterGC
3110 */
3111DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3112 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
3113{
3114 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
3115}
3116
3117/**
3118 * @copydoc PDMDEVHLP::pfnMMIORegisterR0
3119 */
3120DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3121 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)
3122{
3123 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);
3124}
3125
3126/**
3127 * @copydoc PDMDEVHLP::pfnROMRegister
3128 */
3129DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3130{
3131 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3132}
3133/**
3134 * @copydoc PDMDEVHLP::pfnROMProtectShadow
3135 */
3136DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3137{
3138 return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3139}
3140
3141/**
3142 * @copydoc PDMDEVHLP::pfnMMIO2Register
3143 */
3144DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, void **ppv, const char *pszDesc)
3145{
3146 return pDevIns->pDevHlp->pfnMMIO2Register(pDevIns, iRegion, cb, ppv, pszDesc);
3147}
3148
3149/**
3150 * @copydoc PDMDEVHLP::pfnMMIO2Deregister
3151 */
3152DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3153{
3154 return pDevIns->pDevHlp->pfnMMIO2Deregister(pDevIns, iRegion);
3155}
3156
3157/**
3158 * @copydoc PDMDEVHLP::pfnMMIO2Map
3159 */
3160DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3161{
3162 return pDevIns->pDevHlp->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3163}
3164
3165/**
3166 * @copydoc PDMDEVHLP::pfnMMIO2Unmap
3167 */
3168DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3169{
3170 return pDevIns->pDevHlp->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3171}
3172
3173/**
3174 * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
3175 */
3176DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3177 const char *pszDesc, PRTGCPTR pGCPtr)
3178{
3179 return pDevIns->pDevHlp->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pGCPtr);
3180}
3181
3182/**
3183 * @copydoc PDMDEVHLP::pfnSSMRegister
3184 */
3185DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3186 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3187 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3188{
3189 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3190 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3191 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3192}
3193
3194/**
3195 * @copydoc PDMDEVHLP::pfnTMTimerCreate
3196 */
3197DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3198{
3199 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3200}
3201
3202/**
3203 * @copydoc PDMDEVHLP::pfnPCIRegister
3204 */
3205DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3206{
3207 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
3208}
3209
3210/**
3211 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
3212 */
3213DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3214{
3215 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3216}
3217
3218/**
3219 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
3220 */
3221DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3222 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3223{
3224 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3225}
3226
3227/**
3228 * @copydoc PDMDEVHLP::pfnDriverAttach
3229 */
3230DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3231{
3232 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3233}
3234
3235/**
3236 * @copydoc PDMDEVHLP::pfnMMHeapAlloc
3237 */
3238DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3239{
3240 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
3241}
3242
3243/**
3244 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
3245 */
3246DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3247{
3248 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
3249}
3250
3251/**
3252 * @copydoc PDMDEVHLP::pfnMMHeapFree
3253 */
3254DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3255{
3256 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
3257}
3258
3259/**
3260 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
3261 */
3262DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3263{
3264 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3265}
3266
3267/**
3268 * @copydoc PDMDEVHLP::pfnSTAMRegister
3269 */
3270DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3271{
3272 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3273}
3274
3275/**
3276 * @copydoc PDMDEVHLP::pfnSTAMRegisterF
3277 */
3278DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3279 const char *pszDesc, const char *pszName, ...)
3280{
3281 va_list va;
3282 va_start(va, pszName);
3283 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3284 va_end(va);
3285}
3286
3287/**
3288 * @copydoc PDMDEVHLP::pfnPDMQueueCreate
3289 */
3290DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3291 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3292{
3293 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3294}
3295
3296/**
3297 * @copydoc PDMDEVHLP::pfnCritSectInit
3298 */
3299DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3300{
3301 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
3302}
3303
3304/**
3305 * @copydoc PDMDEVHLP::pfnUTCNow
3306 */
3307DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3308{
3309 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
3310}
3311
3312/**
3313 * @copydoc PDMDEVHLP::pfnGetVM
3314 */
3315DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3316{
3317 return pDevIns->pDevHlp->pfnGetVM(pDevIns);
3318}
3319
3320/**
3321 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
3322 */
3323DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3324{
3325 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3326}
3327
3328/**
3329 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
3330 */
3331DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3332{
3333 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3334}
3335
3336/**
3337 * @copydoc PDMDEVHLP::pfnPhysReserve
3338 */
3339DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3340{
3341 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3342}
3343
3344/**
3345 * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
3346 */
3347DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3348{
3349 return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3350}
3351
3352/**
3353 * @copydoc PDMDEVHLP::pfnA20Set
3354 */
3355DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3356{
3357 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
3358}
3359
3360/**
3361 * @copydoc PDMDEVHLP::pfnVMReset
3362 */
3363DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3364{
3365 return pDevIns->pDevHlp->pfnVMReset(pDevIns);
3366}
3367
3368/**
3369 * @copydoc PDMDEVHLP::pfnVMSuspend
3370 */
3371DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3372{
3373 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
3374}
3375
3376/**
3377 * @copydoc PDMDEVHLP::pfnVMPowerOff
3378 */
3379DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3380{
3381 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
3382}
3383
3384/**
3385 * @copydoc PDMDEVHLP::pfnDMARegister
3386 */
3387DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3388{
3389 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3390}
3391
3392/**
3393 * @copydoc PDMDEVHLP::pfnDMAReadMemory
3394 */
3395DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3396{
3397 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3398}
3399
3400/**
3401 * @copydoc PDMDEVHLP::pfnDMAWriteMemory
3402 */
3403DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3404{
3405 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3406}
3407
3408/**
3409 * @copydoc PDMDEVHLP::pfnDMASetDREQ
3410 */
3411DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3412{
3413 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3414}
3415
3416/**
3417 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
3418 */
3419DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3420{
3421 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
3422}
3423
3424/**
3425 * @copydoc PDMDEVHLP::pfnDMASchedule
3426 */
3427DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3428{
3429 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
3430}
3431
3432/**
3433 * @copydoc PDMDEVHLP::pfnCMOSWrite
3434 */
3435DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3436{
3437 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
3438}
3439
3440/**
3441 * @copydoc PDMDEVHLP::pfnCMOSRead
3442 */
3443DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3444{
3445 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
3446}
3447
3448/**
3449 * @copydoc PDMDEVHLP::pfnGetCpuId
3450 */
3451DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3452{
3453 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3454}
3455
3456/**
3457 * @copydoc PDMDEVHLP::pfnPDMThreadCreate
3458 */
3459DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3460 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3461{
3462 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3463}
3464#endif /* IN_RING3 */
3465
3466
3467/**
3468 * @copydoc PDMDEVHLP::pfnPCISetIrq
3469 */
3470DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3471{
3472#ifdef IN_GC
3473 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3474#elif defined(IN_RING0)
3475 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3476#else
3477 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3478#endif
3479}
3480
3481/**
3482 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
3483 */
3484DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3485{
3486#ifdef IN_GC
3487 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3488#elif defined(IN_RING0)
3489 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3490#else
3491 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
3492#endif
3493}
3494
3495/**
3496 * @copydoc PDMDEVHLP::pfnISASetIrq
3497 */
3498DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3499{
3500#ifdef IN_GC
3501 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3502#elif defined(IN_RING0)
3503 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3504#else
3505 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
3506#endif
3507}
3508
3509/**
3510 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
3511 */
3512DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3513{
3514#ifdef IN_GC
3515 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
3516#elif defined(IN_RING0)
3517 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
3518#else
3519 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
3520#endif
3521}
3522
3523/**
3524 * @copydoc PDMDEVHLP::pfnPhysRead
3525 */
3526DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3527{
3528#ifdef IN_GC
3529 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3530#elif defined(IN_RING0)
3531 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3532#else
3533 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3534#endif
3535}
3536
3537/**
3538 * @copydoc PDMDEVHLP::pfnPhysWrite
3539 */
3540DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3541{
3542#ifdef IN_GC
3543 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3544#elif defined(IN_RING0)
3545 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3546#else
3547 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3548#endif
3549}
3550
3551/**
3552 * @copydoc PDMDEVHLP::pfnA20IsEnabled
3553 */
3554DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3555{
3556#ifdef IN_GC
3557 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
3558#elif defined(IN_RING0)
3559 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
3560#else
3561 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
3562#endif
3563}
3564
3565/**
3566 * @copydoc PDMDEVHLP::pfnVMSetError
3567 */
3568DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3569{
3570 va_list va;
3571 va_start(va, pszFormat);
3572#ifdef IN_GC
3573 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3574#elif defined(IN_RING0)
3575 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3576#else
3577 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3578#endif
3579 va_end(va);
3580 return rc;
3581}
3582
3583/**
3584 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
3585 */
3586DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3587{
3588 va_list va;
3589 int rc;
3590 va_start(va, pszFormat);
3591#ifdef IN_GC
3592 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3593#elif defined(IN_RING0)
3594 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3595#else
3596 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3597#endif
3598 va_end(va);
3599 return rc;
3600}
3601
3602
3603
3604/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3605typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3606
3607/**
3608 * Callbacks for VBoxDeviceRegister().
3609 */
3610typedef struct PDMDEVREGCB
3611{
3612 /** Interface version.
3613 * This is set to PDM_DEVREG_CB_VERSION. */
3614 uint32_t u32Version;
3615
3616 /**
3617 * Registers a device with the current VM instance.
3618 *
3619 * @returns VBox status code.
3620 * @param pCallbacks Pointer to the callback table.
3621 * @param pDevReg Pointer to the device registration record.
3622 * This data must be permanent and readonly.
3623 */
3624 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3625
3626 /**
3627 * Allocate memory which is associated with current VM instance
3628 * and automatically freed on it's destruction.
3629 *
3630 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3631 * @param pCallbacks Pointer to the callback table.
3632 * @param cb Number of bytes to allocate.
3633 */
3634 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3635} PDMDEVREGCB;
3636
3637/** Current version of the PDMDEVREGCB structure. */
3638#define PDM_DEVREG_CB_VERSION 0xf4010000
3639
3640
3641/**
3642 * The VBoxDevicesRegister callback function.
3643 *
3644 * PDM will invoke this function after loading a device module and letting
3645 * the module decide which devices to register and how to handle conflicts.
3646 *
3647 * @returns VBox status code.
3648 * @param pCallbacks Pointer to the callback table.
3649 * @param u32Version VBox version number.
3650 */
3651typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3652
3653/** @} */
3654
3655__END_DECLS
3656
3657#endif
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