VirtualBox

source: vbox/trunk/include/VBox/pgm.h@ 12407

Last change on this file since 12407 was 12407, checked in by vboxsync, 17 years ago

Refined the PGM pool flush check. No need to flush when switching between real & protected mode.

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File size: 26.3 KB
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1/** @file
2 * PGM - Page Monitor/Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pgm_h
31#define ___VBox_pgm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/sup.h>
36#include <VBox/vmapi.h>
37#include <VBox/x86.h>
38
39__BEGIN_DECLS
40
41/** @defgroup grp_pgm The Page Monitor/Manager API
42 * @{
43 */
44
45/** Chunk size for dynamically allocated physical memory. */
46#define PGM_DYNAMIC_CHUNK_SIZE (1*1024*1024)
47/** Shift GC physical address by 20 bits to get the offset into the pvHCChunkHC array. */
48#define PGM_DYNAMIC_CHUNK_SHIFT 20
49/** Dynamic chunk offset mask. */
50#define PGM_DYNAMIC_CHUNK_OFFSET_MASK 0xfffff
51/** Dynamic chunk base mask. */
52#define PGM_DYNAMIC_CHUNK_BASE_MASK (~(RTGCPHYS)PGM_DYNAMIC_CHUNK_OFFSET_MASK)
53
54
55/**
56 * FNPGMRELOCATE callback mode.
57 */
58typedef enum PGMRELOCATECALL
59{
60 /** The callback is for checking if the suggested address is suitable. */
61 PGMRELOCATECALL_SUGGEST = 1,
62 /** The callback is for executing the relocation. */
63 PGMRELOCATECALL_RELOCATE
64} PGMRELOCATECALL;
65
66
67/**
68 * Callback function which will be called when PGM is trying to find
69 * a new location for the mapping.
70 *
71 * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
72 * In 1) the callback should say if it objects to a suggested new location. If it
73 * accepts the new location, it is called again for doing it's relocation.
74 *
75 *
76 * @returns true if the location is ok.
77 * @returns false if another location should be found.
78 * @param GCPtrOld The old virtual address.
79 * @param GCPtrNew The new virtual address.
80 * @param enmMode Used to indicate the callback mode.
81 * @param pvUser User argument.
82 * @remark The return value is no a failure indicator, it's an acceptance
83 * indicator. Relocation can not fail!
84 */
85typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
86/** Pointer to a relocation callback function. */
87typedef FNPGMRELOCATE *PFNPGMRELOCATE;
88
89
90/**
91 * Physical page access handler type.
92 */
93typedef enum PGMPHYSHANDLERTYPE
94{
95 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
96 PGMPHYSHANDLERTYPE_MMIO = 1,
97 /** Handler all write access to a physical page range. */
98 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
99 /** Handler all access to a physical page range. */
100 PGMPHYSHANDLERTYPE_PHYSICAL_ALL
101
102} PGMPHYSHANDLERTYPE;
103
104/**
105 * \#PF Handler callback for physical access handler ranges (MMIO among others) in GC.
106 *
107 * @returns VBox status code (appropriate for GC return).
108 * @param pVM VM Handle.
109 * @param uErrorCode CPU Error code.
110 * @param pRegFrame Trap register frame.
111 * NULL on DMA and other non CPU access.
112 * @param pvFault The fault address (cr2).
113 * @param GCPhysFault The GC physical address corresponding to pvFault.
114 * @param pvUser User argument.
115 */
116typedef DECLCALLBACK(int) FNPGMGCPHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
117/** Pointer to PGM access callback. */
118typedef FNPGMGCPHYSHANDLER *PFNPGMGCPHYSHANDLER;
119
120/**
121 * \#PF Handler callback for physical access handler ranges (MMIO among others) in R0.
122 *
123 * @returns VBox status code (appropriate for GC return).
124 * @param pVM VM Handle.
125 * @param uErrorCode CPU Error code.
126 * @param pRegFrame Trap register frame.
127 * NULL on DMA and other non CPU access.
128 * @param pvFault The fault address (cr2).
129 * @param GCPhysFault The GC physical address corresponding to pvFault.
130 * @param pvUser User argument.
131 */
132typedef DECLCALLBACK(int) FNPGMR0PHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
133/** Pointer to PGM access callback. */
134typedef FNPGMR0PHYSHANDLER *PFNPGMR0PHYSHANDLER;
135
136/**
137 * Guest Access type
138 */
139typedef enum PGMACCESSTYPE
140{
141 /** Read access. */
142 PGMACCESSTYPE_READ = 1,
143 /** Write access. */
144 PGMACCESSTYPE_WRITE
145} PGMACCESSTYPE;
146
147/**
148 * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
149 *
150 * The handler can not raise any faults, it's mainly for monitoring write access
151 * to certain pages.
152 *
153 * @returns VINF_SUCCESS if the handler have carried out the operation.
154 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
155 * @param pVM VM Handle.
156 * @param GCPhys The physical address the guest is writing to.
157 * @param pvPhys The HC mapping of that address.
158 * @param pvBuf What the guest is reading/writing.
159 * @param cbBuf How much it's reading/writing.
160 * @param enmAccessType The access type.
161 * @param pvUser User argument.
162 */
163typedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
164/** Pointer to PGM access callback. */
165typedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
166
167
168/**
169 * Virtual access handler type.
170 */
171typedef enum PGMVIRTHANDLERTYPE
172{
173 /** Write access handled. */
174 PGMVIRTHANDLERTYPE_WRITE = 1,
175 /** All access handled. */
176 PGMVIRTHANDLERTYPE_ALL,
177 /** Hypervisor write access handled.
178 * This is used to catch the guest trying to write to LDT, TSS and any other
179 * system structure which the brain dead intel guys let unprivilegde code find. */
180 PGMVIRTHANDLERTYPE_HYPERVISOR
181} PGMVIRTHANDLERTYPE;
182
183/**
184 * \#PF Handler callback for virtual access handler ranges.
185 *
186 * Important to realize that a physical page in a range can have aliases, and
187 * for ALL and WRITE handlers these will also trigger.
188 *
189 * @returns VBox status code (appropriate for GC return).
190 * @param pVM VM Handle.
191 * @param uErrorCode CPU Error code.
192 * @param pRegFrame Trap register frame.
193 * @param pvFault The fault address (cr2).
194 * @param pvRange The base address of the handled virtual range.
195 * @param offRange The offset of the access into this range.
196 * (If it's a EIP range this's the EIP, if not it's pvFault.)
197 */
198typedef DECLCALLBACK(int) FNPGMGCVIRTHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
199/** Pointer to PGM access callback. */
200typedef FNPGMGCVIRTHANDLER *PFNPGMGCVIRTHANDLER;
201
202/**
203 * \#PF Handler callback for virtual access handler ranges.
204 *
205 * Important to realize that a physical page in a range can have aliases, and
206 * for ALL and WRITE handlers these will also trigger.
207 *
208 * @returns VINF_SUCCESS if the handler have carried out the operation.
209 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
210 * @param pVM VM Handle.
211 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
212 * @param pvPtr The HC mapping of that address.
213 * @param pvBuf What the guest is reading/writing.
214 * @param cbBuf How much it's reading/writing.
215 * @param enmAccessType The access type.
216 * @param pvUser User argument.
217 */
218typedef DECLCALLBACK(int) FNPGMHCVIRTHANDLER(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
219/** Pointer to PGM access callback. */
220typedef FNPGMHCVIRTHANDLER *PFNPGMHCVIRTHANDLER;
221
222
223/**
224 * \#PF Handler callback for invalidation of virtual access handler ranges.
225 *
226 * @param pVM VM Handle.
227 * @param GCPtr The virtual address the guest has changed.
228 */
229typedef DECLCALLBACK(int) FNPGMHCVIRTINVALIDATE(PVM pVM, RTGCPTR GCPtr);
230/** Pointer to PGM invalidation callback. */
231typedef FNPGMHCVIRTINVALIDATE *PFNPGMHCVIRTINVALIDATE;
232
233/**
234 * Paging mode.
235 */
236typedef enum PGMMODE
237{
238 /** The usual invalid value. */
239 PGMMODE_INVALID = 0,
240 /** Real mode. */
241 PGMMODE_REAL,
242 /** Protected mode, no paging. */
243 PGMMODE_PROTECTED,
244 /** 32-bit paging. */
245 PGMMODE_32_BIT,
246 /** PAE paging. */
247 PGMMODE_PAE,
248 /** PAE paging with NX enabled. */
249 PGMMODE_PAE_NX,
250 /** 64-bit AMD paging (long mode). */
251 PGMMODE_AMD64,
252 /** 64-bit AMD paging (long mode) with NX enabled. */
253 PGMMODE_AMD64_NX,
254 /** Nested paging mode (shadow only; guest physical to host physical). */
255 PGMMODE_NESTED,
256 /** Extended paging (Intel) mode. */
257 PGMMODE_EPT,
258 /** The max number of modes */
259 PGMMODE_MAX,
260 /** 32bit hackishness. */
261 PGMMODE_32BIT_HACK = 0x7fffffff
262} PGMMODE;
263
264/** Macro for checking if the guest is using paging.
265 * @param uType PGMMODE_*
266 * @remark ASSUMES certain order of the PGMMODE_* values.
267 */
268#define PGMMODE_WITH_PAGING(enmMode) (enmMode >= PGMMODE_32_BIT)
269
270/**
271 * The current ROM page protection.
272 */
273typedef enum PGMROMPROT
274{
275 /** The customary invalid value. */
276 PGMROMPROT_INVALID = 0,
277 /** Read from the virgin ROM page, ignore writes.
278 * Map the virgin page, use write access handler to ignore writes. */
279 PGMROMPROT_READ_ROM_WRITE_IGNORE,
280 /** Read from the virgin ROM page, write to the shadow RAM.
281 * Map the virgin page, use write access handler change the RAM. */
282 PGMROMPROT_READ_ROM_WRITE_RAM,
283 /** Read from the shadow ROM page, ignore writes.
284 * Map the shadow page read-only, use write access handler to ignore writes. */
285 PGMROMPROT_READ_RAM_WRITE_IGNORE,
286 /** Read from the shadow ROM page, ignore writes.
287 * Map the shadow page read-write, disabled write access handler. */
288 PGMROMPROT_READ_RAM_WRITE_RAM,
289 /** The end of valid values. */
290 PGMROMPROT_END,
291 /** The usual 32-bit type size hack. */
292 PGMROMPROT_32BIT_HACK = 0x7fffffff
293} PGMROMPROT;
294
295/**
296 * Is the ROM mapped (true) or is the shadow RAM mapped (false).
297 *
298 * @returns boolean.
299 * @param enmProt The PGMROMPROT value, must be valid.
300 */
301#define PGMROMPROT_IS_ROM(enmProt) \
302 ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
303 || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
304
305
306PGMDECL(RTHCPHYS) PGMGetHyperCR3(PVM pVM);
307PGMDECL(RTHCPHYS) PGMGetNestedCR3(PVM pVM, PGMMODE enmShadowMode);
308PGMDECL(RTHCPHYS) PGMGetHyper32BitCR3(PVM pVM);
309PGMDECL(RTHCPHYS) PGMGetHyperPaeCR3(PVM pVM);
310PGMDECL(RTHCPHYS) PGMGetHyperAmd64CR3(PVM pVM);
311PGMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM);
312PGMDECL(RTHCPHYS) PGMGetInterGCCR3(PVM pVM);
313PGMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM);
314PGMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM);
315PGMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM);
316PGMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
317PGMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage);
318PGMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
319PGMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
320PGMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
321PGMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
322PGMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
323PGMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
324PGMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
325PGMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
326PGMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
327PGMDECL(int) PGMShwSyncLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD);
328PGMDECL(int) PGMShwGetLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD);
329PGMDECL(int) PGMShwSyncPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD);
330PGMDECL(int) PGMShwGetPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD);
331PGMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
332PGMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr);
333PGMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
334PGMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
335PGMDECL(int) PGMFlushTLB(PVM pVM, uint64_t cr3, bool fGlobal);
336PGMDECL(int) PGMUpdateCR3(PVM pVM, uint64_t cr3);
337PGMDECL(int) PGMSyncCR3(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
338PGMDECL(int) PGMChangeMode(PVM pVM, uint64_t cr0, uint64_t cr4, uint64_t efer);
339PGMDECL(PGMMODE) PGMGetGuestMode(PVM pVM);
340PGMDECL(PGMMODE) PGMGetShadowMode(PVM pVM);
341PGMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
342PGMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
343PGMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
344 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
345 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
346 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC,
347 R3PTRTYPE(const char *) pszDesc);
348PGMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
349PGMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
350PGMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
351 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
352 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
353 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC,
354 R3PTRTYPE(const char *) pszDesc);
355PGMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
356PGMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
357PGMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
358PGMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
359PGMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
360PGMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
361PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM);
362PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
363PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
364PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
365PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
366PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
367PDMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM);
368PDMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM);
369PDMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM);
370
371/**
372 * Page mapping lock.
373 *
374 * @remarks This doesn't work in structures shared between
375 * ring-3, ring-0 and/or GC.
376 */
377typedef struct PGMPAGEMAPLOCK
378{
379 /** @todo see PGMPhysIsPageMappingLockValid for possibly incorrect assumptions */
380#ifdef IN_GC
381 /** Just a dummy for the time being. */
382 uint32_t u32Dummy;
383#else
384 /** Pointer to the PGMPAGE. */
385 void *pvPage;
386 /** Pointer to the PGMCHUNKR3MAP. */
387 void *pvMap;
388#endif
389} PGMPAGEMAPLOCK;
390/** Pointer to a page mapping lock. */
391typedef PGMPAGEMAPLOCK *PPGMPAGEMAPLOCK;
392
393PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
394PGMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
395PGMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
396PGMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
397PGMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
398
399/**
400 * Checks if the lock structure is valid
401 *
402 * @param pVM The VM handle.
403 * @param pLock The lock structure initialized by the mapping function.
404 */
405DECLINLINE(bool) PGMPhysIsPageMappingLockValid(PVM pVM, PPGMPAGEMAPLOCK pLock)
406{
407 /** @todo -> complete/change this */
408#ifdef IN_GC
409 return !!(pLock->u32Dummy);
410#else
411 return !!(pLock->pvPage);
412#endif
413}
414
415PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr);
416PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
417PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr);
418PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
419PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
420#ifndef IN_GC /* Only ring 0 & 3. */
421PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
422PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
423PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
424PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
425PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
426PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
427PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
428PGMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
429#endif /* !IN_GC */
430PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb);
431#ifdef VBOX_STRICT
432PGMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
433PGMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
434PGMDECL(unsigned) PGMAssertCR3(PVM pVM, uint64_t cr3, uint64_t cr4);
435#endif /* VBOX_STRICT */
436
437
438#ifdef IN_GC
439/** @defgroup grp_pgm_gc The PGM Guest Context API
440 * @ingroup grp_pgm
441 * @{
442 */
443PGMGCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
444PGMGCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv);
445PGMGCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
446PGMGCDECL(int) PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
447/** @} */
448#endif /* IN_GC */
449
450
451#ifdef IN_RING0
452/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
453 * @ingroup grp_pgm
454 * @{
455 */
456PGMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM);
457PGMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
458/** @} */
459#endif /* IN_RING0 */
460
461
462
463#ifdef IN_RING3
464/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
465 * @ingroup grp_pgm
466 * @{
467 */
468PGMR3DECL(int) PGMR3Init(PVM pVM);
469PGMR3DECL(int) PGMR3InitDynMap(PVM pVM);
470PGMR3DECL(int) PGMR3InitFinalize(PVM pVM);
471PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
472PGMR3DECL(void) PGMR3Reset(PVM pVM);
473PGMR3DECL(int) PGMR3Term(PVM pVM);
474PDMR3DECL(int) PGMR3LockCall(PVM pVM);
475PGMR3DECL(int) PGMR3ChangeShwPDMappings(PVM pVM, bool fEnable);
476PGMR3DECL(int) PGMR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
477
478#ifndef VBOX_WITH_NEW_PHYS_CODE
479PGMR3DECL(int) PGM3PhysGrowRange(PVM pVM, PCRTGCPHYS GCPhys);
480#endif /* !VBOX_WITH_NEW_PHYS_CODE */
481PGMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
482PDMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb,
483 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
484 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
485 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,
486 R3PTRTYPE(const char *) pszDesc);
487PDMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
488PDMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc);
489PDMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
490PDMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
491PDMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
492PDMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
493PDMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
494
495/** @group PGMR3PhysRegisterRom flags.
496 * @{ */
497/** Inidicates that ROM shadowing should be enabled. */
498#define PGMPHYS_ROM_FLAG_SHADOWED RT_BIT_32(0)
499/** Indicates that what pvBinary points to won't go away
500 * and can be used for strictness checks. */
501#define PGMPHYS_ROM_FLAG_PERMANENT_BINARY RT_BIT_32(1)
502/** @} */
503
504PGMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
505 const void *pvBinary, uint32_t fFlags, const char *pszDesc);
506PGMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
507PGMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
508#ifndef VBOX_WITH_NEW_PHYS_CODE
509PGMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
510#endif /* !VBOX_WITH_NEW_PHYS_CODE */
511PGMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask);
512PGMDECL(void) PGMR3PhysSetA20(PVM pVM, bool fEnable);
513PGMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
514PGMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
515PGMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
516PGMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
517PGMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
518PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
519PGMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint64_t cr3, bool fRawR0);
520PGMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
521PGMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
522 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3,
523 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0,
524 const char *pszModGC, const char *pszHandlerGC, RTGCPTR pvUserGC, const char *pszDesc);
525PGMDECL(int) PGMHandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
526 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
527 PFNPGMHCVIRTHANDLER pfnHandlerHC, RTGCPTR pfnHandlerGC,
528 R3PTRTYPE(const char *) pszDesc);
529PGMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
530 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
531 PFNPGMHCVIRTHANDLER pfnHandlerHC,
532 const char *pszHandlerGC, const char *pszModGC, const char *pszDesc);
533PGMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, PFNPGMHCVIRTINVALIDATE pfnInvalidateHC);
534PGMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr);
535PDMR3DECL(int) PGMR3PoolGrow(PVM pVM);
536#ifdef ___VBox_dbgf_h /** @todo fix this! */
537PGMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp);
538#endif
539PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPHYS PhysSearch);
540
541PGMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys);
542PGMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys);
543PGMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys);
544PGMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys);
545PGMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value);
546PGMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value);
547PGMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value);
548PGMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value);
549PDMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
550PGMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
551PDMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
552
553PDMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
554
555PGMR3DECL(int) PGMR3DbgHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys);
556PGMR3DECL(int) PGMR3DbgHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys);
557PGMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
558PDMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
559PDMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, RTGCUINTPTR GCPtr, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
560/** @} */
561#endif /* IN_RING3 */
562
563__END_DECLS
564
565/** @} */
566#endif
567
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