VirtualBox

source: vbox/trunk/include/VBox/pgm.h@ 6836

Last change on this file since 6836 was 6821, checked in by vboxsync, 17 years ago

Removed duplicate documentation (functions are documented where they are implemented from now on - unless there are more than one implementation (IPRT)).
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  • Property svn:keywords set to Author Date Id Revision
File size: 22.7 KB
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1/** @file
2 * PGM - Page Monitor/Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pgm_h
27#define ___VBox_pgm_h
28
29#include <VBox/cdefs.h>
30#include <VBox/types.h>
31#include <VBox/sup.h>
32#include <VBox/cpum.h>
33#include <VBox/vmapi.h>
34
35__BEGIN_DECLS
36
37/** @defgroup grp_pgm The Page Monitor/Manager API
38 * @{
39 */
40
41/** Chunk size for dynamically allocated physical memory. */
42#define PGM_DYNAMIC_CHUNK_SIZE (1*1024*1024)
43/** Shift GC physical address by 20 bits to get the offset into the pvHCChunkHC array. */
44#define PGM_DYNAMIC_CHUNK_SHIFT 20
45/** Dynamic chunk offset mask. */
46#define PGM_DYNAMIC_CHUNK_OFFSET_MASK 0xfffff
47/** Dynamic chunk base mask. */
48#define PGM_DYNAMIC_CHUNK_BASE_MASK (~(RTGCPHYS)PGM_DYNAMIC_CHUNK_OFFSET_MASK)
49
50
51/** Page flags used for PGMHyperSetPageFlags
52 * @deprecated
53 * @{ */
54#define PGMPAGE_READ 1
55#define PGMPAGE_WRITE 2
56#define PGMPAGE_USER 4
57#define PGMPAGE_SYSTEM 8
58#define PGMPAGE_NOTPRESENT 16
59/** @} */
60
61
62/**
63 * FNPGMRELOCATE callback mode.
64 */
65typedef enum PGMRELOCATECALL
66{
67 /** The callback is for checking if the suggested address is suitable. */
68 PGMRELOCATECALL_SUGGEST = 1,
69 /** The callback is for executing the relocation. */
70 PGMRELOCATECALL_RELOCATE
71} PGMRELOCATECALL;
72
73
74/**
75 * Callback function which will be called when PGM is trying to find
76 * a new location for the mapping.
77 *
78 * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
79 * In 1) the callback should say if it objects to a suggested new location. If it
80 * accepts the new location, it is called again for doing it's relocation.
81 *
82 *
83 * @returns true if the location is ok.
84 * @returns false if another location should be found.
85 * @param GCPtrOld The old virtual address.
86 * @param GCPtrNew The new virtual address.
87 * @param enmMode Used to indicate the callback mode.
88 * @param pvUser User argument.
89 * @remark The return value is no a failure indicator, it's an acceptance
90 * indicator. Relocation can not fail!
91 */
92typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
93/** Pointer to a relocation callback function. */
94typedef FNPGMRELOCATE *PFNPGMRELOCATE;
95
96
97/**
98 * Physical page access handler type.
99 */
100typedef enum PGMPHYSHANDLERTYPE
101{
102 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
103 PGMPHYSHANDLERTYPE_MMIO = 1,
104 /** Handle all normal page faults for a physical page range. */
105 PGMPHYSHANDLERTYPE_PHYSICAL,
106 /** Handler all write access to a physical page range. */
107 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
108 /** Handler all access to a physical page range. */
109 PGMPHYSHANDLERTYPE_PHYSICAL_ALL
110
111} PGMPHYSHANDLERTYPE;
112
113/**
114 * \#PF Handler callback for physical access handler ranges (MMIO among others) in GC.
115 *
116 * @returns VBox status code (appropriate for GC return).
117 * @param pVM VM Handle.
118 * @param uErrorCode CPU Error code.
119 * @param pRegFrame Trap register frame.
120 * NULL on DMA and other non CPU access.
121 * @param pvFault The fault address (cr2).
122 * @param GCPhysFault The GC physical address corresponding to pvFault.
123 * @param pvUser User argument.
124 */
125typedef DECLCALLBACK(int) FNPGMGCPHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
126/** Pointer to PGM access callback. */
127typedef FNPGMGCPHYSHANDLER *PFNPGMGCPHYSHANDLER;
128
129/**
130 * \#PF Handler callback for physical access handler ranges (MMIO among others) in R0.
131 *
132 * @returns VBox status code (appropriate for GC return).
133 * @param pVM VM Handle.
134 * @param uErrorCode CPU Error code.
135 * @param pRegFrame Trap register frame.
136 * NULL on DMA and other non CPU access.
137 * @param pvFault The fault address (cr2).
138 * @param GCPhysFault The GC physical address corresponding to pvFault.
139 * @param pvUser User argument.
140 */
141typedef DECLCALLBACK(int) FNPGMR0PHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
142/** Pointer to PGM access callback. */
143typedef FNPGMR0PHYSHANDLER *PFNPGMR0PHYSHANDLER;
144
145/**
146 * Guest Access type
147 */
148typedef enum PGMACCESSTYPE
149{
150 /** Read access. */
151 PGMACCESSTYPE_READ = 1,
152 /** Write access. */
153 PGMACCESSTYPE_WRITE
154} PGMACCESSTYPE;
155
156/**
157 * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
158 *
159 * The handler can not raise any faults, it's mainly for monitoring write access
160 * to certain pages.
161 *
162 * @returns VINF_SUCCESS if the handler have carried out the operation.
163 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
164 * @param pVM VM Handle.
165 * @param GCPhys The physical address the guest is writing to.
166 * @param pvPhys The HC mapping of that address.
167 * @param pvBuf What the guest is reading/writing.
168 * @param cbBuf How much it's reading/writing.
169 * @param enmAccessType The access type.
170 * @param pvUser User argument.
171 */
172typedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
173/** Pointer to PGM access callback. */
174typedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
175
176
177/**
178 * Virtual access handler type.
179 */
180typedef enum PGMVIRTHANDLERTYPE
181{
182 /** Natural traps only. */
183 PGMVIRTHANDLERTYPE_NORMAL = 1,
184 /** Write access handled. */
185 PGMVIRTHANDLERTYPE_WRITE,
186 /** All access handled. */
187 PGMVIRTHANDLERTYPE_ALL,
188 /** By eip - Natural traps only. */
189 PGMVIRTHANDLERTYPE_EIP,
190 /** Hypervisor write access handled.
191 * This is used to catch the guest trying to write to LDT, TSS and any other
192 * system structure which the brain dead intel guys let unprivilegde code find. */
193 PGMVIRTHANDLERTYPE_HYPERVISOR
194
195} PGMVIRTHANDLERTYPE;
196
197/**
198 * \#PF Handler callback for virtual access handler ranges.
199 *
200 * Important to realize that a physical page in a range can have aliases, and
201 * for ALL and WRITE handlers these will also trigger.
202 *
203 * @returns VBox status code (appropriate for GC return).
204 * @param pVM VM Handle.
205 * @param uErrorCode CPU Error code.
206 * @param pRegFrame Trap register frame.
207 * @param pvFault The fault address (cr2).
208 * @param pvRange The base address of the handled virtual range.
209 * @param offRange The offset of the access into this range.
210 * (If it's a EIP range this's the EIP, if not it's pvFault.)
211 */
212typedef DECLCALLBACK(int) FNPGMGCVIRTHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
213/** Pointer to PGM access callback. */
214typedef FNPGMGCVIRTHANDLER *PFNPGMGCVIRTHANDLER;
215
216/**
217 * \#PF Handler callback for virtual access handler ranges.
218 *
219 * Important to realize that a physical page in a range can have aliases, and
220 * for ALL and WRITE handlers these will also trigger.
221 *
222 * @returns VINF_SUCCESS if the handler have carried out the operation.
223 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
224 * @param pVM VM Handle.
225 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
226 * @param pvPtr The HC mapping of that address.
227 * @param pvBuf What the guest is reading/writing.
228 * @param cbBuf How much it's reading/writing.
229 * @param enmAccessType The access type.
230 * @param pvUser User argument.
231 */
232typedef DECLCALLBACK(int) FNPGMHCVIRTHANDLER(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
233/** Pointer to PGM access callback. */
234typedef FNPGMHCVIRTHANDLER *PFNPGMHCVIRTHANDLER;
235
236
237/**
238 * \#PF Handler callback for invalidation of virtual access handler ranges.
239 *
240 * @param pVM VM Handle.
241 * @param GCPtr The virtual address the guest has changed.
242 */
243typedef DECLCALLBACK(int) FNPGMHCVIRTINVALIDATE(PVM pVM, RTGCPTR GCPtr);
244/** Pointer to PGM invalidation callback. */
245typedef FNPGMHCVIRTINVALIDATE *PFNPGMHCVIRTINVALIDATE;
246
247/**
248 * Paging mode.
249 */
250typedef enum PGMMODE
251{
252 /** The usual invalid value. */
253 PGMMODE_INVALID = 0,
254 /** Real mode. */
255 PGMMODE_REAL,
256 /** Protected mode, no paging. */
257 PGMMODE_PROTECTED,
258 /** 32-bit paging. */
259 PGMMODE_32_BIT,
260 /** PAE paging. */
261 PGMMODE_PAE,
262 /** PAE paging with NX enabled. */
263 PGMMODE_PAE_NX,
264 /** 64-bit AMD paging (long mode). */
265 PGMMODE_AMD64,
266 /** 64-bit AMD paging (long mode) with NX enabled. */
267 PGMMODE_AMD64_NX,
268 /** The max number of modes */
269 PGMMODE_MAX,
270 /** 32bit hackishness. */
271 PGMMODE_32BIT_HACK = 0x7fffffff
272} PGMMODE;
273
274PGMDECL(uint32_t) PGMGetHyperCR3(PVM pVM);
275PGMDECL(uint32_t) PGMGetHyper32BitCR3(PVM pVM);
276PGMDECL(uint32_t) PGMGetHyperPaeCR3(PVM pVM);
277PGMDECL(uint32_t) PGMGetHyperAmd64CR3(PVM pVM);
278PGMDECL(uint32_t) PGMGetInterHCCR3(PVM pVM);
279PGMDECL(uint32_t) PGMGetInterGCCR3(PVM pVM);
280PGMDECL(uint32_t) PGMGetInter32BitCR3(PVM pVM);
281PGMDECL(uint32_t) PGMGetInterPaeCR3(PVM pVM);
282PGMDECL(uint32_t) PGMGetInterAmd64CR3(PVM pVM);
283PGMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
284PGMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage);
285PGMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
286PGMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
287PGMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
288PGMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
289PGMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
290PGMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
291PGMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
292PGMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
293PGMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
294PGMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
295PGMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr);
296PGMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
297PGMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
298PGMDECL(int) PGMFlushTLB(PVM pVM, uint32_t cr3, bool fGlobal);
299PGMDECL(int) PGMSyncCR3(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal);
300PGMDECL(int) PGMChangeMode(PVM pVM, uint32_t cr0, uint32_t cr4, uint64_t efer);
301PGMDECL(PGMMODE) PGMGetGuestMode(PVM pVM);
302PGMDECL(PGMMODE) PGMGetShadowMode(PVM pVM);
303PGMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
304PGMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
305 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
306 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
307 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,
308 R3PTRTYPE(const char *) pszDesc);
309PGMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
310PGMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
311PGMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
312 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
313 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
314 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,
315 R3PTRTYPE(const char *) pszDesc);
316PGMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
317PGMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
318PGMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
319PGMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
320PGMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
321PGMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
322PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM);
323PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
324PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
325PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
326PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
327PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
328PDMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM);
329PDMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM);
330PDMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM);
331
332/**
333 * Page mapping lock.
334 *
335 * @remarks This doesn't work in structures shared between
336 * ring-3, ring-0 and/or GC.
337 */
338typedef struct PGMPAGEMAPLOCK
339{
340 /** @todo see PGMPhysIsPageMappingLockValid for possibly incorrect assumptions */
341#ifdef IN_GC
342 /** Just a dummy for the time being. */
343 uint32_t u32Dummy;
344#else
345 /** Pointer to the PGMPAGE. */
346 void *pvPage;
347 /** Pointer to the PGMCHUNKR3MAP. */
348 void *pvMap;
349#endif
350} PGMPAGEMAPLOCK;
351/** Pointer to a page mapping lock. */
352typedef PGMPAGEMAPLOCK *PPGMPAGEMAPLOCK;
353
354PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
355PGMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
356PGMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
357PGMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
358PGMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
359
360/**
361 * Checks if the lock structure is valid
362 *
363 * @param pVM The VM handle.
364 * @param pLock The lock structure initialized by the mapping function.
365 */
366DECLINLINE(bool) PGMPhysIsPageMappingLockValid(PVM pVM, PPGMPAGEMAPLOCK pLock)
367{
368 /** @todo -> complete/change this */
369#ifdef IN_GC
370 return !!(pLock->u32Dummy);
371#else
372 return !!(pLock->pvPage);
373#endif
374}
375
376PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr);
377PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
378PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint32_t cr3, unsigned fFlags, PRTHCPTR pHCPtr);
379PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
380PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
381#ifndef IN_GC /* Only ring 0 & 3. */
382PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
383PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
384PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
385PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
386PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
387PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
388PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
389PGMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
390#endif /* !IN_GC */
391PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb);
392#ifdef VBOX_STRICT
393PGMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
394PGMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
395PGMDECL(unsigned) PGMAssertCR3(PVM pVM, uint32_t cr3, uint32_t cr4);
396#endif /* VBOX_STRICT */
397
398
399#ifdef IN_GC
400/** @defgroup grp_pgm_gc The PGM Guest Context API
401 * @ingroup grp_pgm
402 * @{
403 */
404PGMGCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
405PGMGCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv);
406PGMGCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
407PGMGCDECL(int) PGMGCSyncPT(PVM pVM, unsigned iPD, PVBOXPD pPDSrc);
408PGMGCDECL(int) PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
409/** @} */
410#endif /* IN_GC */
411
412
413#ifdef IN_RING0
414/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
415 * @ingroup grp_pgm
416 * @{
417 */
418PGMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM);
419/** @} */
420#endif /* IN_RING0 */
421
422
423
424#ifdef IN_RING3
425/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
426 * @ingroup grp_pgm
427 * @{
428 */
429PGMR3DECL(int) PGMR3Init(PVM pVM);
430PGMR3DECL(int) PGMR3InitDynMap(PVM pVM);
431PGMR3DECL(int) PGMR3InitFinalize(PVM pVM);
432PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
433PGMR3DECL(void) PGMR3Reset(PVM pVM);
434PGMR3DECL(int) PGMR3Term(PVM pVM);
435PDMR3DECL(int) PGMR3LockCall(PVM pVM);
436PGMR3DECL(int) PGMR3ChangeShwPDMappings(PVM pVM, bool fEnable);
437#ifndef VBOX_WITH_NEW_PHYS_CODE
438PGMR3DECL(int) PGM3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
439#endif /* !VBOX_WITH_NEW_PHYS_CODE */
440PGMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
441PGMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
442#ifndef VBOX_WITH_NEW_PHYS_CODE
443PGMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
444#endif /* !VBOX_WITH_NEW_PHYS_CODE */
445PGMR3DECL(int) PGMR3PhysRelocate(PVM pVM, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, size_t cb);
446PGMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask);
447PGMDECL(void) PGMR3PhysSetA20(PVM pVM, bool fEnable);
448PGMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, size_t cb, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
449PGMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
450PGMR3DECL(int) PGMR3MappingsSize(PVM pVM, size_t *pcb);
451PGMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, size_t cb);
452PGMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
453PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
454PGMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint32_t cr3, bool fRawR0);
455PGMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
456PGMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
457 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3,
458 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0,
459 const char *pszModGC, const char *pszHandlerGC, RTGCPTR pvUserGC, const char *pszDesc);
460PGMDECL(int) PGMHandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
461 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
462 PFNPGMHCVIRTHANDLER pfnHandlerHC, RTGCPTR pfnHandlerGC,
463 R3PTRTYPE(const char *) pszDesc);
464PGMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
465 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
466 PFNPGMHCVIRTHANDLER pfnHandlerHC,
467 const char *pszHandlerGC, const char *pszModGC, const char *pszDesc);
468PGMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, PFNPGMHCVIRTINVALIDATE pfnInvalidateHC);
469PGMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr);
470PDMR3DECL(int) PGMR3PoolGrow(PVM pVM);
471#ifdef ___VBox_dbgf_h /** @todo fix this! */
472PGMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint32_t cr3, uint32_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp);
473#endif
474PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCPHYS PhysSearch);
475PGMR3DECL(void) PGMR3DumpPD(PVM pVM, PVBOXPD pPD);
476PGMR3DECL(void) PGMR3DumpMappings(PVM pVM);
477
478/** @todo r=bird: s/Byte/U8/ s/Word/U16/ s/Dword/U32/ to match other functions names and returned types. */
479PGMR3DECL(uint8_t) PGMR3PhysReadByte(PVM pVM, RTGCPHYS GCPhys);
480PGMR3DECL(uint16_t) PGMR3PhysReadWord(PVM pVM, RTGCPHYS GCPhys);
481PGMR3DECL(uint32_t) PGMR3PhysReadDword(PVM pVM, RTGCPHYS GCPhys);
482PGMR3DECL(void) PGMR3PhysWriteByte(PVM pVM, RTGCPHYS GCPhys, uint8_t val);
483PGMR3DECL(void) PGMR3PhysWriteWord(PVM pVM, RTGCPHYS GCPhys, uint16_t val);
484PGMR3DECL(void) PGMR3PhysWriteDword(PVM pVM, RTGCPHYS GCPhys, uint32_t val);
485PDMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
486PGMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
487PDMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
488
489PDMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
490
491PGMR3DECL(int) PGMR3DbgHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys);
492PGMR3DECL(int) PGMR3DbgHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys);
493PGMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
494PDMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
495PDMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, RTGCUINTPTR GCPtr, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
496/** @} */
497#endif /* IN_RING3 */
498
499__END_DECLS
500
501/** @} */
502#endif
503
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