VirtualBox

source: vbox/trunk/include/VBox/pgm.h@ 7689

Last change on this file since 7689 was 7635, checked in by vboxsync, 17 years ago

The new MMIO2 code.
WARNING! This changes the pci mapping protocol for MMIO2 so it's working the same way as I/O ports and normal MMIO memory. External users of the interface will have to update their mapping routines.
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File size: 24.7 KB
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1/** @file
2 * PGM - Page Monitor/Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_pgm_h
27#define ___VBox_pgm_h
28
29#include <VBox/cdefs.h>
30#include <VBox/types.h>
31#include <VBox/sup.h>
32#include <VBox/vmapi.h>
33#include <VBox/x86.h>
34
35__BEGIN_DECLS
36
37/** @defgroup grp_pgm The Page Monitor/Manager API
38 * @{
39 */
40
41/** Chunk size for dynamically allocated physical memory. */
42#define PGM_DYNAMIC_CHUNK_SIZE (1*1024*1024)
43/** Shift GC physical address by 20 bits to get the offset into the pvHCChunkHC array. */
44#define PGM_DYNAMIC_CHUNK_SHIFT 20
45/** Dynamic chunk offset mask. */
46#define PGM_DYNAMIC_CHUNK_OFFSET_MASK 0xfffff
47/** Dynamic chunk base mask. */
48#define PGM_DYNAMIC_CHUNK_BASE_MASK (~(RTGCPHYS)PGM_DYNAMIC_CHUNK_OFFSET_MASK)
49
50
51/** Page flags used for PGMHyperSetPageFlags
52 * @deprecated
53 * @{ */
54#define PGMPAGE_READ 1
55#define PGMPAGE_WRITE 2
56#define PGMPAGE_USER 4
57#define PGMPAGE_SYSTEM 8
58#define PGMPAGE_NOTPRESENT 16
59/** @} */
60
61
62/**
63 * FNPGMRELOCATE callback mode.
64 */
65typedef enum PGMRELOCATECALL
66{
67 /** The callback is for checking if the suggested address is suitable. */
68 PGMRELOCATECALL_SUGGEST = 1,
69 /** The callback is for executing the relocation. */
70 PGMRELOCATECALL_RELOCATE
71} PGMRELOCATECALL;
72
73
74/**
75 * Callback function which will be called when PGM is trying to find
76 * a new location for the mapping.
77 *
78 * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
79 * In 1) the callback should say if it objects to a suggested new location. If it
80 * accepts the new location, it is called again for doing it's relocation.
81 *
82 *
83 * @returns true if the location is ok.
84 * @returns false if another location should be found.
85 * @param GCPtrOld The old virtual address.
86 * @param GCPtrNew The new virtual address.
87 * @param enmMode Used to indicate the callback mode.
88 * @param pvUser User argument.
89 * @remark The return value is no a failure indicator, it's an acceptance
90 * indicator. Relocation can not fail!
91 */
92typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
93/** Pointer to a relocation callback function. */
94typedef FNPGMRELOCATE *PFNPGMRELOCATE;
95
96
97/**
98 * Physical page access handler type.
99 */
100typedef enum PGMPHYSHANDLERTYPE
101{
102 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
103 PGMPHYSHANDLERTYPE_MMIO = 1,
104 /** Handler all write access to a physical page range. */
105 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
106 /** Handler all access to a physical page range. */
107 PGMPHYSHANDLERTYPE_PHYSICAL_ALL
108
109} PGMPHYSHANDLERTYPE;
110
111/**
112 * \#PF Handler callback for physical access handler ranges (MMIO among others) in GC.
113 *
114 * @returns VBox status code (appropriate for GC return).
115 * @param pVM VM Handle.
116 * @param uErrorCode CPU Error code.
117 * @param pRegFrame Trap register frame.
118 * NULL on DMA and other non CPU access.
119 * @param pvFault The fault address (cr2).
120 * @param GCPhysFault The GC physical address corresponding to pvFault.
121 * @param pvUser User argument.
122 */
123typedef DECLCALLBACK(int) FNPGMGCPHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
124/** Pointer to PGM access callback. */
125typedef FNPGMGCPHYSHANDLER *PFNPGMGCPHYSHANDLER;
126
127/**
128 * \#PF Handler callback for physical access handler ranges (MMIO among others) in R0.
129 *
130 * @returns VBox status code (appropriate for GC return).
131 * @param pVM VM Handle.
132 * @param uErrorCode CPU Error code.
133 * @param pRegFrame Trap register frame.
134 * NULL on DMA and other non CPU access.
135 * @param pvFault The fault address (cr2).
136 * @param GCPhysFault The GC physical address corresponding to pvFault.
137 * @param pvUser User argument.
138 */
139typedef DECLCALLBACK(int) FNPGMR0PHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
140/** Pointer to PGM access callback. */
141typedef FNPGMR0PHYSHANDLER *PFNPGMR0PHYSHANDLER;
142
143/**
144 * Guest Access type
145 */
146typedef enum PGMACCESSTYPE
147{
148 /** Read access. */
149 PGMACCESSTYPE_READ = 1,
150 /** Write access. */
151 PGMACCESSTYPE_WRITE
152} PGMACCESSTYPE;
153
154/**
155 * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
156 *
157 * The handler can not raise any faults, it's mainly for monitoring write access
158 * to certain pages.
159 *
160 * @returns VINF_SUCCESS if the handler have carried out the operation.
161 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
162 * @param pVM VM Handle.
163 * @param GCPhys The physical address the guest is writing to.
164 * @param pvPhys The HC mapping of that address.
165 * @param pvBuf What the guest is reading/writing.
166 * @param cbBuf How much it's reading/writing.
167 * @param enmAccessType The access type.
168 * @param pvUser User argument.
169 */
170typedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
171/** Pointer to PGM access callback. */
172typedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
173
174
175/**
176 * Virtual access handler type.
177 */
178typedef enum PGMVIRTHANDLERTYPE
179{
180 /** Write access handled. */
181 PGMVIRTHANDLERTYPE_WRITE = 1,
182 /** All access handled. */
183 PGMVIRTHANDLERTYPE_ALL,
184 /** Hypervisor write access handled.
185 * This is used to catch the guest trying to write to LDT, TSS and any other
186 * system structure which the brain dead intel guys let unprivilegde code find. */
187 PGMVIRTHANDLERTYPE_HYPERVISOR
188} PGMVIRTHANDLERTYPE;
189
190/**
191 * \#PF Handler callback for virtual access handler ranges.
192 *
193 * Important to realize that a physical page in a range can have aliases, and
194 * for ALL and WRITE handlers these will also trigger.
195 *
196 * @returns VBox status code (appropriate for GC return).
197 * @param pVM VM Handle.
198 * @param uErrorCode CPU Error code.
199 * @param pRegFrame Trap register frame.
200 * @param pvFault The fault address (cr2).
201 * @param pvRange The base address of the handled virtual range.
202 * @param offRange The offset of the access into this range.
203 * (If it's a EIP range this's the EIP, if not it's pvFault.)
204 */
205typedef DECLCALLBACK(int) FNPGMGCVIRTHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
206/** Pointer to PGM access callback. */
207typedef FNPGMGCVIRTHANDLER *PFNPGMGCVIRTHANDLER;
208
209/**
210 * \#PF Handler callback for virtual access handler ranges.
211 *
212 * Important to realize that a physical page in a range can have aliases, and
213 * for ALL and WRITE handlers these will also trigger.
214 *
215 * @returns VINF_SUCCESS if the handler have carried out the operation.
216 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
217 * @param pVM VM Handle.
218 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
219 * @param pvPtr The HC mapping of that address.
220 * @param pvBuf What the guest is reading/writing.
221 * @param cbBuf How much it's reading/writing.
222 * @param enmAccessType The access type.
223 * @param pvUser User argument.
224 */
225typedef DECLCALLBACK(int) FNPGMHCVIRTHANDLER(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
226/** Pointer to PGM access callback. */
227typedef FNPGMHCVIRTHANDLER *PFNPGMHCVIRTHANDLER;
228
229
230/**
231 * \#PF Handler callback for invalidation of virtual access handler ranges.
232 *
233 * @param pVM VM Handle.
234 * @param GCPtr The virtual address the guest has changed.
235 */
236typedef DECLCALLBACK(int) FNPGMHCVIRTINVALIDATE(PVM pVM, RTGCPTR GCPtr);
237/** Pointer to PGM invalidation callback. */
238typedef FNPGMHCVIRTINVALIDATE *PFNPGMHCVIRTINVALIDATE;
239
240/**
241 * Paging mode.
242 */
243typedef enum PGMMODE
244{
245 /** The usual invalid value. */
246 PGMMODE_INVALID = 0,
247 /** Real mode. */
248 PGMMODE_REAL,
249 /** Protected mode, no paging. */
250 PGMMODE_PROTECTED,
251 /** 32-bit paging. */
252 PGMMODE_32_BIT,
253 /** PAE paging. */
254 PGMMODE_PAE,
255 /** PAE paging with NX enabled. */
256 PGMMODE_PAE_NX,
257 /** 64-bit AMD paging (long mode). */
258 PGMMODE_AMD64,
259 /** 64-bit AMD paging (long mode) with NX enabled. */
260 PGMMODE_AMD64_NX,
261 /** The max number of modes */
262 PGMMODE_MAX,
263 /** 32bit hackishness. */
264 PGMMODE_32BIT_HACK = 0x7fffffff
265} PGMMODE;
266
267/**
268 * The current ROM page protection.
269 */
270typedef enum PGMROMPROT
271{
272 /** The customary invalid value. */
273 PGMROMPROT_INVALID = 0,
274 /** Read from the virgin ROM page, ignore writes.
275 * Map the virgin page, use write access handler to ignore writes. */
276 PGMROMPROT_READ_ROM_WRITE_IGNORE,
277 /** Read from the virgin ROM page, write to the shadow RAM.
278 * Map the virgin page, use write access handler change the RAM. */
279 PGMROMPROT_READ_ROM_WRITE_RAM,
280 /** Read from the shadow ROM page, ignore writes.
281 * Map the shadow page read-only, use write access handler to ignore writes. */
282 PGMROMPROT_READ_RAM_WRITE_IGNORE,
283 /** Read from the shadow ROM page, ignore writes.
284 * Map the shadow page read-write, disabled write access handler. */
285 PGMROMPROT_READ_RAM_WRITE_RAM,
286 /** The end of valid values. */
287 PGMROMPROT_END,
288 /** The usual 32-bit type size hack. */
289 PGMROMPROT_32BIT_HACK = 0x7fffffff
290} PGMROMPROT;
291
292/**
293 * Is the ROM mapped (true) or is the shadow RAM mapped (false).
294 *
295 * @returns boolean.
296 * @param enmProt The PGMROMPROT value, must be valid.
297 */
298#define PGMROMPROT_IS_ROM(enmProt) \
299 ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
300 || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
301
302
303PGMDECL(uint32_t) PGMGetHyperCR3(PVM pVM);
304PGMDECL(uint32_t) PGMGetHyper32BitCR3(PVM pVM);
305PGMDECL(uint32_t) PGMGetHyperPaeCR3(PVM pVM);
306PGMDECL(uint32_t) PGMGetHyperAmd64CR3(PVM pVM);
307PGMDECL(uint32_t) PGMGetInterHCCR3(PVM pVM);
308PGMDECL(uint32_t) PGMGetInterGCCR3(PVM pVM);
309PGMDECL(uint32_t) PGMGetInter32BitCR3(PVM pVM);
310PGMDECL(uint32_t) PGMGetInterPaeCR3(PVM pVM);
311PGMDECL(uint32_t) PGMGetInterAmd64CR3(PVM pVM);
312PGMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
313PGMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage);
314PGMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
315PGMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess);
316PGMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
317PGMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
318PGMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
319PGMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
320PGMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
321PGMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
322PGMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
323PGMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
324PGMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr);
325PGMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
326PGMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
327PGMDECL(int) PGMFlushTLB(PVM pVM, uint32_t cr3, bool fGlobal);
328PGMDECL(int) PGMSyncCR3(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal);
329PGMDECL(int) PGMChangeMode(PVM pVM, uint32_t cr0, uint32_t cr4, uint64_t efer);
330PGMDECL(PGMMODE) PGMGetGuestMode(PVM pVM);
331PGMDECL(PGMMODE) PGMGetShadowMode(PVM pVM);
332PGMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
333PGMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
334 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
335 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
336 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,
337 R3PTRTYPE(const char *) pszDesc);
338PGMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
339PGMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
340PGMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
341 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
342 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
343 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,
344 R3PTRTYPE(const char *) pszDesc);
345PGMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
346PGMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
347PGMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
348PGMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
349PGMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
350PGMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
351PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM);
352PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
353PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
354PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
355PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
356PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
357PDMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM);
358PDMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM);
359PDMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM);
360
361/**
362 * Page mapping lock.
363 *
364 * @remarks This doesn't work in structures shared between
365 * ring-3, ring-0 and/or GC.
366 */
367typedef struct PGMPAGEMAPLOCK
368{
369 /** @todo see PGMPhysIsPageMappingLockValid for possibly incorrect assumptions */
370#ifdef IN_GC
371 /** Just a dummy for the time being. */
372 uint32_t u32Dummy;
373#else
374 /** Pointer to the PGMPAGE. */
375 void *pvPage;
376 /** Pointer to the PGMCHUNKR3MAP. */
377 void *pvMap;
378#endif
379} PGMPAGEMAPLOCK;
380/** Pointer to a page mapping lock. */
381typedef PGMPAGEMAPLOCK *PPGMPAGEMAPLOCK;
382
383PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
384PGMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
385PGMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
386PGMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
387PGMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
388
389/**
390 * Checks if the lock structure is valid
391 *
392 * @param pVM The VM handle.
393 * @param pLock The lock structure initialized by the mapping function.
394 */
395DECLINLINE(bool) PGMPhysIsPageMappingLockValid(PVM pVM, PPGMPAGEMAPLOCK pLock)
396{
397 /** @todo -> complete/change this */
398#ifdef IN_GC
399 return !!(pLock->u32Dummy);
400#else
401 return !!(pLock->pvPage);
402#endif
403}
404
405PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr);
406PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
407PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint32_t cr3, unsigned fFlags, PRTHCPTR pHCPtr);
408PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
409PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
410#ifndef IN_GC /* Only ring 0 & 3. */
411PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
412PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
413PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
414PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
415PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
416PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
417PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
418PGMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
419#endif /* !IN_GC */
420PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb);
421#ifdef VBOX_STRICT
422PGMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
423PGMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
424PGMDECL(unsigned) PGMAssertCR3(PVM pVM, uint32_t cr3, uint32_t cr4);
425#endif /* VBOX_STRICT */
426
427
428#ifdef IN_GC
429/** @defgroup grp_pgm_gc The PGM Guest Context API
430 * @ingroup grp_pgm
431 * @{
432 */
433PGMGCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
434PGMGCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv);
435PGMGCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
436PGMGCDECL(int) PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
437/** @} */
438#endif /* IN_GC */
439
440
441#ifdef IN_RING0
442/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
443 * @ingroup grp_pgm
444 * @{
445 */
446PGMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM);
447/** @} */
448#endif /* IN_RING0 */
449
450
451
452#ifdef IN_RING3
453/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
454 * @ingroup grp_pgm
455 * @{
456 */
457PGMR3DECL(int) PGMR3Init(PVM pVM);
458PGMR3DECL(int) PGMR3InitDynMap(PVM pVM);
459PGMR3DECL(int) PGMR3InitFinalize(PVM pVM);
460PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
461PGMR3DECL(void) PGMR3Reset(PVM pVM);
462PGMR3DECL(int) PGMR3Term(PVM pVM);
463PDMR3DECL(int) PGMR3LockCall(PVM pVM);
464PGMR3DECL(int) PGMR3ChangeShwPDMappings(PVM pVM, bool fEnable);
465#ifndef VBOX_WITH_NEW_PHYS_CODE
466PGMR3DECL(int) PGM3PhysGrowRange(PVM pVM, PCRTGCPHYS GCPhys);
467#endif /* !VBOX_WITH_NEW_PHYS_CODE */
468PGMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
469PDMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, void **ppv, const char *pszDesc);
470PDMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
471PDMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
472PDMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
473PDMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
474PDMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
475
476/** @group PGMR3PhysRegisterRom flags.
477 * @{ */
478/** Inidicates that ROM shadowing should be enabled. */
479#define PGMPHYS_ROM_FLAG_SHADOWED RT_BIT_32(0)
480/** Indicates that what pvBinary points to won't go away
481 * and can be used for strictness checks. */
482#define PGMPHYS_ROM_FLAG_PERMANENT_BINARY RT_BIT_32(1)
483/** @} */
484
485PGMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
486 const void *pvBinary, uint32_t fFlags, const char *pszDesc);
487PGMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
488PGMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
489#ifndef VBOX_WITH_NEW_PHYS_CODE
490PGMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
491#endif /* !VBOX_WITH_NEW_PHYS_CODE */
492PGMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask);
493PGMDECL(void) PGMR3PhysSetA20(PVM pVM, bool fEnable);
494PGMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
495PGMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
496PGMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
497PGMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
498PGMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
499PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
500PGMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint32_t cr3, bool fRawR0);
501PGMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
502PGMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
503 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3,
504 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0,
505 const char *pszModGC, const char *pszHandlerGC, RTGCPTR pvUserGC, const char *pszDesc);
506PGMDECL(int) PGMHandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
507 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
508 PFNPGMHCVIRTHANDLER pfnHandlerHC, RTGCPTR pfnHandlerGC,
509 R3PTRTYPE(const char *) pszDesc);
510PGMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,
511 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC,
512 PFNPGMHCVIRTHANDLER pfnHandlerHC,
513 const char *pszHandlerGC, const char *pszModGC, const char *pszDesc);
514PGMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, PFNPGMHCVIRTINVALIDATE pfnInvalidateHC);
515PGMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr);
516PDMR3DECL(int) PGMR3PoolGrow(PVM pVM);
517#ifdef ___VBox_dbgf_h /** @todo fix this! */
518PGMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint32_t cr3, uint32_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp);
519#endif
520PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCPHYS PhysSearch);
521
522/** @todo r=bird: s/Byte/U8/ s/Word/U16/ s/Dword/U32/ to match other functions names and returned types. */
523PGMR3DECL(uint8_t) PGMR3PhysReadByte(PVM pVM, RTGCPHYS GCPhys);
524PGMR3DECL(uint16_t) PGMR3PhysReadWord(PVM pVM, RTGCPHYS GCPhys);
525PGMR3DECL(uint32_t) PGMR3PhysReadDword(PVM pVM, RTGCPHYS GCPhys);
526PGMR3DECL(void) PGMR3PhysWriteByte(PVM pVM, RTGCPHYS GCPhys, uint8_t val);
527PGMR3DECL(void) PGMR3PhysWriteWord(PVM pVM, RTGCPHYS GCPhys, uint16_t val);
528PGMR3DECL(void) PGMR3PhysWriteDword(PVM pVM, RTGCPHYS GCPhys, uint32_t val);
529PDMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
530PGMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
531PDMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
532
533PDMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
534
535PGMR3DECL(int) PGMR3DbgHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys);
536PGMR3DECL(int) PGMR3DbgHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys);
537PGMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
538PDMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
539PDMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, RTGCUINTPTR GCPtr, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
540/** @} */
541#endif /* IN_RING3 */
542
543__END_DECLS
544
545/** @} */
546#endif
547
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