VirtualBox

source: vbox/trunk/include/VBox/sup.mac@ 53625

Last change on this file since 53625 was 53441, checked in by vboxsync, 10 years ago

VMM/TM: Rename TMMODE to TMTSCMODE and the corresponding enum and CFGM key. Fixed an endian issue in the assembly code.

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File size: 5.0 KB
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1; $Id: sup.mac 53441 2014-12-04 11:06:26Z vboxsync $
2;; @file
3; SUP - Support Library, assembly definitions.
4;
5
6;
7; Copyright (C) 2006-2014 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___VBox_sup_mac
28%define ___VBox_sup_mac
29
30struc SUPGIPCPU
31 .u32TransactionId resd 1
32 .u32UpdateIntervalTSC resd 1
33 .u64NanoTS resq 1
34 .u64TSC resq 1
35 .u64CpuHz resq 1
36 .i64TSCDelta resq 1
37 .cErrors resd 1
38 .iTSCHistoryHead resd 1
39 .au32TSCHistory resd 8
40 .u32PrevUpdateIntervalNS resd 1
41 .au32Reserved0 resd (5)
42 .u64TSCSample resq 1
43 .au32Reserved1 resd (1)
44 .enmState resd 1
45 .idCpu resd 1
46 .iCpuSet resw 1
47 .idApic resw 1
48endstruc
49
50%define SUPGLOBALINFOPAGE_MAGIC 0x19590106
51struc SUPGLOBALINFOPAGE
52 .u32Magic resd 1
53 .u32Version resd 1
54 .u32Mode resd 1
55 .cCpus resw 1
56 .cPages resw 1
57 .u32UpdateHz resd 1
58 .u32UpdateIntervalNS resd 1
59 .u64NanoTSLastUpdateHz resq 1
60 .u64CpuHz resq 1
61 .OnlineCpuSet resq 4
62 .PresentCpuSet resq 4
63 .PossibleCpuSet resq 4
64 .cOnlineCpus resw 1
65 .cPresentCpus resw 1
66 .cPossibleCpus resw 1
67 .u16Padding0 resw 1
68 .idCpuMax resd 1
69 .au32Padding1 resd 27
70 .aiCpuFromApicId resw 256
71 .aiCpuFromCpuSetIdx resw 256
72 .aCPUs resb SUPGIPCPU_size
73endstruc
74
75struc SUPDRVTRACERUSRCTX32
76 .idProbe resd 1
77 .cBits resb 1
78 .abReserved resb 3
79 .u.X86.uVtgProbeLoc resd 1
80 .u.X86.aArgs resd 20
81 .u.X86.eip resd 1
82 .u.X86.eflags resd 1
83 .u.X86.eax resd 1
84 .u.X86.ecx resd 1
85 .u.X86.edx resd 1
86 .u.X86.ebx resd 1
87 .u.X86.esp resd 1
88 .u.X86.ebp resd 1
89 .u.X86.esi resd 1
90 .u.X86.edi resd 1
91 .u.X86.cs resw 1
92 .u.X86.ss resw 1
93 .u.X86.ds resw 1
94 .u.X86.es resw 1
95 .u.X86.fs resw 1
96 .u.X86.gs resw 1
97endstruc
98
99struc SUPDRVTRACERUSRCTX64
100 .idProbe resd 1
101 .cBits resb 1
102 .abReserved resb 3
103 .u.Amd64.uVtgProbeLoc resq 1
104 .u.Amd64.aArgs resq 10
105 .u.Amd64.rip resq 1
106 .u.Amd64.rflags resq 1
107 .u.Amd64.rax resq 1
108 .u.Amd64.rcx resq 1
109 .u.Amd64.rdx resq 1
110 .u.Amd64.rbx resq 1
111 .u.Amd64.rsp resq 1
112 .u.Amd64.rbp resq 1
113 .u.Amd64.rsi resq 1
114 .u.Amd64.rdi resq 1
115 .u.Amd64.r8 resq 1
116 .u.Amd64.r9 resq 1
117 .u.Amd64.r10 resq 1
118 .u.Amd64.r11 resq 1
119 .u.Amd64.r12 resq 1
120 .u.Amd64.r13 resq 1
121 .u.Amd64.r14 resq 1
122 .u.Amd64.r15 resq 1
123endstruc
124
125;;
126; Macro to apply per-CPU TSC delta to the TSC value read in through rdtsc.
127;
128; @param %1 The pSupGipCpu pointer
129; @remarks edx:eax contains the 64-bit TSC value to apply the delta to.
130%macro SUPTscDeltaApply 1
131 ; Check if we have a valid TSC-delta, i.e. != INT64_MAX.
132 cmp dword [%1 + SUPGIPCPU.i64TSCDelta], 0xffffffff
133 jne %%valid_delta
134 cmp dword [%1 + SUPGIPCPU.i64TSCDelta + 4], 0x7fffffff
135 je %%done
136%%valid_delta:
137 ; Subtract the delta from edx:eax
138 sub eax, dword [%1 + SUPGIPCPU.i64TSCDelta]
139 sbb edx, dword [%1 + SUPGIPCPU.i64TSCDelta + 4]
140%%done:
141%endmacro
142
143%endif
144
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