VirtualBox

source: vbox/trunk/include/VBox/types.h@ 106880

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1/** @file
2 * VirtualBox - Types.
3 */
4
5/*
6 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef VBOX_INCLUDED_types_h
37#define VBOX_INCLUDED_types_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <VBox/cdefs.h>
43#include <iprt/types.h>
44
45
46/** @defgroup grp_types VBox Basic Types
47 * @{
48 */
49
50
51/** @defgroup grp_types_both Common Guest and Host Context Basic Types
52 * @{
53 */
54
55
56/** @defgroup grp_types_hc Host Context Basic Types
57 * @{
58 */
59
60/** @} */
61
62
63/** @defgroup grp_types_gc Guest Context Basic Types
64 * @{
65 */
66
67/** @} */
68
69
70/** Pointer to per support driver session data.
71 * (The data is a R0 entity and private to the the R0 SUP part. All
72 * other should consider this a sort of handle.) */
73typedef R0PTRTYPE(struct SUPDRVSESSION *) PSUPDRVSESSION;
74
75/** Event semaphore handle. Ring-0 / ring-3. */
76typedef R0PTRTYPE(struct SUPSEMEVENTHANDLE *) SUPSEMEVENT;
77/** Pointer to an event semaphore handle. */
78typedef SUPSEMEVENT *PSUPSEMEVENT;
79/** Nil event semaphore handle. */
80#define NIL_SUPSEMEVENT ((SUPSEMEVENT)0)
81
82/** Multiple release event semaphore handle. Ring-0 / ring-3. */
83typedef R0PTRTYPE(struct SUPSEMEVENTMULTIHANDLE *) SUPSEMEVENTMULTI;
84/** Pointer to an multiple release event semaphore handle. */
85typedef SUPSEMEVENTMULTI *PSUPSEMEVENTMULTI;
86/** Nil multiple release event semaphore handle. */
87#define NIL_SUPSEMEVENTMULTI ((SUPSEMEVENTMULTI)0)
88
89
90/** Pointer to a ring-3 VMM API vtable. */
91typedef R3PTRTYPE(const struct VMMR3VTABLE *) PCVMMR3VTABLE;
92
93/** Pointer to a VM. */
94typedef struct VM *PVM;
95/** Pointer to a const VM. */
96typedef const struct VM *PCVM;
97/** Pointer to a VM - Ring-0 Ptr. */
98typedef R0PTRTYPE(struct VM *) PVMR0;
99/** Pointer to a VM - Ring-3 Ptr. */
100typedef R3PTRTYPE(struct VM *) PVMR3;
101/** Pointer to a VM - RC Ptr. */
102typedef RCPTRTYPE(struct VM *) PVMRC;
103
104/** Pointer to a virtual CPU structure. */
105typedef struct VMCPU * PVMCPU;
106/** Pointer to a const virtual CPU structure. */
107typedef const struct VMCPU * PCVMCPU;
108/** Pointer to a virtual CPU structure - Ring-3 Ptr. */
109typedef R3PTRTYPE(struct VMCPU *) PVMCPUR3;
110/** Pointer to a virtual CPU structure - Ring-0 Ptr. */
111typedef R0PTRTYPE(struct VMCPU *) PVMCPUR0;
112/** Pointer to a virtual CPU structure - RC Ptr. */
113typedef RCPTRTYPE(struct VMCPU *) PVMCPURC;
114
115/** Pointer to a ring-0 (global) VM structure. */
116typedef R0PTRTYPE(struct GVM *) PGVM;
117/** Pointer to a const ring-0 (global) VM structure. */
118typedef R0PTRTYPE(const struct GVM *) PCGVM;
119/** Pointer to a GVMCPU structure. */
120typedef R0PTRTYPE(struct GVMCPU *) PGVMCPU;
121/** Pointer to a const GVMCPU structure. */
122typedef R0PTRTYPE(struct GVMCPU const *) PCGVMCPU;
123
124/** Pointer to a ring-3 (user mode) VM structure. */
125typedef R3PTRTYPE(struct UVM *) PUVM;
126
127/** Pointer to a ring-3 (user mode) VMCPU structure. */
128typedef R3PTRTYPE(struct UVMCPU *) PUVMCPU;
129
130/** Pointer to a context specific VM derived structure.
131 * This is PGVM in ring-0 and plain PVM in ring-3. */
132#ifdef IN_RING0
133typedef PGVM PVMCC;
134#else
135typedef PVM PVMCC;
136#endif
137/** Pointer to a const context specific VM derived structure.
138 * This is PCGVM in ring-0 and plain PCVM in ring-3. */
139#ifdef IN_RING0
140typedef PCGVM PCVMCC;
141#else
142typedef PCVM PCVMCC;
143#endif
144/** Pointer to a context specific VMCPUM derived structure.
145 * This is PGVMCPU in ring-0 and plain PVMCPU in ring-3. */
146#ifdef IN_RING0
147typedef PGVMCPU PVMCPUCC;
148#else
149typedef PVMCPU PVMCPUCC;
150#endif
151/** Pointer to a const context specific VMCPU derived structure.
152 * This is PCGVMCPU in ring-0 and plain PCVMCPU in ring-3. */
153#ifdef IN_RING0
154typedef PCGVMCPU PCVMCPUCC;
155#else
156typedef PCVMCPU PCVMCPUCC;
157#endif
158
159/** Virtual CPU ID. */
160typedef uint32_t VMCPUID;
161/** Pointer to a virtual CPU ID. */
162typedef VMCPUID *PVMCPUID;
163/** @name Special CPU ID values.
164 * Most of these are for request scheduling.
165 *
166 * @{ */
167/** All virtual CPUs. */
168#define VMCPUID_ALL UINT32_C(0xfffffff2)
169/** All virtual CPUs, descending order. */
170#define VMCPUID_ALL_REVERSE UINT32_C(0xfffffff3)
171/** Any virtual CPU.
172 * Intended for scheduling a VM request or some other task. */
173#define VMCPUID_ANY UINT32_C(0xfffffff4)
174/** Any virtual CPU; always queue for future execution.
175 * Intended for scheduling a VM request or some other task. */
176#define VMCPUID_ANY_QUEUE UINT32_C(0xfffffff5)
177/** The NIL value. */
178#define NIL_VMCPUID UINT32_C(0xfffffffd)
179/** @} */
180
181/**
182 * Virtual CPU set.
183 */
184typedef struct VMCPUSET
185{
186 /** The bitmap data. */
187 uint32_t au32Bitmap[8 /*256/32*/];
188} VMCPUSET;
189/** Pointer to a Virtual CPU set. */
190typedef VMCPUSET *PVMCPUSET;
191/** Pointer to a const Virtual CPU set. */
192typedef VMCPUSET const *PCVMCPUSET;
193
194
195/**
196 * VM State
197 */
198typedef enum VMSTATE
199{
200 /** The VM is being created. */
201 VMSTATE_CREATING = 0,
202 /** The VM is created. */
203 VMSTATE_CREATED,
204 /** The VM state is being loaded from file. */
205 VMSTATE_LOADING,
206 /** The VM is being powered on */
207 VMSTATE_POWERING_ON,
208 /** The VM is being resumed. */
209 VMSTATE_RESUMING,
210 /** The VM is runnning. */
211 VMSTATE_RUNNING,
212 /** Live save: The VM is running and the state is being saved. */
213 VMSTATE_RUNNING_LS,
214 /** Fault Tolerance: The VM is running and the state is being synced. */
215 VMSTATE_RUNNING_FT,
216 /** The VM is being reset. */
217 VMSTATE_RESETTING,
218 /** Live save: The VM is being reset and immediately suspended. */
219 VMSTATE_RESETTING_LS,
220 /** The VM is being soft/warm reset. */
221 VMSTATE_SOFT_RESETTING,
222 /** Live save: The VM is being soft/warm reset (not suspended afterwards). */
223 VMSTATE_SOFT_RESETTING_LS,
224 /** The VM is being suspended. */
225 VMSTATE_SUSPENDING,
226 /** Live save: The VM is being suspended during a live save operation, either as
227 * part of the normal flow or VMR3Reset. */
228 VMSTATE_SUSPENDING_LS,
229 /** Live save: The VM is being suspended by VMR3Suspend during live save. */
230 VMSTATE_SUSPENDING_EXT_LS,
231 /** The VM is suspended. */
232 VMSTATE_SUSPENDED,
233 /** Live save: The VM has been suspended and is waiting for the live save
234 * operation to move on. */
235 VMSTATE_SUSPENDED_LS,
236 /** Live save: The VM has been suspended by VMR3Suspend during a live save. */
237 VMSTATE_SUSPENDED_EXT_LS,
238 /** The VM is suspended and its state is being saved by EMT(0). (See SSM) */
239 VMSTATE_SAVING,
240 /** The VM is being debugged. (See DBGF.) */
241 VMSTATE_DEBUGGING,
242 /** Live save: The VM is being debugged while the live phase is going on. */
243 VMSTATE_DEBUGGING_LS,
244 /** The VM is being powered off. */
245 VMSTATE_POWERING_OFF,
246 /** Live save: The VM is being powered off and the save cancelled. */
247 VMSTATE_POWERING_OFF_LS,
248 /** The VM is switched off, awaiting destruction. */
249 VMSTATE_OFF,
250 /** Live save: Waiting for cancellation and transition to VMSTATE_OFF. */
251 VMSTATE_OFF_LS,
252 /** The VM is powered off because of a fatal error. */
253 VMSTATE_FATAL_ERROR,
254 /** Live save: Waiting for cancellation and transition to FatalError. */
255 VMSTATE_FATAL_ERROR_LS,
256 /** The VM is in guru meditation over a fatal failure. */
257 VMSTATE_GURU_MEDITATION,
258 /** Live save: Waiting for cancellation and transition to GuruMeditation. */
259 VMSTATE_GURU_MEDITATION_LS,
260 /** The VM is screwed because of a failed state loading. */
261 VMSTATE_LOAD_FAILURE,
262 /** The VM is being destroyed. */
263 VMSTATE_DESTROYING,
264 /** Terminated. */
265 VMSTATE_TERMINATED,
266 /** hack forcing the size of the enum to 32-bits. */
267 VMSTATE_MAKE_32BIT_HACK = 0x7fffffff
268} VMSTATE;
269
270/** @def VBOXSTRICTRC_STRICT_ENABLED
271 * Indicates that VBOXSTRICTRC is in strict mode.
272 */
273#if defined(__cplusplus) \
274 && ARCH_BITS == 64 /* cdecl requires classes and structs as hidden params. */ \
275 && !defined(_MSC_VER) /* trouble similar to 32-bit gcc. */ \
276 && ( defined(RT_STRICT) \
277 || defined(VBOX_STRICT) \
278 || defined(DEBUG) \
279 || defined(DOXYGEN_RUNNING) )
280# define VBOXSTRICTRC_STRICT_ENABLED 1
281#endif
282
283/** We need RTERR_STRICT_RC. */
284#if defined(VBOXSTRICTRC_STRICT_ENABLED) && !defined(RTERR_STRICT_RC)
285# define RTERR_STRICT_RC 1
286#endif
287
288/**
289 * Strict VirtualBox status code.
290 *
291 * This is normally an 32-bit integer and the only purpose of the type is to
292 * highlight the special handling that is required. But in strict build it is a
293 * class that causes compilation and runtime errors for some of the incorrect
294 * handling.
295 */
296#ifdef VBOXSTRICTRC_STRICT_ENABLED
297struct VBOXSTRICTRC
298{
299protected:
300 /** The status code. */
301 int32_t m_rc;
302
303public:
304 /** Default constructor setting the status to VERR_IPE_UNINITIALIZED_STATUS. */
305 VBOXSTRICTRC()
306#ifdef VERR_IPE_UNINITIALIZED_STATUS
307 : m_rc(VERR_IPE_UNINITIALIZED_STATUS)
308#else
309 : m_rc(-233 /*VERR_IPE_UNINITIALIZED_STATUS*/)
310#endif
311 {
312 }
313
314 /** Constructor for normal integer status codes. */
315 VBOXSTRICTRC(int32_t const rc)
316 : m_rc(rc)
317 {
318 }
319
320 /** Getter that VBOXSTRICTRC_VAL can use. */
321 int32_t getValue() const { return m_rc; }
322
323 /** @name Comparison operators
324 * @{ */
325 bool operator==(int32_t rc) const { return m_rc == rc; }
326 bool operator!=(int32_t rc) const { return m_rc != rc; }
327 bool operator<=(int32_t rc) const { return m_rc <= rc; }
328 bool operator>=(int32_t rc) const { return m_rc >= rc; }
329 bool operator<(int32_t rc) const { return m_rc < rc; }
330 bool operator>(int32_t rc) const { return m_rc > rc; }
331
332 bool operator==(const VBOXSTRICTRC &rRc) const { return m_rc == rRc.m_rc; }
333 bool operator!=(const VBOXSTRICTRC &rRc) const { return m_rc != rRc.m_rc; }
334 bool operator<=(const VBOXSTRICTRC &rRc) const { return m_rc <= rRc.m_rc; }
335 bool operator>=(const VBOXSTRICTRC &rRc) const { return m_rc >= rRc.m_rc; }
336 bool operator<(const VBOXSTRICTRC &rRc) const { return m_rc < rRc.m_rc; }
337 bool operator>(const VBOXSTRICTRC &rRc) const { return m_rc > rRc.m_rc; }
338 /** @} */
339
340 /** Special automatic cast for RT_SUCCESS_NP. */
341 operator RTErrStrictType2() const { return RTErrStrictType2(m_rc); }
342
343private:
344 /** @name Constructors that will prevent some of the bad types.
345 * @{ */
346 VBOXSTRICTRC(uint8_t rc) : m_rc(-999) { NOREF(rc); }
347 VBOXSTRICTRC(uint16_t rc) : m_rc(-999) { NOREF(rc); }
348 VBOXSTRICTRC(uint32_t rc) : m_rc(-999) { NOREF(rc); }
349 VBOXSTRICTRC(uint64_t rc) : m_rc(-999) { NOREF(rc); }
350
351 VBOXSTRICTRC(int8_t rc) : m_rc(-999) { NOREF(rc); }
352 VBOXSTRICTRC(int16_t rc) : m_rc(-999) { NOREF(rc); }
353 VBOXSTRICTRC(int64_t rc) : m_rc(-999) { NOREF(rc); }
354 /** @} */
355};
356# ifdef _MSC_VER
357# pragma warning(disable:4190)
358# endif
359#else
360typedef int32_t VBOXSTRICTRC;
361#endif
362
363/** @def VBOXSTRICTRC_VAL
364 * Explicit getter.
365 * @param rcStrict The strict VirtualBox status code.
366 */
367#ifdef VBOXSTRICTRC_STRICT_ENABLED
368# define VBOXSTRICTRC_VAL(rcStrict) ( (rcStrict).getValue() )
369#else
370# define VBOXSTRICTRC_VAL(rcStrict) (rcStrict)
371#endif
372
373/** @def VBOXSTRICTRC_TODO
374 * Returns that needs dealing with.
375 * @param rcStrict The strict VirtualBox status code.
376 */
377#define VBOXSTRICTRC_TODO(rcStrict) VBOXSTRICTRC_VAL(rcStrict)
378
379
380/** A cross context I/O port range handle. */
381typedef uint64_t IOMIOPORTHANDLE;
382/** Pointer to a cross context I/O port handle. */
383typedef IOMIOPORTHANDLE *PIOMIOPORTHANDLE;
384/** A NIL I/O port handle. */
385#define NIL_IOMIOPORTHANDLE ((uint64_t)UINT64_MAX)
386
387/** A cross context MMIO range handle. */
388typedef uint64_t IOMMMIOHANDLE;
389/** Pointer to a cross context MMIO handle. */
390typedef IOMMMIOHANDLE *PIOMMMIOHANDLE;
391/** A NIL MMIO handle. */
392#define NIL_IOMMMIOHANDLE ((uint64_t)UINT64_MAX)
393
394/** A cross context MMIO2 range handle. */
395typedef uint64_t PGMMMIO2HANDLE;
396/** Pointer to a cross context MMIO2 handle. */
397typedef PGMMMIO2HANDLE *PPGMMMIO2HANDLE;
398/** A NIL MMIO2 handle. */
399#define NIL_PGMMMIO2HANDLE ((uint64_t)UINT64_MAX)
400
401/** Pointer to a PDM Base Interface. */
402typedef struct PDMIBASE *PPDMIBASE;
403/** Pointer to a pointer to a PDM Base Interface. */
404typedef PPDMIBASE *PPPDMIBASE;
405
406/** Pointer to a PDM device instance for the current context. */
407#ifdef IN_RING3
408typedef struct PDMDEVINSR3 *PPDMDEVINS;
409#elif defined(IN_RING0) || defined(DOXYGEN_RUNNING)
410typedef struct PDMDEVINSR0 *PPDMDEVINS;
411#else
412typedef struct PDMDEVINSRC *PPDMDEVINS;
413#endif
414/** Pointer to a pointer a PDM device instance for the current context. */
415typedef PPDMDEVINS *PPPDMDEVINS;
416/** R3 pointer to a PDM device instance. */
417typedef R3PTRTYPE(struct PDMDEVINSR3 *) PPDMDEVINSR3;
418/** R0 pointer to a PDM device instance. */
419typedef R0PTRTYPE(struct PDMDEVINSR0 *) PPDMDEVINSR0;
420/** RC pointer to a PDM device instance. */
421typedef RCPTRTYPE(struct PDMDEVINSRC *) PPDMDEVINSRC;
422
423/** Pointer to a PDM PCI device structure. */
424typedef struct PDMPCIDEV *PPDMPCIDEV;
425/** Pointer to a const PDM PCI device structure. */
426typedef const struct PDMPCIDEV *PCPDMPCIDEV;
427
428/** Pointer to a PDM USB Device Instance. */
429typedef struct PDMUSBINS *PPDMUSBINS;
430/** Pointer to a pointer to a PDM USB Device Instance. */
431typedef PPDMUSBINS *PPPDMUSBINS;
432
433/** Pointer to a PDM Driver Instance. */
434typedef struct PDMDRVINS *PPDMDRVINS;
435/** Pointer to a pointer to a PDM Driver Instance. */
436typedef PPDMDRVINS *PPPDMDRVINS;
437/** R3 pointer to a PDM Driver Instance. */
438typedef R3PTRTYPE(PPDMDRVINS) PPDMDRVINSR3;
439/** R0 pointer to a PDM Driver Instance. */
440typedef R0PTRTYPE(PPDMDRVINS) PPDMDRVINSR0;
441/** RC pointer to a PDM Driver Instance. */
442typedef RCPTRTYPE(PPDMDRVINS) PPDMDRVINSRC;
443
444/** Pointer to a PDM Service Instance. */
445typedef struct PDMSRVINS *PPDMSRVINS;
446/** Pointer to a pointer to a PDM Service Instance. */
447typedef PPDMSRVINS *PPPDMSRVINS;
448
449/** Pointer to a PDM critical section. */
450typedef union PDMCRITSECT *PPDMCRITSECT;
451/** Pointer to a const PDM critical section. */
452typedef const union PDMCRITSECT *PCPDMCRITSECT;
453
454/** Pointer to a PDM read/write critical section. */
455typedef union PDMCRITSECTRW *PPDMCRITSECTRW;
456/** Pointer to a const PDM read/write critical section. */
457typedef union PDMCRITSECTRW const *PCPDMCRITSECTRW;
458
459/** PDM queue handle. */
460typedef uint64_t PDMQUEUEHANDLE;
461/** Pointer to a PDM queue handle. */
462typedef PDMQUEUEHANDLE *PPDMQUEUEHANDLE;
463/** NIL PDM queue handle. */
464#define NIL_PDMQUEUEHANDLE ((PDMQUEUEHANDLE)UINT64_MAX)
465
466/** R3 pointer to a timer. */
467typedef R3PTRTYPE(struct TMTIMER *) PTMTIMERR3;
468/** Pointer to a R3 pointer to a timer. */
469typedef PTMTIMERR3 *PPTMTIMERR3;
470
471/** R0 pointer to a timer. */
472typedef R0PTRTYPE(struct TMTIMER *) PTMTIMERR0;
473/** Pointer to a R3 pointer to a timer. */
474typedef PTMTIMERR0 *PPTMTIMERR0;
475
476/** RC pointer to a timer. */
477typedef RCPTRTYPE(struct TMTIMER *) PTMTIMERRC;
478/** Pointer to a RC pointer to a timer. */
479typedef PTMTIMERRC *PPTMTIMERRC;
480
481/** Pointer to a timer. */
482typedef CTX_SUFF(PTMTIMER) PTMTIMER;
483/** Pointer to a pointer to a timer. */
484typedef PTMTIMER *PPTMTIMER;
485
486/** A cross context timer handle. */
487typedef uint64_t TMTIMERHANDLE;
488/** Pointer to a cross context timer handle. */
489typedef TMTIMERHANDLE *PTMTIMERHANDLE;
490/** A NIL timer handle. */
491#define NIL_TMTIMERHANDLE ((uint64_t)UINT64_MAX)
492
493/** SSM Operation handle. */
494typedef struct SSMHANDLE *PSSMHANDLE;
495/** Pointer to a const SSM stream method table. */
496typedef struct SSMSTRMOPS const *PCSSMSTRMOPS;
497
498/** Pointer to a CPUMCTX. */
499typedef struct CPUMCTX *PCPUMCTX;
500/** Pointer to a const CPUMCTX. */
501typedef const struct CPUMCTX *PCCPUMCTX;
502
503/** Pointer to a selector register. */
504typedef struct CPUMSELREG *PCPUMSELREG;
505/** Pointer to a const selector register. */
506typedef const struct CPUMSELREG *PCCPUMSELREG;
507
508/** Pointer to selector hidden registers.
509 * @deprecated Replaced by PCPUMSELREG */
510typedef struct CPUMSELREG *PCPUMSELREGHID;
511/** Pointer to const selector hidden registers.
512 * @deprecated Replaced by PCCPUMSELREG */
513typedef const struct CPUMSELREG *PCCPUMSELREGHID;
514
515/** A cross context DBGF tracer event source handle. */
516typedef uint64_t DBGFTRACEREVTSRC;
517/** Pointer to a cross context DBGF tracer event source handle. */
518typedef DBGFTRACEREVTSRC *PDBGFTRACEREVTSRC;
519/** A NIL DBGF tracer event source handle. */
520#define NIL_DBGFTRACEREVTSRC ((uint64_t)UINT64_MAX)
521
522/** Pointer to a DBGF tracer instance for the current context. */
523#ifdef IN_RING3
524typedef struct DBGFTRACERINSR3 *PDBGFTRACERINSCC;
525#elif defined(IN_RING0) || defined(DOXYGEN_RUNNING)
526typedef struct DBGFTRACERINSR0 *PDBGFTRACERINSCC;
527#else
528typedef struct DBGFTRACERINSRC *PDBGFTRACERINSCC;
529#endif
530/** Pointer to a pointer a DBGF tracer instance for the current context. */
531typedef PDBGFTRACERINSCC *PPDBGFTRACERINSCC;
532/** R3 pointer to a DBGF tracer instance. */
533typedef R3PTRTYPE(struct DBGFTRACERINSR3 *) PDBGFTRACERINSR3;
534/** R0 pointer to a DBGF tracer instance. */
535typedef R0PTRTYPE(struct DBGFTRACERINSR0 *) PDBGFTRACERINSR0;
536/** RC pointer to a DBGF tracer instance. */
537typedef RCPTRTYPE(struct DBGFTRACERINSRC *) PDBGFTRACERINSRC;
538
539/** A cross context DBGF breakpoint owner handle. */
540typedef uint32_t DBGFBPOWNER;
541/** Pointer to a cross context DBGF breakpoint owner handle. */
542typedef DBGFBPOWNER *PDBGFBPOWNER;
543/** A NIL DBGF breakpoint owner handle. */
544#define NIL_DBGFBPOWNER ((uint32_t)UINT32_MAX)
545
546/** A cross context DBGF breakpoint handle. */
547typedef uint32_t DBGFBP;
548/** Pointer to a cross context DBGF breakpoint handle. */
549typedef DBGFBP *PDBGFBP;
550/** A NIL DBGF breakpoint handle. */
551#define NIL_DBGFBP ((uint32_t)UINT32_MAX)
552
553/** A sample report handle. */
554typedef struct DBGFSAMPLEREPORTINT *DBGFSAMPLEREPORT;
555/** Pointer to a sample report handle. */
556typedef DBGFSAMPLEREPORT *PDBGFSAMPLEREPORT;
557/** @} */
558
559
560/** @defgroup grp_types_idt Interrupt Descriptor Table Entry.
561 * @todo This all belongs in x86.h!
562 * @{ */
563
564/** @todo VBOXIDT -> VBOXDESCIDT, skip the complex variations. We'll never use them. */
565
566/** IDT Entry, Task Gate view. */
567#pragma pack(1) /* paranoia */
568typedef struct VBOXIDTE_TASKGATE
569{
570 /** Reserved. */
571 unsigned u16Reserved1 : 16;
572 /** Task Segment Selector. */
573 unsigned u16TSS : 16;
574 /** More reserved. */
575 unsigned u8Reserved2 : 8;
576 /** Fixed value bit 0 - Set to 1. */
577 unsigned u1Fixed0 : 1;
578 /** Busy bit. */
579 unsigned u1Busy : 1;
580 /** Fixed value bit 2 - Set to 1. */
581 unsigned u1Fixed1 : 1;
582 /** Fixed value bit 3 - Set to 0. */
583 unsigned u1Fixed2 : 1;
584 /** Fixed value bit 4 - Set to 0. */
585 unsigned u1Fixed3 : 1;
586 /** Descriptor Privilege level. */
587 unsigned u2DPL : 2;
588 /** Present flag. */
589 unsigned u1Present : 1;
590 /** Reserved. */
591 unsigned u16Reserved3 : 16;
592} VBOXIDTE_TASKGATE;
593#pragma pack()
594/** Pointer to IDT Entry, Task gate view. */
595typedef VBOXIDTE_TASKGATE *PVBOXIDTE_TASKGATE;
596
597
598/** IDT Entry, Intertupt gate view. */
599#pragma pack(1) /* paranoia */
600typedef struct VBOXIDTE_INTERRUPTGATE
601{
602 /** Low offset word. */
603 unsigned u16OffsetLow : 16;
604 /** Segment Selector. */
605 unsigned u16SegSel : 16;
606 /** Reserved. */
607 unsigned u5Reserved2 : 5;
608 /** Fixed value bit 0 - Set to 0. */
609 unsigned u1Fixed0 : 1;
610 /** Fixed value bit 1 - Set to 0. */
611 unsigned u1Fixed1 : 1;
612 /** Fixed value bit 2 - Set to 0. */
613 unsigned u1Fixed2 : 1;
614 /** Fixed value bit 3 - Set to 0. */
615 unsigned u1Fixed3 : 1;
616 /** Fixed value bit 4 - Set to 1. */
617 unsigned u1Fixed4 : 1;
618 /** Fixed value bit 5 - Set to 1. */
619 unsigned u1Fixed5 : 1;
620 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
621 unsigned u132BitGate : 1;
622 /** Fixed value bit 5 - Set to 0. */
623 unsigned u1Fixed6 : 1;
624 /** Descriptor Privilege level. */
625 unsigned u2DPL : 2;
626 /** Present flag. */
627 unsigned u1Present : 1;
628 /** High offset word. */
629 unsigned u16OffsetHigh : 16;
630} VBOXIDTE_INTERRUPTGATE;
631#pragma pack()
632/** Pointer to IDT Entry, Interrupt gate view. */
633typedef VBOXIDTE_INTERRUPTGATE *PVBOXIDTE_INTERRUPTGATE;
634
635/** IDT Entry, Trap Gate view. */
636#pragma pack(1) /* paranoia */
637typedef struct VBOXIDTE_TRAPGATE
638{
639 /** Low offset word. */
640 unsigned u16OffsetLow : 16;
641 /** Segment Selector. */
642 unsigned u16SegSel : 16;
643 /** Reserved. */
644 unsigned u5Reserved2 : 5;
645 /** Fixed value bit 0 - Set to 0. */
646 unsigned u1Fixed0 : 1;
647 /** Fixed value bit 1 - Set to 0. */
648 unsigned u1Fixed1 : 1;
649 /** Fixed value bit 2 - Set to 0. */
650 unsigned u1Fixed2 : 1;
651 /** Fixed value bit 3 - Set to 1. */
652 unsigned u1Fixed3 : 1;
653 /** Fixed value bit 4 - Set to 1. */
654 unsigned u1Fixed4 : 1;
655 /** Fixed value bit 5 - Set to 1. */
656 unsigned u1Fixed5 : 1;
657 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
658 unsigned u132BitGate : 1;
659 /** Fixed value bit 5 - Set to 0. */
660 unsigned u1Fixed6 : 1;
661 /** Descriptor Privilege level. */
662 unsigned u2DPL : 2;
663 /** Present flag. */
664 unsigned u1Present : 1;
665 /** High offset word. */
666 unsigned u16OffsetHigh : 16;
667} VBOXIDTE_TRAPGATE;
668#pragma pack()
669/** Pointer to IDT Entry, Trap Gate view. */
670typedef VBOXIDTE_TRAPGATE *PVBOXIDTE_TRAPGATE;
671
672/** IDT Entry Generic view. */
673#pragma pack(1) /* paranoia */
674typedef struct VBOXIDTE_GENERIC
675{
676 /** Low offset word. */
677 unsigned u16OffsetLow : 16;
678 /** Segment Selector. */
679 unsigned u16SegSel : 16;
680 /** Reserved. */
681 unsigned u5Reserved : 5;
682 /** IDT Type part one (not used for task gate). */
683 unsigned u3Type1 : 3;
684 /** IDT Type part two. */
685 unsigned u5Type2 : 5;
686 /** Descriptor Privilege level. */
687 unsigned u2DPL : 2;
688 /** Present flag. */
689 unsigned u1Present : 1;
690 /** High offset word. */
691 unsigned u16OffsetHigh : 16;
692} VBOXIDTE_GENERIC;
693#pragma pack()
694/** Pointer to IDT Entry Generic view. */
695typedef VBOXIDTE_GENERIC *PVBOXIDTE_GENERIC;
696
697/** IDT Type1 value. (Reserved for task gate!) */
698#define VBOX_IDTE_TYPE1 0
699/** IDT Type2 value - Task gate. */
700#define VBOX_IDTE_TYPE2_TASK 0x5
701/** IDT Type2 value - 16 bit interrupt gate. */
702#define VBOX_IDTE_TYPE2_INT_16 0x6
703/** IDT Type2 value - 32 bit interrupt gate. */
704#define VBOX_IDTE_TYPE2_INT_32 0xe
705/** IDT Type2 value - 16 bit trap gate. */
706#define VBOX_IDTE_TYPE2_TRAP_16 0x7
707/** IDT Type2 value - 32 bit trap gate. */
708#define VBOX_IDTE_TYPE2_TRAP_32 0xf
709
710/** IDT Entry. */
711#pragma pack(1) /* paranoia */
712typedef union VBOXIDTE
713{
714 /** Task gate view. */
715 VBOXIDTE_TASKGATE Task;
716 /** Trap gate view. */
717 VBOXIDTE_TRAPGATE Trap;
718 /** Interrupt gate view. */
719 VBOXIDTE_INTERRUPTGATE Int;
720 /** Generic IDT view. */
721 VBOXIDTE_GENERIC Gen;
722
723 /** 8 bit unsigned integer view. */
724 uint8_t au8[8];
725 /** 16 bit unsigned integer view. */
726 uint16_t au16[4];
727 /** 32 bit unsigned integer view. */
728 uint32_t au32[2];
729 /** 64 bit unsigned integer view. */
730 uint64_t au64;
731} VBOXIDTE;
732#pragma pack()
733/** Pointer to IDT Entry. */
734typedef VBOXIDTE *PVBOXIDTE;
735/** Pointer to IDT Entry. */
736typedef VBOXIDTE const *PCVBOXIDTE;
737
738/** IDT Entry, 64-bit mode, Intertupt gate view. */
739#pragma pack(1) /* paranoia */
740typedef struct VBOXIDTE64_INTERRUPTGATE
741{
742 /** Low offset word. */
743 unsigned u16OffsetLow : 16;
744 /** Segment Selector. */
745 unsigned u16SegSel : 16;
746 /** Interrupt Stack Table Index. */
747 unsigned u3Ist : 3;
748 /** Fixed value bit 0 - Set to 0. */
749 unsigned u1Fixed0 : 1;
750 /** Fixed value bit 1 - Set to 0. */
751 unsigned u1Fixed1 : 1;
752 /** Fixed value bit 2 - Set to 0. */
753 unsigned u1Fixed2 : 1;
754 /** Fixed value bit 3 - Set to 0. */
755 unsigned u1Fixed3 : 1;
756 /** Fixed value bit 4 - Set to 0. */
757 unsigned u1Fixed4 : 1;
758 /** Fixed value bit 5 - Set to 0. */
759 unsigned u1Fixed5 : 1;
760 /** Fixed value bit 6 - Set to 1. */
761 unsigned u1Fixed6 : 1;
762 /** Fixed value bit 7 - Set to 1. */
763 unsigned u1Fixed7 : 1;
764 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
765 unsigned u132BitGate : 1;
766 /** Fixed value bit 5 - Set to 0. */
767 unsigned u1Fixed8 : 1;
768 /** Descriptor Privilege level. */
769 unsigned u2DPL : 2;
770 /** Present flag. */
771 unsigned u1Present : 1;
772 /** High offset word. */
773 unsigned u16OffsetHigh : 16;
774 /** Offset bits 32..63. */
775 unsigned u32OffsetHigh64;
776 /** Reserved. */
777 unsigned u32Reserved;
778} VBOXIDTE64_INTERRUPTGATE;
779#pragma pack()
780/** Pointer to IDT Entry, 64-bit mode, Interrupt gate view. */
781typedef VBOXIDTE64_INTERRUPTGATE *PVBOXIDTE64_INTERRUPTGATE;
782
783/** IDT Entry, 64-bit mode, Trap gate view. */
784#pragma pack(1) /* paranoia */
785typedef struct VBOXIDTE64_TRAPGATE
786{
787 /** Low offset word. */
788 unsigned u16OffsetLow : 16;
789 /** Segment Selector. */
790 unsigned u16SegSel : 16;
791 /** Interrupt Stack Table Index. */
792 unsigned u3Ist : 3;
793 /** Fixed value bit 0 - Set to 0. */
794 unsigned u1Fixed0 : 1;
795 /** Fixed value bit 1 - Set to 0. */
796 unsigned u1Fixed1 : 1;
797 /** Fixed value bit 2 - Set to 0. */
798 unsigned u1Fixed2 : 1;
799 /** Fixed value bit 3 - Set to 0. */
800 unsigned u1Fixed3 : 1;
801 /** Fixed value bit 4 - Set to 0. */
802 unsigned u1Fixed4 : 1;
803 /** Fixed value bit 5 - Set to 1. */
804 unsigned u1Fixed5 : 1;
805 /** Fixed value bit 6 - Set to 1. */
806 unsigned u1Fixed6 : 1;
807 /** Fixed value bit 7 - Set to 1. */
808 unsigned u1Fixed7 : 1;
809 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
810 unsigned u132BitGate : 1;
811 /** Fixed value bit 5 - Set to 0. */
812 unsigned u1Fixed8 : 1;
813 /** Descriptor Privilege level. */
814 unsigned u2DPL : 2;
815 /** Present flag. */
816 unsigned u1Present : 1;
817 /** High offset word. */
818 unsigned u16OffsetHigh : 16;
819 /** Offset bits 32..63. */
820 unsigned u32OffsetHigh64;
821 /** Reserved. */
822 unsigned u32Reserved;
823} VBOXIDTE64_TRAPGATE;
824#pragma pack()
825/** Pointer to IDT Entry, 64-bit mode, Trap gate view. */
826typedef VBOXIDTE64_TRAPGATE *PVBOXIDTE64_TRAPGATE;
827
828/** IDT Entry, 64-bit mode, Generic view. */
829#pragma pack(1) /* paranoia */
830typedef struct VBOXIDTE64_GENERIC
831{
832 /** Low offset word. */
833 unsigned u16OffsetLow : 16;
834 /** Segment Selector. */
835 unsigned u16SegSel : 16;
836 /** Reserved. */
837 unsigned u3Ist : 3;
838 /** Fixed value bit 0 - Set to 0. */
839 unsigned u1Fixed0 : 1;
840 /** Fixed value bit 1 - Set to 0. */
841 unsigned u1Fixed1 : 1;
842 /** IDT Type part one (not used for task gate). */
843 unsigned u3Type1 : 3;
844 /** IDT Type part two. */
845 unsigned u5Type2 : 5;
846 /** Descriptor Privilege level. */
847 unsigned u2DPL : 2;
848 /** Present flag. */
849 unsigned u1Present : 1;
850 /** High offset word. */
851 unsigned u16OffsetHigh : 16;
852 /** Offset bits 32..63. */
853 unsigned u32OffsetHigh64;
854 /** Reserved. */
855 unsigned u32Reserved;
856} VBOXIDTE64_GENERIC;
857#pragma pack()
858/** Pointer to IDT Entry, 64-bit mode, Generic view. */
859typedef VBOXIDTE64_GENERIC *PVBOXIDTE64_GENERIC;
860
861/** IDT Entry, 64-bit mode. */
862#pragma pack(1) /* paranoia */
863typedef union VBOXIDTE64
864{
865 /** Trap gate view. */
866 VBOXIDTE64_TRAPGATE Trap;
867 /** Interrupt gate view. */
868 VBOXIDTE64_INTERRUPTGATE Int;
869 /** Generic IDT view. */
870 VBOXIDTE64_GENERIC Gen;
871
872 /** 8 bit unsigned integer view. */
873 uint8_t au8[16];
874 /** 16 bit unsigned integer view. */
875 uint16_t au16[8];
876 /** 32 bit unsigned integer view. */
877 uint32_t au32[4];
878 /** 64 bit unsigned integer view. */
879 uint64_t au64[2];
880} VBOXIDTE64;
881#pragma pack()
882/** Pointer to IDT Entry. */
883typedef VBOXIDTE64 *PVBOXIDTE64;
884/** Pointer to IDT Entry. */
885typedef VBOXIDTE64 const *PCVBOXIDTE64;
886
887#pragma pack(1)
888/** IDTR */
889typedef struct VBOXIDTR
890{
891 /** Size of the IDT. */
892 uint16_t cbIdt;
893 /** Address of the IDT. */
894 uint64_t pIdt;
895} VBOXIDTR, *PVBOXIDTR;
896#pragma pack()
897
898
899/** @def VBOXIDTE_OFFSET
900 * Return the offset of an IDT entry.
901 */
902#define VBOXIDTE_OFFSET(desc) \
903 ( ((uint32_t)((desc).Gen.u16OffsetHigh) << 16) \
904 | ( (desc).Gen.u16OffsetLow ) )
905
906/** @def VBOXIDTE64_OFFSET
907 * Return the offset of an IDT entry.
908 */
909#define VBOXIDTE64_OFFSET(desc) \
910 ( ((uint64_t)((desc).Gen.u32OffsetHigh64) << 32) \
911 | ((uint32_t)((desc).Gen.u16OffsetHigh) << 16) \
912 | ( (desc).Gen.u16OffsetLow ) )
913
914#pragma pack(1)
915/** GDTR */
916typedef struct VBOXGDTR
917{
918 /** Size of the GDT. */
919 uint16_t cbGdt;
920 /** Address of the GDT. */
921 uint64_t pGdt;
922} VBOXGDTR;
923#pragma pack()
924/** Pointer to GDTR. */
925typedef VBOXGDTR *PVBOXGDTR;
926
927/** @} */
928
929
930/**
931 * 32-bit Task Segment used in raw mode.
932 * @todo Move this to SELM! Use X86TSS32 instead.
933 */
934#pragma pack(1)
935typedef struct VBOXTSS
936{
937 /** 0x00 - Back link to previous task. (static) */
938 RTSEL selPrev;
939 uint16_t padding1;
940 /** 0x04 - Ring-0 stack pointer. (static) */
941 uint32_t esp0;
942 /** 0x08 - Ring-0 stack segment. (static) */
943 RTSEL ss0;
944 uint16_t padding_ss0;
945 /** 0x0c - Ring-1 stack pointer. (static) */
946 uint32_t esp1;
947 /** 0x10 - Ring-1 stack segment. (static) */
948 RTSEL ss1;
949 uint16_t padding_ss1;
950 /** 0x14 - Ring-2 stack pointer. (static) */
951 uint32_t esp2;
952 /** 0x18 - Ring-2 stack segment. (static) */
953 RTSEL ss2;
954 uint16_t padding_ss2;
955 /** 0x1c - Page directory for the task. (static) */
956 uint32_t cr3;
957 /** 0x20 - EIP before task switch. */
958 uint32_t eip;
959 /** 0x24 - EFLAGS before task switch. */
960 uint32_t eflags;
961 /** 0x28 - EAX before task switch. */
962 uint32_t eax;
963 /** 0x2c - ECX before task switch. */
964 uint32_t ecx;
965 /** 0x30 - EDX before task switch. */
966 uint32_t edx;
967 /** 0x34 - EBX before task switch. */
968 uint32_t ebx;
969 /** 0x38 - ESP before task switch. */
970 uint32_t esp;
971 /** 0x3c - EBP before task switch. */
972 uint32_t ebp;
973 /** 0x40 - ESI before task switch. */
974 uint32_t esi;
975 /** 0x44 - EDI before task switch. */
976 uint32_t edi;
977 /** 0x48 - ES before task switch. */
978 RTSEL es;
979 uint16_t padding_es;
980 /** 0x4c - CS before task switch. */
981 RTSEL cs;
982 uint16_t padding_cs;
983 /** 0x50 - SS before task switch. */
984 RTSEL ss;
985 uint16_t padding_ss;
986 /** 0x54 - DS before task switch. */
987 RTSEL ds;
988 uint16_t padding_ds;
989 /** 0x58 - FS before task switch. */
990 RTSEL fs;
991 uint16_t padding_fs;
992 /** 0x5c - GS before task switch. */
993 RTSEL gs;
994 uint16_t padding_gs;
995 /** 0x60 - LDTR before task switch. */
996 RTSEL selLdt;
997 uint16_t padding_ldt;
998 /** 0x64 - Debug trap flag */
999 uint16_t fDebugTrap;
1000 /** 0x66 - Offset relative to the TSS of the start of the I/O Bitmap
1001 * and the end of the interrupt redirection bitmap. */
1002 uint16_t offIoBitmap;
1003 /** 0x68 - 32 bytes for the virtual interrupt redirection bitmap. (VME) */
1004 uint8_t IntRedirBitmap[32];
1005} VBOXTSS;
1006#pragma pack()
1007/** Pointer to task segment. */
1008typedef VBOXTSS *PVBOXTSS;
1009/** Pointer to const task segment. */
1010typedef const VBOXTSS *PCVBOXTSS;
1011
1012
1013/** Pointer to a callback method table provided by the VM API user. */
1014typedef struct VMM2USERMETHODS const *PCVMM2USERMETHODS;
1015
1016
1017/**
1018 * Forms of generic segment offloading.
1019 */
1020typedef enum PDMNETWORKGSOTYPE
1021{
1022 /** Invalid zero value. */
1023 PDMNETWORKGSOTYPE_INVALID = 0,
1024 /** TCP/IPv4 - no CWR/ECE encoding. */
1025 PDMNETWORKGSOTYPE_IPV4_TCP,
1026 /** TCP/IPv6 - no CWR/ECE encoding. */
1027 PDMNETWORKGSOTYPE_IPV6_TCP,
1028 /** UDP/IPv4. */
1029 PDMNETWORKGSOTYPE_IPV4_UDP,
1030 /** UDP/IPv6. */
1031 PDMNETWORKGSOTYPE_IPV6_UDP,
1032 /** TCP/IPv6 over IPv4 tunneling - no CWR/ECE encoding.
1033 * The header offsets and sizes relates to IPv4 and TCP, the IPv6 header is
1034 * figured out as needed.
1035 * @todo Needs checking against facts, this is just an outline of the idea. */
1036 PDMNETWORKGSOTYPE_IPV4_IPV6_TCP,
1037 /** UDP/IPv6 over IPv4 tunneling.
1038 * The header offsets and sizes relates to IPv4 and UDP, the IPv6 header is
1039 * figured out as needed.
1040 * @todo Needs checking against facts, this is just an outline of the idea. */
1041 PDMNETWORKGSOTYPE_IPV4_IPV6_UDP,
1042 /** The end of valid GSO types. */
1043 PDMNETWORKGSOTYPE_END
1044} PDMNETWORKGSOTYPE;
1045
1046
1047/**
1048 * Generic segment offloading context.
1049 *
1050 * We generally follow the E1000 specs wrt to which header fields we change.
1051 * However the GSO type implies where the checksum fields are and that they are
1052 * always updated from scratch (no half done pseudo checksums).
1053 *
1054 * @remarks This is part of the internal network GSO packets. Take great care
1055 * when making changes. The size is expected to be exactly 8 bytes.
1056 *
1057 * @ingroup grp_pdm
1058 */
1059typedef struct PDMNETWORKGSO
1060{
1061 /** The type of segmentation offloading we're performing (PDMNETWORKGSOTYPE). */
1062 uint8_t u8Type;
1063 /** The total header size. */
1064 uint8_t cbHdrsTotal;
1065 /** The max segment size (MSS) to apply. */
1066 uint16_t cbMaxSeg;
1067
1068 /** Offset of the first header (IPv4 / IPv6). 0 if not not needed. */
1069 uint8_t offHdr1;
1070 /** Offset of the second header (TCP / UDP). 0 if not not needed. */
1071 uint8_t offHdr2;
1072 /** The header size used for segmentation (equal to offHdr2 in UFO). */
1073 uint8_t cbHdrsSeg;
1074 /** Unused. */
1075 uint8_t u8Unused;
1076} PDMNETWORKGSO;
1077/** Pointer to a GSO context.
1078 * @ingroup grp_pdm */
1079typedef PDMNETWORKGSO *PPDMNETWORKGSO;
1080/** Pointer to a const GSO context.
1081 * @ingroup grp_pdm */
1082typedef PDMNETWORKGSO const *PCPDMNETWORKGSO;
1083
1084/** Pointer to a PDM filter handle.
1085 * @ingroup grp_pdm_net_shaper */
1086typedef struct PDMNSFILTER *PPDMNSFILTER;
1087/** Pointer to a network shaper.
1088 * @ingroup grp_pdm_net_shaper */
1089typedef struct PDMNETSHAPER *PPDMNETSHAPER;
1090
1091
1092/**
1093 * The current ROM page protection.
1094 *
1095 * @remarks This is part of the saved state.
1096 * @ingroup grp_pgm
1097 */
1098typedef enum PGMROMPROT
1099{
1100 /** The customary invalid value. */
1101 PGMROMPROT_INVALID = 0,
1102 /** Read from the virgin ROM page, ignore writes.
1103 * Map the virgin page, use write access handler to ignore writes. */
1104 PGMROMPROT_READ_ROM_WRITE_IGNORE,
1105 /** Read from the virgin ROM page, write to the shadow RAM.
1106 * Map the virgin page, use write access handler to change the shadow RAM. */
1107 PGMROMPROT_READ_ROM_WRITE_RAM,
1108 /** Read from the shadow ROM page, ignore writes.
1109 * Map the shadow page read-only, use write access handler to ignore writes. */
1110 PGMROMPROT_READ_RAM_WRITE_IGNORE,
1111 /** Read from the shadow ROM page, ignore writes.
1112 * Map the shadow page read-write, disabled write access handler. */
1113 PGMROMPROT_READ_RAM_WRITE_RAM,
1114 /** The end of valid values. */
1115 PGMROMPROT_END,
1116 /** The usual 32-bit type size hack. */
1117 PGMROMPROT_32BIT_HACK = 0x7fffffff
1118} PGMROMPROT;
1119
1120
1121/**
1122 * Page mapping lock.
1123 * @ingroup grp_pgm
1124 */
1125typedef struct PGMPAGEMAPLOCK
1126{
1127#if defined(IN_RC)
1128 /** The locked page. */
1129 void *pvPage;
1130 /** Pointer to the CPU that made the mapping.
1131 * In ring-0 and raw-mode context we don't intend to ever allow long term
1132 * locking and this is a way of making sure we're still on the same CPU. */
1133 PVMCPU pVCpu;
1134#else
1135 /** Pointer to the PGMPAGE and lock type.
1136 * bit-0 abuse: set=write, clear=read. */
1137 uintptr_t uPageAndType;
1138/** Read lock type value. */
1139# define PGMPAGEMAPLOCK_TYPE_READ ((uintptr_t)0)
1140/** Write lock type value. */
1141# define PGMPAGEMAPLOCK_TYPE_WRITE ((uintptr_t)1)
1142/** Lock type mask. */
1143# define PGMPAGEMAPLOCK_TYPE_MASK ((uintptr_t)1)
1144 /** Pointer to the PGMCHUNKR3MAP. */
1145 void *pvMap;
1146#endif
1147} PGMPAGEMAPLOCK;
1148/** Pointer to a page mapping lock.
1149 * @ingroup grp_pgm */
1150typedef PGMPAGEMAPLOCK *PPGMPAGEMAPLOCK;
1151
1152
1153/** Pointer to a info helper callback structure. */
1154typedef struct DBGFINFOHLP *PDBGFINFOHLP;
1155/** Pointer to a const info helper callback structure. */
1156typedef const struct DBGFINFOHLP *PCDBGFINFOHLP;
1157
1158/** Pointer to a const register descriptor. */
1159typedef struct DBGFREGDESC const *PCDBGFREGDESC;
1160
1161
1162/** Configuration manager tree node - A key. */
1163typedef struct CFGMNODE *PCFGMNODE;
1164
1165/** Configuration manager tree leaf - A value. */
1166typedef struct CFGMLEAF *PCFGMLEAF;
1167
1168
1169/**
1170 * CPU modes.
1171 */
1172typedef enum CPUMMODE
1173{
1174 /** The usual invalid zero entry. */
1175 CPUMMODE_INVALID = 0,
1176 /** Real mode - x86/amd64. */
1177 CPUMMODE_REAL,
1178 /** Protected mode (32-bit) - x86/amd64. */
1179 CPUMMODE_PROTECTED,
1180 /** Long mode (64-bit) - x86/amd64. */
1181 CPUMMODE_LONG,
1182 /** ARMv8 - AARCH64 mode. */
1183 CPUMMODE_ARMV8_AARCH64,
1184 /** ARMv8 - AARCH32 mode. */
1185 CPUMMODE_ARMV8_AARCH32,
1186 /** hack forcing the size of the enum to 32-bits. */
1187 CPUMMODE_32BIT_HACK = 0x7fffffff
1188} CPUMMODE;
1189
1190
1191/**
1192 * CPU mode flags (DISSTATE::mode).
1193 */
1194typedef enum DISCPUMODE
1195{
1196 DISCPUMODE_INVALID = 0,
1197 DISCPUMODE_16BIT,
1198 DISCPUMODE_32BIT,
1199 DISCPUMODE_64BIT,
1200
1201 /** @name ARMv8 modes.
1202 * @{ */
1203 /** AArch64 A64 instruction set. */
1204 DISCPUMODE_ARMV8_A64,
1205 /** AArch32 A32 instruction set. */
1206 DISCPUMODE_ARMV8_A32,
1207 /** AArch32 T32 (aka Thumb) instruction set. */
1208 DISCPUMODE_ARMV8_T32,
1209 /** @} */
1210
1211 /** hack forcing the size of the enum to 32-bits. */
1212 DISCPUMODE_MAKE_32BIT_HACK = 0x7fffffff
1213} DISCPUMODE;
1214
1215/** Pointer to the disassembler state. */
1216typedef struct DISSTATE *PDISSTATE;
1217/** Pointer to a const disassembler state. */
1218typedef struct DISSTATE const *PCDISSTATE;
1219
1220/** Forward declaration of pointer to const opcode. */
1221typedef const struct DISOPCODE *PCDISOPCODE;
1222
1223/** Forward declaration of pointer to opcode parameter. */
1224typedef struct DISOPPARAM *PDISOPPARAM;
1225
1226
1227/**
1228 * Shared region description (needed by GMM and others, thus global).
1229 * @ingroup grp_vmmdev
1230 */
1231typedef struct VMMDEVSHAREDREGIONDESC
1232{
1233 RTGCPTR64 GCRegionAddr;
1234 uint32_t cbRegion;
1235 uint32_t u32Alignment;
1236} VMMDEVSHAREDREGIONDESC;
1237
1238
1239/**
1240 * A PCI bus:device:function (BDF) identifier.
1241 *
1242 * All 16 bits of a BDF are valid according to the PCI spec. We need one extra bit
1243 * to determine whether the BDF is valid in interfaces where the BDF may be
1244 * optional.
1245 */
1246typedef uint32_t PCIBDF;
1247/** PCIBDF flag: Invalid. */
1248#define PCI_BDF_F_INVALID RT_BIT(31)
1249/** Nil PCIBDF value. */
1250#define NIL_PCIBDF PCI_BDF_F_INVALID
1251
1252/** Pointer to an MSI message struct. */
1253typedef struct MSIMSG *PMSIMSG;
1254/** Pointer to a const MSI message struct. */
1255typedef const struct MSIMSG *PCMSIMSG;
1256
1257
1258/** @} */
1259
1260#endif /* !VBOX_INCLUDED_types_h */
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