VirtualBox

source: vbox/trunk/include/VBox/types.h@ 20663

Last change on this file since 20663 was 20087, checked in by vboxsync, 16 years ago

TM,*: Proper timer callback locking and pvUser for devices.

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1/** @file
2 * VirtualBox - Types.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_types_h
31#define ___VBox_types_h
32
33#include <VBox/cdefs.h>
34#include <iprt/types.h>
35
36
37/** @defgroup grp_types Basic VBox Types
38 * @{
39 */
40
41
42/** @defgroup grp_types_both Common Guest and Host Context Basic Types
43 * @ingroup grp_types
44 * @{
45 */
46
47
48/** @defgroup grp_types_hc Host Context Basic Types
49 * @ingroup grp_types_both
50 * @{
51 */
52
53/** @} */
54
55
56/** @defgroup grp_types_gc Guest Context Basic Types
57 * @ingroup grp_types_both
58 * @{
59 */
60
61/** @} */
62
63
64/** Pointer to per support driver session data.
65 * (The data is a R0 entity and private to the the R0 SUP part. All
66 * other should consider this a sort of handle.) */
67typedef R0PTRTYPE(struct SUPDRVSESSION *) PSUPDRVSESSION;
68
69/** Pointer to a VM. */
70typedef struct VM *PVM;
71/** Pointer to a VM - Ring-0 Ptr. */
72typedef R0PTRTYPE(struct VM *) PVMR0;
73/** Pointer to a VM - Ring-3 Ptr. */
74typedef R3PTRTYPE(struct VM *) PVMR3;
75/** Pointer to a VM - RC Ptr. */
76typedef RCPTRTYPE(struct VM *) PVMRC;
77
78/** Pointer to a virtual CPU structure. */
79typedef struct VMCPU * PVMCPU;
80/** Pointer to a virtual CPU structure - Ring-3 Ptr. */
81typedef R3PTRTYPE(struct VMCPU *) PVMCPUR3;
82/** Pointer to a virtual CPU structure - Ring-0 Ptr. */
83typedef R0PTRTYPE(struct VMCPU *) PVMCPUR0;
84/** Pointer to a virtual CPU structure - RC Ptr. */
85typedef RCPTRTYPE(struct VMCPU *) PVMCPURC;
86
87/** Pointer to a ring-0 (global) VM structure. */
88typedef R0PTRTYPE(struct GVM *) PGVM;
89
90/** Pointer to a ring-3 (user mode) VM structure. */
91typedef R3PTRTYPE(struct UVM *) PUVM;
92
93/** Pointer to a ring-3 (user mode) VMCPU structure. */
94typedef R3PTRTYPE(struct UVMCPU *) PUVMCPU;
95
96/** Virtual CPU ID. */
97typedef uint32_t VMCPUID;
98/** Pointer to a virtual CPU ID. */
99typedef VMCPUID *PVMCPUID;
100/** @name Special CPU ID values.
101 * Most of these are for request scheduling.
102 *
103 * @{ */
104/** All virtual CPUs. */
105#define VMCPUID_ALL UINT32_C(0xfffffff2)
106/** All virtual CPUs, descending order. */
107#define VMCPUID_ALL_REVERSE UINT32_C(0xfffffff3)
108/** Any virtual CPU.
109 * Intended for scheduling a VM request or some other task. */
110#define VMCPUID_ANY UINT32_C(0xfffffff4)
111/** The NIL value. */
112#define NIL_VMCPUID UINT32_C(0xfffffffd)
113/** @} */
114
115/**
116 * Virtual CPU set.
117 */
118typedef struct VMCPUSET
119{
120 /** The bitmap data. */
121 uint32_t au32Bitmap[256/32];
122} VMCPUSET;
123/** Pointer to a Virtual CPU set. */
124typedef VMCPUSET *PVMCPUSET;
125/** Pointer to a const Virtual CPU set. */
126typedef VMCPUSET const *PCVMCPUSET;
127
128/** Tests if a valid CPU ID is present in the set.. */
129#define VMCPUSET_IS_PRESENT(pSet, idCpu) ASMBitTest( &(pSet)->au32Bitmap, (idCpu))
130/** Adds a CPU to the set. */
131#define VMCPUSET_ADD(pSet, idCpu) ASMBitSet( &(pSet)->au32Bitmap, (idCpu))
132/** Deletes a CPU from the set. */
133#define VMCPUSET_DEL(pSet, idCpu) ASMBitClear(&(pSet)->au32Bitmap, (idCpu))
134/** Empties the set. */
135#define VMCPUSET_EMPTY(pSet, idCpu) memset(&(pSet)->au32Bitmap, '\0', sizeof((pSet)->au32Bitmap))
136/** Filles the set. */
137#define VMCPUSET_FILL(pSet, idCpu) memset(&(pSet)->au32Bitmap, 0xff, sizeof((pSet)->au32Bitmap))
138/** Filles the set. */
139#define VMCPUSET_IS_EQUAL(pSet1, pSet2) (memcmp(&(pSet1)->au32Bitmap, &(pSet2)->au32Bitmap, sizeof((pSet1)->au32Bitmap)) == 0)
140
141
142/** VM State
143 */
144typedef enum VMSTATE
145{
146 /** The VM is being created. */
147 VMSTATE_CREATING = 0,
148 /** The VM is created. */
149 VMSTATE_CREATED,
150 /** The VM is runnning. */
151 VMSTATE_RUNNING,
152 /** The VM state is being loaded from file. */
153 VMSTATE_LOADING,
154 /** The VM is screwed because of a failed state loading. */
155 VMSTATE_LOAD_FAILURE,
156 /** The VM state is being saved to file. */
157 VMSTATE_SAVING,
158 /** The VM is suspended. */
159 VMSTATE_SUSPENDED,
160 /** The VM is being reset. */
161 VMSTATE_RESETTING,
162 /** The VM is in guru meditation over a fatal failure. */
163 VMSTATE_GURU_MEDITATION,
164 /** The VM is switched off, awaiting destruction. */
165 VMSTATE_OFF,
166 /** The VM is being destroyed. */
167 VMSTATE_DESTROYING,
168 /** Terminated. */
169 VMSTATE_TERMINATED,
170 /** hack forcing the size of the enum to 32-bits. */
171 VMSTATE_MAKE_32BIT_HACK = 0x7fffffff
172} VMSTATE;
173
174
175/** Pointer to a PDM Driver Base Interface. */
176typedef struct PDMIBASE *PPDMIBASE;
177/** Pointer to a pointer to a PDM Driver Base Interface. */
178typedef PPDMIBASE *PPPDMIBASE;
179
180/** Pointer to a PDM Device Instance. */
181typedef struct PDMDEVINS *PPDMDEVINS;
182/** Pointer to a pointer to a PDM Device Instance. */
183typedef PPDMDEVINS *PPPDMDEVINS;
184/** R3 pointer to a PDM Device Instance. */
185typedef R3PTRTYPE(PPDMDEVINS) PPDMDEVINSR3;
186/** R0 pointer to a PDM Device Instance. */
187typedef R0PTRTYPE(PPDMDEVINS) PPDMDEVINSR0;
188/** RC pointer to a PDM Device Instance. */
189typedef RCPTRTYPE(PPDMDEVINS) PPDMDEVINSRC;
190
191/** Pointer to a PDM USB Device Instance. */
192typedef struct PDMUSBINS *PPDMUSBINS;
193/** Pointer to a pointer to a PDM USB Device Instance. */
194typedef PPDMUSBINS *PPPDMUSBINS;
195
196/** Pointer to a PDM Driver Instance. */
197typedef struct PDMDRVINS *PPDMDRVINS;
198/** Pointer to a pointer to a PDM Driver Instance. */
199typedef PPDMDRVINS *PPPDMDRVINS;
200
201/** Pointer to a PDM Service Instance. */
202typedef struct PDMSRVINS *PPDMSRVINS;
203/** Pointer to a pointer to a PDM Service Instance. */
204typedef PPDMSRVINS *PPPDMSRVINS;
205
206/** Pointer to a PDM critical section. */
207typedef union PDMCRITSECT *PPDMCRITSECT;
208/** Pointer to a const PDM critical section. */
209typedef const union PDMCRITSECT *PCPDMCRITSECT;
210
211/** R3 pointer to a timer. */
212typedef R3PTRTYPE(struct TMTIMER *) PTMTIMERR3;
213/** Pointer to a R3 pointer to a timer. */
214typedef PTMTIMERR3 *PPTMTIMERR3;
215
216/** R0 pointer to a timer. */
217typedef R0PTRTYPE(struct TMTIMER *) PTMTIMERR0;
218/** Pointer to a R3 pointer to a timer. */
219typedef PTMTIMERR0 *PPTMTIMERR0;
220
221/** RC pointer to a timer. */
222typedef RCPTRTYPE(struct TMTIMER *) PTMTIMERRC;
223/** Pointer to a RC pointer to a timer. */
224typedef PTMTIMERRC *PPTMTIMERRC;
225
226/** Pointer to a timer. */
227typedef CTX_SUFF(PTMTIMER) PTMTIMER;
228/** Pointer to a pointer to a timer. */
229typedef PTMTIMER *PPTMTIMER;
230
231/** SSM Operation handle. */
232typedef struct SSMHANDLE *PSSMHANDLE;
233
234/** Pointer to a CPUMCTX. */
235typedef struct CPUMCTX *PCPUMCTX;
236/** Pointer to a const CPUMCTX. */
237typedef const struct CPUMCTX *PCCPUMCTX;
238
239/** Pointer to a CPU context core. */
240typedef struct CPUMCTXCORE *PCPUMCTXCORE;
241/** Pointer to a const CPU context core. */
242typedef const struct CPUMCTXCORE *PCCPUMCTXCORE;
243
244/** Pointer to selector hidden registers. */
245typedef struct CPUMSELREGHID *PCPUMSELREGHID;
246/** Pointer to const selector hidden registers. */
247typedef const struct CPUMSELREGHID *PCCPUMSELREGHID;
248
249/** @} */
250
251
252/** @defgroup grp_types_idt Interrupt Descriptor Table Entry.
253 * @ingroup grp_types
254 * @todo This all belongs in x86.h!
255 * @{ */
256
257/** @todo VBOXIDT -> VBOXDESCIDT, skip the complex variations. We'll never use them. */
258
259/** IDT Entry, Task Gate view. */
260#pragma pack(1) /* paranoia */
261typedef struct VBOXIDTE_TASKGATE
262{
263 /** Reserved. */
264 unsigned u16Reserved1 : 16;
265 /** Task Segment Selector. */
266 unsigned u16TSS : 16;
267 /** More reserved. */
268 unsigned u8Reserved2 : 8;
269 /** Fixed value bit 0 - Set to 1. */
270 unsigned u1Fixed0 : 1;
271 /** Busy bit. */
272 unsigned u1Busy : 1;
273 /** Fixed value bit 2 - Set to 1. */
274 unsigned u1Fixed1 : 1;
275 /** Fixed value bit 3 - Set to 0. */
276 unsigned u1Fixed2: 1;
277 /** Fixed value bit 4 - Set to 0. */
278 unsigned u1Fixed3 : 1;
279 /** Descriptor Privilege level. */
280 unsigned u2DPL : 2;
281 /** Present flag. */
282 unsigned u1Present : 1;
283 /** Reserved. */
284 unsigned u16Reserved3 : 16;
285} VBOXIDTE_TASKGATE;
286#pragma pack()
287/** Pointer to IDT Entry, Task gate view. */
288typedef VBOXIDTE_TASKGATE *PVBOXIDTE_TASKGATE;
289
290
291/** IDT Entry, Intertupt gate view. */
292#pragma pack(1) /* paranoia */
293typedef struct VBOXIDTE_INTERRUPTGATE
294{
295 /** Low offset word. */
296 unsigned u16OffsetLow : 16;
297 /** Segment Selector. */
298 unsigned u16SegSel : 16;
299 /** Reserved. */
300 unsigned u5Reserved2 : 5;
301 /** Fixed value bit 0 - Set to 0. */
302 unsigned u1Fixed0 : 1;
303 /** Fixed value bit 1 - Set to 0. */
304 unsigned u1Fixed1 : 1;
305 /** Fixed value bit 2 - Set to 0. */
306 unsigned u1Fixed2 : 1;
307 /** Fixed value bit 3 - Set to 0. */
308 unsigned u1Fixed3: 1;
309 /** Fixed value bit 4 - Set to 1. */
310 unsigned u1Fixed4 : 1;
311 /** Fixed value bit 5 - Set to 1. */
312 unsigned u1Fixed5 : 1;
313 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
314 unsigned u132BitGate : 1;
315 /** Fixed value bit 5 - Set to 0. */
316 unsigned u1Fixed6 : 1;
317 /** Descriptor Privilege level. */
318 unsigned u2DPL : 2;
319 /** Present flag. */
320 unsigned u1Present : 1;
321 /** High offset word. */
322 unsigned u16OffsetHigh : 16;
323} VBOXIDTE_INTERRUPTGATE;
324#pragma pack()
325/** Pointer to IDT Entry, Interrupt gate view. */
326typedef VBOXIDTE_INTERRUPTGATE *PVBOXIDTE_INTERRUPTGATE;
327
328/** IDT Entry, Trap Gate view. */
329#pragma pack(1) /* paranoia */
330typedef struct VBOXIDTE_TRAPGATE
331{
332 /** Low offset word. */
333 unsigned u16OffsetLow : 16;
334 /** Segment Selector. */
335 unsigned u16SegSel : 16;
336 /** Reserved. */
337 unsigned u5Reserved2 : 5;
338 /** Fixed value bit 0 - Set to 0. */
339 unsigned u1Fixed0 : 1;
340 /** Fixed value bit 1 - Set to 0. */
341 unsigned u1Fixed1 : 1;
342 /** Fixed value bit 2 - Set to 0. */
343 unsigned u1Fixed2 : 1;
344 /** Fixed value bit 3 - Set to 1. */
345 unsigned u1Fixed3: 1;
346 /** Fixed value bit 4 - Set to 1. */
347 unsigned u1Fixed4 : 1;
348 /** Fixed value bit 5 - Set to 1. */
349 unsigned u1Fixed5 : 1;
350 /** Gate size, 1 = 32 bits, 0 = 16 bits. */
351 unsigned u132BitGate : 1;
352 /** Fixed value bit 5 - Set to 0. */
353 unsigned u1Fixed6 : 1;
354 /** Descriptor Privilege level. */
355 unsigned u2DPL : 2;
356 /** Present flag. */
357 unsigned u1Present : 1;
358 /** High offset word. */
359 unsigned u16OffsetHigh : 16;
360} VBOXIDTE_TRAPGATE;
361#pragma pack()
362/** Pointer to IDT Entry, Trap Gate view. */
363typedef VBOXIDTE_TRAPGATE *PVBOXIDTE_TRAPGATE;
364
365/** IDT Entry Generic view. */
366#pragma pack(1) /* paranoia */
367typedef struct VBOXIDTE_GENERIC
368{
369 /** Low offset word. */
370 unsigned u16OffsetLow : 16;
371 /** Segment Selector. */
372 unsigned u16SegSel : 16;
373 /** Reserved. */
374 unsigned u5Reserved : 5;
375 /** IDT Type part one (not used for task gate). */
376 unsigned u3Type1 : 3;
377 /** IDT Type part two. */
378 unsigned u5Type2 : 5;
379 /** Descriptor Privilege level. */
380 unsigned u2DPL : 2;
381 /** Present flag. */
382 unsigned u1Present : 1;
383 /** High offset word. */
384 unsigned u16OffsetHigh : 16;
385} VBOXIDTE_GENERIC;
386#pragma pack()
387/** Pointer to IDT Entry Generic view. */
388typedef VBOXIDTE_GENERIC *PVBOXIDTE_GENERIC;
389
390/** IDT Type1 value. (Reserved for task gate!) */
391#define VBOX_IDTE_TYPE1 0
392/** IDT Type2 value - Task gate. */
393#define VBOX_IDTE_TYPE2_TASK 0x5
394/** IDT Type2 value - 16 bit interrupt gate. */
395#define VBOX_IDTE_TYPE2_INT_16 0x6
396/** IDT Type2 value - 32 bit interrupt gate. */
397#define VBOX_IDTE_TYPE2_INT_32 0xe
398/** IDT Type2 value - 16 bit trap gate. */
399#define VBOX_IDTE_TYPE2_TRAP_16 0x7
400/** IDT Type2 value - 32 bit trap gate. */
401#define VBOX_IDTE_TYPE2_TRAP_32 0xf
402
403/** IDT Entry. */
404#pragma pack(1) /* paranoia */
405typedef union VBOXIDTE
406{
407 /** Task gate view. */
408 VBOXIDTE_TASKGATE Task;
409 /** Trap gate view. */
410 VBOXIDTE_TRAPGATE Trap;
411 /** Interrupt gate view. */
412 VBOXIDTE_INTERRUPTGATE Int;
413 /** Generic IDT view. */
414 VBOXIDTE_GENERIC Gen;
415
416 /** 8 bit unsigned integer view. */
417 uint8_t au8[8];
418 /** 16 bit unsigned integer view. */
419 uint16_t au16[4];
420 /** 32 bit unsigned integer view. */
421 uint32_t au32[2];
422 /** 64 bit unsigned integer view. */
423 uint64_t au64;
424} VBOXIDTE;
425#pragma pack()
426/** Pointer to IDT Entry. */
427typedef VBOXIDTE *PVBOXIDTE;
428/** Pointer to IDT Entry. */
429typedef VBOXIDTE const *PCVBOXIDTE;
430
431#pragma pack(1)
432/** IDTR */
433typedef struct VBOXIDTR
434{
435 /** Size of the IDT. */
436 uint16_t cbIdt;
437 /** Address of the IDT. */
438 uint64_t pIdt;
439} VBOXIDTR, *PVBOXIDTR;
440#pragma pack()
441
442#pragma pack(1)
443/** IDTR from version 1.6 */
444typedef struct VBOXIDTR_VER1_6
445{
446 /** Size of the IDT. */
447 uint16_t cbIdt;
448 /** Address of the IDT. */
449 uint32_t pIdt;
450} VBOXIDTR_VER1_6, *PVBOXIDTR_VER1_6;
451#pragma pack()
452
453/** @} */
454
455
456/** @def VBOXIDTE_OFFSET
457 * Return the offset of an IDT entry.
458 */
459#define VBOXIDTE_OFFSET(desc) \
460 ( ((uint32_t)((desc).Gen.u16OffsetHigh) << 16) \
461 | ( (desc).Gen.u16OffsetLow ) )
462
463#pragma pack(1)
464/** GDTR */
465typedef struct VBOXGDTR
466{
467 /** Size of the GDT. */
468 uint16_t cbGdt;
469 /** Address of the GDT. */
470 uint64_t pGdt;
471} VBOXGDTR;
472#pragma pack()
473/** Pointer to GDTR. */
474typedef VBOXGDTR *PVBOXGDTR;
475
476#pragma pack(1)
477/** GDTR from version 1.6 */
478typedef struct VBOXGDTR_VER1_6
479{
480 /** Size of the GDT. */
481 uint16_t cbGdt;
482 /** Address of the GDT. */
483 uint32_t pGdt;
484} VBOXGDTR_VER1_6;
485#pragma pack()
486
487/** @} */
488
489
490/**
491 * 32-bit Task Segment used in raw mode.
492 * @todo Move this to SELM! Use X86TSS32 instead.
493 */
494#pragma pack(1)
495typedef struct VBOXTSS
496{
497 /** 0x00 - Back link to previous task. (static) */
498 RTSEL selPrev;
499 uint16_t padding1;
500 /** 0x04 - Ring-0 stack pointer. (static) */
501 uint32_t esp0;
502 /** 0x08 - Ring-0 stack segment. (static) */
503 RTSEL ss0;
504 uint16_t padding_ss0;
505 /** 0x0c - Ring-1 stack pointer. (static) */
506 uint32_t esp1;
507 /** 0x10 - Ring-1 stack segment. (static) */
508 RTSEL ss1;
509 uint16_t padding_ss1;
510 /** 0x14 - Ring-2 stack pointer. (static) */
511 uint32_t esp2;
512 /** 0x18 - Ring-2 stack segment. (static) */
513 RTSEL ss2;
514 uint16_t padding_ss2;
515 /** 0x1c - Page directory for the task. (static) */
516 uint32_t cr3;
517 /** 0x20 - EIP before task switch. */
518 uint32_t eip;
519 /** 0x24 - EFLAGS before task switch. */
520 uint32_t eflags;
521 /** 0x28 - EAX before task switch. */
522 uint32_t eax;
523 /** 0x2c - ECX before task switch. */
524 uint32_t ecx;
525 /** 0x30 - EDX before task switch. */
526 uint32_t edx;
527 /** 0x34 - EBX before task switch. */
528 uint32_t ebx;
529 /** 0x38 - ESP before task switch. */
530 uint32_t esp;
531 /** 0x3c - EBP before task switch. */
532 uint32_t ebp;
533 /** 0x40 - ESI before task switch. */
534 uint32_t esi;
535 /** 0x44 - EDI before task switch. */
536 uint32_t edi;
537 /** 0x48 - ES before task switch. */
538 RTSEL es;
539 uint16_t padding_es;
540 /** 0x4c - CS before task switch. */
541 RTSEL cs;
542 uint16_t padding_cs;
543 /** 0x50 - SS before task switch. */
544 RTSEL ss;
545 uint16_t padding_ss;
546 /** 0x54 - DS before task switch. */
547 RTSEL ds;
548 uint16_t padding_ds;
549 /** 0x58 - FS before task switch. */
550 RTSEL fs;
551 uint16_t padding_fs;
552 /** 0x5c - GS before task switch. */
553 RTSEL gs;
554 uint16_t padding_gs;
555 /** 0x60 - LDTR before task switch. */
556 RTSEL selLdt;
557 uint16_t padding_ldt;
558 /** 0x64 - Debug trap flag */
559 uint16_t fDebugTrap;
560 /** 0x66 - Offset relative to the TSS of the start of the I/O Bitmap
561 * and the end of the interrupt redirection bitmap. */
562 uint16_t offIoBitmap;
563 /** 0x68 - 32 bytes for the virtual interrupt redirection bitmap. (VME) */
564 uint8_t IntRedirBitmap[32];
565} VBOXTSS;
566#pragma pack()
567/** Pointer to task segment. */
568typedef VBOXTSS *PVBOXTSS;
569/** Pointer to const task segment. */
570typedef const VBOXTSS *PCVBOXTSS;
571
572
573/**
574 * Data transport buffer (scatter/gather)
575 */
576typedef struct PDMDATASEG
577{
578 /** Length of buffer in entry. */
579 size_t cbSeg;
580 /** Pointer to the start of the buffer. */
581 void *pvSeg;
582} PDMDATASEG;
583/** Pointer to a data transport segment. */
584typedef PDMDATASEG *PPDMDATASEG;
585/** Pointer to a const data transport segment. */
586typedef PDMDATASEG const *PCPDMDATASEG;
587
588
589/**
590 * The current ROM page protection.
591 *
592 * @remarks This is part of the saved state.
593 */
594typedef enum PGMROMPROT
595{
596 /** The customary invalid value. */
597 PGMROMPROT_INVALID = 0,
598 /** Read from the virgin ROM page, ignore writes.
599 * Map the virgin page, use write access handler to ignore writes. */
600 PGMROMPROT_READ_ROM_WRITE_IGNORE,
601 /** Read from the virgin ROM page, write to the shadow RAM.
602 * Map the virgin page, use write access handler change the RAM. */
603 PGMROMPROT_READ_ROM_WRITE_RAM,
604 /** Read from the shadow ROM page, ignore writes.
605 * Map the shadow page read-only, use write access handler to ignore writes. */
606 PGMROMPROT_READ_RAM_WRITE_IGNORE,
607 /** Read from the shadow ROM page, ignore writes.
608 * Map the shadow page read-write, disabled write access handler. */
609 PGMROMPROT_READ_RAM_WRITE_RAM,
610 /** The end of valid values. */
611 PGMROMPROT_END,
612 /** The usual 32-bit type size hack. */
613 PGMROMPROT_32BIT_HACK = 0x7fffffff
614} PGMROMPROT;
615
616
617/**
618 * Page mapping lock.
619 *
620 * @remarks This doesn't work in structures shared between
621 * ring-3, ring-0 and/or GC.
622 */
623typedef struct PGMPAGEMAPLOCK
624{
625 /** @todo see PGMPhysIsPageMappingLockValid for possibly incorrect assumptions */
626#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
627 /** Just a dummy for the time being. */
628 uint32_t u32Dummy;
629#else
630 /** Pointer to the PGMPAGE. */
631 void *pvPage;
632 /** Pointer to the PGMCHUNKR3MAP. */
633 void *pvMap;
634#endif
635} PGMPAGEMAPLOCK;
636/** Pointer to a page mapping lock. */
637typedef PGMPAGEMAPLOCK *PPGMPAGEMAPLOCK;
638
639
640/** @} */
641
642#endif
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