vm.h@ 19400

Last change on this file since 19400 was 19333, checked in by vboxsync, 16 years ago
EMT macro updates.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/** Maximum number of virtual CPUs per VM. */
47	#define VMCPU_MAX_CPU_COUNT 255
48
49	/**
50	* The state of a virtual CPU.
51	*
52	* The VM running states are a sub-states of the VMSTATE_RUNNING state. While
53	* VMCPUSTATE_NOT_RUNNING is a place holder for the other VM states.
54	*/
55	typedef enum VMCPUSTATE
56	{
57	/** The customary invalid zero. */
58	VMCPUSTATE_INVALID = 0,
59
60	/** Running guest code (VM running). */
61	VMCPUSTATE_RUN_EXEC,
62	/** Running guest code in the recompiler (VM running). */
63	VMCPUSTATE_RUN_EXEC_REM,
64	/** Halted (VM running). */
65	VMCPUSTATE_RUN_HALTED,
66	/** All the other bits we do while running a VM (VM running). */
67	VMCPUSTATE_RUN_MISC,
68	/** VM not running, we're servicing requests or whatever. */
69	VMCPUSTATE_NOT_RUNNING,
70	/** The end of valid virtual CPU states. */
71	VMCPUSTATE_END,
72
73	/** Ensure 32-bit type. */
74	VMCPUSTATE_32BIT_HACK = 0x7fffffff
75	} VMCPUSTATE;
76
77
78	/**
79	* Per virtual CPU data.
80	*/
81	typedef struct VMCPU
82	{
83	/** Per CPU forced action.
84	* See the VMCPU_FF_* \#defines. Updated atomically. */
85	uint32_t volatile fLocalForcedActions;
86	/** The CPU state. */
87	VMCPUSTATE volatile enmState;
88
89	/** Pointer to the ring-3 UVMCPU structure. */
90	PUVMCPU pUVCpu;
91	/** Ring-3 Host Context VM Pointer. */
92	PVMR3 pVMR3;
93	/** Ring-0 Host Context VM Pointer. */
94	PVMR0 pVMR0;
95	/** Raw-mode Context VM Pointer. */
96	PVMRC pVMRC;
97	/** The CPU ID.
98	* This is the index into the VM::aCpu array. */
99	VMCPUID idCpu;
100	/** The native thread handle. */
101	RTNATIVETHREAD hNativeThread;
102
103	/** Align the next bit on a 64-byte boundary.
104	*
105	* @remarks The aligments of the members that are larger than 48 bytes should be
106	* 64-byte for cache line reasons. structs containing small amounts of
107	* data could be lumped together at the end with a < 64 byte padding
108	* following it (to grow into and align the struct size).
109	* */
110	uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 8 : 4];
111
112	/** CPUM part. */
113	union
114	{
115	#ifdef ___CPUMInternal_h
116	struct CPUMCPU s;
117	#endif
118	char padding[4096]; /* multiple of 64 */
119	} cpum;
120
121	/** PGM part. */
122	union
123	{
124	#ifdef ___PGMInternal_h
125	struct PGMCPU s;
126	#endif
127	char padding[321024]; / multiple of 64 */
128	} pgm;
129
130	/** HWACCM part. */
131	union
132	{
133	#ifdef ___HWACCMInternal_h
134	struct HWACCMCPU s;
135	#endif
136	char padding[5120]; /* multiple of 64 */
137	} hwaccm;
138
139	/** EM part. */
140	union
141	{
142	#ifdef ___EMInternal_h
143	struct EMCPU s;
144	#endif
145	char padding[2048]; /* multiple of 64 */
146	} em;
147
148	/** TRPM part. */
149	union
150	{
151	#ifdef ___TRPMInternal_h
152	struct TRPMCPU s;
153	#endif
154	char padding[128]; /* multiple of 64 */
155	} trpm;
156
157	/** TM part. */
158	union
159	{
160	#ifdef ___TMInternal_h
161	struct TMCPU s;
162	#endif
163	char padding[64]; /* multiple of 64 */
164	} tm;
165
166	/** VMM part.
167	* @todo Combine this with other tiny structures. */
168	union
169	{
170	#ifdef ___VMMInternal_h
171	struct VMMCPU s;
172	#endif
173	char padding[64]; /* multiple of 64 */
174	} vmm;
175
176	/** DBGF part.
177	* @todo Combine this with other tiny structures. */
178	union
179	{
180	#ifdef ___DBGFInternal_h
181	struct DBGFCPU s;
182	#endif
183	uint8_t padding[64]; /* multiple of 64 */
184	} dbgf;
185
186	} VMCPU;
187
188	/** Pointer to a VMCPU. */
189	#ifndef ___VBox_types_h
190	typedef struct VMCPU *PVMCPU;
191	#endif
192
193	/** The name of the Guest Context VMM Core module. */
194	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
195	/** The name of the Ring 0 Context VMM Core module. */
196	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
197
198	/** VM Forced Action Flags.
199	*
200	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
201	* action mask of a VM.
202	*
203	* @{
204	*/
205	/** This action forces the VM to schedule and run pending timer (TM). */
206	#define VM_FF_TIMER RT_BIT_32(2)
207	/** PDM Queues are pending. */
208	#define VM_FF_PDM_QUEUES RT_BIT_32(3)
209	/** PDM DMA transfers are pending. */
210	#define VM_FF_PDM_DMA RT_BIT_32(4)
211	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
212	#define VM_FF_PDM_CRITSECT RT_BIT_32(5)
213	/** This action forces the VM to call DBGF so DBGF can service debugger
214	* requests in the emulation thread.
215	* This action flag stays asserted till DBGF clears it.*/
216	#define VM_FF_DBGF RT_BIT_32(8)
217	/** This action forces the VM to service pending requests from other
218	* thread or requests which must be executed in another context. */
219	#define VM_FF_REQUEST RT_BIT_32(9)
220	/** Terminate the VM immediately. */
221	#define VM_FF_TERMINATE RT_BIT_32(10)
222	/** Reset the VM. (postponed) */
223	#define VM_FF_RESET RT_BIT_32(11)
224	/** PGM needs to allocate handy pages. */
225	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
226	/** PGM is out of memory.
227	* Abandon all loops and code paths which can be resumed and get up to the EM
228	* loops. */
229	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
230	/** REM needs to be informed about handler changes. */
231	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(29)
232	/** Suspend the VM - debug only. */
233	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
234
235
236	/** This action forces the VM to service check and pending interrups on the APIC. */
237	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
238	/** This action forces the VM to service check and pending interrups on the PIC. */
239	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
240	/** This action forces the VM to schedule and run pending timer (TM). (bogus for now; needed for PATM backwards compatibility) */
241	#define VMCPU_FF_TIMER RT_BIT_32(2)
242	/** This action forces the VM to service pending requests from other
243	* thread or requests which must be executed in another context. */
244	#define VMCPU_FF_REQUEST RT_BIT_32(9)
245	/** This action forces the VM to resync the page tables before going
246	* back to execute guest code. (GLOBAL FLUSH) */
247	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
248	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
249	* (NON-GLOBAL FLUSH) */
250	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
251	/** Check the interupt and trap gates */
252	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
253	/** Check Guest's TSS ring 0 stack */
254	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
255	/** Check Guest's GDT table */
256	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
257	/** Check Guest's LDT table */
258	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
259	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
260	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
261	/** Check for pending TLB shootdown actions. */
262	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(25)
263	/** CSAM needs to scan the page that's being executed */
264	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
265	/** CSAM needs to do some homework. */
266	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
267	/** Force return to Ring-3. */
268	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
269
270	/** Externally VM forced actions. Used to quit the idle/wait loop. */
271	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST)
272	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
273	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
274
275	/** Externally forced VM actions. Used to quit the idle/wait loop. */
276	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA)
277	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
278	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST)
279
280	/** High priority VM pre-execution actions. */
281	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_DEBUG_SUSPEND \
282	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
283	/** High priority VMCPU pre-execution actions. */
284	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
285	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT)
286
287	/** High priority VM pre raw-mode execution mask. */
288	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
289	/** High priority VMCPU pre raw-mode execution mask. */
290	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \
291	\| VMCPU_FF_INHIBIT_INTERRUPTS)
292
293	/** High priority post-execution actions. */
294	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PDM_CRITSECT \| VM_FF_PGM_NO_MEMORY)
295	/** High priority post-execution actions. */
296	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_CSAM_PENDING_ACTION)
297
298	/** Normal priority VM post-execution actions. */
299	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY)
300	/** Normal priority VMCPU post-execution actions. */
301	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
302
303	/** Normal priority VM actions. */
304	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY)
305	/** Normal priority VMCPU actions. */
306	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
307
308	/** Flags to clear before resuming guest execution. */
309	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
310
311	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
312	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TIMER \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
313	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
314	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3)
315
316	/** All the forced flags. */
317	#define VM_FF_ALL_MASK (~0U)
318	/** All the forced VM flags. */
319	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VM_FF_PDM_CRITSECT) \| VM_FF_PGM_NO_MEMORY)
320	/** All the forced VMCPU flags. */
321	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION))
322
323	/** @} */
324
325	/** @def VM_FF_SET
326	* Sets a force action flag.
327	*
328	* @param pVM VM Handle.
329	* @param fFlag The flag to set.
330	*/
331	#if 1
332	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
333	#else
334	# define VM_FF_SET(pVM, fFlag) \
335	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
336	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
337	} while (0)
338	#endif
339
340	/** @def VMCPU_FF_SET
341	* Sets a force action flag for the given VCPU.
342	*
343	* @param pVCpu VMCPU Handle.
344	* @param fFlag The flag to set.
345	*/
346	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
347
348	/** @def VM_FF_CLEAR
349	* Clears a force action flag.
350	*
351	* @param pVM VM Handle.
352	* @param fFlag The flag to clear.
353	*/
354	#if 1
355	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
356	#else
357	# define VM_FF_CLEAR(pVM, fFlag) \
358	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
359	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
360	} while (0)
361	#endif
362
363	/** @def VMCPU_FF_CLEAR
364	* Clears a force action flag for the given VCPU.
365	*
366	* @param pVCpu VMCPU Handle.
367	* @param fFlag The flag to clear.
368	*/
369	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
370
371	/** @def VM_FF_ISSET
372	* Checks if a force action flag is set.
373	*
374	* @param pVM VM Handle.
375	* @param fFlag The flag to check.
376	*/
377	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
378
379	/** @def VMCPU_FF_ISSET
380	* Checks if a force action flag is set for the given VCPU.
381	*
382	* @param pVCpu VMCPU Handle.
383	* @param fFlag The flag to check.
384	*/
385	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
386
387	/** @def VM_FF_ISPENDING
388	* Checks if one or more force action in the specified set is pending.
389	*
390	* @param pVM VM Handle.
391	* @param fFlags The flags to check for.
392	*/
393	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
394
395	/** @def VMCPU_FF_ISPENDING
396	* Checks if one or more force action in the specified set is pending for the given VCPU.
397	*
398	* @param pVCpu VMCPU Handle.
399	* @param fFlags The flags to check for.
400	*/
401	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
402
403	/** @def VM_FF_ISPENDING
404	* Checks if one or more force action in the specified set is pending while one
405	* or more other ones are not.
406	*
407	* @param pVM VM Handle.
408	* @param fFlags The flags to check for.
409	* @param fExcpt The flags that should not be set.
410	*/
411	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
412
413	/** @def VMCPU_FF_IS_PENDING_EXCEPT
414	* Checks if one or more force action in the specified set is pending for the given
415	* VCPU while one or more other ones are not.
416	*
417	* @param pVCpu VMCPU Handle.
418	* @param fFlags The flags to check for.
419	* @param fExcpt The flags that should not be set.
420	*/
421	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
422
423	/** @def VM_IS_EMT
424	* Checks if the current thread is the emulation thread (EMT).
425	*
426	* @remark The ring-0 variation will need attention if we expand the ring-0
427	* code to let threads other than EMT mess around with the VM.
428	*/
429	#ifdef IN_RC
430	# define VM_IS_EMT(pVM) true
431	#else
432	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
433	#endif
434
435	/** @def VMCPU_IS_EMT
436	* Checks if the current thread is the emulation thread (EMT) for the specified
437	* virtual CPU.
438	*/
439	#ifdef IN_RC
440	# define VMCPU_IS_EMT(pVCpu) true
441	#else
442	# define VMCPU_IS_EMT(pVCpu) (pVCpu && (pVCpu == VMMGetCpu(pVCpu->CTX_SUFF(pVM))))
443	#endif
444
445	/** @def VM_ASSERT_EMT
446	* Asserts that the current thread IS the emulation thread (EMT).
447	*/
448	#ifdef IN_RC
449	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
450	#elif defined(IN_RING0)
451	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
452	#else
453	# define VM_ASSERT_EMT(pVM) \
454	AssertMsg(VM_IS_EMT(pVM), \
455	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
456	#endif
457
458	/** @def VMCPU_ASSERT_EMT
459	* Asserts that the current thread IS the emulation thread (EMT) of the
460	* specified virtual CPU.
461	*/
462	#ifdef IN_RC
463	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
464	#elif defined(IN_RING0)
465	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
466	#else
467	# define VMCPU_ASSERT_EMT(pVCpu) \
468	AssertMsg(VMCPU_IS_EMT(pVCpu), \
469	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
470	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
471	#endif
472
473	/** @def VM_ASSERT_EMT_RETURN
474	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
475	*/
476	#ifdef IN_RC
477	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
478	#elif defined(IN_RING0)
479	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
480	#else
481	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
482	AssertMsgReturn(VM_IS_EMT(pVM), \
483	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
484	(rc))
485	#endif
486
487	/** @def VMCPU_ASSERT_EMT_RETURN
488	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
489	*/
490	#ifdef IN_RC
491	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
492	#elif defined(IN_RING0)
493	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
494	#else
495	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
496	AssertMsg(VMCPU_IS_EMT(pVCpu), \
497	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
498	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
499	(rc))
500	#endif
501
502
503	/**
504	* Asserts that the current thread is NOT the emulation thread.
505	*/
506	#define VM_ASSERT_OTHER_THREAD(pVM) \
507	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
508
509
510	/** @def VM_ASSERT_STATE_RETURN
511	* Asserts a certain VM state.
512	*/
513	#define VM_ASSERT_STATE(pVM, _enmState) \
514	AssertMsg((pVM)->enmVMState == (_enmState), \
515	("state %s, expected %s\n", VMGetStateName(pVM->enmVMState), VMGetStateName(_enmState)))
516
517	/** @def VM_ASSERT_STATE_RETURN
518	* Asserts a certain VM state and returns if it doesn't match.
519	*/
520	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
521	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
522	("state %s, expected %s\n", VMGetStateName(pVM->enmVMState), VMGetStateName(_enmState)), \
523	(rc))
524
525	/** @def VM_ASSERT_VALID_EXT_RETURN
526	* Asserts a the VM handle is valid for external access, i.e. not being
527	* destroy or terminated.
528	*/
529	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
530	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
531	&& (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
532	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
533	? VMGetStateName(pVM->enmVMState) : ""), \
534	(rc))
535
536	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
537	* Asserts a the VMCPU handle is valid for external access, i.e. not being
538	* destroy or terminated.
539	*/
540	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
541	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
542	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
543	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
544	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
545	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
546	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
547	(rc))
548
549
550	/** This is the VM structure.
551	*
552	* It contains (nearly?) all the VM data which have to be available in all
553	* contexts. Even if it contains all the data the idea is to use APIs not
554	* to modify all the members all around the place. Therefore we make use of
555	* unions to hide everything which isn't local to the current source module.
556	* This means we'll have to pay a little bit of attention when adding new
557	* members to structures in the unions and make sure to keep the padding sizes
558	* up to date.
559	*
560	* Run tstVMStructSize after update!
561	*/
562	typedef struct VM
563	{
564	/** The state of the VM.
565	* This field is read only to everyone except the VM and EM. */
566	VMSTATE enmVMState;
567	/** Forced action flags.
568	* See the VM_FF_* \#defines. Updated atomically.
569	*/
570	volatile uint32_t fGlobalForcedActions;
571	/** Pointer to the array of page descriptors for the VM structure allocation. */
572	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
573	/** Session handle. For use when calling SUPR0 APIs. */
574	PSUPDRVSESSION pSession;
575	/** Pointer to the ring-3 VM structure. */
576	PUVM pUVM;
577	/** Ring-3 Host Context VM Pointer. */
578	R3PTRTYPE(struct VM *) pVMR3;
579	/** Ring-0 Host Context VM Pointer. */
580	R0PTRTYPE(struct VM *) pVMR0;
581	/** Raw-mode Context VM Pointer. */
582	RCPTRTYPE(struct VM *) pVMRC;
583
584	/** The GVM VM handle. Only the GVM should modify this field. */
585	uint32_t hSelf;
586	/** Number of virtual CPUs. */
587	uint32_t cCPUs;
588
589	/** Size of the VM structure including the VMCPU array. */
590	uint32_t cbSelf;
591
592	/** Offset to the VMCPU array starting from beginning of this structure. */
593	uint32_t offVMCPU;
594
595	/** Reserved; alignment. */
596	uint32_t u32Reserved[6];
597
598	/** @name Public VMM Switcher APIs
599	* @{ */
600	/**
601	* Assembly switch entry point for returning to host context.
602	* This function will clean up the stack frame.
603	*
604	* @param eax The return code, register.
605	* @param Ctx The guest core context.
606	* @remark Assume interrupts disabled.
607	*/
608	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
609
610	/**
611	* Assembly switch entry point for returning to host context.
612	*
613	* This is an alternative entry point which we'll be using when the we have the
614	* hypervisor context and need to save that before going to the host.
615	*
616	* This is typically useful when abandoning the hypervisor because of a trap
617	* and want the trap state to be saved.
618	*
619	* @param eax The return code, register.
620	* @param ecx Pointer to the hypervisor core context, register.
621	* @remark Assume interrupts disabled.
622	*/
623	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
624
625	/**
626	* Assembly switch entry point for returning to host context.
627	*
628	* This is an alternative to the two *Ctx APIs and implies that the context has already
629	* been saved, or that it's just a brief return to HC and that the caller intends to resume
630	* whatever it is doing upon 'return' from this call.
631	*
632	* @param eax The return code, register.
633	* @remark Assume interrupts disabled.
634	*/
635	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
636	/** @} */
637
638
639	/** @name Various VM data owned by VM.
640	* @{ */
641	RTTHREAD uPadding1;
642	/** The native handle of ThreadEMT. Getting the native handle
643	* is generally faster than getting the IPRT one (except on OS/2 :-). */
644	RTNATIVETHREAD uPadding2;
645	/** @} */
646
647
648	/** @name Various items that are frequently accessed.
649	* @{ */
650	/** Raw ring-3 indicator. */
651	bool fRawR3Enabled;
652	/** Raw ring-0 indicator. */
653	bool fRawR0Enabled;
654	/** PATM enabled flag.
655	* This is placed here for performance reasons. */
656	bool fPATMEnabled;
657	/** CSAM enabled flag.
658	* This is placed here for performance reasons. */
659	bool fCSAMEnabled;
660	/** Hardware VM support is available and enabled.
661	* This is placed here for performance reasons. */
662	bool fHWACCMEnabled;
663	/** Hardware VM support is required and non-optional.
664	* This is initialized together with the rest of the VM structure. */
665	bool fHwVirtExtForced;
666	/** PARAV enabled flag. */
667	bool fPARAVEnabled;
668	/** @} */
669
670
671	/* padding to make gnuc put the StatQemuToGC where msc does. */
672	#if HC_ARCH_BITS == 32
673	uint32_t padding0;
674	#endif
675
676	/** Profiling the total time from Qemu to GC. */
677	STAMPROFILEADV StatTotalQemuToGC;
678	/** Profiling the total time from GC to Qemu. */
679	STAMPROFILEADV StatTotalGCToQemu;
680	/** Profiling the total time spent in GC. */
681	STAMPROFILEADV StatTotalInGC;
682	/** Profiling the total time spent not in Qemu. */
683	STAMPROFILEADV StatTotalInQemu;
684	/** Profiling the VMMSwitcher code for going to GC. */
685	STAMPROFILEADV StatSwitcherToGC;
686	/** Profiling the VMMSwitcher code for going to HC. */
687	STAMPROFILEADV StatSwitcherToHC;
688	STAMPROFILEADV StatSwitcherSaveRegs;
689	STAMPROFILEADV StatSwitcherSysEnter;
690	STAMPROFILEADV StatSwitcherDebug;
691	STAMPROFILEADV StatSwitcherCR0;
692	STAMPROFILEADV StatSwitcherCR4;
693	STAMPROFILEADV StatSwitcherJmpCR3;
694	STAMPROFILEADV StatSwitcherRstrRegs;
695	STAMPROFILEADV StatSwitcherLgdt;
696	STAMPROFILEADV StatSwitcherLidt;
697	STAMPROFILEADV StatSwitcherLldt;
698	STAMPROFILEADV StatSwitcherTSS;
699
700	/** @todo Realign everything on 64 byte boundaries to better match the
701	* cache-line size. */
702	/* padding - the unions must be aligned on 32 bytes boundraries. */
703	uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
704
705	/** CPUM part. */
706	union
707	{
708	#ifdef ___CPUMInternal_h
709	struct CPUM s;
710	#endif
711	char padding[2048]; /* multiple of 32 */
712	} cpum;
713
714	/** VMM part. */
715	union
716	{
717	#ifdef ___VMMInternal_h
718	struct VMM s;
719	#endif
720	char padding[1600]; /* multiple of 32 */
721	} vmm;
722
723	/** PGM part. */
724	union
725	{
726	#ifdef ___PGMInternal_h
727	struct PGM s;
728	#endif
729	char padding[161024]; / multiple of 32 */
730	} pgm;
731
732	/** HWACCM part. */
733	union
734	{
735	#ifdef ___HWACCMInternal_h
736	struct HWACCM s;
737	#endif
738	char padding[512]; /* multiple of 32 */
739	} hwaccm;
740
741	/** TRPM part. */
742	union
743	{
744	#ifdef ___TRPMInternal_h
745	struct TRPM s;
746	#endif
747	char padding[5344]; /* multiple of 32 */
748	} trpm;
749
750	/** SELM part. */
751	union
752	{
753	#ifdef ___SELMInternal_h
754	struct SELM s;
755	#endif
756	char padding[544]; /* multiple of 32 */
757	} selm;
758
759	/** MM part. */
760	union
761	{
762	#ifdef ___MMInternal_h
763	struct MM s;
764	#endif
765	char padding[192]; /* multiple of 32 */
766	} mm;
767
768	/** CFGM part. */
769	union
770	{
771	#ifdef ___CFGMInternal_h
772	struct CFGM s;
773	#endif
774	char padding[32]; /* multiple of 32 */
775	} cfgm;
776
777	/** PDM part. */
778	union
779	{
780	#ifdef ___PDMInternal_h
781	struct PDM s;
782	#endif
783	char padding[1824]; /* multiple of 32 */
784	} pdm;
785
786	/** IOM part. */
787	union
788	{
789	#ifdef ___IOMInternal_h
790	struct IOM s;
791	#endif
792	char padding[4544]; /* multiple of 32 */
793	} iom;
794
795	/** PATM part. */
796	union
797	{
798	#ifdef ___PATMInternal_h
799	struct PATM s;
800	#endif
801	char padding[768]; /* multiple of 32 */
802	} patm;
803
804	/** CSAM part. */
805	union
806	{
807	#ifdef ___CSAMInternal_h
808	struct CSAM s;
809	#endif
810	char padding[3328]; /* multiple of 32 */
811	} csam;
812
813	/** PARAV part. */
814	union
815	{
816	#ifdef ___PARAVInternal_h
817	struct PARAV s;
818	#endif
819	char padding[128];
820	} parav;
821
822	/** EM part. */
823	union
824	{
825	#ifdef ___EMInternal_h
826	struct EM s;
827	#endif
828	char padding[256]; /* multiple of 32 */
829	} em;
830
831	/** TM part. */
832	union
833	{
834	#ifdef ___TMInternal_h
835	struct TM s;
836	#endif
837	char padding[1536]; /* multiple of 32 */
838	} tm;
839
840	/** DBGF part. */
841	union
842	{
843	#ifdef ___DBGFInternal_h
844	struct DBGF s;
845	#endif
846	char padding[2368]; /* multiple of 32 */
847	} dbgf;
848
849	/** SSM part. */
850	union
851	{
852	#ifdef ___SSMInternal_h
853	struct SSM s;
854	#endif
855	char padding[32]; /* multiple of 32 */
856	} ssm;
857
858	/** VM part. */
859	union
860	{
861	#ifdef ___VMInternal_h
862	struct VMINT s;
863	#endif
864	char padding[768]; /* multiple of 32 */
865	} vm;
866
867	/** REM part. */
868	union
869	{
870	#ifdef ___REMInternal_h
871	struct REM s;
872	#endif
873
874	/** @def VM_REM_SIZE
875	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
876	#if GC_ARCH_BITS == 32
877	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10800 : 0x10800)
878	#else
879	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10900 : 0x10900)
880	#endif
881	char padding[VM_REM_SIZE]; /* multiple of 32 */
882	} rem;
883
884	/** Padding for aligning the cpu array on a 64 byte boundrary. */
885	uint32_t u32Reserved2[8];
886
887	/** VMCPU array for the configured number of virtual CPUs.
888	* Must be aligned on a 64-byte boundrary. */
889	VMCPU aCpus[1];
890	} VM;
891
892	/** Pointer to a VM. */
893	#ifndef ___VBox_types_h
894	typedef struct VM *PVM;
895	#endif
896
897
898	#ifdef IN_RC
899	__BEGIN_DECLS
900
901	/** The VM structure.
902	* This is imported from the VMMGCBuiltin module, i.e. it's a one
903	* of those magic globals which we should avoid using.
904	*/
905	extern DECLIMPORT(VM) g_VM;
906
907	__END_DECLS
908	#endif
909
910	/** @} */
911
912	#endif
913

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source: vbox/trunk/include/VBox/vm.h@ 19400

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