vm.h@ 19434

Last change on this file since 19434 was 19434, checked in by vboxsync, 16 years ago
Further splitup of VMM (ring 0 jump buffer).
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a virtual CPU.
48	*
49	* The VM running states are a sub-states of the VMSTATE_RUNNING state. While
50	* VMCPUSTATE_NOT_RUNNING is a place holder for the other VM states.
51	*/
52	typedef enum VMCPUSTATE
53	{
54	/** The customary invalid zero. */
55	VMCPUSTATE_INVALID = 0,
56
57	/** Running guest code (VM running). */
58	VMCPUSTATE_RUN_EXEC,
59	/** Running guest code in the recompiler (VM running). */
60	VMCPUSTATE_RUN_EXEC_REM,
61	/** Halted (VM running). */
62	VMCPUSTATE_RUN_HALTED,
63	/** All the other bits we do while running a VM (VM running). */
64	VMCPUSTATE_RUN_MISC,
65	/** VM not running, we're servicing requests or whatever. */
66	VMCPUSTATE_NOT_RUNNING,
67	/** The end of valid virtual CPU states. */
68	VMCPUSTATE_END,
69
70	/** Ensure 32-bit type. */
71	VMCPUSTATE_32BIT_HACK = 0x7fffffff
72	} VMCPUSTATE;
73
74
75	/**
76	* Per virtual CPU data.
77	*/
78	typedef struct VMCPU
79	{
80	/** Per CPU forced action.
81	* See the VMCPU_FF_* \#defines. Updated atomically. */
82	uint32_t volatile fLocalForcedActions;
83	/** The CPU state. */
84	VMCPUSTATE volatile enmState;
85
86	/** Pointer to the ring-3 UVMCPU structure. */
87	PUVMCPU pUVCpu;
88	/** Ring-3 Host Context VM Pointer. */
89	PVMR3 pVMR3;
90	/** Ring-0 Host Context VM Pointer. */
91	PVMR0 pVMR0;
92	/** Raw-mode Context VM Pointer. */
93	PVMRC pVMRC;
94	/** The CPU ID.
95	* This is the index into the VM::aCpu array. */
96	VMCPUID idCpu;
97	/** The native thread handle. */
98	RTNATIVETHREAD hNativeThread;
99
100	/** Align the next bit on a 64-byte boundary.
101	*
102	* @remarks The aligments of the members that are larger than 48 bytes should be
103	* 64-byte for cache line reasons. structs containing small amounts of
104	* data could be lumped together at the end with a < 64 byte padding
105	* following it (to grow into and align the struct size).
106	* */
107	uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 8 : 4];
108
109	/** CPUM part. */
110	union
111	{
112	#ifdef ___CPUMInternal_h
113	struct CPUMCPU s;
114	#endif
115	char padding[4096]; /* multiple of 64 */
116	} cpum;
117
118	/** PGM part. */
119	union
120	{
121	#ifdef ___PGMInternal_h
122	struct PGMCPU s;
123	#endif
124	char padding[321024]; / multiple of 64 */
125	} pgm;
126
127	/** HWACCM part. */
128	union
129	{
130	#ifdef ___HWACCMInternal_h
131	struct HWACCMCPU s;
132	#endif
133	char padding[5120]; /* multiple of 64 */
134	} hwaccm;
135
136	/** EM part. */
137	union
138	{
139	#ifdef ___EMInternal_h
140	struct EMCPU s;
141	#endif
142	char padding[2048]; /* multiple of 64 */
143	} em;
144
145	/** TRPM part. */
146	union
147	{
148	#ifdef ___TRPMInternal_h
149	struct TRPMCPU s;
150	#endif
151	char padding[128]; /* multiple of 64 */
152	} trpm;
153
154	/** TM part. */
155	union
156	{
157	#ifdef ___TMInternal_h
158	struct TMCPU s;
159	#endif
160	char padding[64]; /* multiple of 64 */
161	} tm;
162
163	/** VMM part. */
164	union
165	{
166	#ifdef ___VMMInternal_h
167	struct VMMCPU s;
168	#endif
169	char padding[256]; /* multiple of 64 */
170	} vmm;
171
172	/** DBGF part.
173	* @todo Combine this with other tiny structures. */
174	union
175	{
176	#ifdef ___DBGFInternal_h
177	struct DBGFCPU s;
178	#endif
179	uint8_t padding[64]; /* multiple of 64 */
180	} dbgf;
181
182	} VMCPU;
183
184	/** Pointer to a VMCPU. */
185	#ifndef ___VBox_types_h
186	typedef struct VMCPU *PVMCPU;
187	#endif
188
189	/** The name of the Guest Context VMM Core module. */
190	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
191	/** The name of the Ring 0 Context VMM Core module. */
192	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
193
194	/** VM Forced Action Flags.
195	*
196	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
197	* action mask of a VM.
198	*
199	* @{
200	*/
201	/** This action forces the VM to schedule and run pending timer (TM). */
202	#define VM_FF_TIMER RT_BIT_32(2)
203	/** PDM Queues are pending. */
204	#define VM_FF_PDM_QUEUES_BIT 3
205	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
206	/** PDM DMA transfers are pending. */
207	#define VM_FF_PDM_DMA_BIT 4
208	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
209	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
210	#define VM_FF_PDM_CRITSECT RT_BIT_32(5)
211	/** This action forces the VM to call DBGF so DBGF can service debugger
212	* requests in the emulation thread.
213	* This action flag stays asserted till DBGF clears it.*/
214	#define VM_FF_DBGF_BIT 8
215	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
216	/** This action forces the VM to service pending requests from other
217	* thread or requests which must be executed in another context. */
218	#define VM_FF_REQUEST RT_BIT_32(9)
219	/** Terminate the VM immediately. */
220	#define VM_FF_TERMINATE RT_BIT_32(10)
221	/** Reset the VM. (postponed) */
222	#define VM_FF_RESET_BIT 11
223	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
224	/** PGM needs to allocate handy pages. */
225	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
226	/** PGM is out of memory.
227	* Abandon all loops and code paths which can be resumed and get up to the EM
228	* loops. */
229	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
230	/** REM needs to be informed about handler changes. */
231	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(29)
232	/** Suspend the VM - debug only. */
233	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
234
235
236	/** This action forces the VM to service check and pending interrups on the APIC. */
237	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
238	/** This action forces the VM to service check and pending interrups on the PIC. */
239	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
240	/** This action forces the VM to schedule and run pending timer (TM). (bogus for now; needed for PATM backwards compatibility) */
241	#define VMCPU_FF_TIMER RT_BIT_32(2)
242	/** This action forces the VM to service pending requests from other
243	* thread or requests which must be executed in another context. */
244	#define VMCPU_FF_REQUEST RT_BIT_32(9)
245	/** This action forces the VM to resync the page tables before going
246	* back to execute guest code. (GLOBAL FLUSH) */
247	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
248	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
249	* (NON-GLOBAL FLUSH) */
250	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
251	/** Check the interupt and trap gates */
252	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
253	/** Check Guest's TSS ring 0 stack */
254	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
255	/** Check Guest's GDT table */
256	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
257	/** Check Guest's LDT table */
258	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
259	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
260	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
261	/** Check for pending TLB shootdown actions. */
262	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(25)
263	/** CSAM needs to scan the page that's being executed */
264	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
265	/** CSAM needs to do some homework. */
266	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
267	/** Force return to Ring-3. */
268	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
269
270	/** Externally VM forced actions. Used to quit the idle/wait loop. */
271	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST)
272	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
273	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
274
275	/** Externally forced VM actions. Used to quit the idle/wait loop. */
276	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA)
277	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
278	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST)
279
280	/** High priority VM pre-execution actions. */
281	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_DEBUG_SUSPEND \
282	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
283	/** High priority VMCPU pre-execution actions. */
284	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
285	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT)
286
287	/** High priority VM pre raw-mode execution mask. */
288	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
289	/** High priority VMCPU pre raw-mode execution mask. */
290	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \
291	\| VMCPU_FF_INHIBIT_INTERRUPTS)
292
293	/** High priority post-execution actions. */
294	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PDM_CRITSECT \| VM_FF_PGM_NO_MEMORY)
295	/** High priority post-execution actions. */
296	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_CSAM_PENDING_ACTION)
297
298	/** Normal priority VM post-execution actions. */
299	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY)
300	/** Normal priority VMCPU post-execution actions. */
301	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
302
303	/** Normal priority VM actions. */
304	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY)
305	/** Normal priority VMCPU actions. */
306	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
307
308	/** Flags to clear before resuming guest execution. */
309	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
310
311	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
312	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TIMER \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
313	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
314	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3)
315
316	/** All the forced flags. */
317	#define VM_FF_ALL_MASK (~0U)
318	/** All the forced VM flags. */
319	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VM_FF_PDM_CRITSECT) \| VM_FF_PGM_NO_MEMORY)
320	/** All the forced VMCPU flags. */
321	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION))
322
323	/** @} */
324
325	/** @def VM_FF_SET
326	* Sets a force action flag.
327	*
328	* @param pVM VM Handle.
329	* @param fFlag The flag to set.
330	*/
331	#if 1
332	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
333	#else
334	# define VM_FF_SET(pVM, fFlag) \
335	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
336	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
337	} while (0)
338	#endif
339
340	/** @def VMCPU_FF_SET
341	* Sets a force action flag for the given VCPU.
342	*
343	* @param pVCpu VMCPU Handle.
344	* @param fFlag The flag to set.
345	*/
346	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
347
348	/** @def VM_FF_CLEAR
349	* Clears a force action flag.
350	*
351	* @param pVM VM Handle.
352	* @param fFlag The flag to clear.
353	*/
354	#if 1
355	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
356	#else
357	# define VM_FF_CLEAR(pVM, fFlag) \
358	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
359	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
360	} while (0)
361	#endif
362
363	/** @def VMCPU_FF_CLEAR
364	* Clears a force action flag for the given VCPU.
365	*
366	* @param pVCpu VMCPU Handle.
367	* @param fFlag The flag to clear.
368	*/
369	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
370
371	/** @def VM_FF_ISSET
372	* Checks if a force action flag is set.
373	*
374	* @param pVM VM Handle.
375	* @param fFlag The flag to check.
376	*/
377	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
378
379	/** @def VMCPU_FF_ISSET
380	* Checks if a force action flag is set for the given VCPU.
381	*
382	* @param pVCpu VMCPU Handle.
383	* @param fFlag The flag to check.
384	*/
385	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
386
387	/** @def VM_FF_ISPENDING
388	* Checks if one or more force action in the specified set is pending.
389	*
390	* @param pVM VM Handle.
391	* @param fFlags The flags to check for.
392	*/
393	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
394
395	/** @def VM_FF_TESTANDCLEAR
396	* Checks if one (!) force action in the specified set is pending and clears it atomically
397	*
398	* @returns true if the bit was set.
399	* @returns false if the bit was clear.
400	* @param pVM VM Handle.
401	* @param iBit Bit position to check and clear
402	*/
403	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
404
405	/** @def VMCPU_FF_ISPENDING
406	* Checks if one or more force action in the specified set is pending for the given VCPU.
407	*
408	* @param pVCpu VMCPU Handle.
409	* @param fFlags The flags to check for.
410	*/
411	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
412
413	/** @def VM_FF_ISPENDING
414	* Checks if one or more force action in the specified set is pending while one
415	* or more other ones are not.
416	*
417	* @param pVM VM Handle.
418	* @param fFlags The flags to check for.
419	* @param fExcpt The flags that should not be set.
420	*/
421	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
422
423	/** @def VMCPU_FF_IS_PENDING_EXCEPT
424	* Checks if one or more force action in the specified set is pending for the given
425	* VCPU while one or more other ones are not.
426	*
427	* @param pVCpu VMCPU Handle.
428	* @param fFlags The flags to check for.
429	* @param fExcpt The flags that should not be set.
430	*/
431	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
432
433	/** @def VM_IS_EMT
434	* Checks if the current thread is the emulation thread (EMT).
435	*
436	* @remark The ring-0 variation will need attention if we expand the ring-0
437	* code to let threads other than EMT mess around with the VM.
438	*/
439	#ifdef IN_RC
440	# define VM_IS_EMT(pVM) true
441	#else
442	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
443	#endif
444
445	/** @def VMCPU_IS_EMT
446	* Checks if the current thread is the emulation thread (EMT) for the specified
447	* virtual CPU.
448	*/
449	#ifdef IN_RC
450	# define VMCPU_IS_EMT(pVCpu) true
451	#else
452	# define VMCPU_IS_EMT(pVCpu) (pVCpu && (pVCpu == VMMGetCpu(pVCpu->CTX_SUFF(pVM))))
453	#endif
454
455	/** @def VM_ASSERT_EMT
456	* Asserts that the current thread IS the emulation thread (EMT).
457	*/
458	#ifdef IN_RC
459	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
460	#elif defined(IN_RING0)
461	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
462	#else
463	# define VM_ASSERT_EMT(pVM) \
464	AssertMsg(VM_IS_EMT(pVM), \
465	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
466	#endif
467
468	/** @def VMCPU_ASSERT_EMT
469	* Asserts that the current thread IS the emulation thread (EMT) of the
470	* specified virtual CPU.
471	*/
472	#ifdef IN_RC
473	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
474	#elif defined(IN_RING0)
475	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
476	#else
477	# define VMCPU_ASSERT_EMT(pVCpu) \
478	AssertMsg(VMCPU_IS_EMT(pVCpu), \
479	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
480	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
481	#endif
482
483	/** @def VM_ASSERT_EMT_RETURN
484	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
485	*/
486	#ifdef IN_RC
487	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
488	#elif defined(IN_RING0)
489	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
490	#else
491	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
492	AssertMsgReturn(VM_IS_EMT(pVM), \
493	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
494	(rc))
495	#endif
496
497	/** @def VMCPU_ASSERT_EMT_RETURN
498	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
499	*/
500	#ifdef IN_RC
501	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
502	#elif defined(IN_RING0)
503	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
504	#else
505	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
506	AssertMsg(VMCPU_IS_EMT(pVCpu), \
507	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
508	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
509	(rc))
510	#endif
511
512
513	/**
514	* Asserts that the current thread is NOT the emulation thread.
515	*/
516	#define VM_ASSERT_OTHER_THREAD(pVM) \
517	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
518
519
520	/** @def VM_ASSERT_STATE_RETURN
521	* Asserts a certain VM state.
522	*/
523	#define VM_ASSERT_STATE(pVM, _enmState) \
524	AssertMsg((pVM)->enmVMState == (_enmState), \
525	("state %s, expected %s\n", VMGetStateName(pVM->enmVMState), VMGetStateName(_enmState)))
526
527	/** @def VM_ASSERT_STATE_RETURN
528	* Asserts a certain VM state and returns if it doesn't match.
529	*/
530	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
531	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
532	("state %s, expected %s\n", VMGetStateName(pVM->enmVMState), VMGetStateName(_enmState)), \
533	(rc))
534
535	/** @def VM_ASSERT_VALID_EXT_RETURN
536	* Asserts a the VM handle is valid for external access, i.e. not being
537	* destroy or terminated.
538	*/
539	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
540	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
541	&& (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
542	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
543	? VMGetStateName(pVM->enmVMState) : ""), \
544	(rc))
545
546	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
547	* Asserts a the VMCPU handle is valid for external access, i.e. not being
548	* destroy or terminated.
549	*/
550	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
551	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
552	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
553	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
554	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
555	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
556	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
557	(rc))
558
559
560	/** This is the VM structure.
561	*
562	* It contains (nearly?) all the VM data which have to be available in all
563	* contexts. Even if it contains all the data the idea is to use APIs not
564	* to modify all the members all around the place. Therefore we make use of
565	* unions to hide everything which isn't local to the current source module.
566	* This means we'll have to pay a little bit of attention when adding new
567	* members to structures in the unions and make sure to keep the padding sizes
568	* up to date.
569	*
570	* Run tstVMStructSize after update!
571	*/
572	typedef struct VM
573	{
574	/** The state of the VM.
575	* This field is read only to everyone except the VM and EM. */
576	VMSTATE enmVMState;
577	/** Forced action flags.
578	* See the VM_FF_* \#defines. Updated atomically.
579	*/
580	volatile uint32_t fGlobalForcedActions;
581	/** Pointer to the array of page descriptors for the VM structure allocation. */
582	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
583	/** Session handle. For use when calling SUPR0 APIs. */
584	PSUPDRVSESSION pSession;
585	/** Pointer to the ring-3 VM structure. */
586	PUVM pUVM;
587	/** Ring-3 Host Context VM Pointer. */
588	R3PTRTYPE(struct VM *) pVMR3;
589	/** Ring-0 Host Context VM Pointer. */
590	R0PTRTYPE(struct VM *) pVMR0;
591	/** Raw-mode Context VM Pointer. */
592	RCPTRTYPE(struct VM *) pVMRC;
593
594	/** The GVM VM handle. Only the GVM should modify this field. */
595	uint32_t hSelf;
596	/** Number of virtual CPUs. */
597	uint32_t cCPUs;
598
599	/** Size of the VM structure including the VMCPU array. */
600	uint32_t cbSelf;
601
602	/** Offset to the VMCPU array starting from beginning of this structure. */
603	uint32_t offVMCPU;
604
605	/** Reserved; alignment. */
606	uint32_t u32Reserved[6];
607
608	/** @name Public VMM Switcher APIs
609	* @{ */
610	/**
611	* Assembly switch entry point for returning to host context.
612	* This function will clean up the stack frame.
613	*
614	* @param eax The return code, register.
615	* @param Ctx The guest core context.
616	* @remark Assume interrupts disabled.
617	*/
618	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
619
620	/**
621	* Assembly switch entry point for returning to host context.
622	*
623	* This is an alternative entry point which we'll be using when the we have the
624	* hypervisor context and need to save that before going to the host.
625	*
626	* This is typically useful when abandoning the hypervisor because of a trap
627	* and want the trap state to be saved.
628	*
629	* @param eax The return code, register.
630	* @param ecx Pointer to the hypervisor core context, register.
631	* @remark Assume interrupts disabled.
632	*/
633	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
634
635	/**
636	* Assembly switch entry point for returning to host context.
637	*
638	* This is an alternative to the two *Ctx APIs and implies that the context has already
639	* been saved, or that it's just a brief return to HC and that the caller intends to resume
640	* whatever it is doing upon 'return' from this call.
641	*
642	* @param eax The return code, register.
643	* @remark Assume interrupts disabled.
644	*/
645	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
646	/** @} */
647
648
649	/** @name Various VM data owned by VM.
650	* @{ */
651	RTTHREAD uPadding1;
652	/** The native handle of ThreadEMT. Getting the native handle
653	* is generally faster than getting the IPRT one (except on OS/2 :-). */
654	RTNATIVETHREAD uPadding2;
655	/** @} */
656
657
658	/** @name Various items that are frequently accessed.
659	* @{ */
660	/** Raw ring-3 indicator. */
661	bool fRawR3Enabled;
662	/** Raw ring-0 indicator. */
663	bool fRawR0Enabled;
664	/** PATM enabled flag.
665	* This is placed here for performance reasons. */
666	bool fPATMEnabled;
667	/** CSAM enabled flag.
668	* This is placed here for performance reasons. */
669	bool fCSAMEnabled;
670	/** Hardware VM support is available and enabled.
671	* This is placed here for performance reasons. */
672	bool fHWACCMEnabled;
673	/** Hardware VM support is required and non-optional.
674	* This is initialized together with the rest of the VM structure. */
675	bool fHwVirtExtForced;
676	/** PARAV enabled flag. */
677	bool fPARAVEnabled;
678	/** @} */
679
680
681	/* padding to make gnuc put the StatQemuToGC where msc does. */
682	#if HC_ARCH_BITS == 32
683	uint32_t padding0;
684	#endif
685
686	/** Profiling the total time from Qemu to GC. */
687	STAMPROFILEADV StatTotalQemuToGC;
688	/** Profiling the total time from GC to Qemu. */
689	STAMPROFILEADV StatTotalGCToQemu;
690	/** Profiling the total time spent in GC. */
691	STAMPROFILEADV StatTotalInGC;
692	/** Profiling the total time spent not in Qemu. */
693	STAMPROFILEADV StatTotalInQemu;
694	/** Profiling the VMMSwitcher code for going to GC. */
695	STAMPROFILEADV StatSwitcherToGC;
696	/** Profiling the VMMSwitcher code for going to HC. */
697	STAMPROFILEADV StatSwitcherToHC;
698	STAMPROFILEADV StatSwitcherSaveRegs;
699	STAMPROFILEADV StatSwitcherSysEnter;
700	STAMPROFILEADV StatSwitcherDebug;
701	STAMPROFILEADV StatSwitcherCR0;
702	STAMPROFILEADV StatSwitcherCR4;
703	STAMPROFILEADV StatSwitcherJmpCR3;
704	STAMPROFILEADV StatSwitcherRstrRegs;
705	STAMPROFILEADV StatSwitcherLgdt;
706	STAMPROFILEADV StatSwitcherLidt;
707	STAMPROFILEADV StatSwitcherLldt;
708	STAMPROFILEADV StatSwitcherTSS;
709
710	/** @todo Realign everything on 64 byte boundaries to better match the
711	* cache-line size. */
712	/* padding - the unions must be aligned on 32 bytes boundraries. */
713	uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
714
715	/** CPUM part. */
716	union
717	{
718	#ifdef ___CPUMInternal_h
719	struct CPUM s;
720	#endif
721	char padding[2048]; /* multiple of 32 */
722	} cpum;
723
724	/** VMM part. */
725	union
726	{
727	#ifdef ___VMMInternal_h
728	struct VMM s;
729	#endif
730	char padding[1600]; /* multiple of 32 */
731	} vmm;
732
733	/** PGM part. */
734	union
735	{
736	#ifdef ___PGMInternal_h
737	struct PGM s;
738	#endif
739	char padding[161024]; / multiple of 32 */
740	} pgm;
741
742	/** HWACCM part. */
743	union
744	{
745	#ifdef ___HWACCMInternal_h
746	struct HWACCM s;
747	#endif
748	char padding[512]; /* multiple of 32 */
749	} hwaccm;
750
751	/** TRPM part. */
752	union
753	{
754	#ifdef ___TRPMInternal_h
755	struct TRPM s;
756	#endif
757	char padding[5344]; /* multiple of 32 */
758	} trpm;
759
760	/** SELM part. */
761	union
762	{
763	#ifdef ___SELMInternal_h
764	struct SELM s;
765	#endif
766	char padding[544]; /* multiple of 32 */
767	} selm;
768
769	/** MM part. */
770	union
771	{
772	#ifdef ___MMInternal_h
773	struct MM s;
774	#endif
775	char padding[192]; /* multiple of 32 */
776	} mm;
777
778	/** CFGM part. */
779	union
780	{
781	#ifdef ___CFGMInternal_h
782	struct CFGM s;
783	#endif
784	char padding[32]; /* multiple of 32 */
785	} cfgm;
786
787	/** PDM part. */
788	union
789	{
790	#ifdef ___PDMInternal_h
791	struct PDM s;
792	#endif
793	char padding[1824]; /* multiple of 32 */
794	} pdm;
795
796	/** IOM part. */
797	union
798	{
799	#ifdef ___IOMInternal_h
800	struct IOM s;
801	#endif
802	char padding[4544]; /* multiple of 32 */
803	} iom;
804
805	/** PATM part. */
806	union
807	{
808	#ifdef ___PATMInternal_h
809	struct PATM s;
810	#endif
811	char padding[768]; /* multiple of 32 */
812	} patm;
813
814	/** CSAM part. */
815	union
816	{
817	#ifdef ___CSAMInternal_h
818	struct CSAM s;
819	#endif
820	char padding[3328]; /* multiple of 32 */
821	} csam;
822
823	/** PARAV part. */
824	union
825	{
826	#ifdef ___PARAVInternal_h
827	struct PARAV s;
828	#endif
829	char padding[128];
830	} parav;
831
832	/** EM part. */
833	union
834	{
835	#ifdef ___EMInternal_h
836	struct EM s;
837	#endif
838	char padding[256]; /* multiple of 32 */
839	} em;
840
841	/** TM part. */
842	union
843	{
844	#ifdef ___TMInternal_h
845	struct TM s;
846	#endif
847	char padding[1536]; /* multiple of 32 */
848	} tm;
849
850	/** DBGF part. */
851	union
852	{
853	#ifdef ___DBGFInternal_h
854	struct DBGF s;
855	#endif
856	char padding[2368]; /* multiple of 32 */
857	} dbgf;
858
859	/** SSM part. */
860	union
861	{
862	#ifdef ___SSMInternal_h
863	struct SSM s;
864	#endif
865	char padding[32]; /* multiple of 32 */
866	} ssm;
867
868	/** VM part. */
869	union
870	{
871	#ifdef ___VMInternal_h
872	struct VMINT s;
873	#endif
874	char padding[768]; /* multiple of 32 */
875	} vm;
876
877	/** REM part. */
878	union
879	{
880	#ifdef ___REMInternal_h
881	struct REM s;
882	#endif
883
884	/** @def VM_REM_SIZE
885	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
886	#if GC_ARCH_BITS == 32
887	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10800 : 0x10800)
888	#else
889	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10900 : 0x10900)
890	#endif
891	char padding[VM_REM_SIZE]; /* multiple of 32 */
892	} rem;
893
894	/** Padding for aligning the cpu array on a 64 byte boundrary. */
895	uint32_t u32Reserved2[8];
896
897	/** VMCPU array for the configured number of virtual CPUs.
898	* Must be aligned on a 64-byte boundrary. */
899	VMCPU aCpus[1];
900	} VM;
901
902	/** Pointer to a VM. */
903	#ifndef ___VBox_types_h
904	typedef struct VM *PVM;
905	#endif
906
907
908	#ifdef IN_RC
909	__BEGIN_DECLS
910
911	/** The VM structure.
912	* This is imported from the VMMGCBuiltin module, i.e. it's a one
913	* of those magic globals which we should avoid using.
914	*/
915	extern DECLIMPORT(VM) g_VM;
916
917	__END_DECLS
918	#endif
919
920	/** @} */
921
922	#endif
923

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source: vbox/trunk/include/VBox/vm.h@ 19434

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