vm.h@ 19503

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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a Virtual CPU.
48	*
49	* The basic state indicated here is whether the CPU has been started or not. In
50	* addition, there are sub-states when started for assisting scheduling (GVMM
51	* mostly).
52	*
53	* The transision out of the STOPPED state is done by a vmR3PowerOn.
54	* The transision back to the STOPPED state is done by vmR3PowerOff.
55	*
56	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58	*/
59	typedef enum VMCPUSTATE
60	{
61	/** The customary invalid zero. */
62	VMCPUSTATE_INVALID = 0,
63
64	/** Virtual CPU has not yet been started. */
65	VMCPUSTATE_STOPPED,
66
67	/** CPU started. */
68	VMCPUSTATE_STARTED,
69	/** Executing guest code and can be poked. */
70	VMCPUSTATE_STARTED_EXEC,
71	/** Executing guest code in the recompiler. */
72	VMCPUSTATE_STARTED_EXEC_REM,
73	/** Halted. */
74	VMCPUSTATE_STARTED_HALTED,
75
76	/** The end of valid virtual CPU states. */
77	VMCPUSTATE_END,
78
79	/** Ensure 32-bit type. */
80	VMCPUSTATE_32BIT_HACK = 0x7fffffff
81	} VMCPUSTATE;
82
83
84	/**
85	* Per virtual CPU data.
86	*/
87	typedef struct VMCPU
88	{
89	/** Per CPU forced action.
90	* See the VMCPU_FF_* \#defines. Updated atomically. */
91	uint32_t volatile fLocalForcedActions;
92	/** The CPU state. */
93	VMCPUSTATE volatile enmState;
94
95	/** Pointer to the ring-3 UVMCPU structure. */
96	PUVMCPU pUVCpu;
97	/** Ring-3 Host Context VM Pointer. */
98	PVMR3 pVMR3;
99	/** Ring-0 Host Context VM Pointer. */
100	PVMR0 pVMR0;
101	/** Raw-mode Context VM Pointer. */
102	PVMRC pVMRC;
103	/** The CPU ID.
104	* This is the index into the VM::aCpu array. */
105	VMCPUID idCpu;
106	/** The native thread handle. */
107	RTNATIVETHREAD hNativeThread;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111
112	/** Align the next bit on a 64-byte boundary.
113	*
114	* @remarks The aligments of the members that are larger than 48 bytes should be
115	* 64-byte for cache line reasons. structs containing small amounts of
116	* data could be lumped together at the end with a < 64 byte padding
117	* following it (to grow into and align the struct size).
118	* */
119	uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121	/** CPUM part. */
122	union
123	{
124	#ifdef ___CPUMInternal_h
125	struct CPUMCPU s;
126	#endif
127	char padding[4096]; /* multiple of 64 */
128	} cpum;
129
130	/** PGM part. */
131	union
132	{
133	#ifdef ___PGMInternal_h
134	struct PGMCPU s;
135	#endif
136	char padding[321024]; / multiple of 64 */
137	} pgm;
138
139	/** HWACCM part. */
140	union
141	{
142	#ifdef ___HWACCMInternal_h
143	struct HWACCMCPU s;
144	#endif
145	char padding[5120]; /* multiple of 64 */
146	} hwaccm;
147
148	/** EM part. */
149	union
150	{
151	#ifdef ___EMInternal_h
152	struct EMCPU s;
153	#endif
154	char padding[2048]; /* multiple of 64 */
155	} em;
156
157	/** TRPM part. */
158	union
159	{
160	#ifdef ___TRPMInternal_h
161	struct TRPMCPU s;
162	#endif
163	char padding[128]; /* multiple of 64 */
164	} trpm;
165
166	/** TM part. */
167	union
168	{
169	#ifdef ___TMInternal_h
170	struct TMCPU s;
171	#endif
172	char padding[64]; /* multiple of 64 */
173	} tm;
174
175	/** VMM part. */
176	union
177	{
178	#ifdef ___VMMInternal_h
179	struct VMMCPU s;
180	#endif
181	char padding[256]; /* multiple of 64 */
182	} vmm;
183
184	/** DBGF part.
185	* @todo Combine this with other tiny structures. */
186	union
187	{
188	#ifdef ___DBGFInternal_h
189	struct DBGFCPU s;
190	#endif
191	uint8_t padding[64]; /* multiple of 64 */
192	} dbgf;
193
194	} VMCPU;
195
196
197	/** @name Operations on VMCPU::enmState
198	* @{ */
199	/** Gets the VMCPU state. */
200	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
201	/** Sets the VMCPU state. */
202	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
203	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
204	/** Cmpares and sets the VMCPU state. */
205	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
206	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
207	/** Checks the VMCPU state. */
208	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
209	do { \
210	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
211	AssertMsg(enmState == (enmExpectedState), \
212	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
213	enmState, enmExpectedState, (pVCpu)->idCpu)); \
214	} while (0)
215	/** Tests if the state means that the CPU is started. */
216	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
217	/** Tests if the state means that the CPU is stopped. */
218	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
219	/** @} */
220
221
222	/** The name of the Guest Context VMM Core module. */
223	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
224	/** The name of the Ring 0 Context VMM Core module. */
225	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
226
227	/** VM Forced Action Flags.
228	*
229	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
230	* action mask of a VM.
231	*
232	* @{
233	*/
234	/** This action forces the VM to schedule and run pending timer (TM). */
235	#define VM_FF_TIMER RT_BIT_32(2)
236	/** PDM Queues are pending. */
237	#define VM_FF_PDM_QUEUES_BIT 3
238	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
239	/** PDM DMA transfers are pending. */
240	#define VM_FF_PDM_DMA_BIT 4
241	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
242	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
243	#define VM_FF_PDM_CRITSECT RT_BIT_32(5)
244	/** This action forces the VM to call DBGF so DBGF can service debugger
245	* requests in the emulation thread.
246	* This action flag stays asserted till DBGF clears it.*/
247	#define VM_FF_DBGF_BIT 8
248	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
249	/** This action forces the VM to service pending requests from other
250	* thread or requests which must be executed in another context. */
251	#define VM_FF_REQUEST RT_BIT_32(9)
252	/** Terminate the VM immediately. */
253	#define VM_FF_TERMINATE RT_BIT_32(10)
254	/** Reset the VM. (postponed) */
255	#define VM_FF_RESET_BIT 11
256	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
257	/** PGM needs to allocate handy pages. */
258	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
259	/** PGM is out of memory.
260	* Abandon all loops and code paths which can be resumed and get up to the EM
261	* loops. */
262	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
263	/** REM needs to be informed about handler changes. */
264	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(29)
265	/** Suspend the VM - debug only. */
266	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
267
268
269	/** This action forces the VM to service check and pending interrups on the APIC. */
270	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
271	/** This action forces the VM to service check and pending interrups on the PIC. */
272	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
273	/** This action forces the VM to schedule and run pending timer (TM). (bogus for now; needed for PATM backwards compatibility) */
274	#define VMCPU_FF_TIMER RT_BIT_32(2)
275	/** This action forces the VM to service pending requests from other
276	* thread or requests which must be executed in another context. */
277	#define VMCPU_FF_REQUEST RT_BIT_32(9)
278	/** This action forces the VM to resync the page tables before going
279	* back to execute guest code. (GLOBAL FLUSH) */
280	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
281	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
282	* (NON-GLOBAL FLUSH) */
283	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
284	/** Check the interupt and trap gates */
285	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
286	/** Check Guest's TSS ring 0 stack */
287	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
288	/** Check Guest's GDT table */
289	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
290	/** Check Guest's LDT table */
291	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
292	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
293	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
294	/** Check for pending TLB shootdown actions. */
295	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(25)
296	/** CSAM needs to scan the page that's being executed */
297	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
298	/** CSAM needs to do some homework. */
299	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
300	/** Force return to Ring-3. */
301	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
302
303	/** Externally VM forced actions. Used to quit the idle/wait loop. */
304	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST)
305	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
306	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
307
308	/** Externally forced VM actions. Used to quit the idle/wait loop. */
309	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA)
310	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
311	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST)
312
313	/** High priority VM pre-execution actions. */
314	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_DEBUG_SUSPEND \
315	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
316	/** High priority VMCPU pre-execution actions. */
317	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
318	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT)
319
320	/** High priority VM pre raw-mode execution mask. */
321	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
322	/** High priority VMCPU pre raw-mode execution mask. */
323	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \
324	\| VMCPU_FF_INHIBIT_INTERRUPTS)
325
326	/** High priority post-execution actions. */
327	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PDM_CRITSECT \| VM_FF_PGM_NO_MEMORY)
328	/** High priority post-execution actions. */
329	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_CSAM_PENDING_ACTION)
330
331	/** Normal priority VM post-execution actions. */
332	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY)
333	/** Normal priority VMCPU post-execution actions. */
334	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
335
336	/** Normal priority VM actions. */
337	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY)
338	/** Normal priority VMCPU actions. */
339	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
340
341	/** Flags to clear before resuming guest execution. */
342	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
343
344	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
345	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TIMER \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
346	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
347	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3)
348
349	/** All the forced VM flags. */
350	#define VM_FF_ALL_MASK (~0U)
351	/** All the forced VMCPU flags. */
352	#define VMCPU_FF_ALL_MASK (~0U)
353
354	/** All the forced VM flags. */
355	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VM_FF_PDM_CRITSECT) \| VM_FF_PGM_NO_MEMORY)
356	/** All the forced VMCPU flags. */
357	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION))
358
359	/** @} */
360
361	/** @def VM_FF_SET
362	* Sets a force action flag.
363	*
364	* @param pVM VM Handle.
365	* @param fFlag The flag to set.
366	*/
367	#if 1
368	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
369	#else
370	# define VM_FF_SET(pVM, fFlag) \
371	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
372	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
373	} while (0)
374	#endif
375
376	/** @def VMCPU_FF_SET
377	* Sets a force action flag for the given VCPU.
378	*
379	* @param pVCpu VMCPU Handle.
380	* @param fFlag The flag to set.
381	*/
382	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
383
384	/** @def VM_FF_CLEAR
385	* Clears a force action flag.
386	*
387	* @param pVM VM Handle.
388	* @param fFlag The flag to clear.
389	*/
390	#if 1
391	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
392	#else
393	# define VM_FF_CLEAR(pVM, fFlag) \
394	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
395	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
396	} while (0)
397	#endif
398
399	/** @def VMCPU_FF_CLEAR
400	* Clears a force action flag for the given VCPU.
401	*
402	* @param pVCpu VMCPU Handle.
403	* @param fFlag The flag to clear.
404	*/
405	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
406
407	/** @def VM_FF_ISSET
408	* Checks if a force action flag is set.
409	*
410	* @param pVM VM Handle.
411	* @param fFlag The flag to check.
412	*/
413	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
414
415	/** @def VMCPU_FF_ISSET
416	* Checks if a force action flag is set for the given VCPU.
417	*
418	* @param pVCpu VMCPU Handle.
419	* @param fFlag The flag to check.
420	*/
421	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
422
423	/** @def VM_FF_ISPENDING
424	* Checks if one or more force action in the specified set is pending.
425	*
426	* @param pVM VM Handle.
427	* @param fFlags The flags to check for.
428	*/
429	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
430
431	/** @def VM_FF_TESTANDCLEAR
432	* Checks if one (!) force action in the specified set is pending and clears it atomically
433	*
434	* @returns true if the bit was set.
435	* @returns false if the bit was clear.
436	* @param pVM VM Handle.
437	* @param iBit Bit position to check and clear
438	*/
439	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
440
441	/** @def VMCPU_FF_ISPENDING
442	* Checks if one or more force action in the specified set is pending for the given VCPU.
443	*
444	* @param pVCpu VMCPU Handle.
445	* @param fFlags The flags to check for.
446	*/
447	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
448
449	/** @def VM_FF_ISPENDING
450	* Checks if one or more force action in the specified set is pending while one
451	* or more other ones are not.
452	*
453	* @param pVM VM Handle.
454	* @param fFlags The flags to check for.
455	* @param fExcpt The flags that should not be set.
456	*/
457	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
458
459	/** @def VMCPU_FF_IS_PENDING_EXCEPT
460	* Checks if one or more force action in the specified set is pending for the given
461	* VCPU while one or more other ones are not.
462	*
463	* @param pVCpu VMCPU Handle.
464	* @param fFlags The flags to check for.
465	* @param fExcpt The flags that should not be set.
466	*/
467	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
468
469	/** @def VM_IS_EMT
470	* Checks if the current thread is the emulation thread (EMT).
471	*
472	* @remark The ring-0 variation will need attention if we expand the ring-0
473	* code to let threads other than EMT mess around with the VM.
474	*/
475	#ifdef IN_RC
476	# define VM_IS_EMT(pVM) true
477	#else
478	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
479	#endif
480
481	/** @def VMCPU_IS_EMT
482	* Checks if the current thread is the emulation thread (EMT) for the specified
483	* virtual CPU.
484	*/
485	#ifdef IN_RC
486	# define VMCPU_IS_EMT(pVCpu) true
487	#else
488	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
489	#endif
490
491	/** @def VM_ASSERT_EMT
492	* Asserts that the current thread IS the emulation thread (EMT).
493	*/
494	#ifdef IN_RC
495	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
496	#elif defined(IN_RING0)
497	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
498	#else
499	# define VM_ASSERT_EMT(pVM) \
500	AssertMsg(VM_IS_EMT(pVM), \
501	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
502	#endif
503
504	/** @def VMCPU_ASSERT_EMT
505	* Asserts that the current thread IS the emulation thread (EMT) of the
506	* specified virtual CPU.
507	*/
508	#ifdef IN_RC
509	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
510	#elif defined(IN_RING0)
511	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
512	#else
513	# define VMCPU_ASSERT_EMT(pVCpu) \
514	AssertMsg(VMCPU_IS_EMT(pVCpu), \
515	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
516	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
517	#endif
518
519	/** @def VM_ASSERT_EMT_RETURN
520	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
521	*/
522	#ifdef IN_RC
523	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
524	#elif defined(IN_RING0)
525	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
526	#else
527	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
528	AssertMsgReturn(VM_IS_EMT(pVM), \
529	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
530	(rc))
531	#endif
532
533	/** @def VMCPU_ASSERT_EMT_RETURN
534	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
535	*/
536	#ifdef IN_RC
537	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
538	#elif defined(IN_RING0)
539	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
540	#else
541	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
542	AssertMsg(VMCPU_IS_EMT(pVCpu), \
543	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
544	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
545	(rc))
546	#endif
547
548
549	/**
550	* Asserts that the current thread is NOT the emulation thread.
551	*/
552	#define VM_ASSERT_OTHER_THREAD(pVM) \
553	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
554
555
556	/** @def VM_ASSERT_STATE_RETURN
557	* Asserts a certain VM state.
558	*/
559	#define VM_ASSERT_STATE(pVM, _enmState) \
560	AssertMsg((pVM)->enmVMState == (_enmState), \
561	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
562
563	/** @def VM_ASSERT_STATE_RETURN
564	* Asserts a certain VM state and returns if it doesn't match.
565	*/
566	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
567	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
568	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
569	(rc))
570
571	/** @def VM_ASSERT_VALID_EXT_RETURN
572	* Asserts a the VM handle is valid for external access, i.e. not being
573	* destroy or terminated.
574	*/
575	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
576	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
577	&& (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
578	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
579	? VMGetStateName(pVM->enmVMState) : ""), \
580	(rc))
581
582	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
583	* Asserts a the VMCPU handle is valid for external access, i.e. not being
584	* destroy or terminated.
585	*/
586	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
587	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
588	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
589	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
590	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
591	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
592	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
593	(rc))
594
595
596	/** This is the VM structure.
597	*
598	* It contains (nearly?) all the VM data which have to be available in all
599	* contexts. Even if it contains all the data the idea is to use APIs not
600	* to modify all the members all around the place. Therefore we make use of
601	* unions to hide everything which isn't local to the current source module.
602	* This means we'll have to pay a little bit of attention when adding new
603	* members to structures in the unions and make sure to keep the padding sizes
604	* up to date.
605	*
606	* Run tstVMStructSize after update!
607	*/
608	typedef struct VM
609	{
610	/** The state of the VM.
611	* This field is read only to everyone except the VM and EM. */
612	VMSTATE enmVMState;
613	/** Forced action flags.
614	* See the VM_FF_* \#defines. Updated atomically.
615	*/
616	volatile uint32_t fGlobalForcedActions;
617	/** Pointer to the array of page descriptors for the VM structure allocation. */
618	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
619	/** Session handle. For use when calling SUPR0 APIs. */
620	PSUPDRVSESSION pSession;
621	/** Pointer to the ring-3 VM structure. */
622	PUVM pUVM;
623	/** Ring-3 Host Context VM Pointer. */
624	R3PTRTYPE(struct VM *) pVMR3;
625	/** Ring-0 Host Context VM Pointer. */
626	R0PTRTYPE(struct VM *) pVMR0;
627	/** Raw-mode Context VM Pointer. */
628	RCPTRTYPE(struct VM *) pVMRC;
629
630	/** The GVM VM handle. Only the GVM should modify this field. */
631	uint32_t hSelf;
632	/** Number of virtual CPUs. */
633	uint32_t cCPUs;
634
635	/** Size of the VM structure including the VMCPU array. */
636	uint32_t cbSelf;
637
638	/** Offset to the VMCPU array starting from beginning of this structure. */
639	uint32_t offVMCPU;
640
641	/** Reserved; alignment. */
642	uint32_t u32Reserved[6];
643
644	/** @name Public VMM Switcher APIs
645	* @{ */
646	/**
647	* Assembly switch entry point for returning to host context.
648	* This function will clean up the stack frame.
649	*
650	* @param eax The return code, register.
651	* @param Ctx The guest core context.
652	* @remark Assume interrupts disabled.
653	*/
654	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
655
656	/**
657	* Assembly switch entry point for returning to host context.
658	*
659	* This is an alternative entry point which we'll be using when the we have the
660	* hypervisor context and need to save that before going to the host.
661	*
662	* This is typically useful when abandoning the hypervisor because of a trap
663	* and want the trap state to be saved.
664	*
665	* @param eax The return code, register.
666	* @param ecx Pointer to the hypervisor core context, register.
667	* @remark Assume interrupts disabled.
668	*/
669	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
670
671	/**
672	* Assembly switch entry point for returning to host context.
673	*
674	* This is an alternative to the two *Ctx APIs and implies that the context has already
675	* been saved, or that it's just a brief return to HC and that the caller intends to resume
676	* whatever it is doing upon 'return' from this call.
677	*
678	* @param eax The return code, register.
679	* @remark Assume interrupts disabled.
680	*/
681	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
682	/** @} */
683
684
685	/** @name Various VM data owned by VM.
686	* @{ */
687	RTTHREAD uPadding1;
688	/** The native handle of ThreadEMT. Getting the native handle
689	* is generally faster than getting the IPRT one (except on OS/2 :-). */
690	RTNATIVETHREAD uPadding2;
691	/** @} */
692
693
694	/** @name Various items that are frequently accessed.
695	* @{ */
696	/** Raw ring-3 indicator. */
697	bool fRawR3Enabled;
698	/** Raw ring-0 indicator. */
699	bool fRawR0Enabled;
700	/** PATM enabled flag.
701	* This is placed here for performance reasons. */
702	bool fPATMEnabled;
703	/** CSAM enabled flag.
704	* This is placed here for performance reasons. */
705	bool fCSAMEnabled;
706	/** Hardware VM support is available and enabled.
707	* This is placed here for performance reasons. */
708	bool fHWACCMEnabled;
709	/** Hardware VM support is required and non-optional.
710	* This is initialized together with the rest of the VM structure. */
711	bool fHwVirtExtForced;
712	/** PARAV enabled flag. */
713	bool fPARAVEnabled;
714	/** @} */
715
716
717	/* padding to make gnuc put the StatQemuToGC where msc does. */
718	#if HC_ARCH_BITS == 32
719	uint32_t padding0;
720	#endif
721
722	/** Profiling the total time from Qemu to GC. */
723	STAMPROFILEADV StatTotalQemuToGC;
724	/** Profiling the total time from GC to Qemu. */
725	STAMPROFILEADV StatTotalGCToQemu;
726	/** Profiling the total time spent in GC. */
727	STAMPROFILEADV StatTotalInGC;
728	/** Profiling the total time spent not in Qemu. */
729	STAMPROFILEADV StatTotalInQemu;
730	/** Profiling the VMMSwitcher code for going to GC. */
731	STAMPROFILEADV StatSwitcherToGC;
732	/** Profiling the VMMSwitcher code for going to HC. */
733	STAMPROFILEADV StatSwitcherToHC;
734	STAMPROFILEADV StatSwitcherSaveRegs;
735	STAMPROFILEADV StatSwitcherSysEnter;
736	STAMPROFILEADV StatSwitcherDebug;
737	STAMPROFILEADV StatSwitcherCR0;
738	STAMPROFILEADV StatSwitcherCR4;
739	STAMPROFILEADV StatSwitcherJmpCR3;
740	STAMPROFILEADV StatSwitcherRstrRegs;
741	STAMPROFILEADV StatSwitcherLgdt;
742	STAMPROFILEADV StatSwitcherLidt;
743	STAMPROFILEADV StatSwitcherLldt;
744	STAMPROFILEADV StatSwitcherTSS;
745
746	/** @todo Realign everything on 64 byte boundaries to better match the
747	* cache-line size. */
748	/* padding - the unions must be aligned on 32 bytes boundraries. */
749	uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
750
751	/** CPUM part. */
752	union
753	{
754	#ifdef ___CPUMInternal_h
755	struct CPUM s;
756	#endif
757	char padding[2048]; /* multiple of 32 */
758	} cpum;
759
760	/** VMM part. */
761	union
762	{
763	#ifdef ___VMMInternal_h
764	struct VMM s;
765	#endif
766	char padding[1600]; /* multiple of 32 */
767	} vmm;
768
769	/** PGM part. */
770	union
771	{
772	#ifdef ___PGMInternal_h
773	struct PGM s;
774	#endif
775	char padding[161024]; / multiple of 32 */
776	} pgm;
777
778	/** HWACCM part. */
779	union
780	{
781	#ifdef ___HWACCMInternal_h
782	struct HWACCM s;
783	#endif
784	char padding[512]; /* multiple of 32 */
785	} hwaccm;
786
787	/** TRPM part. */
788	union
789	{
790	#ifdef ___TRPMInternal_h
791	struct TRPM s;
792	#endif
793	char padding[5344]; /* multiple of 32 */
794	} trpm;
795
796	/** SELM part. */
797	union
798	{
799	#ifdef ___SELMInternal_h
800	struct SELM s;
801	#endif
802	char padding[544]; /* multiple of 32 */
803	} selm;
804
805	/** MM part. */
806	union
807	{
808	#ifdef ___MMInternal_h
809	struct MM s;
810	#endif
811	char padding[192]; /* multiple of 32 */
812	} mm;
813
814	/** CFGM part. */
815	union
816	{
817	#ifdef ___CFGMInternal_h
818	struct CFGM s;
819	#endif
820	char padding[32]; /* multiple of 32 */
821	} cfgm;
822
823	/** PDM part. */
824	union
825	{
826	#ifdef ___PDMInternal_h
827	struct PDM s;
828	#endif
829	char padding[1824]; /* multiple of 32 */
830	} pdm;
831
832	/** IOM part. */
833	union
834	{
835	#ifdef ___IOMInternal_h
836	struct IOM s;
837	#endif
838	char padding[4544]; /* multiple of 32 */
839	} iom;
840
841	/** PATM part. */
842	union
843	{
844	#ifdef ___PATMInternal_h
845	struct PATM s;
846	#endif
847	char padding[768]; /* multiple of 32 */
848	} patm;
849
850	/** CSAM part. */
851	union
852	{
853	#ifdef ___CSAMInternal_h
854	struct CSAM s;
855	#endif
856	char padding[3328]; /* multiple of 32 */
857	} csam;
858
859	/** PARAV part. */
860	union
861	{
862	#ifdef ___PARAVInternal_h
863	struct PARAV s;
864	#endif
865	char padding[128];
866	} parav;
867
868	/** EM part. */
869	union
870	{
871	#ifdef ___EMInternal_h
872	struct EM s;
873	#endif
874	char padding[256]; /* multiple of 32 */
875	} em;
876
877	/** TM part. */
878	union
879	{
880	#ifdef ___TMInternal_h
881	struct TM s;
882	#endif
883	char padding[1536]; /* multiple of 32 */
884	} tm;
885
886	/** DBGF part. */
887	union
888	{
889	#ifdef ___DBGFInternal_h
890	struct DBGF s;
891	#endif
892	char padding[2368]; /* multiple of 32 */
893	} dbgf;
894
895	/** SSM part. */
896	union
897	{
898	#ifdef ___SSMInternal_h
899	struct SSM s;
900	#endif
901	char padding[32]; /* multiple of 32 */
902	} ssm;
903
904	/** VM part. */
905	union
906	{
907	#ifdef ___VMInternal_h
908	struct VMINT s;
909	#endif
910	char padding[768]; /* multiple of 32 */
911	} vm;
912
913	/** REM part. */
914	union
915	{
916	#ifdef ___REMInternal_h
917	struct REM s;
918	#endif
919
920	/** @def VM_REM_SIZE
921	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
922	#if GC_ARCH_BITS == 32
923	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10800 : 0x10800)
924	#else
925	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10900 : 0x10900)
926	#endif
927	char padding[VM_REM_SIZE]; /* multiple of 32 */
928	} rem;
929
930	/** Padding for aligning the cpu array on a 64 byte boundrary. */
931	uint32_t u32Reserved2[8];
932
933	/** VMCPU array for the configured number of virtual CPUs.
934	* Must be aligned on a 64-byte boundrary. */
935	VMCPU aCpus[1];
936	} VM;
937
938
939	#ifdef IN_RC
940	__BEGIN_DECLS
941
942	/** The VM structure.
943	* This is imported from the VMMGCBuiltin module, i.e. it's a one
944	* of those magic globals which we should avoid using.
945	*/
946	extern DECLIMPORT(VM) g_VM;
947
948	__END_DECLS
949	#endif
950
951	/** @} */
952
953	#endif
954

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source: vbox/trunk/include/VBox/vm.h@ 19503

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