vm.h@ 19593

Last change on this file since 19593 was 19593, checked in by vboxsync, 16 years ago
Split up PDM.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a Virtual CPU.
48	*
49	* The basic state indicated here is whether the CPU has been started or not. In
50	* addition, there are sub-states when started for assisting scheduling (GVMM
51	* mostly).
52	*
53	* The transision out of the STOPPED state is done by a vmR3PowerOn.
54	* The transision back to the STOPPED state is done by vmR3PowerOff.
55	*
56	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58	*/
59	typedef enum VMCPUSTATE
60	{
61	/** The customary invalid zero. */
62	VMCPUSTATE_INVALID = 0,
63
64	/** Virtual CPU has not yet been started. */
65	VMCPUSTATE_STOPPED,
66
67	/** CPU started. */
68	VMCPUSTATE_STARTED,
69	/** Executing guest code and can be poked. */
70	VMCPUSTATE_STARTED_EXEC,
71	/** Executing guest code in the recompiler. */
72	VMCPUSTATE_STARTED_EXEC_REM,
73	/** Halted. */
74	VMCPUSTATE_STARTED_HALTED,
75
76	/** The end of valid virtual CPU states. */
77	VMCPUSTATE_END,
78
79	/** Ensure 32-bit type. */
80	VMCPUSTATE_32BIT_HACK = 0x7fffffff
81	} VMCPUSTATE;
82
83
84	/**
85	* Per virtual CPU data.
86	*/
87	typedef struct VMCPU
88	{
89	/** Per CPU forced action.
90	* See the VMCPU_FF_* \#defines. Updated atomically. */
91	uint32_t volatile fLocalForcedActions;
92	/** The CPU state. */
93	VMCPUSTATE volatile enmState;
94
95	/** Pointer to the ring-3 UVMCPU structure. */
96	PUVMCPU pUVCpu;
97	/** Ring-3 Host Context VM Pointer. */
98	PVMR3 pVMR3;
99	/** Ring-0 Host Context VM Pointer. */
100	PVMR0 pVMR0;
101	/** Raw-mode Context VM Pointer. */
102	PVMRC pVMRC;
103	/** The CPU ID.
104	* This is the index into the VM::aCpu array. */
105	VMCPUID idCpu;
106	/** The native thread handle. */
107	RTNATIVETHREAD hNativeThread;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111
112	/** Align the next bit on a 64-byte boundary.
113	*
114	* @remarks The aligments of the members that are larger than 48 bytes should be
115	* 64-byte for cache line reasons. structs containing small amounts of
116	* data could be lumped together at the end with a < 64 byte padding
117	* following it (to grow into and align the struct size).
118	* */
119	uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121	/** CPUM part. */
122	union
123	{
124	#ifdef ___CPUMInternal_h
125	struct CPUMCPU s;
126	#endif
127	char padding[4096]; /* multiple of 64 */
128	} cpum;
129
130	/** PGM part. */
131	union
132	{
133	#ifdef ___PGMInternal_h
134	struct PGMCPU s;
135	#endif
136	char padding[321024]; / multiple of 64 */
137	} pgm;
138
139	/** HWACCM part. */
140	union
141	{
142	#ifdef ___HWACCMInternal_h
143	struct HWACCMCPU s;
144	#endif
145	char padding[5120]; /* multiple of 64 */
146	} hwaccm;
147
148	/** EM part. */
149	union
150	{
151	#ifdef ___EMInternal_h
152	struct EMCPU s;
153	#endif
154	char padding[2048]; /* multiple of 64 */
155	} em;
156
157	/** TRPM part. */
158	union
159	{
160	#ifdef ___TRPMInternal_h
161	struct TRPMCPU s;
162	#endif
163	char padding[128]; /* multiple of 64 */
164	} trpm;
165
166	/** TM part. */
167	union
168	{
169	#ifdef ___TMInternal_h
170	struct TMCPU s;
171	#endif
172	char padding[64]; /* multiple of 64 */
173	} tm;
174
175	/** VMM part. */
176	union
177	{
178	#ifdef ___VMMInternal_h
179	struct VMMCPU s;
180	#endif
181	char padding[256]; /* multiple of 64 */
182	} vmm;
183
184	/** PDM part. */
185	union
186	{
187	#ifdef ___PDMInternal_h
188	struct PDMCPU s;
189	#endif
190	char padding[128]; /* multiple of 64 */
191	} pdm;
192
193	/** DBGF part.
194	* @todo Combine this with other tiny structures. */
195	union
196	{
197	#ifdef ___DBGFInternal_h
198	struct DBGFCPU s;
199	#endif
200	uint8_t padding[64]; /* multiple of 64 */
201	} dbgf;
202
203	} VMCPU;
204
205
206	/** @name Operations on VMCPU::enmState
207	* @{ */
208	/** Gets the VMCPU state. */
209	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
210	/** Sets the VMCPU state. */
211	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
212	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
213	/** Cmpares and sets the VMCPU state. */
214	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
215	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
216	/** Checks the VMCPU state. */
217	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
218	do { \
219	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
220	AssertMsg(enmState == (enmExpectedState), \
221	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
222	enmState, enmExpectedState, (pVCpu)->idCpu)); \
223	} while (0)
224	/** Tests if the state means that the CPU is started. */
225	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
226	/** Tests if the state means that the CPU is stopped. */
227	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
228	/** @} */
229
230
231	/** The name of the Guest Context VMM Core module. */
232	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
233	/** The name of the Ring 0 Context VMM Core module. */
234	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
235
236	/** VM Forced Action Flags.
237	*
238	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
239	* action mask of a VM.
240	*
241	* @{
242	*/
243	/** This action forces the VM to schedule and run pending timer (TM). */
244	#define VM_FF_TIMER RT_BIT_32(2)
245	/** PDM Queues are pending. */
246	#define VM_FF_PDM_QUEUES_BIT 3
247	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
248	/** PDM DMA transfers are pending. */
249	#define VM_FF_PDM_DMA_BIT 4
250	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
251	/** This action forces the VM to call DBGF so DBGF can service debugger
252	* requests in the emulation thread.
253	* This action flag stays asserted till DBGF clears it.*/
254	#define VM_FF_DBGF_BIT 8
255	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
256	/** This action forces the VM to service pending requests from other
257	* thread or requests which must be executed in another context. */
258	#define VM_FF_REQUEST RT_BIT_32(9)
259	/** Terminate the VM immediately. */
260	#define VM_FF_TERMINATE RT_BIT_32(10)
261	/** Reset the VM. (postponed) */
262	#define VM_FF_RESET_BIT 11
263	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
264	/** PGM needs to allocate handy pages. */
265	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
266	/** PGM is out of memory.
267	* Abandon all loops and code paths which can be resumed and get up to the EM
268	* loops. */
269	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
270	/** REM needs to be informed about handler changes. */
271	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(29)
272	/** Suspend the VM - debug only. */
273	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
274
275
276	/** This action forces the VM to service check and pending interrups on the APIC. */
277	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
278	/** This action forces the VM to service check and pending interrups on the PIC. */
279	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
280	/** This action forces the VM to schedule and run pending timer (TM). (bogus for now; needed for PATM backwards compatibility) */
281	#define VMCPU_FF_TIMER RT_BIT_32(2)
282	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
283	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
284	/** This action forces the VM to service pending requests from other
285	* thread or requests which must be executed in another context. */
286	#define VMCPU_FF_REQUEST RT_BIT_32(9)
287	/** This action forces the VM to resync the page tables before going
288	* back to execute guest code. (GLOBAL FLUSH) */
289	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
290	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
291	* (NON-GLOBAL FLUSH) */
292	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
293	/** Check the interupt and trap gates */
294	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
295	/** Check Guest's TSS ring 0 stack */
296	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
297	/** Check Guest's GDT table */
298	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
299	/** Check Guest's LDT table */
300	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
301	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
302	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
303	/** Check for pending TLB shootdown actions. */
304	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(25)
305	/** CSAM needs to scan the page that's being executed */
306	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
307	/** CSAM needs to do some homework. */
308	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
309	/** Force return to Ring-3. */
310	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
311
312	/** Externally VM forced actions. Used to quit the idle/wait loop. */
313	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST)
314	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
315	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
316
317	/** Externally forced VM actions. Used to quit the idle/wait loop. */
318	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA)
319	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
320	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST)
321
322	/** High priority VM pre-execution actions. */
323	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TIMER \| VM_FF_DEBUG_SUSPEND \
324	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
325	/** High priority VMCPU pre-execution actions. */
326	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
327	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT)
328
329	/** High priority VM pre raw-mode execution mask. */
330	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
331	/** High priority VMCPU pre raw-mode execution mask. */
332	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \
333	\| VMCPU_FF_INHIBIT_INTERRUPTS)
334
335	/** High priority post-execution actions. */
336	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
337	/** High priority post-execution actions. */
338	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
339
340	/** Normal priority VM post-execution actions. */
341	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY)
342	/** Normal priority VMCPU post-execution actions. */
343	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
344
345	/** Normal priority VM actions. */
346	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY)
347	/** Normal priority VMCPU actions. */
348	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
349
350	/** Flags to clear before resuming guest execution. */
351	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
352
353	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
354	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TIMER \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
355	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
356	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3)
357
358	/** All the forced VM flags. */
359	#define VM_FF_ALL_MASK (~0U)
360	/** All the forced VMCPU flags. */
361	#define VMCPU_FF_ALL_MASK (~0U)
362
363	/** All the forced VM flags. */
364	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
365	/** All the forced VMCPU flags. */
366	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT))
367
368	/** @} */
369
370	/** @def VM_FF_SET
371	* Sets a force action flag.
372	*
373	* @param pVM VM Handle.
374	* @param fFlag The flag to set.
375	*/
376	#if 1
377	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
378	#else
379	# define VM_FF_SET(pVM, fFlag) \
380	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
381	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
382	} while (0)
383	#endif
384
385	/** @def VMCPU_FF_SET
386	* Sets a force action flag for the given VCPU.
387	*
388	* @param pVCpu VMCPU Handle.
389	* @param fFlag The flag to set.
390	*/
391	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
392
393	/** @def VM_FF_CLEAR
394	* Clears a force action flag.
395	*
396	* @param pVM VM Handle.
397	* @param fFlag The flag to clear.
398	*/
399	#if 1
400	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
401	#else
402	# define VM_FF_CLEAR(pVM, fFlag) \
403	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
404	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
405	} while (0)
406	#endif
407
408	/** @def VMCPU_FF_CLEAR
409	* Clears a force action flag for the given VCPU.
410	*
411	* @param pVCpu VMCPU Handle.
412	* @param fFlag The flag to clear.
413	*/
414	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
415
416	/** @def VM_FF_ISSET
417	* Checks if a force action flag is set.
418	*
419	* @param pVM VM Handle.
420	* @param fFlag The flag to check.
421	*/
422	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
423
424	/** @def VMCPU_FF_ISSET
425	* Checks if a force action flag is set for the given VCPU.
426	*
427	* @param pVCpu VMCPU Handle.
428	* @param fFlag The flag to check.
429	*/
430	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
431
432	/** @def VM_FF_ISPENDING
433	* Checks if one or more force action in the specified set is pending.
434	*
435	* @param pVM VM Handle.
436	* @param fFlags The flags to check for.
437	*/
438	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
439
440	/** @def VM_FF_TESTANDCLEAR
441	* Checks if one (!) force action in the specified set is pending and clears it atomically
442	*
443	* @returns true if the bit was set.
444	* @returns false if the bit was clear.
445	* @param pVM VM Handle.
446	* @param iBit Bit position to check and clear
447	*/
448	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
449
450	/** @def VMCPU_FF_ISPENDING
451	* Checks if one or more force action in the specified set is pending for the given VCPU.
452	*
453	* @param pVCpu VMCPU Handle.
454	* @param fFlags The flags to check for.
455	*/
456	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
457
458	/** @def VM_FF_ISPENDING
459	* Checks if one or more force action in the specified set is pending while one
460	* or more other ones are not.
461	*
462	* @param pVM VM Handle.
463	* @param fFlags The flags to check for.
464	* @param fExcpt The flags that should not be set.
465	*/
466	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
467
468	/** @def VMCPU_FF_IS_PENDING_EXCEPT
469	* Checks if one or more force action in the specified set is pending for the given
470	* VCPU while one or more other ones are not.
471	*
472	* @param pVCpu VMCPU Handle.
473	* @param fFlags The flags to check for.
474	* @param fExcpt The flags that should not be set.
475	*/
476	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
477
478	/** @def VM_IS_EMT
479	* Checks if the current thread is the emulation thread (EMT).
480	*
481	* @remark The ring-0 variation will need attention if we expand the ring-0
482	* code to let threads other than EMT mess around with the VM.
483	*/
484	#ifdef IN_RC
485	# define VM_IS_EMT(pVM) true
486	#else
487	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
488	#endif
489
490	/** @def VMCPU_IS_EMT
491	* Checks if the current thread is the emulation thread (EMT) for the specified
492	* virtual CPU.
493	*/
494	#ifdef IN_RC
495	# define VMCPU_IS_EMT(pVCpu) true
496	#else
497	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
498	#endif
499
500	/** @def VM_ASSERT_EMT
501	* Asserts that the current thread IS the emulation thread (EMT).
502	*/
503	#ifdef IN_RC
504	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
505	#elif defined(IN_RING0)
506	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
507	#else
508	# define VM_ASSERT_EMT(pVM) \
509	AssertMsg(VM_IS_EMT(pVM), \
510	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
511	#endif
512
513	/** @def VMCPU_ASSERT_EMT
514	* Asserts that the current thread IS the emulation thread (EMT) of the
515	* specified virtual CPU.
516	*/
517	#ifdef IN_RC
518	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
519	#elif defined(IN_RING0)
520	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
521	#else
522	# define VMCPU_ASSERT_EMT(pVCpu) \
523	AssertMsg(VMCPU_IS_EMT(pVCpu), \
524	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
525	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
526	#endif
527
528	/** @def VM_ASSERT_EMT_RETURN
529	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
530	*/
531	#ifdef IN_RC
532	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
533	#elif defined(IN_RING0)
534	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
535	#else
536	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
537	AssertMsgReturn(VM_IS_EMT(pVM), \
538	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
539	(rc))
540	#endif
541
542	/** @def VMCPU_ASSERT_EMT_RETURN
543	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
544	*/
545	#ifdef IN_RC
546	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
547	#elif defined(IN_RING0)
548	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
549	#else
550	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
551	AssertMsg(VMCPU_IS_EMT(pVCpu), \
552	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
553	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
554	(rc))
555	#endif
556
557
558	/**
559	* Asserts that the current thread is NOT the emulation thread.
560	*/
561	#define VM_ASSERT_OTHER_THREAD(pVM) \
562	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
563
564
565	/** @def VM_ASSERT_STATE_RETURN
566	* Asserts a certain VM state.
567	*/
568	#define VM_ASSERT_STATE(pVM, _enmState) \
569	AssertMsg((pVM)->enmVMState == (_enmState), \
570	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
571
572	/** @def VM_ASSERT_STATE_RETURN
573	* Asserts a certain VM state and returns if it doesn't match.
574	*/
575	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
576	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
577	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
578	(rc))
579
580	/** @def VM_ASSERT_VALID_EXT_RETURN
581	* Asserts a the VM handle is valid for external access, i.e. not being
582	* destroy or terminated.
583	*/
584	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
585	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
586	&& (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
587	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
588	? VMGetStateName(pVM->enmVMState) : ""), \
589	(rc))
590
591	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
592	* Asserts a the VMCPU handle is valid for external access, i.e. not being
593	* destroy or terminated.
594	*/
595	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
596	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
597	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
598	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
599	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
600	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
601	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
602	(rc))
603
604
605	/** This is the VM structure.
606	*
607	* It contains (nearly?) all the VM data which have to be available in all
608	* contexts. Even if it contains all the data the idea is to use APIs not
609	* to modify all the members all around the place. Therefore we make use of
610	* unions to hide everything which isn't local to the current source module.
611	* This means we'll have to pay a little bit of attention when adding new
612	* members to structures in the unions and make sure to keep the padding sizes
613	* up to date.
614	*
615	* Run tstVMStructSize after update!
616	*/
617	typedef struct VM
618	{
619	/** The state of the VM.
620	* This field is read only to everyone except the VM and EM. */
621	VMSTATE enmVMState;
622	/** Forced action flags.
623	* See the VM_FF_* \#defines. Updated atomically.
624	*/
625	volatile uint32_t fGlobalForcedActions;
626	/** Pointer to the array of page descriptors for the VM structure allocation. */
627	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
628	/** Session handle. For use when calling SUPR0 APIs. */
629	PSUPDRVSESSION pSession;
630	/** Pointer to the ring-3 VM structure. */
631	PUVM pUVM;
632	/** Ring-3 Host Context VM Pointer. */
633	R3PTRTYPE(struct VM *) pVMR3;
634	/** Ring-0 Host Context VM Pointer. */
635	R0PTRTYPE(struct VM *) pVMR0;
636	/** Raw-mode Context VM Pointer. */
637	RCPTRTYPE(struct VM *) pVMRC;
638
639	/** The GVM VM handle. Only the GVM should modify this field. */
640	uint32_t hSelf;
641	/** Number of virtual CPUs. */
642	uint32_t cCPUs;
643
644	/** Size of the VM structure including the VMCPU array. */
645	uint32_t cbSelf;
646
647	/** Offset to the VMCPU array starting from beginning of this structure. */
648	uint32_t offVMCPU;
649
650	/** Reserved; alignment. */
651	uint32_t u32Reserved[6];
652
653	/** @name Public VMM Switcher APIs
654	* @{ */
655	/**
656	* Assembly switch entry point for returning to host context.
657	* This function will clean up the stack frame.
658	*
659	* @param eax The return code, register.
660	* @param Ctx The guest core context.
661	* @remark Assume interrupts disabled.
662	*/
663	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
664
665	/**
666	* Assembly switch entry point for returning to host context.
667	*
668	* This is an alternative entry point which we'll be using when the we have the
669	* hypervisor context and need to save that before going to the host.
670	*
671	* This is typically useful when abandoning the hypervisor because of a trap
672	* and want the trap state to be saved.
673	*
674	* @param eax The return code, register.
675	* @param ecx Pointer to the hypervisor core context, register.
676	* @remark Assume interrupts disabled.
677	*/
678	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
679
680	/**
681	* Assembly switch entry point for returning to host context.
682	*
683	* This is an alternative to the two *Ctx APIs and implies that the context has already
684	* been saved, or that it's just a brief return to HC and that the caller intends to resume
685	* whatever it is doing upon 'return' from this call.
686	*
687	* @param eax The return code, register.
688	* @remark Assume interrupts disabled.
689	*/
690	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
691	/** @} */
692
693
694	/** @name Various VM data owned by VM.
695	* @{ */
696	RTTHREAD uPadding1;
697	/** The native handle of ThreadEMT. Getting the native handle
698	* is generally faster than getting the IPRT one (except on OS/2 :-). */
699	RTNATIVETHREAD uPadding2;
700	/** @} */
701
702
703	/** @name Various items that are frequently accessed.
704	* @{ */
705	/** Raw ring-3 indicator. */
706	bool fRawR3Enabled;
707	/** Raw ring-0 indicator. */
708	bool fRawR0Enabled;
709	/** PATM enabled flag.
710	* This is placed here for performance reasons. */
711	bool fPATMEnabled;
712	/** CSAM enabled flag.
713	* This is placed here for performance reasons. */
714	bool fCSAMEnabled;
715	/** Hardware VM support is available and enabled.
716	* This is placed here for performance reasons. */
717	bool fHWACCMEnabled;
718	/** Hardware VM support is required and non-optional.
719	* This is initialized together with the rest of the VM structure. */
720	bool fHwVirtExtForced;
721	/** PARAV enabled flag. */
722	bool fPARAVEnabled;
723	/** @} */
724
725
726	/* padding to make gnuc put the StatQemuToGC where msc does. */
727	#if HC_ARCH_BITS == 32
728	uint32_t padding0;
729	#endif
730
731	/** Profiling the total time from Qemu to GC. */
732	STAMPROFILEADV StatTotalQemuToGC;
733	/** Profiling the total time from GC to Qemu. */
734	STAMPROFILEADV StatTotalGCToQemu;
735	/** Profiling the total time spent in GC. */
736	STAMPROFILEADV StatTotalInGC;
737	/** Profiling the total time spent not in Qemu. */
738	STAMPROFILEADV StatTotalInQemu;
739	/** Profiling the VMMSwitcher code for going to GC. */
740	STAMPROFILEADV StatSwitcherToGC;
741	/** Profiling the VMMSwitcher code for going to HC. */
742	STAMPROFILEADV StatSwitcherToHC;
743	STAMPROFILEADV StatSwitcherSaveRegs;
744	STAMPROFILEADV StatSwitcherSysEnter;
745	STAMPROFILEADV StatSwitcherDebug;
746	STAMPROFILEADV StatSwitcherCR0;
747	STAMPROFILEADV StatSwitcherCR4;
748	STAMPROFILEADV StatSwitcherJmpCR3;
749	STAMPROFILEADV StatSwitcherRstrRegs;
750	STAMPROFILEADV StatSwitcherLgdt;
751	STAMPROFILEADV StatSwitcherLidt;
752	STAMPROFILEADV StatSwitcherLldt;
753	STAMPROFILEADV StatSwitcherTSS;
754
755	/** @todo Realign everything on 64 byte boundaries to better match the
756	* cache-line size. */
757	/* padding - the unions must be aligned on 32 bytes boundraries. */
758	uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
759
760	/** CPUM part. */
761	union
762	{
763	#ifdef ___CPUMInternal_h
764	struct CPUM s;
765	#endif
766	char padding[2048]; /* multiple of 32 */
767	} cpum;
768
769	/** VMM part. */
770	union
771	{
772	#ifdef ___VMMInternal_h
773	struct VMM s;
774	#endif
775	char padding[1600]; /* multiple of 32 */
776	} vmm;
777
778	/** PGM part. */
779	union
780	{
781	#ifdef ___PGMInternal_h
782	struct PGM s;
783	#endif
784	char padding[161024]; / multiple of 32 */
785	} pgm;
786
787	/** HWACCM part. */
788	union
789	{
790	#ifdef ___HWACCMInternal_h
791	struct HWACCM s;
792	#endif
793	char padding[512]; /* multiple of 32 */
794	} hwaccm;
795
796	/** TRPM part. */
797	union
798	{
799	#ifdef ___TRPMInternal_h
800	struct TRPM s;
801	#endif
802	char padding[5344]; /* multiple of 32 */
803	} trpm;
804
805	/** SELM part. */
806	union
807	{
808	#ifdef ___SELMInternal_h
809	struct SELM s;
810	#endif
811	char padding[544]; /* multiple of 32 */
812	} selm;
813
814	/** MM part. */
815	union
816	{
817	#ifdef ___MMInternal_h
818	struct MM s;
819	#endif
820	char padding[192]; /* multiple of 32 */
821	} mm;
822
823	/** CFGM part. */
824	union
825	{
826	#ifdef ___CFGMInternal_h
827	struct CFGM s;
828	#endif
829	char padding[32]; /* multiple of 32 */
830	} cfgm;
831
832	/** PDM part. */
833	union
834	{
835	#ifdef ___PDMInternal_h
836	struct PDM s;
837	#endif
838	char padding[1824]; /* multiple of 32 */
839	} pdm;
840
841	/** IOM part. */
842	union
843	{
844	#ifdef ___IOMInternal_h
845	struct IOM s;
846	#endif
847	char padding[4544]; /* multiple of 32 */
848	} iom;
849
850	/** PATM part. */
851	union
852	{
853	#ifdef ___PATMInternal_h
854	struct PATM s;
855	#endif
856	char padding[768]; /* multiple of 32 */
857	} patm;
858
859	/** CSAM part. */
860	union
861	{
862	#ifdef ___CSAMInternal_h
863	struct CSAM s;
864	#endif
865	char padding[3328]; /* multiple of 32 */
866	} csam;
867
868	/** PARAV part. */
869	union
870	{
871	#ifdef ___PARAVInternal_h
872	struct PARAV s;
873	#endif
874	char padding[128];
875	} parav;
876
877	/** EM part. */
878	union
879	{
880	#ifdef ___EMInternal_h
881	struct EM s;
882	#endif
883	char padding[256]; /* multiple of 32 */
884	} em;
885
886	/** TM part. */
887	union
888	{
889	#ifdef ___TMInternal_h
890	struct TM s;
891	#endif
892	char padding[1536]; /* multiple of 32 */
893	} tm;
894
895	/** DBGF part. */
896	union
897	{
898	#ifdef ___DBGFInternal_h
899	struct DBGF s;
900	#endif
901	char padding[2368]; /* multiple of 32 */
902	} dbgf;
903
904	/** SSM part. */
905	union
906	{
907	#ifdef ___SSMInternal_h
908	struct SSM s;
909	#endif
910	char padding[32]; /* multiple of 32 */
911	} ssm;
912
913	/** VM part. */
914	union
915	{
916	#ifdef ___VMInternal_h
917	struct VMINT s;
918	#endif
919	char padding[768]; /* multiple of 32 */
920	} vm;
921
922	/** REM part. */
923	union
924	{
925	#ifdef ___REMInternal_h
926	struct REM s;
927	#endif
928
929	/** @def VM_REM_SIZE
930	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
931	#if GC_ARCH_BITS == 32
932	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10800 : 0x10800)
933	#else
934	# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10900 : 0x10900)
935	#endif
936	char padding[VM_REM_SIZE]; /* multiple of 32 */
937	} rem;
938
939	/** Padding for aligning the cpu array on a 64 byte boundrary. */
940	uint32_t u32Reserved2[8];
941
942	/** VMCPU array for the configured number of virtual CPUs.
943	* Must be aligned on a 64-byte boundrary. */
944	VMCPU aCpus[1];
945	} VM;
946
947
948	#ifdef IN_RC
949	__BEGIN_DECLS
950
951	/** The VM structure.
952	* This is imported from the VMMGCBuiltin module, i.e. it's a one
953	* of those magic globals which we should avoid using.
954	*/
955	extern DECLIMPORT(VM) g_VM;
956
957	__END_DECLS
958	#endif
959
960	/** @} */
961
962	#endif
963

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source: vbox/trunk/include/VBox/vm.h@ 19593

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