VirtualBox

source: vbox/trunk/include/VBox/vm.h@ 20399

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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_vm_h
31#define ___VBox_vm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/cpum.h>
36#include <VBox/stam.h>
37#include <VBox/vmapi.h>
38#include <VBox/sup.h>
39#include <VBox/vmm.h>
40
41
42/** @defgroup grp_vm The Virtual Machine
43 * @{
44 */
45
46/**
47 * The state of a Virtual CPU.
48 *
49 * The basic state indicated here is whether the CPU has been started or not. In
50 * addition, there are sub-states when started for assisting scheduling (GVMM
51 * mostly).
52 *
53 * The transision out of the STOPPED state is done by a vmR3PowerOn.
54 * The transision back to the STOPPED state is done by vmR3PowerOff.
55 *
56 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58 */
59typedef enum VMCPUSTATE
60{
61 /** The customary invalid zero. */
62 VMCPUSTATE_INVALID = 0,
63
64 /** Virtual CPU has not yet been started. */
65 VMCPUSTATE_STOPPED,
66
67 /** CPU started. */
68 VMCPUSTATE_STARTED,
69 /** Executing guest code and can be poked. */
70 VMCPUSTATE_STARTED_EXEC,
71 /** Executing guest code in the recompiler. */
72 VMCPUSTATE_STARTED_EXEC_REM,
73 /** Halted. */
74 VMCPUSTATE_STARTED_HALTED,
75
76 /** The end of valid virtual CPU states. */
77 VMCPUSTATE_END,
78
79 /** Ensure 32-bit type. */
80 VMCPUSTATE_32BIT_HACK = 0x7fffffff
81} VMCPUSTATE;
82
83
84/**
85 * Per virtual CPU data.
86 */
87typedef struct VMCPU
88{
89 /** Per CPU forced action.
90 * See the VMCPU_FF_* \#defines. Updated atomically. */
91 uint32_t volatile fLocalForcedActions;
92 /** The CPU state. */
93 VMCPUSTATE volatile enmState;
94
95 /** Pointer to the ring-3 UVMCPU structure. */
96 PUVMCPU pUVCpu;
97 /** Ring-3 Host Context VM Pointer. */
98 PVMR3 pVMR3;
99 /** Ring-0 Host Context VM Pointer. */
100 PVMR0 pVMR0;
101 /** Raw-mode Context VM Pointer. */
102 PVMRC pVMRC;
103 /** The CPU ID.
104 * This is the index into the VM::aCpu array. */
105 VMCPUID idCpu;
106 /** The native thread handle. */
107 RTNATIVETHREAD hNativeThread;
108 /** Which host CPU ID is this EMT running on.
109 * Only valid when in RC or HWACCMR0 with scheduling disabled. */
110 RTCPUID volatile idHostCpu;
111
112 /** Align the next bit on a 64-byte boundary.
113 *
114 * @remarks The aligments of the members that are larger than 48 bytes should be
115 * 64-byte for cache line reasons. structs containing small amounts of
116 * data could be lumped together at the end with a < 64 byte padding
117 * following it (to grow into and align the struct size).
118 * */
119 uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121 /** CPUM part. */
122 union
123 {
124#ifdef ___CPUMInternal_h
125 struct CPUMCPU s;
126#endif
127 char padding[4096]; /* multiple of 64 */
128 } cpum;
129
130 /** PGM part. */
131 union
132 {
133#ifdef ___PGMInternal_h
134 struct PGMCPU s;
135#endif
136 char padding[32*1024]; /* multiple of 64 */
137 } pgm;
138
139 /** HWACCM part. */
140 union
141 {
142#ifdef ___HWACCMInternal_h
143 struct HWACCMCPU s;
144#endif
145 char padding[5120]; /* multiple of 64 */
146 } hwaccm;
147
148 /** EM part. */
149 union
150 {
151#ifdef ___EMInternal_h
152 struct EMCPU s;
153#endif
154 char padding[2048]; /* multiple of 64 */
155 } em;
156
157 /** TRPM part. */
158 union
159 {
160#ifdef ___TRPMInternal_h
161 struct TRPMCPU s;
162#endif
163 char padding[128]; /* multiple of 64 */
164 } trpm;
165
166 /** TM part. */
167 union
168 {
169#ifdef ___TMInternal_h
170 struct TMCPU s;
171#endif
172 char padding[64]; /* multiple of 64 */
173 } tm;
174
175 /** VMM part. */
176 union
177 {
178#ifdef ___VMMInternal_h
179 struct VMMCPU s;
180#endif
181 char padding[256]; /* multiple of 64 */
182 } vmm;
183
184 /** PDM part. */
185 union
186 {
187#ifdef ___PDMInternal_h
188 struct PDMCPU s;
189#endif
190 char padding[128]; /* multiple of 64 */
191 } pdm;
192
193 /** DBGF part.
194 * @todo Combine this with other tiny structures. */
195 union
196 {
197#ifdef ___DBGFInternal_h
198 struct DBGFCPU s;
199#endif
200 uint8_t padding[64]; /* multiple of 64 */
201 } dbgf;
202
203} VMCPU;
204
205
206/** @name Operations on VMCPU::enmState
207 * @{ */
208/** Gets the VMCPU state. */
209#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
210/** Sets the VMCPU state. */
211#define VMCPU_SET_STATE(pVCpu, enmNewState) \
212 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
213/** Cmpares and sets the VMCPU state. */
214#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
215 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
216/** Checks the VMCPU state. */
217#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
218 do { \
219 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
220 AssertMsg(enmState == (enmExpectedState), \
221 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
222 enmState, enmExpectedState, (pVCpu)->idCpu)); \
223 } while (0)
224/** Tests if the state means that the CPU is started. */
225#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
226/** Tests if the state means that the CPU is stopped. */
227#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
228/** @} */
229
230
231/** The name of the Guest Context VMM Core module. */
232#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
233/** The name of the Ring 0 Context VMM Core module. */
234#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
235
236/** VM Forced Action Flags.
237 *
238 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
239 * action mask of a VM.
240 *
241 * @{
242 */
243/** The virtual sync clock has been stopped, go to TM until it has been
244 * restarted... */
245#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
246/** PDM Queues are pending. */
247#define VM_FF_PDM_QUEUES_BIT 3
248#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
249/** PDM DMA transfers are pending. */
250#define VM_FF_PDM_DMA_BIT 4
251#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
252/** This action forces the VM to call DBGF so DBGF can service debugger
253 * requests in the emulation thread.
254 * This action flag stays asserted till DBGF clears it.*/
255#define VM_FF_DBGF_BIT 8
256#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
257/** This action forces the VM to service pending requests from other
258 * thread or requests which must be executed in another context. */
259#define VM_FF_REQUEST RT_BIT_32(9)
260/** Terminate the VM immediately. */
261#define VM_FF_TERMINATE RT_BIT_32(10)
262/** Reset the VM. (postponed) */
263#define VM_FF_RESET_BIT 11
264#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
265/** PGM needs to allocate handy pages. */
266#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
267/** PGM is out of memory.
268 * Abandon all loops and code paths which can be resumed and get up to the EM
269 * loops. */
270#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
271/** REM needs to be informed about handler changes. */
272#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
273#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
274/** Suspend the VM - debug only. */
275#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
276
277
278/** This action forces the VM to service check and pending interrups on the APIC. */
279#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
280/** This action forces the VM to service check and pending interrups on the PIC. */
281#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
282/** This action forces the VM to schedule and run pending timer (TM).
283 * @remarks Don't move - PATM compatability. */
284#define VMCPU_FF_TIMER RT_BIT_32(2)
285/** PDM critical section unlocking is pending, process promptly upon return to R3. */
286#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
287/** This action forces the VM to service pending requests from other
288 * thread or requests which must be executed in another context. */
289#define VMCPU_FF_REQUEST RT_BIT_32(9)
290/** This action forces the VM to resync the page tables before going
291 * back to execute guest code. (GLOBAL FLUSH) */
292#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
293/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
294 * (NON-GLOBAL FLUSH) */
295#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
296/** Check for pending TLB shootdown actions. */
297#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
298/** Check for pending TLB flush action. */
299#define VMCPU_FF_TLB_FLUSH_BIT 19
300#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
301/** Check the interupt and trap gates */
302#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
303/** Check Guest's TSS ring 0 stack */
304#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
305/** Check Guest's GDT table */
306#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
307/** Check Guest's LDT table */
308#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
309/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
310#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
311/** CSAM needs to scan the page that's being executed */
312#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
313/** CSAM needs to do some homework. */
314#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
315/** Force return to Ring-3. */
316#define VMCPU_FF_TO_R3 RT_BIT_32(28)
317
318/** Externally VM forced actions. Used to quit the idle/wait loop. */
319#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST)
320/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
321#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
322
323/** Externally forced VM actions. Used to quit the idle/wait loop. */
324#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA)
325/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
326#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER)
327
328/** High priority VM pre-execution actions. */
329#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC | VM_FF_DEBUG_SUSPEND \
330 | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
331/** High priority VMCPU pre-execution actions. */
332#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \
333 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
334 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
335
336/** High priority VM pre raw-mode execution mask. */
337#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
338/** High priority VMCPU pre raw-mode execution mask. */
339#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
340 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
341
342/** High priority post-execution actions. */
343#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
344/** High priority post-execution actions. */
345#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT|VMCPU_FF_CSAM_PENDING_ACTION)
346
347/** Normal priority VM post-execution actions. */
348#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY)
349/** Normal priority VMCPU post-execution actions. */
350#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
351
352/** Normal priority VM actions. */
353#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY)
354/** Normal priority VMCPU actions. */
355#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
356
357/** Flags to clear before resuming guest execution. */
358#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
359
360/** VM Flags that cause the HWACCM loops to go back to ring-3. */
361#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
362/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
363#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER)
364
365/** All the forced VM flags. */
366#define VM_FF_ALL_MASK (~0U)
367/** All the forced VMCPU flags. */
368#define VMCPU_FF_ALL_MASK (~0U)
369
370/** All the forced VM flags. */
371#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NO_MEMORY)
372/** All the forced VMCPU flags. */
373#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT))
374
375/** @} */
376
377/** @def VM_FF_SET
378 * Sets a force action flag.
379 *
380 * @param pVM VM Handle.
381 * @param fFlag The flag to set.
382 */
383#if 1
384# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
385#else
386# define VM_FF_SET(pVM, fFlag) \
387 do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
388 RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
389 } while (0)
390#endif
391
392/** @def VMCPU_FF_SET
393 * Sets a force action flag for the given VCPU.
394 *
395 * @param pVCpu VMCPU Handle.
396 * @param fFlag The flag to set.
397 */
398#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
399
400/** @def VM_FF_CLEAR
401 * Clears a force action flag.
402 *
403 * @param pVM VM Handle.
404 * @param fFlag The flag to clear.
405 */
406#if 1
407# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
408#else
409# define VM_FF_CLEAR(pVM, fFlag) \
410 do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
411 RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
412 } while (0)
413#endif
414
415/** @def VMCPU_FF_CLEAR
416 * Clears a force action flag for the given VCPU.
417 *
418 * @param pVCpu VMCPU Handle.
419 * @param fFlag The flag to clear.
420 */
421#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
422
423/** @def VM_FF_ISSET
424 * Checks if a force action flag is set.
425 *
426 * @param pVM VM Handle.
427 * @param fFlag The flag to check.
428 */
429#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
430
431/** @def VMCPU_FF_ISSET
432 * Checks if a force action flag is set for the given VCPU.
433 *
434 * @param pVCpu VMCPU Handle.
435 * @param fFlag The flag to check.
436 */
437#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
438
439/** @def VM_FF_ISPENDING
440 * Checks if one or more force action in the specified set is pending.
441 *
442 * @param pVM VM Handle.
443 * @param fFlags The flags to check for.
444 */
445#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
446
447/** @def VM_FF_TESTANDCLEAR
448 * Checks if one (!) force action in the specified set is pending and clears it atomically
449 *
450 * @returns true if the bit was set.
451 * @returns false if the bit was clear.
452 * @param pVM VM Handle.
453 * @param iBit Bit position to check and clear
454 */
455#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
456
457/** @def VMCPU_FF_TESTANDCLEAR
458 * Checks if one (!) force action in the specified set is pending and clears it atomically
459 *
460 * @returns true if the bit was set.
461 * @returns false if the bit was clear.
462 * @param pVCpu VMCPU Handle.
463 * @param iBit Bit position to check and clear
464 */
465#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit))
466
467/** @def VMCPU_FF_ISPENDING
468 * Checks if one or more force action in the specified set is pending for the given VCPU.
469 *
470 * @param pVCpu VMCPU Handle.
471 * @param fFlags The flags to check for.
472 */
473#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
474
475/** @def VM_FF_ISPENDING
476 * Checks if one or more force action in the specified set is pending while one
477 * or more other ones are not.
478 *
479 * @param pVM VM Handle.
480 * @param fFlags The flags to check for.
481 * @param fExcpt The flags that should not be set.
482 */
483#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
484
485/** @def VMCPU_FF_IS_PENDING_EXCEPT
486 * Checks if one or more force action in the specified set is pending for the given
487 * VCPU while one or more other ones are not.
488 *
489 * @param pVCpu VMCPU Handle.
490 * @param fFlags The flags to check for.
491 * @param fExcpt The flags that should not be set.
492 */
493#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
494
495/** @def VM_IS_EMT
496 * Checks if the current thread is the emulation thread (EMT).
497 *
498 * @remark The ring-0 variation will need attention if we expand the ring-0
499 * code to let threads other than EMT mess around with the VM.
500 */
501#ifdef IN_RC
502# define VM_IS_EMT(pVM) true
503#else
504# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
505#endif
506
507/** @def VMCPU_IS_EMT
508 * Checks if the current thread is the emulation thread (EMT) for the specified
509 * virtual CPU.
510 */
511#ifdef IN_RC
512# define VMCPU_IS_EMT(pVCpu) true
513#else
514# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
515#endif
516
517/** @def VM_ASSERT_EMT
518 * Asserts that the current thread IS the emulation thread (EMT).
519 */
520#ifdef IN_RC
521# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
522#elif defined(IN_RING0)
523# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
524#else
525# define VM_ASSERT_EMT(pVM) \
526 AssertMsg(VM_IS_EMT(pVM), \
527 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
528#endif
529
530/** @def VMCPU_ASSERT_EMT
531 * Asserts that the current thread IS the emulation thread (EMT) of the
532 * specified virtual CPU.
533 */
534#ifdef IN_RC
535# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
536#elif defined(IN_RING0)
537# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
538#else
539# define VMCPU_ASSERT_EMT(pVCpu) \
540 AssertMsg(VMCPU_IS_EMT(pVCpu), \
541 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
542 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
543#endif
544
545/** @def VM_ASSERT_EMT_RETURN
546 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
547 */
548#ifdef IN_RC
549# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
550#elif defined(IN_RING0)
551# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
552#else
553# define VM_ASSERT_EMT_RETURN(pVM, rc) \
554 AssertMsgReturn(VM_IS_EMT(pVM), \
555 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
556 (rc))
557#endif
558
559/** @def VMCPU_ASSERT_EMT_RETURN
560 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
561 */
562#ifdef IN_RC
563# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
564#elif defined(IN_RING0)
565# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
566#else
567# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
568 AssertMsg(VMCPU_IS_EMT(pVCpu), \
569 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
570 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
571 (rc))
572#endif
573
574
575/**
576 * Asserts that the current thread is NOT the emulation thread.
577 */
578#define VM_ASSERT_OTHER_THREAD(pVM) \
579 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
580
581
582/** @def VM_ASSERT_STATE_RETURN
583 * Asserts a certain VM state.
584 */
585#define VM_ASSERT_STATE(pVM, _enmState) \
586 AssertMsg((pVM)->enmVMState == (_enmState), \
587 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
588
589/** @def VM_ASSERT_STATE_RETURN
590 * Asserts a certain VM state and returns if it doesn't match.
591 */
592#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
593 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
594 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
595 (rc))
596
597/** @def VM_ASSERT_VALID_EXT_RETURN
598 * Asserts a the VM handle is valid for external access, i.e. not being
599 * destroy or terminated.
600 */
601#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
602 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
603 && (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
604 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
605 ? VMGetStateName(pVM->enmVMState) : ""), \
606 (rc))
607
608/** @def VMCPU_ASSERT_VALID_EXT_RETURN
609 * Asserts a the VMCPU handle is valid for external access, i.e. not being
610 * destroy or terminated.
611 */
612#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
613 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
614 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
615 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
616 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
617 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
618 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
619 (rc))
620
621
622/** This is the VM structure.
623 *
624 * It contains (nearly?) all the VM data which have to be available in all
625 * contexts. Even if it contains all the data the idea is to use APIs not
626 * to modify all the members all around the place. Therefore we make use of
627 * unions to hide everything which isn't local to the current source module.
628 * This means we'll have to pay a little bit of attention when adding new
629 * members to structures in the unions and make sure to keep the padding sizes
630 * up to date.
631 *
632 * Run tstVMStructSize after update!
633 */
634typedef struct VM
635{
636 /** The state of the VM.
637 * This field is read only to everyone except the VM and EM. */
638 VMSTATE enmVMState;
639 /** Forced action flags.
640 * See the VM_FF_* \#defines. Updated atomically.
641 */
642 volatile uint32_t fGlobalForcedActions;
643 /** Pointer to the array of page descriptors for the VM structure allocation. */
644 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
645 /** Session handle. For use when calling SUPR0 APIs. */
646 PSUPDRVSESSION pSession;
647 /** Pointer to the ring-3 VM structure. */
648 PUVM pUVM;
649 /** Ring-3 Host Context VM Pointer. */
650 R3PTRTYPE(struct VM *) pVMR3;
651 /** Ring-0 Host Context VM Pointer. */
652 R0PTRTYPE(struct VM *) pVMR0;
653 /** Raw-mode Context VM Pointer. */
654 RCPTRTYPE(struct VM *) pVMRC;
655
656 /** The GVM VM handle. Only the GVM should modify this field. */
657 uint32_t hSelf;
658 /** Number of virtual CPUs. */
659 uint32_t cCPUs;
660
661 /** Size of the VM structure including the VMCPU array. */
662 uint32_t cbSelf;
663
664 /** Offset to the VMCPU array starting from beginning of this structure. */
665 uint32_t offVMCPU;
666
667 /** Reserved; alignment. */
668 uint32_t u32Reserved[6];
669
670 /** @name Public VMM Switcher APIs
671 * @{ */
672 /**
673 * Assembly switch entry point for returning to host context.
674 * This function will clean up the stack frame.
675 *
676 * @param eax The return code, register.
677 * @param Ctx The guest core context.
678 * @remark Assume interrupts disabled.
679 */
680 RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/*(int32_t eax, CPUMCTXCORE Ctx)*/;
681
682 /**
683 * Assembly switch entry point for returning to host context.
684 *
685 * This is an alternative entry point which we'll be using when the we have the
686 * hypervisor context and need to save that before going to the host.
687 *
688 * This is typically useful when abandoning the hypervisor because of a trap
689 * and want the trap state to be saved.
690 *
691 * @param eax The return code, register.
692 * @param ecx Pointer to the hypervisor core context, register.
693 * @remark Assume interrupts disabled.
694 */
695 RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/*(int32_t eax, PCPUMCTXCORE ecx)*/;
696
697 /**
698 * Assembly switch entry point for returning to host context.
699 *
700 * This is an alternative to the two *Ctx APIs and implies that the context has already
701 * been saved, or that it's just a brief return to HC and that the caller intends to resume
702 * whatever it is doing upon 'return' from this call.
703 *
704 * @param eax The return code, register.
705 * @remark Assume interrupts disabled.
706 */
707 RTRCPTR pfnVMMGCGuestToHostAsm/*(int32_t eax)*/;
708 /** @} */
709
710
711 /** @name Various VM data owned by VM.
712 * @{ */
713 RTTHREAD uPadding1;
714 /** The native handle of ThreadEMT. Getting the native handle
715 * is generally faster than getting the IPRT one (except on OS/2 :-). */
716 RTNATIVETHREAD uPadding2;
717 /** @} */
718
719
720 /** @name Various items that are frequently accessed.
721 * @{ */
722 /** Raw ring-3 indicator. */
723 bool fRawR3Enabled;
724 /** Raw ring-0 indicator. */
725 bool fRawR0Enabled;
726 /** PATM enabled flag.
727 * This is placed here for performance reasons. */
728 bool fPATMEnabled;
729 /** CSAM enabled flag.
730 * This is placed here for performance reasons. */
731 bool fCSAMEnabled;
732 /** Hardware VM support is available and enabled.
733 * This is placed here for performance reasons. */
734 bool fHWACCMEnabled;
735 /** Hardware VM support is required and non-optional.
736 * This is initialized together with the rest of the VM structure. */
737 bool fHwVirtExtForced;
738 /** PARAV enabled flag. */
739 bool fPARAVEnabled;
740 /** @} */
741
742
743 /* padding to make gnuc put the StatQemuToGC where msc does. */
744#if HC_ARCH_BITS == 32
745 uint32_t padding0;
746#endif
747
748 /** Profiling the total time from Qemu to GC. */
749 STAMPROFILEADV StatTotalQemuToGC;
750 /** Profiling the total time from GC to Qemu. */
751 STAMPROFILEADV StatTotalGCToQemu;
752 /** Profiling the total time spent in GC. */
753 STAMPROFILEADV StatTotalInGC;
754 /** Profiling the total time spent not in Qemu. */
755 STAMPROFILEADV StatTotalInQemu;
756 /** Profiling the VMMSwitcher code for going to GC. */
757 STAMPROFILEADV StatSwitcherToGC;
758 /** Profiling the VMMSwitcher code for going to HC. */
759 STAMPROFILEADV StatSwitcherToHC;
760 STAMPROFILEADV StatSwitcherSaveRegs;
761 STAMPROFILEADV StatSwitcherSysEnter;
762 STAMPROFILEADV StatSwitcherDebug;
763 STAMPROFILEADV StatSwitcherCR0;
764 STAMPROFILEADV StatSwitcherCR4;
765 STAMPROFILEADV StatSwitcherJmpCR3;
766 STAMPROFILEADV StatSwitcherRstrRegs;
767 STAMPROFILEADV StatSwitcherLgdt;
768 STAMPROFILEADV StatSwitcherLidt;
769 STAMPROFILEADV StatSwitcherLldt;
770 STAMPROFILEADV StatSwitcherTSS;
771
772/** @todo Realign everything on 64 byte boundaries to better match the
773 * cache-line size. */
774 /* padding - the unions must be aligned on 32 bytes boundraries. */
775 uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
776
777 /** CPUM part. */
778 union
779 {
780#ifdef ___CPUMInternal_h
781 struct CPUM s;
782#endif
783 char padding[2048]; /* multiple of 32 */
784 } cpum;
785
786 /** VMM part. */
787 union
788 {
789#ifdef ___VMMInternal_h
790 struct VMM s;
791#endif
792 char padding[1600]; /* multiple of 32 */
793 } vmm;
794
795 /** PGM part. */
796 union
797 {
798#ifdef ___PGMInternal_h
799 struct PGM s;
800#endif
801 char padding[16*1024]; /* multiple of 32 */
802 } pgm;
803
804 /** HWACCM part. */
805 union
806 {
807#ifdef ___HWACCMInternal_h
808 struct HWACCM s;
809#endif
810 char padding[512]; /* multiple of 32 */
811 } hwaccm;
812
813 /** TRPM part. */
814 union
815 {
816#ifdef ___TRPMInternal_h
817 struct TRPM s;
818#endif
819 char padding[5344]; /* multiple of 32 */
820 } trpm;
821
822 /** SELM part. */
823 union
824 {
825#ifdef ___SELMInternal_h
826 struct SELM s;
827#endif
828 char padding[544]; /* multiple of 32 */
829 } selm;
830
831 /** MM part. */
832 union
833 {
834#ifdef ___MMInternal_h
835 struct MM s;
836#endif
837 char padding[192]; /* multiple of 32 */
838 } mm;
839
840 /** CFGM part. */
841 union
842 {
843#ifdef ___CFGMInternal_h
844 struct CFGM s;
845#endif
846 char padding[32]; /* multiple of 32 */
847 } cfgm;
848
849 /** PDM part. */
850 union
851 {
852#ifdef ___PDMInternal_h
853 struct PDM s;
854#endif
855 char padding[1824]; /* multiple of 32 */
856 } pdm;
857
858 /** IOM part. */
859 union
860 {
861#ifdef ___IOMInternal_h
862 struct IOM s;
863#endif
864 char padding[4544]; /* multiple of 32 */
865 } iom;
866
867 /** PATM part. */
868 union
869 {
870#ifdef ___PATMInternal_h
871 struct PATM s;
872#endif
873 char padding[768]; /* multiple of 32 */
874 } patm;
875
876 /** CSAM part. */
877 union
878 {
879#ifdef ___CSAMInternal_h
880 struct CSAM s;
881#endif
882 char padding[3328]; /* multiple of 32 */
883 } csam;
884
885 /** PARAV part. */
886 union
887 {
888#ifdef ___PARAVInternal_h
889 struct PARAV s;
890#endif
891 char padding[128];
892 } parav;
893
894 /** EM part. */
895 union
896 {
897#ifdef ___EMInternal_h
898 struct EM s;
899#endif
900 char padding[256]; /* multiple of 32 */
901 } em;
902
903 /** TM part. */
904 union
905 {
906#ifdef ___TMInternal_h
907 struct TM s;
908#endif
909 char padding[1920]; /* multiple of 32 */
910 } tm;
911
912 /** DBGF part. */
913 union
914 {
915#ifdef ___DBGFInternal_h
916 struct DBGF s;
917#endif
918 char padding[2368]; /* multiple of 32 */
919 } dbgf;
920
921 /** SSM part. */
922 union
923 {
924#ifdef ___SSMInternal_h
925 struct SSM s;
926#endif
927 char padding[32]; /* multiple of 32 */
928 } ssm;
929
930 /** VM part. */
931 union
932 {
933#ifdef ___VMInternal_h
934 struct VMINT s;
935#endif
936 char padding[768]; /* multiple of 32 */
937 } vm;
938
939 /** REM part. */
940 union
941 {
942#ifdef ___REMInternal_h
943 struct REM s;
944#endif
945
946/** @def VM_REM_SIZE
947 * Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
948#if GC_ARCH_BITS == 32
949# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10800 : 0x10800)
950#else
951# define VM_REM_SIZE (HC_ARCH_BITS == 32 ? 0x10900 : 0x10900)
952#endif
953 char padding[VM_REM_SIZE]; /* multiple of 32 */
954 } rem;
955
956 /** Padding for aligning the cpu array on a 64 byte boundrary. */
957 uint32_t u32Reserved2[8];
958
959 /** VMCPU array for the configured number of virtual CPUs.
960 * Must be aligned on a 64-byte boundrary. */
961 VMCPU aCpus[1];
962} VM;
963
964
965#ifdef IN_RC
966RT_C_DECLS_BEGIN
967
968/** The VM structure.
969 * This is imported from the VMMGCBuiltin module, i.e. it's a one
970 * of those magic globals which we should avoid using.
971 */
972extern DECLIMPORT(VM) g_VM;
973
974RT_C_DECLS_END
975#endif
976
977/** @} */
978
979#endif
980
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