VirtualBox

source: vbox/trunk/include/VBox/vm.h@ 20530

Last change on this file since 20530 was 20530, checked in by vboxsync, 16 years ago

VMM: remove DISCPUSTATE from the stack.

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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_vm_h
31#define ___VBox_vm_h
32
33#include <VBox/cdefs.h>
34#include <VBox/types.h>
35#include <VBox/cpum.h>
36#include <VBox/stam.h>
37#include <VBox/vmapi.h>
38#include <VBox/sup.h>
39#include <VBox/vmm.h>
40
41
42/** @defgroup grp_vm The Virtual Machine
43 * @{
44 */
45
46/**
47 * The state of a Virtual CPU.
48 *
49 * The basic state indicated here is whether the CPU has been started or not. In
50 * addition, there are sub-states when started for assisting scheduling (GVMM
51 * mostly).
52 *
53 * The transision out of the STOPPED state is done by a vmR3PowerOn.
54 * The transision back to the STOPPED state is done by vmR3PowerOff.
55 *
56 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58 */
59typedef enum VMCPUSTATE
60{
61 /** The customary invalid zero. */
62 VMCPUSTATE_INVALID = 0,
63
64 /** Virtual CPU has not yet been started. */
65 VMCPUSTATE_STOPPED,
66
67 /** CPU started. */
68 VMCPUSTATE_STARTED,
69 /** Executing guest code and can be poked. */
70 VMCPUSTATE_STARTED_EXEC,
71 /** Executing guest code in the recompiler. */
72 VMCPUSTATE_STARTED_EXEC_REM,
73 /** Halted. */
74 VMCPUSTATE_STARTED_HALTED,
75
76 /** The end of valid virtual CPU states. */
77 VMCPUSTATE_END,
78
79 /** Ensure 32-bit type. */
80 VMCPUSTATE_32BIT_HACK = 0x7fffffff
81} VMCPUSTATE;
82
83
84/**
85 * Per virtual CPU data.
86 */
87typedef struct VMCPU
88{
89 /** Per CPU forced action.
90 * See the VMCPU_FF_* \#defines. Updated atomically. */
91 uint32_t volatile fLocalForcedActions;
92 /** The CPU state. */
93 VMCPUSTATE volatile enmState;
94
95 /** Pointer to the ring-3 UVMCPU structure. */
96 PUVMCPU pUVCpu;
97 /** Ring-3 Host Context VM Pointer. */
98 PVMR3 pVMR3;
99 /** Ring-0 Host Context VM Pointer. */
100 PVMR0 pVMR0;
101 /** Raw-mode Context VM Pointer. */
102 PVMRC pVMRC;
103 /** The CPU ID.
104 * This is the index into the VM::aCpu array. */
105 VMCPUID idCpu;
106 /** The native thread handle. */
107 RTNATIVETHREAD hNativeThread;
108 /** Which host CPU ID is this EMT running on.
109 * Only valid when in RC or HWACCMR0 with scheduling disabled. */
110 RTCPUID volatile idHostCpu;
111
112 /** Align the next bit on a 64-byte boundary.
113 *
114 * @remarks The aligments of the members that are larger than 48 bytes should be
115 * 64-byte for cache line reasons. structs containing small amounts of
116 * data could be lumped together at the end with a < 64 byte padding
117 * following it (to grow into and align the struct size).
118 * */
119 uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121 /** CPUM part. */
122 union
123 {
124#ifdef ___CPUMInternal_h
125 struct CPUMCPU s;
126#endif
127 char padding[4096]; /* multiple of 64 */
128 } cpum;
129
130 /** PGM part. */
131 union
132 {
133#ifdef ___PGMInternal_h
134 struct PGMCPU s;
135#endif
136 char padding[32*1024]; /* multiple of 64 */
137 } pgm;
138
139 /** HWACCM part. */
140 union
141 {
142#ifdef ___HWACCMInternal_h
143 struct HWACCMCPU s;
144#endif
145 char padding[5120]; /* multiple of 64 */
146 } hwaccm;
147
148 /** EM part. */
149 union
150 {
151#ifdef ___EMInternal_h
152 struct EMCPU s;
153#endif
154 char padding[2048]; /* multiple of 64 */
155 } em;
156
157 /** TRPM part. */
158 union
159 {
160#ifdef ___TRPMInternal_h
161 struct TRPMCPU s;
162#endif
163 char padding[128]; /* multiple of 64 */
164 } trpm;
165
166 /** TM part. */
167 union
168 {
169#ifdef ___TMInternal_h
170 struct TMCPU s;
171#endif
172 char padding[64]; /* multiple of 64 */
173 } tm;
174
175 /** VMM part. */
176 union
177 {
178#ifdef ___VMMInternal_h
179 struct VMMCPU s;
180#endif
181 char padding[256]; /* multiple of 64 */
182 } vmm;
183
184 /** PDM part. */
185 union
186 {
187#ifdef ___PDMInternal_h
188 struct PDMCPU s;
189#endif
190 char padding[128]; /* multiple of 64 */
191 } pdm;
192
193 /** IOM part. */
194 union
195 {
196#ifdef ___IOMInternal_h
197 struct IOMCPU s;
198#endif
199 char padding[512]; /* multiple of 64 */
200 } iom;
201
202 /** DBGF part.
203 * @todo Combine this with other tiny structures. */
204 union
205 {
206#ifdef ___DBGFInternal_h
207 struct DBGFCPU s;
208#endif
209 uint8_t padding[64]; /* multiple of 64 */
210 } dbgf;
211
212} VMCPU;
213
214
215/** @name Operations on VMCPU::enmState
216 * @{ */
217/** Gets the VMCPU state. */
218#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
219/** Sets the VMCPU state. */
220#define VMCPU_SET_STATE(pVCpu, enmNewState) \
221 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
222/** Cmpares and sets the VMCPU state. */
223#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
224 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
225/** Checks the VMCPU state. */
226#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
227 do { \
228 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
229 AssertMsg(enmState == (enmExpectedState), \
230 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
231 enmState, enmExpectedState, (pVCpu)->idCpu)); \
232 } while (0)
233/** Tests if the state means that the CPU is started. */
234#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
235/** Tests if the state means that the CPU is stopped. */
236#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
237/** @} */
238
239
240/** The name of the Guest Context VMM Core module. */
241#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
242/** The name of the Ring 0 Context VMM Core module. */
243#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
244
245/** VM Forced Action Flags.
246 *
247 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
248 * action mask of a VM.
249 *
250 * @{
251 */
252/** The virtual sync clock has been stopped, go to TM until it has been
253 * restarted... */
254#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
255/** PDM Queues are pending. */
256#define VM_FF_PDM_QUEUES_BIT 3
257#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
258/** PDM DMA transfers are pending. */
259#define VM_FF_PDM_DMA_BIT 4
260#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
261/** This action forces the VM to call DBGF so DBGF can service debugger
262 * requests in the emulation thread.
263 * This action flag stays asserted till DBGF clears it.*/
264#define VM_FF_DBGF_BIT 8
265#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
266/** This action forces the VM to service pending requests from other
267 * thread or requests which must be executed in another context. */
268#define VM_FF_REQUEST RT_BIT_32(9)
269/** Terminate the VM immediately. */
270#define VM_FF_TERMINATE RT_BIT_32(10)
271/** Reset the VM. (postponed) */
272#define VM_FF_RESET_BIT 11
273#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
274/** PGM needs to allocate handy pages. */
275#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
276/** PGM is out of memory.
277 * Abandon all loops and code paths which can be resumed and get up to the EM
278 * loops. */
279#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
280/** REM needs to be informed about handler changes. */
281#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
282#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
283/** Suspend the VM - debug only. */
284#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
285
286
287/** This action forces the VM to service check and pending interrups on the APIC. */
288#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
289/** This action forces the VM to service check and pending interrups on the PIC. */
290#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
291/** This action forces the VM to schedule and run pending timer (TM).
292 * @remarks Don't move - PATM compatability. */
293#define VMCPU_FF_TIMER RT_BIT_32(2)
294/** PDM critical section unlocking is pending, process promptly upon return to R3. */
295#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
296/** This action forces the VM to service pending requests from other
297 * thread or requests which must be executed in another context. */
298#define VMCPU_FF_REQUEST RT_BIT_32(9)
299/** This action forces the VM to resync the page tables before going
300 * back to execute guest code. (GLOBAL FLUSH) */
301#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
302/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
303 * (NON-GLOBAL FLUSH) */
304#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
305/** Check for pending TLB shootdown actions. */
306#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
307/** Check for pending TLB flush action. */
308#define VMCPU_FF_TLB_FLUSH_BIT 19
309#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
310/** Check the interupt and trap gates */
311#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
312/** Check Guest's TSS ring 0 stack */
313#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
314/** Check Guest's GDT table */
315#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
316/** Check Guest's LDT table */
317#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
318/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
319#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
320/** CSAM needs to scan the page that's being executed */
321#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
322/** CSAM needs to do some homework. */
323#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
324/** Force return to Ring-3. */
325#define VMCPU_FF_TO_R3 RT_BIT_32(28)
326
327/** Externally VM forced actions. Used to quit the idle/wait loop. */
328#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST)
329/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
330#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
331
332/** Externally forced VM actions. Used to quit the idle/wait loop. */
333#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA)
334/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
335#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER)
336
337/** High priority VM pre-execution actions. */
338#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC | VM_FF_DEBUG_SUSPEND \
339 | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
340/** High priority VMCPU pre-execution actions. */
341#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \
342 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
343 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
344
345/** High priority VM pre raw-mode execution mask. */
346#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
347/** High priority VMCPU pre raw-mode execution mask. */
348#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
349 | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
350
351/** High priority post-execution actions. */
352#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
353/** High priority post-execution actions. */
354#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT|VMCPU_FF_CSAM_PENDING_ACTION)
355
356/** Normal priority VM post-execution actions. */
357#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY)
358/** Normal priority VMCPU post-execution actions. */
359#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
360
361/** Normal priority VM actions. */
362#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY)
363/** Normal priority VMCPU actions. */
364#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
365
366/** Flags to clear before resuming guest execution. */
367#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
368
369/** VM Flags that cause the HWACCM loops to go back to ring-3. */
370#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
371/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
372#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER)
373
374/** All the forced VM flags. */
375#define VM_FF_ALL_MASK (~0U)
376/** All the forced VMCPU flags. */
377#define VMCPU_FF_ALL_MASK (~0U)
378
379/** All the forced VM flags. */
380#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NO_MEMORY)
381/** All the forced VMCPU flags. */
382#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT))
383
384/** @} */
385
386/** @def VM_FF_SET
387 * Sets a force action flag.
388 *
389 * @param pVM VM Handle.
390 * @param fFlag The flag to set.
391 */
392#if 1
393# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
394#else
395# define VM_FF_SET(pVM, fFlag) \
396 do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
397 RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
398 } while (0)
399#endif
400
401/** @def VMCPU_FF_SET
402 * Sets a force action flag for the given VCPU.
403 *
404 * @param pVCpu VMCPU Handle.
405 * @param fFlag The flag to set.
406 */
407#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
408
409/** @def VM_FF_CLEAR
410 * Clears a force action flag.
411 *
412 * @param pVM VM Handle.
413 * @param fFlag The flag to clear.
414 */
415#if 1
416# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
417#else
418# define VM_FF_CLEAR(pVM, fFlag) \
419 do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
420 RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
421 } while (0)
422#endif
423
424/** @def VMCPU_FF_CLEAR
425 * Clears a force action flag for the given VCPU.
426 *
427 * @param pVCpu VMCPU Handle.
428 * @param fFlag The flag to clear.
429 */
430#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
431
432/** @def VM_FF_ISSET
433 * Checks if a force action flag is set.
434 *
435 * @param pVM VM Handle.
436 * @param fFlag The flag to check.
437 */
438#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
439
440/** @def VMCPU_FF_ISSET
441 * Checks if a force action flag is set for the given VCPU.
442 *
443 * @param pVCpu VMCPU Handle.
444 * @param fFlag The flag to check.
445 */
446#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
447
448/** @def VM_FF_ISPENDING
449 * Checks if one or more force action in the specified set is pending.
450 *
451 * @param pVM VM Handle.
452 * @param fFlags The flags to check for.
453 */
454#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
455
456/** @def VM_FF_TESTANDCLEAR
457 * Checks if one (!) force action in the specified set is pending and clears it atomically
458 *
459 * @returns true if the bit was set.
460 * @returns false if the bit was clear.
461 * @param pVM VM Handle.
462 * @param iBit Bit position to check and clear
463 */
464#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
465
466/** @def VMCPU_FF_TESTANDCLEAR
467 * Checks if one (!) force action in the specified set is pending and clears it atomically
468 *
469 * @returns true if the bit was set.
470 * @returns false if the bit was clear.
471 * @param pVCpu VMCPU Handle.
472 * @param iBit Bit position to check and clear
473 */
474#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit))
475
476/** @def VMCPU_FF_ISPENDING
477 * Checks if one or more force action in the specified set is pending for the given VCPU.
478 *
479 * @param pVCpu VMCPU Handle.
480 * @param fFlags The flags to check for.
481 */
482#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
483
484/** @def VM_FF_ISPENDING
485 * Checks if one or more force action in the specified set is pending while one
486 * or more other ones are not.
487 *
488 * @param pVM VM Handle.
489 * @param fFlags The flags to check for.
490 * @param fExcpt The flags that should not be set.
491 */
492#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
493
494/** @def VMCPU_FF_IS_PENDING_EXCEPT
495 * Checks if one or more force action in the specified set is pending for the given
496 * VCPU while one or more other ones are not.
497 *
498 * @param pVCpu VMCPU Handle.
499 * @param fFlags The flags to check for.
500 * @param fExcpt The flags that should not be set.
501 */
502#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
503
504/** @def VM_IS_EMT
505 * Checks if the current thread is the emulation thread (EMT).
506 *
507 * @remark The ring-0 variation will need attention if we expand the ring-0
508 * code to let threads other than EMT mess around with the VM.
509 */
510#ifdef IN_RC
511# define VM_IS_EMT(pVM) true
512#else
513# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
514#endif
515
516/** @def VMCPU_IS_EMT
517 * Checks if the current thread is the emulation thread (EMT) for the specified
518 * virtual CPU.
519 */
520#ifdef IN_RC
521# define VMCPU_IS_EMT(pVCpu) true
522#else
523# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
524#endif
525
526/** @def VM_ASSERT_EMT
527 * Asserts that the current thread IS the emulation thread (EMT).
528 */
529#ifdef IN_RC
530# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
531#elif defined(IN_RING0)
532# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
533#else
534# define VM_ASSERT_EMT(pVM) \
535 AssertMsg(VM_IS_EMT(pVM), \
536 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
537#endif
538
539/** @def VMCPU_ASSERT_EMT
540 * Asserts that the current thread IS the emulation thread (EMT) of the
541 * specified virtual CPU.
542 */
543#ifdef IN_RC
544# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
545#elif defined(IN_RING0)
546# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
547#else
548# define VMCPU_ASSERT_EMT(pVCpu) \
549 AssertMsg(VMCPU_IS_EMT(pVCpu), \
550 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
551 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
552#endif
553
554/** @def VM_ASSERT_EMT_RETURN
555 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
556 */
557#ifdef IN_RC
558# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
559#elif defined(IN_RING0)
560# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
561#else
562# define VM_ASSERT_EMT_RETURN(pVM, rc) \
563 AssertMsgReturn(VM_IS_EMT(pVM), \
564 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
565 (rc))
566#endif
567
568/** @def VMCPU_ASSERT_EMT_RETURN
569 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
570 */
571#ifdef IN_RC
572# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
573#elif defined(IN_RING0)
574# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
575#else
576# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
577 AssertMsg(VMCPU_IS_EMT(pVCpu), \
578 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
579 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
580 (rc))
581#endif
582
583
584/**
585 * Asserts that the current thread is NOT the emulation thread.
586 */
587#define VM_ASSERT_OTHER_THREAD(pVM) \
588 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
589
590
591/** @def VM_ASSERT_STATE_RETURN
592 * Asserts a certain VM state.
593 */
594#define VM_ASSERT_STATE(pVM, _enmState) \
595 AssertMsg((pVM)->enmVMState == (_enmState), \
596 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
597
598/** @def VM_ASSERT_STATE_RETURN
599 * Asserts a certain VM state and returns if it doesn't match.
600 */
601#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
602 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
603 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
604 (rc))
605
606/** @def VM_ASSERT_VALID_EXT_RETURN
607 * Asserts a the VM handle is valid for external access, i.e. not being
608 * destroy or terminated.
609 */
610#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
611 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
612 && (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
613 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
614 ? VMGetStateName(pVM->enmVMState) : ""), \
615 (rc))
616
617/** @def VMCPU_ASSERT_VALID_EXT_RETURN
618 * Asserts a the VMCPU handle is valid for external access, i.e. not being
619 * destroy or terminated.
620 */
621#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
622 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
623 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
624 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
625 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
626 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
627 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
628 (rc))
629
630
631/** This is the VM structure.
632 *
633 * It contains (nearly?) all the VM data which have to be available in all
634 * contexts. Even if it contains all the data the idea is to use APIs not
635 * to modify all the members all around the place. Therefore we make use of
636 * unions to hide everything which isn't local to the current source module.
637 * This means we'll have to pay a little bit of attention when adding new
638 * members to structures in the unions and make sure to keep the padding sizes
639 * up to date.
640 *
641 * Run tstVMStructSize after update!
642 */
643typedef struct VM
644{
645 /** The state of the VM.
646 * This field is read only to everyone except the VM and EM. */
647 VMSTATE enmVMState;
648 /** Forced action flags.
649 * See the VM_FF_* \#defines. Updated atomically.
650 */
651 volatile uint32_t fGlobalForcedActions;
652 /** Pointer to the array of page descriptors for the VM structure allocation. */
653 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
654 /** Session handle. For use when calling SUPR0 APIs. */
655 PSUPDRVSESSION pSession;
656 /** Pointer to the ring-3 VM structure. */
657 PUVM pUVM;
658 /** Ring-3 Host Context VM Pointer. */
659 R3PTRTYPE(struct VM *) pVMR3;
660 /** Ring-0 Host Context VM Pointer. */
661 R0PTRTYPE(struct VM *) pVMR0;
662 /** Raw-mode Context VM Pointer. */
663 RCPTRTYPE(struct VM *) pVMRC;
664
665 /** The GVM VM handle. Only the GVM should modify this field. */
666 uint32_t hSelf;
667 /** Number of virtual CPUs. */
668 uint32_t cCPUs;
669
670 /** Size of the VM structure including the VMCPU array. */
671 uint32_t cbSelf;
672
673 /** Offset to the VMCPU array starting from beginning of this structure. */
674 uint32_t offVMCPU;
675
676 /** Reserved; alignment. */
677 uint32_t u32Reserved[6];
678
679 /** @name Public VMM Switcher APIs
680 * @{ */
681 /**
682 * Assembly switch entry point for returning to host context.
683 * This function will clean up the stack frame.
684 *
685 * @param eax The return code, register.
686 * @param Ctx The guest core context.
687 * @remark Assume interrupts disabled.
688 */
689 RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/*(int32_t eax, CPUMCTXCORE Ctx)*/;
690
691 /**
692 * Assembly switch entry point for returning to host context.
693 *
694 * This is an alternative entry point which we'll be using when the we have the
695 * hypervisor context and need to save that before going to the host.
696 *
697 * This is typically useful when abandoning the hypervisor because of a trap
698 * and want the trap state to be saved.
699 *
700 * @param eax The return code, register.
701 * @param ecx Pointer to the hypervisor core context, register.
702 * @remark Assume interrupts disabled.
703 */
704 RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/*(int32_t eax, PCPUMCTXCORE ecx)*/;
705
706 /**
707 * Assembly switch entry point for returning to host context.
708 *
709 * This is an alternative to the two *Ctx APIs and implies that the context has already
710 * been saved, or that it's just a brief return to HC and that the caller intends to resume
711 * whatever it is doing upon 'return' from this call.
712 *
713 * @param eax The return code, register.
714 * @remark Assume interrupts disabled.
715 */
716 RTRCPTR pfnVMMGCGuestToHostAsm/*(int32_t eax)*/;
717 /** @} */
718
719
720 /** @name Various VM data owned by VM.
721 * @{ */
722 RTTHREAD uPadding1;
723 /** The native handle of ThreadEMT. Getting the native handle
724 * is generally faster than getting the IPRT one (except on OS/2 :-). */
725 RTNATIVETHREAD uPadding2;
726 /** @} */
727
728
729 /** @name Various items that are frequently accessed.
730 * @{ */
731 /** Raw ring-3 indicator. */
732 bool fRawR3Enabled;
733 /** Raw ring-0 indicator. */
734 bool fRawR0Enabled;
735 /** PATM enabled flag.
736 * This is placed here for performance reasons. */
737 bool fPATMEnabled;
738 /** CSAM enabled flag.
739 * This is placed here for performance reasons. */
740 bool fCSAMEnabled;
741 /** Hardware VM support is available and enabled.
742 * This is placed here for performance reasons. */
743 bool fHWACCMEnabled;
744 /** Hardware VM support is required and non-optional.
745 * This is initialized together with the rest of the VM structure. */
746 bool fHwVirtExtForced;
747 /** PARAV enabled flag. */
748 bool fPARAVEnabled;
749 /** @} */
750
751
752 /* padding to make gnuc put the StatQemuToGC where msc does. */
753#if HC_ARCH_BITS == 32
754 uint32_t padding0;
755#endif
756
757 /** Profiling the total time from Qemu to GC. */
758 STAMPROFILEADV StatTotalQemuToGC;
759 /** Profiling the total time from GC to Qemu. */
760 STAMPROFILEADV StatTotalGCToQemu;
761 /** Profiling the total time spent in GC. */
762 STAMPROFILEADV StatTotalInGC;
763 /** Profiling the total time spent not in Qemu. */
764 STAMPROFILEADV StatTotalInQemu;
765 /** Profiling the VMMSwitcher code for going to GC. */
766 STAMPROFILEADV StatSwitcherToGC;
767 /** Profiling the VMMSwitcher code for going to HC. */
768 STAMPROFILEADV StatSwitcherToHC;
769 STAMPROFILEADV StatSwitcherSaveRegs;
770 STAMPROFILEADV StatSwitcherSysEnter;
771 STAMPROFILEADV StatSwitcherDebug;
772 STAMPROFILEADV StatSwitcherCR0;
773 STAMPROFILEADV StatSwitcherCR4;
774 STAMPROFILEADV StatSwitcherJmpCR3;
775 STAMPROFILEADV StatSwitcherRstrRegs;
776 STAMPROFILEADV StatSwitcherLgdt;
777 STAMPROFILEADV StatSwitcherLidt;
778 STAMPROFILEADV StatSwitcherLldt;
779 STAMPROFILEADV StatSwitcherTSS;
780
781/** @todo Realign everything on 64 byte boundaries to better match the
782 * cache-line size. */
783 /* padding - the unions must be aligned on 32 bytes boundraries. */
784 uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
785
786 /** CPUM part. */
787 union
788 {
789#ifdef ___CPUMInternal_h
790 struct CPUM s;
791#endif
792 char padding[2048]; /* multiple of 32 */
793 } cpum;
794
795 /** VMM part. */
796 union
797 {
798#ifdef ___VMMInternal_h
799 struct VMM s;
800#endif
801 char padding[1600]; /* multiple of 32 */
802 } vmm;
803
804 /** PGM part. */
805 union
806 {
807#ifdef ___PGMInternal_h
808 struct PGM s;
809#endif
810 char padding[16*1024]; /* multiple of 32 */
811 } pgm;
812
813 /** HWACCM part. */
814 union
815 {
816#ifdef ___HWACCMInternal_h
817 struct HWACCM s;
818#endif
819 char padding[512]; /* multiple of 32 */
820 } hwaccm;
821
822 /** TRPM part. */
823 union
824 {
825#ifdef ___TRPMInternal_h
826 struct TRPM s;
827#endif
828 char padding[5344]; /* multiple of 32 */
829 } trpm;
830
831 /** SELM part. */
832 union
833 {
834#ifdef ___SELMInternal_h
835 struct SELM s;
836#endif
837 char padding[544]; /* multiple of 32 */
838 } selm;
839
840 /** MM part. */
841 union
842 {
843#ifdef ___MMInternal_h
844 struct MM s;
845#endif
846 char padding[192]; /* multiple of 32 */
847 } mm;
848
849 /** CFGM part. */
850 union
851 {
852#ifdef ___CFGMInternal_h
853 struct CFGM s;
854#endif
855 char padding[32]; /* multiple of 32 */
856 } cfgm;
857
858 /** PDM part. */
859 union
860 {
861#ifdef ___PDMInternal_h
862 struct PDM s;
863#endif
864 char padding[1824]; /* multiple of 32 */
865 } pdm;
866
867 /** IOM part. */
868 union
869 {
870#ifdef ___IOMInternal_h
871 struct IOM s;
872#endif
873 char padding[4544]; /* multiple of 32 */
874 } iom;
875
876 /** PATM part. */
877 union
878 {
879#ifdef ___PATMInternal_h
880 struct PATM s;
881#endif
882 char padding[768]; /* multiple of 32 */
883 } patm;
884
885 /** CSAM part. */
886 union
887 {
888#ifdef ___CSAMInternal_h
889 struct CSAM s;
890#endif
891 char padding[3328]; /* multiple of 32 */
892 } csam;
893
894 /** PARAV part. */
895 union
896 {
897#ifdef ___PARAVInternal_h
898 struct PARAV s;
899#endif
900 char padding[128];
901 } parav;
902
903 /** EM part. */
904 union
905 {
906#ifdef ___EMInternal_h
907 struct EM s;
908#endif
909 char padding[256]; /* multiple of 32 */
910 } em;
911
912 /** TM part. */
913 union
914 {
915#ifdef ___TMInternal_h
916 struct TM s;
917#endif
918 char padding[1920]; /* multiple of 32 */
919 } tm;
920
921 /** DBGF part. */
922 union
923 {
924#ifdef ___DBGFInternal_h
925 struct DBGF s;
926#endif
927 char padding[2368]; /* multiple of 32 */
928 } dbgf;
929
930 /** SSM part. */
931 union
932 {
933#ifdef ___SSMInternal_h
934 struct SSM s;
935#endif
936 char padding[32]; /* multiple of 32 */
937 } ssm;
938
939 /** VM part. */
940 union
941 {
942#ifdef ___VMInternal_h
943 struct VMINT s;
944#endif
945 char padding[768]; /* multiple of 32 */
946 } vm;
947
948 /** REM part. */
949 union
950 {
951#ifdef ___REMInternal_h
952 struct REM s;
953#endif
954
955/** @def VM_REM_SIZE
956 * Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
957# define VM_REM_SIZE 0x10A00
958 char padding[VM_REM_SIZE]; /* multiple of 32 */
959 } rem;
960
961 /** Padding for aligning the cpu array on a 64 byte boundrary. */
962 uint32_t u32Reserved2[8];
963
964 /** VMCPU array for the configured number of virtual CPUs.
965 * Must be aligned on a 64-byte boundrary. */
966 VMCPU aCpus[1];
967} VM;
968
969
970#ifdef IN_RC
971RT_C_DECLS_BEGIN
972
973/** The VM structure.
974 * This is imported from the VMMGCBuiltin module, i.e. it's a one
975 * of those magic globals which we should avoid using.
976 */
977extern DECLIMPORT(VM) g_VM;
978
979RT_C_DECLS_END
980#endif
981
982/** @} */
983
984#endif
985
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