vm.h@ 20750

Last change on this file since 20750 was 20750, checked in by vboxsync, 16 years ago
TMTimerSetRelative: Optimized the common case and added some more statistics to make sure I've got the right source for the virtual sync assertions.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 33.8 KB

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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a Virtual CPU.
48	*
49	* The basic state indicated here is whether the CPU has been started or not. In
50	* addition, there are sub-states when started for assisting scheduling (GVMM
51	* mostly).
52	*
53	* The transision out of the STOPPED state is done by a vmR3PowerOn.
54	* The transision back to the STOPPED state is done by vmR3PowerOff.
55	*
56	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58	*/
59	typedef enum VMCPUSTATE
60	{
61	/** The customary invalid zero. */
62	VMCPUSTATE_INVALID = 0,
63
64	/** Virtual CPU has not yet been started. */
65	VMCPUSTATE_STOPPED,
66
67	/** CPU started. */
68	VMCPUSTATE_STARTED,
69	/** Executing guest code and can be poked. */
70	VMCPUSTATE_STARTED_EXEC,
71	/** Executing guest code in the recompiler. */
72	VMCPUSTATE_STARTED_EXEC_REM,
73	/** Halted. */
74	VMCPUSTATE_STARTED_HALTED,
75
76	/** The end of valid virtual CPU states. */
77	VMCPUSTATE_END,
78
79	/** Ensure 32-bit type. */
80	VMCPUSTATE_32BIT_HACK = 0x7fffffff
81	} VMCPUSTATE;
82
83
84	/**
85	* Per virtual CPU data.
86	*/
87	typedef struct VMCPU
88	{
89	/** Per CPU forced action.
90	* See the VMCPU_FF_* \#defines. Updated atomically. */
91	uint32_t volatile fLocalForcedActions;
92	/** The CPU state. */
93	VMCPUSTATE volatile enmState;
94
95	/** Pointer to the ring-3 UVMCPU structure. */
96	PUVMCPU pUVCpu;
97	/** Ring-3 Host Context VM Pointer. */
98	PVMR3 pVMR3;
99	/** Ring-0 Host Context VM Pointer. */
100	PVMR0 pVMR0;
101	/** Raw-mode Context VM Pointer. */
102	PVMRC pVMRC;
103	/** The CPU ID.
104	* This is the index into the VM::aCpu array. */
105	VMCPUID idCpu;
106	/** The native thread handle. */
107	RTNATIVETHREAD hNativeThread;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111
112	/** Align the next bit on a 64-byte boundary.
113	*
114	* @remarks The aligments of the members that are larger than 48 bytes should be
115	* 64-byte for cache line reasons. structs containing small amounts of
116	* data could be lumped together at the end with a < 64 byte padding
117	* following it (to grow into and align the struct size).
118	* */
119	uint32_t au32Alignment[HC_ARCH_BITS == 32 ? 7 : 3];
120
121	/** CPUM part. */
122	union
123	{
124	#ifdef ___CPUMInternal_h
125	struct CPUMCPU s;
126	#endif
127	char padding[4096]; /* multiple of 64 */
128	} cpum;
129
130	/** PGM part. */
131	union
132	{
133	#ifdef ___PGMInternal_h
134	struct PGMCPU s;
135	#endif
136	char padding[321024]; / multiple of 64 */
137	} pgm;
138
139	/** HWACCM part. */
140	union
141	{
142	#ifdef ___HWACCMInternal_h
143	struct HWACCMCPU s;
144	#endif
145	char padding[5120]; /* multiple of 64 */
146	} hwaccm;
147
148	/** EM part. */
149	union
150	{
151	#ifdef ___EMInternal_h
152	struct EMCPU s;
153	#endif
154	char padding[2048]; /* multiple of 64 */
155	} em;
156
157	/** TRPM part. */
158	union
159	{
160	#ifdef ___TRPMInternal_h
161	struct TRPMCPU s;
162	#endif
163	char padding[128]; /* multiple of 64 */
164	} trpm;
165
166	/** TM part. */
167	union
168	{
169	#ifdef ___TMInternal_h
170	struct TMCPU s;
171	#endif
172	char padding[64]; /* multiple of 64 */
173	} tm;
174
175	/** VMM part. */
176	union
177	{
178	#ifdef ___VMMInternal_h
179	struct VMMCPU s;
180	#endif
181	char padding[256]; /* multiple of 64 */
182	} vmm;
183
184	/** PDM part. */
185	union
186	{
187	#ifdef ___PDMInternal_h
188	struct PDMCPU s;
189	#endif
190	char padding[128]; /* multiple of 64 */
191	} pdm;
192
193	/** IOM part. */
194	union
195	{
196	#ifdef ___IOMInternal_h
197	struct IOMCPU s;
198	#endif
199	char padding[512]; /* multiple of 64 */
200	} iom;
201
202	/** DBGF part.
203	* @todo Combine this with other tiny structures. */
204	union
205	{
206	#ifdef ___DBGFInternal_h
207	struct DBGFCPU s;
208	#endif
209	uint8_t padding[64]; /* multiple of 64 */
210	} dbgf;
211
212	} VMCPU;
213
214
215	/** @name Operations on VMCPU::enmState
216	* @{ */
217	/** Gets the VMCPU state. */
218	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
219	/** Sets the VMCPU state. */
220	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
221	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
222	/** Cmpares and sets the VMCPU state. */
223	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
224	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
225	/** Checks the VMCPU state. */
226	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
227	do { \
228	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
229	AssertMsg(enmState == (enmExpectedState), \
230	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
231	enmState, enmExpectedState, (pVCpu)->idCpu)); \
232	} while (0)
233	/** Tests if the state means that the CPU is started. */
234	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
235	/** Tests if the state means that the CPU is stopped. */
236	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
237	/** @} */
238
239
240	/** The name of the Guest Context VMM Core module. */
241	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
242	/** The name of the Ring 0 Context VMM Core module. */
243	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
244
245	/** VM Forced Action Flags.
246	*
247	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
248	* action mask of a VM.
249	*
250	* @{
251	*/
252	/** The virtual sync clock has been stopped, go to TM until it has been
253	* restarted... */
254	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
255	/** PDM Queues are pending. */
256	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
257	/** The bit number for VM_FF_PDM_QUEUES. */
258	#define VM_FF_PDM_QUEUES_BIT 3
259	/** PDM DMA transfers are pending. */
260	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
261	/** The bit number for VM_FF_PDM_DMA. */
262	#define VM_FF_PDM_DMA_BIT 4
263	/** This action forces the VM to call DBGF so DBGF can service debugger
264	* requests in the emulation thread.
265	* This action flag stays asserted till DBGF clears it.*/
266	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
267	/** The bit number for VM_FF_DBGF. */
268	#define VM_FF_DBGF_BIT 8
269	/** This action forces the VM to service pending requests from other
270	* thread or requests which must be executed in another context. */
271	#define VM_FF_REQUEST RT_BIT_32(9)
272	/** Terminate the VM immediately. */
273	#define VM_FF_TERMINATE RT_BIT_32(10)
274	/** Reset the VM. (postponed) */
275	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
276	/** The bit number for VM_FF_RESET. */
277	#define VM_FF_RESET_BIT 11
278	/** EMT rendezvous in VMM. */
279	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
280	#define VM_FF_EMT_RENDEZVOUS_BIT 12
281
282	/** PGM needs to allocate handy pages. */
283	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
284	/** PGM is out of memory.
285	* Abandon all loops and code paths which can be resumed and get up to the EM
286	* loops. */
287	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
288	/** REM needs to be informed about handler changes. */
289	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
290	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
291	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
292	/** Suspend the VM - debug only. */
293	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
294
295
296	/** This action forces the VM to service check and pending interrups on the APIC. */
297	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
298	/** This action forces the VM to service check and pending interrups on the PIC. */
299	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
300	/** This action forces the VM to schedule and run pending timer (TM).
301	* @remarks Don't move - PATM compatability. */
302	#define VMCPU_FF_TIMER RT_BIT_32(2)
303	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
304	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
305	/** This action forces the VM to service pending requests from other
306	* thread or requests which must be executed in another context. */
307	#define VMCPU_FF_REQUEST RT_BIT_32(9)
308	/** This action forces the VM to resync the page tables before going
309	* back to execute guest code. (GLOBAL FLUSH) */
310	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
311	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
312	* (NON-GLOBAL FLUSH) */
313	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
314	/** Check for pending TLB shootdown actions. */
315	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
316	/** Check for pending TLB flush action. */
317	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
318	/** The bit number for VMCPU_FF_TLB_FLUSH. */
319	#define VMCPU_FF_TLB_FLUSH_BIT 19
320	/** Check the interupt and trap gates */
321	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
322	/** Check Guest's TSS ring 0 stack */
323	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
324	/** Check Guest's GDT table */
325	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
326	/** Check Guest's LDT table */
327	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
328	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
329	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
330	/** CSAM needs to scan the page that's being executed */
331	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
332	/** CSAM needs to do some homework. */
333	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
334	/** Force return to Ring-3. */
335	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
336
337	/** Externally VM forced actions. Used to quit the idle/wait loop. */
338	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
339	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
340	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
341
342	/** Externally forced VM actions. Used to quit the idle/wait loop. */
343	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
344	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
345	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \| VMCPU_FF_TIMER)
346
347	/** High priority VM pre-execution actions. */
348	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \| VM_FF_DEBUG_SUSPEND \
349	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
350	/** High priority VMCPU pre-execution actions. */
351	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_PGM_SYNC_CR3 \
352	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
353	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
354
355	/** High priority VM pre raw-mode execution mask. */
356	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
357	/** High priority VMCPU pre raw-mode execution mask. */
358	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
359	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
360
361	/** High priority post-execution actions. */
362	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
363	/** High priority post-execution actions. */
364	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
365
366	/** Normal priority VM post-execution actions. */
367	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
368	/** Normal priority VMCPU post-execution actions. */
369	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
370
371	/** Normal priority VM actions. */
372	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
373	/** Normal priority VMCPU actions. */
374	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
375
376	/** Flags to clear before resuming guest execution. */
377	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
378
379	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
380	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
381	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
382	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER)
383
384	/** All the forced VM flags. */
385	#define VM_FF_ALL_MASK (~0U)
386	/** All the forced VMCPU flags. */
387	#define VMCPU_FF_ALL_MASK (~0U)
388
389	/** All the forced VM flags. */
390	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
391	/** All the forced VMCPU flags. */
392	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT))
393
394	/** @} */
395
396	/** @def VM_FF_SET
397	* Sets a force action flag.
398	*
399	* @param pVM VM Handle.
400	* @param fFlag The flag to set.
401	*/
402	#if 1
403	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
404	#else
405	# define VM_FF_SET(pVM, fFlag) \
406	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
407	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
408	} while (0)
409	#endif
410
411	/** @def VMCPU_FF_SET
412	* Sets a force action flag for the given VCPU.
413	*
414	* @param pVCpu VMCPU Handle.
415	* @param fFlag The flag to set.
416	*/
417	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
418
419	/** @def VM_FF_CLEAR
420	* Clears a force action flag.
421	*
422	* @param pVM VM Handle.
423	* @param fFlag The flag to clear.
424	*/
425	#if 1
426	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
427	#else
428	# define VM_FF_CLEAR(pVM, fFlag) \
429	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
430	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
431	} while (0)
432	#endif
433
434	/** @def VMCPU_FF_CLEAR
435	* Clears a force action flag for the given VCPU.
436	*
437	* @param pVCpu VMCPU Handle.
438	* @param fFlag The flag to clear.
439	*/
440	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
441
442	/** @def VM_FF_ISSET
443	* Checks if a force action flag is set.
444	*
445	* @param pVM VM Handle.
446	* @param fFlag The flag to check.
447	*/
448	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
449
450	/** @def VMCPU_FF_ISSET
451	* Checks if a force action flag is set for the given VCPU.
452	*
453	* @param pVCpu VMCPU Handle.
454	* @param fFlag The flag to check.
455	*/
456	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
457
458	/** @def VM_FF_ISPENDING
459	* Checks if one or more force action in the specified set is pending.
460	*
461	* @param pVM VM Handle.
462	* @param fFlags The flags to check for.
463	*/
464	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
465
466	/** @def VM_FF_TESTANDCLEAR
467	* Checks if one (!) force action in the specified set is pending and clears it atomically
468	*
469	* @returns true if the bit was set.
470	* @returns false if the bit was clear.
471	* @param pVM VM Handle.
472	* @param iBit Bit position to check and clear
473	*/
474	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit))
475
476	/** @def VMCPU_FF_TESTANDCLEAR
477	* Checks if one (!) force action in the specified set is pending and clears it atomically
478	*
479	* @returns true if the bit was set.
480	* @returns false if the bit was clear.
481	* @param pVCpu VMCPU Handle.
482	* @param iBit Bit position to check and clear
483	*/
484	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit))
485
486	/** @def VMCPU_FF_ISPENDING
487	* Checks if one or more force action in the specified set is pending for the given VCPU.
488	*
489	* @param pVCpu VMCPU Handle.
490	* @param fFlags The flags to check for.
491	*/
492	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
493
494	/** @def VM_FF_ISPENDING
495	* Checks if one or more force action in the specified set is pending while one
496	* or more other ones are not.
497	*
498	* @param pVM VM Handle.
499	* @param fFlags The flags to check for.
500	* @param fExcpt The flags that should not be set.
501	*/
502	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
503
504	/** @def VMCPU_FF_IS_PENDING_EXCEPT
505	* Checks if one or more force action in the specified set is pending for the given
506	* VCPU while one or more other ones are not.
507	*
508	* @param pVCpu VMCPU Handle.
509	* @param fFlags The flags to check for.
510	* @param fExcpt The flags that should not be set.
511	*/
512	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
513
514	/** @def VM_IS_EMT
515	* Checks if the current thread is the emulation thread (EMT).
516	*
517	* @remark The ring-0 variation will need attention if we expand the ring-0
518	* code to let threads other than EMT mess around with the VM.
519	*/
520	#ifdef IN_RC
521	# define VM_IS_EMT(pVM) true
522	#else
523	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
524	#endif
525
526	/** @def VMCPU_IS_EMT
527	* Checks if the current thread is the emulation thread (EMT) for the specified
528	* virtual CPU.
529	*/
530	#ifdef IN_RC
531	# define VMCPU_IS_EMT(pVCpu) true
532	#else
533	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
534	#endif
535
536	/** @def VM_ASSERT_EMT
537	* Asserts that the current thread IS the emulation thread (EMT).
538	*/
539	#ifdef IN_RC
540	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
541	#elif defined(IN_RING0)
542	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
543	#else
544	# define VM_ASSERT_EMT(pVM) \
545	AssertMsg(VM_IS_EMT(pVM), \
546	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
547	#endif
548
549	/** @def VMCPU_ASSERT_EMT
550	* Asserts that the current thread IS the emulation thread (EMT) of the
551	* specified virtual CPU.
552	*/
553	#ifdef IN_RC
554	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
555	#elif defined(IN_RING0)
556	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
557	#else
558	# define VMCPU_ASSERT_EMT(pVCpu) \
559	AssertMsg(VMCPU_IS_EMT(pVCpu), \
560	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
561	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
562	#endif
563
564	/** @def VM_ASSERT_EMT_RETURN
565	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
566	*/
567	#ifdef IN_RC
568	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
569	#elif defined(IN_RING0)
570	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
571	#else
572	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
573	AssertMsgReturn(VM_IS_EMT(pVM), \
574	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
575	(rc))
576	#endif
577
578	/** @def VMCPU_ASSERT_EMT_RETURN
579	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
580	*/
581	#ifdef IN_RC
582	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
583	#elif defined(IN_RING0)
584	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
585	#else
586	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
587	AssertMsg(VMCPU_IS_EMT(pVCpu), \
588	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
589	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
590	(rc))
591	#endif
592
593
594	/**
595	* Asserts that the current thread is NOT the emulation thread.
596	*/
597	#define VM_ASSERT_OTHER_THREAD(pVM) \
598	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
599
600
601	/** @def VM_ASSERT_STATE_RETURN
602	* Asserts a certain VM state.
603	*/
604	#define VM_ASSERT_STATE(pVM, _enmState) \
605	AssertMsg((pVM)->enmVMState == (_enmState), \
606	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
607
608	/** @def VM_ASSERT_STATE_RETURN
609	* Asserts a certain VM state and returns if it doesn't match.
610	*/
611	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
612	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
613	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
614	(rc))
615
616	/** @def VM_ASSERT_VALID_EXT_RETURN
617	* Asserts a the VM handle is valid for external access, i.e. not being
618	* destroy or terminated.
619	*/
620	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
621	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
622	&& (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
623	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
624	? VMGetStateName(pVM->enmVMState) : ""), \
625	(rc))
626
627	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
628	* Asserts a the VMCPU handle is valid for external access, i.e. not being
629	* destroy or terminated.
630	*/
631	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
632	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
633	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
634	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
635	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
636	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
637	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
638	(rc))
639
640
641	/** This is the VM structure.
642	*
643	* It contains (nearly?) all the VM data which have to be available in all
644	* contexts. Even if it contains all the data the idea is to use APIs not
645	* to modify all the members all around the place. Therefore we make use of
646	* unions to hide everything which isn't local to the current source module.
647	* This means we'll have to pay a little bit of attention when adding new
648	* members to structures in the unions and make sure to keep the padding sizes
649	* up to date.
650	*
651	* Run tstVMStructSize after update!
652	*/
653	typedef struct VM
654	{
655	/** The state of the VM.
656	* This field is read only to everyone except the VM and EM. */
657	VMSTATE enmVMState;
658	/** Forced action flags.
659	* See the VM_FF_* \#defines. Updated atomically.
660	*/
661	volatile uint32_t fGlobalForcedActions;
662	/** Pointer to the array of page descriptors for the VM structure allocation. */
663	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
664	/** Session handle. For use when calling SUPR0 APIs. */
665	PSUPDRVSESSION pSession;
666	/** Pointer to the ring-3 VM structure. */
667	PUVM pUVM;
668	/** Ring-3 Host Context VM Pointer. */
669	R3PTRTYPE(struct VM *) pVMR3;
670	/** Ring-0 Host Context VM Pointer. */
671	R0PTRTYPE(struct VM *) pVMR0;
672	/** Raw-mode Context VM Pointer. */
673	RCPTRTYPE(struct VM *) pVMRC;
674
675	/** The GVM VM handle. Only the GVM should modify this field. */
676	uint32_t hSelf;
677	/** Number of virtual CPUs. */
678	uint32_t cCPUs;
679
680	/** Size of the VM structure including the VMCPU array. */
681	uint32_t cbSelf;
682
683	/** Offset to the VMCPU array starting from beginning of this structure. */
684	uint32_t offVMCPU;
685
686	/** Reserved; alignment. */
687	uint32_t u32Reserved[6];
688
689	/** @name Public VMM Switcher APIs
690	* @{ */
691	/**
692	* Assembly switch entry point for returning to host context.
693	* This function will clean up the stack frame.
694	*
695	* @param eax The return code, register.
696	* @param Ctx The guest core context.
697	* @remark Assume interrupts disabled.
698	*/
699	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
700
701	/**
702	* Assembly switch entry point for returning to host context.
703	*
704	* This is an alternative entry point which we'll be using when the we have the
705	* hypervisor context and need to save that before going to the host.
706	*
707	* This is typically useful when abandoning the hypervisor because of a trap
708	* and want the trap state to be saved.
709	*
710	* @param eax The return code, register.
711	* @param ecx Pointer to the hypervisor core context, register.
712	* @remark Assume interrupts disabled.
713	*/
714	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
715
716	/**
717	* Assembly switch entry point for returning to host context.
718	*
719	* This is an alternative to the two *Ctx APIs and implies that the context has already
720	* been saved, or that it's just a brief return to HC and that the caller intends to resume
721	* whatever it is doing upon 'return' from this call.
722	*
723	* @param eax The return code, register.
724	* @remark Assume interrupts disabled.
725	*/
726	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
727	/** @} */
728
729
730	/** @name Various VM data owned by VM.
731	* @{ */
732	RTTHREAD uPadding1;
733	/** The native handle of ThreadEMT. Getting the native handle
734	* is generally faster than getting the IPRT one (except on OS/2 :-). */
735	RTNATIVETHREAD uPadding2;
736	/** @} */
737
738
739	/** @name Various items that are frequently accessed.
740	* @{ */
741	/** Raw ring-3 indicator. */
742	bool fRawR3Enabled;
743	/** Raw ring-0 indicator. */
744	bool fRawR0Enabled;
745	/** PATM enabled flag.
746	* This is placed here for performance reasons. */
747	bool fPATMEnabled;
748	/** CSAM enabled flag.
749	* This is placed here for performance reasons. */
750	bool fCSAMEnabled;
751	/** Hardware VM support is available and enabled.
752	* This is placed here for performance reasons. */
753	bool fHWACCMEnabled;
754	/** Hardware VM support is required and non-optional.
755	* This is initialized together with the rest of the VM structure. */
756	bool fHwVirtExtForced;
757	/** PARAV enabled flag. */
758	bool fPARAVEnabled;
759	/** @} */
760
761
762	/* padding to make gnuc put the StatQemuToGC where msc does. */
763	#if HC_ARCH_BITS == 32
764	uint32_t padding0;
765	#endif
766
767	/** Profiling the total time from Qemu to GC. */
768	STAMPROFILEADV StatTotalQemuToGC;
769	/** Profiling the total time from GC to Qemu. */
770	STAMPROFILEADV StatTotalGCToQemu;
771	/** Profiling the total time spent in GC. */
772	STAMPROFILEADV StatTotalInGC;
773	/** Profiling the total time spent not in Qemu. */
774	STAMPROFILEADV StatTotalInQemu;
775	/** Profiling the VMMSwitcher code for going to GC. */
776	STAMPROFILEADV StatSwitcherToGC;
777	/** Profiling the VMMSwitcher code for going to HC. */
778	STAMPROFILEADV StatSwitcherToHC;
779	STAMPROFILEADV StatSwitcherSaveRegs;
780	STAMPROFILEADV StatSwitcherSysEnter;
781	STAMPROFILEADV StatSwitcherDebug;
782	STAMPROFILEADV StatSwitcherCR0;
783	STAMPROFILEADV StatSwitcherCR4;
784	STAMPROFILEADV StatSwitcherJmpCR3;
785	STAMPROFILEADV StatSwitcherRstrRegs;
786	STAMPROFILEADV StatSwitcherLgdt;
787	STAMPROFILEADV StatSwitcherLidt;
788	STAMPROFILEADV StatSwitcherLldt;
789	STAMPROFILEADV StatSwitcherTSS;
790
791	/** @todo Realign everything on 64 byte boundaries to better match the
792	* cache-line size. */
793	/* padding - the unions must be aligned on 32 bytes boundraries. */
794	uint32_t padding[HC_ARCH_BITS == 32 ? 4+8 : 6];
795
796	/** CPUM part. */
797	union
798	{
799	#ifdef ___CPUMInternal_h
800	struct CPUM s;
801	#endif
802	char padding[2048]; /* multiple of 32 */
803	} cpum;
804
805	/** VMM part. */
806	union
807	{
808	#ifdef ___VMMInternal_h
809	struct VMM s;
810	#endif
811	char padding[1600]; /* multiple of 32 */
812	} vmm;
813
814	/** PGM part. */
815	union
816	{
817	#ifdef ___PGMInternal_h
818	struct PGM s;
819	#endif
820	char padding[161024]; / multiple of 32 */
821	} pgm;
822
823	/** HWACCM part. */
824	union
825	{
826	#ifdef ___HWACCMInternal_h
827	struct HWACCM s;
828	#endif
829	char padding[512]; /* multiple of 32 */
830	} hwaccm;
831
832	/** TRPM part. */
833	union
834	{
835	#ifdef ___TRPMInternal_h
836	struct TRPM s;
837	#endif
838	char padding[5344]; /* multiple of 32 */
839	} trpm;
840
841	/** SELM part. */
842	union
843	{
844	#ifdef ___SELMInternal_h
845	struct SELM s;
846	#endif
847	char padding[544]; /* multiple of 32 */
848	} selm;
849
850	/** MM part. */
851	union
852	{
853	#ifdef ___MMInternal_h
854	struct MM s;
855	#endif
856	char padding[192]; /* multiple of 32 */
857	} mm;
858
859	/** CFGM part. */
860	union
861	{
862	#ifdef ___CFGMInternal_h
863	struct CFGM s;
864	#endif
865	char padding[32]; /* multiple of 32 */
866	} cfgm;
867
868	/** PDM part. */
869	union
870	{
871	#ifdef ___PDMInternal_h
872	struct PDM s;
873	#endif
874	char padding[1824]; /* multiple of 32 */
875	} pdm;
876
877	/** IOM part. */
878	union
879	{
880	#ifdef ___IOMInternal_h
881	struct IOM s;
882	#endif
883	char padding[4544]; /* multiple of 32 */
884	} iom;
885
886	/** PATM part. */
887	union
888	{
889	#ifdef ___PATMInternal_h
890	struct PATM s;
891	#endif
892	char padding[768]; /* multiple of 32 */
893	} patm;
894
895	/** CSAM part. */
896	union
897	{
898	#ifdef ___CSAMInternal_h
899	struct CSAM s;
900	#endif
901	char padding[3328]; /* multiple of 32 */
902	} csam;
903
904	/** PARAV part. */
905	union
906	{
907	#ifdef ___PARAVInternal_h
908	struct PARAV s;
909	#endif
910	char padding[128];
911	} parav;
912
913	/** EM part. */
914	union
915	{
916	#ifdef ___EMInternal_h
917	struct EM s;
918	#endif
919	char padding[256]; /* multiple of 32 */
920	} em;
921
922	/** TM part. */
923	union
924	{
925	#ifdef ___TMInternal_h
926	struct TM s;
927	#endif
928	char padding[2048]; /* multiple of 32 */
929	} tm;
930
931	/** DBGF part. */
932	union
933	{
934	#ifdef ___DBGFInternal_h
935	struct DBGF s;
936	#endif
937	char padding[2368]; /* multiple of 32 */
938	} dbgf;
939
940	/** SSM part. */
941	union
942	{
943	#ifdef ___SSMInternal_h
944	struct SSM s;
945	#endif
946	char padding[32]; /* multiple of 32 */
947	} ssm;
948
949	/** VM part. */
950	union
951	{
952	#ifdef ___VMInternal_h
953	struct VMINT s;
954	#endif
955	char padding[768]; /* multiple of 32 */
956	} vm;
957
958	/** REM part. */
959	union
960	{
961	#ifdef ___REMInternal_h
962	struct REM s;
963	#endif
964
965	/** @def VM_REM_SIZE
966	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
967	# define VM_REM_SIZE 0x10A00
968	char padding[VM_REM_SIZE]; /* multiple of 32 */
969	} rem;
970
971	/** Padding for aligning the cpu array on a 64 byte boundrary. */
972	uint32_t u32Reserved2[8];
973
974	/** VMCPU array for the configured number of virtual CPUs.
975	* Must be aligned on a 64-byte boundrary. */
976	VMCPU aCpus[1];
977	} VM;
978
979
980	#ifdef IN_RC
981	RT_C_DECLS_BEGIN
982
983	/** The VM structure.
984	* This is imported from the VMMGCBuiltin module, i.e. it's a one
985	* of those magic globals which we should avoid using.
986	*/
987	extern DECLIMPORT(VM) g_VM;
988
989	RT_C_DECLS_END
990	#endif
991
992	/** @} */
993
994	#endif
995

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source: vbox/trunk/include/VBox/vm.h@ 20750

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