vm.h@ 22889

Last change on this file since 22889 was 22889, checked in by vboxsync, 16 years ago
vm.h: VMMCPU is bigger on 64-bit windows because we're saving lots more registers.
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1	/** @file
2	* VM - The Virtual Machine, data. (VMM)
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*
25	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26	* Clara, CA 95054 USA or visit http://www.sun.com if you need
27	* additional information or have any questions.
28	*/
29
30	#ifndef ___VBox_vm_h
31	#define ___VBox_vm_h
32
33	#include <VBox/cdefs.h>
34	#include <VBox/types.h>
35	#include <VBox/cpum.h>
36	#include <VBox/stam.h>
37	#include <VBox/vmapi.h>
38	#include <VBox/sup.h>
39	#include <VBox/vmm.h>
40
41
42	/** @defgroup grp_vm The Virtual Machine
43	* @{
44	*/
45
46	/**
47	* The state of a Virtual CPU.
48	*
49	* The basic state indicated here is whether the CPU has been started or not. In
50	* addition, there are sub-states when started for assisting scheduling (GVMM
51	* mostly).
52	*
53	* The transision out of the STOPPED state is done by a vmR3PowerOn.
54	* The transision back to the STOPPED state is done by vmR3PowerOff.
55	*
56	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
57	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
58	*/
59	typedef enum VMCPUSTATE
60	{
61	/** The customary invalid zero. */
62	VMCPUSTATE_INVALID = 0,
63
64	/** Virtual CPU has not yet been started. */
65	VMCPUSTATE_STOPPED,
66
67	/** CPU started. */
68	VMCPUSTATE_STARTED,
69	/** Executing guest code and can be poked. */
70	VMCPUSTATE_STARTED_EXEC,
71	/** Executing guest code in the recompiler. */
72	VMCPUSTATE_STARTED_EXEC_REM,
73	/** Halted. */
74	VMCPUSTATE_STARTED_HALTED,
75
76	/** The end of valid virtual CPU states. */
77	VMCPUSTATE_END,
78
79	/** Ensure 32-bit type. */
80	VMCPUSTATE_32BIT_HACK = 0x7fffffff
81	} VMCPUSTATE;
82
83
84	/**
85	* Per virtual CPU data.
86	*/
87	typedef struct VMCPU
88	{
89	/** Per CPU forced action.
90	* See the VMCPU_FF_* \#defines. Updated atomically. */
91	uint32_t volatile fLocalForcedActions;
92	/** The CPU state. */
93	VMCPUSTATE volatile enmState;
94
95	/** Pointer to the ring-3 UVMCPU structure. */
96	PUVMCPU pUVCpu;
97	/** Ring-3 Host Context VM Pointer. */
98	PVMR3 pVMR3;
99	/** Ring-0 Host Context VM Pointer. */
100	PVMR0 pVMR0;
101	/** Raw-mode Context VM Pointer. */
102	PVMRC pVMRC;
103	/** The CPU ID.
104	* This is the index into the VM::aCpu array. */
105	VMCPUID idCpu;
106	/** The native thread handle. */
107	RTNATIVETHREAD hNativeThread;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111
112	/** Align the next bit on a 64-byte boundary and make sure it starts at the same
113	* offset in both 64-bit and 32-bit builds.
114	*
115	* @remarks The aligments of the members that are larger than 48 bytes should be
116	* 64-byte for cache line reasons. structs containing small amounts of
117	* data could be lumped together at the end with a < 64 byte padding
118	* following it (to grow into and align the struct size).
119	* */
120	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 28 : 12];
121
122	/** CPUM part. */
123	union
124	{
125	#ifdef ___CPUMInternal_h
126	struct CPUMCPU s;
127	#endif
128	char padding[3456]; /* multiple of 64 */
129	} cpum;
130
131	/** PGM part. */
132	union
133	{
134	#ifdef ___PGMInternal_h
135	struct PGMCPU s;
136	#endif
137	char padding[281024]; / multiple of 64 */
138	} pgm;
139
140	/** HWACCM part. */
141	union
142	{
143	#ifdef ___HWACCMInternal_h
144	struct HWACCMCPU s;
145	#endif
146	char padding[5248]; /* multiple of 64 */
147	} hwaccm;
148
149	/** EM part. */
150	union
151	{
152	#ifdef ___EMInternal_h
153	struct EMCPU s;
154	#endif
155	char padding[1408]; /* multiple of 64 */
156	} em;
157
158	/** TRPM part. */
159	union
160	{
161	#ifdef ___TRPMInternal_h
162	struct TRPMCPU s;
163	#endif
164	char padding[128]; /* multiple of 64 */
165	} trpm;
166
167	/** TM part. */
168	union
169	{
170	#ifdef ___TMInternal_h
171	struct TMCPU s;
172	#endif
173	char padding[64]; /* multiple of 64 */
174	} tm;
175
176	/** VMM part. */
177	union
178	{
179	#ifdef ___VMMInternal_h
180	struct VMMCPU s;
181	#endif
182	char padding[320]; /* multiple of 64 */
183	} vmm;
184
185	/** PDM part. */
186	union
187	{
188	#ifdef ___PDMInternal_h
189	struct PDMCPU s;
190	#endif
191	char padding[128]; /* multiple of 64 */
192	} pdm;
193
194	/** IOM part. */
195	union
196	{
197	#ifdef ___IOMInternal_h
198	struct IOMCPU s;
199	#endif
200	char padding[512]; /* multiple of 64 */
201	} iom;
202
203	/** DBGF part.
204	* @todo Combine this with other tiny structures. */
205	union
206	{
207	#ifdef ___DBGFInternal_h
208	struct DBGFCPU s;
209	#endif
210	uint8_t padding[64]; /* multiple of 64 */
211	} dbgf;
212
213	/** Align the structure size at page boundrary. */
214	uint8_t abAlignment2[896];
215	} VMCPU;
216
217
218	/** @name Operations on VMCPU::enmState
219	* @{ */
220	/** Gets the VMCPU state. */
221	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
222	/** Sets the VMCPU state. */
223	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
224	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
225	/** Cmpares and sets the VMCPU state. */
226	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
227	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
228	/** Checks the VMCPU state. */
229	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
230	do { \
231	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
232	AssertMsg(enmState == (enmExpectedState), \
233	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
234	enmState, enmExpectedState, (pVCpu)->idCpu)); \
235	} while (0)
236	/** Tests if the state means that the CPU is started. */
237	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
238	/** Tests if the state means that the CPU is stopped. */
239	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
240	/** @} */
241
242
243	/** The name of the Guest Context VMM Core module. */
244	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
245	/** The name of the Ring 0 Context VMM Core module. */
246	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
247
248	/** VM Forced Action Flags.
249	*
250	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
251	* action mask of a VM.
252	*
253	* @{
254	*/
255	/** The virtual sync clock has been stopped, go to TM until it has been
256	* restarted... */
257	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
258	/** PDM Queues are pending. */
259	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
260	/** The bit number for VM_FF_PDM_QUEUES. */
261	#define VM_FF_PDM_QUEUES_BIT 3
262	/** PDM DMA transfers are pending. */
263	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
264	/** The bit number for VM_FF_PDM_DMA. */
265	#define VM_FF_PDM_DMA_BIT 4
266	/** This action forces the VM to call DBGF so DBGF can service debugger
267	* requests in the emulation thread.
268	* This action flag stays asserted till DBGF clears it.*/
269	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
270	/** The bit number for VM_FF_DBGF. */
271	#define VM_FF_DBGF_BIT 8
272	/** This action forces the VM to service pending requests from other
273	* thread or requests which must be executed in another context. */
274	#define VM_FF_REQUEST RT_BIT_32(9)
275	/** Terminate the VM immediately. */
276	#define VM_FF_TERMINATE RT_BIT_32(10)
277	/** Reset the VM. (postponed) */
278	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
279	/** The bit number for VM_FF_RESET. */
280	#define VM_FF_RESET_BIT 11
281	/** EMT rendezvous in VMM. */
282	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
283	#define VM_FF_EMT_RENDEZVOUS_BIT 12
284
285	/** PGM needs to allocate handy pages. */
286	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
287	/** PGM is out of memory.
288	* Abandon all loops and code paths which can be resumed and get up to the EM
289	* loops. */
290	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
291	/** REM needs to be informed about handler changes. */
292	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
293	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
294	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
295	/** Suspend the VM - debug only. */
296	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
297
298
299	/** This action forces the VM to check any pending interrups on the APIC. */
300	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
301	/** This action forces the VM to check any pending interrups on the PIC. */
302	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
303	/** This action forces the VM to schedule and run pending timer (TM).
304	* @remarks Don't move - PATM compatability. */
305	#define VMCPU_FF_TIMER RT_BIT_32(2)
306	/** This action forces the VM to check any pending NMIs. */
307	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
308	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
309	/** This action forces the VM to check any pending SMIs. */
310	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
311	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
312	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
313	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
314	/** This action forces the VM to service pending requests from other
315	* thread or requests which must be executed in another context. */
316	#define VMCPU_FF_REQUEST RT_BIT_32(9)
317	/** This action forces the VM to resync the page tables before going
318	* back to execute guest code. (GLOBAL FLUSH) */
319	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
320	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
321	* (NON-GLOBAL FLUSH) */
322	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
323	/** Check for pending TLB shootdown actions. */
324	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
325	/** Check for pending TLB flush action. */
326	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
327	/** The bit number for VMCPU_FF_TLB_FLUSH. */
328	#define VMCPU_FF_TLB_FLUSH_BIT 19
329	/** Check the interupt and trap gates */
330	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
331	/** Check Guest's TSS ring 0 stack */
332	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
333	/** Check Guest's GDT table */
334	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
335	/** Check Guest's LDT table */
336	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
337	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
338	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
339	/** CSAM needs to scan the page that's being executed */
340	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
341	/** CSAM needs to do some homework. */
342	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
343	/** Force return to Ring-3. */
344	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
345
346	/** Externally VM forced actions. Used to quit the idle/wait loop. */
347	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
348	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
349	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
350
351	/** Externally forced VM actions. Used to quit the idle/wait loop. */
352	#define VM_FF_EXTERNAL_HALTED_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
353	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
354	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \| VMCPU_FF_TIMER)
355
356	/** High priority VM pre-execution actions. */
357	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \| VM_FF_DEBUG_SUSPEND \
358	\| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
359	/** High priority VMCPU pre-execution actions. */
360	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_PGM_SYNC_CR3 \
361	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
362	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
363
364	/** High priority VM pre raw-mode execution mask. */
365	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
366	/** High priority VMCPU pre raw-mode execution mask. */
367	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
368	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
369
370	/** High priority post-execution actions. */
371	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
372	/** High priority post-execution actions. */
373	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
374
375	/** Normal priority VM post-execution actions. */
376	#define VM_FF_NORMAL_PRIORITY_POST_MASK (VM_FF_TERMINATE \| VM_FF_DBGF \| VM_FF_RESET \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
377	/** Normal priority VMCPU post-execution actions. */
378	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
379
380	/** Normal priority VM actions. */
381	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
382	/** Normal priority VMCPU actions. */
383	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
384
385	/** Flags to clear before resuming guest execution. */
386	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
387
388	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
389	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_PDM_QUEUES)
390	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
391	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER)
392
393	/** All the forced VM flags. */
394	#define VM_FF_ALL_MASK (~0U)
395	/** All the forced VMCPU flags. */
396	#define VMCPU_FF_ALL_MASK (~0U)
397
398	/** All the forced VM flags. */
399	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
400	/** All the forced VMCPU flags. */
401	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT))
402
403	/** @} */
404
405	/** @def VM_FF_SET
406	* Sets a force action flag.
407	*
408	* @param pVM VM Handle.
409	* @param fFlag The flag to set.
410	*/
411	#if 1
412	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
413	#else
414	# define VM_FF_SET(pVM, fFlag) \
415	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
416	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
417	} while (0)
418	#endif
419
420	/** @def VMCPU_FF_SET
421	* Sets a force action flag for the given VCPU.
422	*
423	* @param pVCpu VMCPU Handle.
424	* @param fFlag The flag to set.
425	*/
426	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
427
428	/** @def VM_FF_CLEAR
429	* Clears a force action flag.
430	*
431	* @param pVM VM Handle.
432	* @param fFlag The flag to clear.
433	*/
434	#if 1
435	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
436	#else
437	# define VM_FF_CLEAR(pVM, fFlag) \
438	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
439	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
440	} while (0)
441	#endif
442
443	/** @def VMCPU_FF_CLEAR
444	* Clears a force action flag for the given VCPU.
445	*
446	* @param pVCpu VMCPU Handle.
447	* @param fFlag The flag to clear.
448	*/
449	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
450
451	/** @def VM_FF_ISSET
452	* Checks if a force action flag is set.
453	*
454	* @param pVM VM Handle.
455	* @param fFlag The flag to check.
456	*/
457	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
458
459	/** @def VMCPU_FF_ISSET
460	* Checks if a force action flag is set for the given VCPU.
461	*
462	* @param pVCpu VMCPU Handle.
463	* @param fFlag The flag to check.
464	*/
465	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
466
467	/** @def VM_FF_ISPENDING
468	* Checks if one or more force action in the specified set is pending.
469	*
470	* @param pVM VM Handle.
471	* @param fFlags The flags to check for.
472	*/
473	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
474
475	/** @def VM_FF_TESTANDCLEAR
476	* Checks if one (!) force action in the specified set is pending and clears it atomically
477	*
478	* @returns true if the bit was set.
479	* @returns false if the bit was clear.
480	* @param pVM VM Handle.
481	* @param iBit Bit position to check and clear
482	*/
483	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
484
485	/** @def VMCPU_FF_TESTANDCLEAR
486	* Checks if one (!) force action in the specified set is pending and clears it atomically
487	*
488	* @returns true if the bit was set.
489	* @returns false if the bit was clear.
490	* @param pVCpu VMCPU Handle.
491	* @param iBit Bit position to check and clear
492	*/
493	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
494
495	/** @def VMCPU_FF_ISPENDING
496	* Checks if one or more force action in the specified set is pending for the given VCPU.
497	*
498	* @param pVCpu VMCPU Handle.
499	* @param fFlags The flags to check for.
500	*/
501	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
502
503	/** @def VM_FF_ISPENDING
504	* Checks if one or more force action in the specified set is pending while one
505	* or more other ones are not.
506	*
507	* @param pVM VM Handle.
508	* @param fFlags The flags to check for.
509	* @param fExcpt The flags that should not be set.
510	*/
511	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
512
513	/** @def VMCPU_FF_IS_PENDING_EXCEPT
514	* Checks if one or more force action in the specified set is pending for the given
515	* VCPU while one or more other ones are not.
516	*
517	* @param pVCpu VMCPU Handle.
518	* @param fFlags The flags to check for.
519	* @param fExcpt The flags that should not be set.
520	*/
521	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
522
523	/** @def VM_IS_EMT
524	* Checks if the current thread is the emulation thread (EMT).
525	*
526	* @remark The ring-0 variation will need attention if we expand the ring-0
527	* code to let threads other than EMT mess around with the VM.
528	*/
529	#ifdef IN_RC
530	# define VM_IS_EMT(pVM) true
531	#else
532	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
533	#endif
534
535	/** @def VMCPU_IS_EMT
536	* Checks if the current thread is the emulation thread (EMT) for the specified
537	* virtual CPU.
538	*/
539	#ifdef IN_RC
540	# define VMCPU_IS_EMT(pVCpu) true
541	#else
542	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
543	#endif
544
545	/** @def VM_ASSERT_EMT
546	* Asserts that the current thread IS the emulation thread (EMT).
547	*/
548	#ifdef IN_RC
549	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
550	#elif defined(IN_RING0)
551	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
552	#else
553	# define VM_ASSERT_EMT(pVM) \
554	AssertMsg(VM_IS_EMT(pVM), \
555	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
556	#endif
557
558	/** @def VMCPU_ASSERT_EMT
559	* Asserts that the current thread IS the emulation thread (EMT) of the
560	* specified virtual CPU.
561	*/
562	#ifdef IN_RC
563	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
564	#elif defined(IN_RING0)
565	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
566	#else
567	# define VMCPU_ASSERT_EMT(pVCpu) \
568	AssertMsg(VMCPU_IS_EMT(pVCpu), \
569	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
570	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
571	#endif
572
573	/** @def VM_ASSERT_EMT_RETURN
574	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
575	*/
576	#ifdef IN_RC
577	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
578	#elif defined(IN_RING0)
579	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
580	#else
581	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
582	AssertMsgReturn(VM_IS_EMT(pVM), \
583	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
584	(rc))
585	#endif
586
587	/** @def VMCPU_ASSERT_EMT_RETURN
588	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
589	*/
590	#ifdef IN_RC
591	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
592	#elif defined(IN_RING0)
593	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
594	#else
595	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
596	AssertMsg(VMCPU_IS_EMT(pVCpu), \
597	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
598	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
599	(rc))
600	#endif
601
602	/** @def VM_ASSERT_EMT0
603	* Asserts that the current thread IS emulation thread \#0 (EMT0).
604	*/
605	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
606
607	/** @def VM_ASSERT_EMT0_RETURN
608	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
609	* it isn't.
610	*/
611	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
612
613
614	/**
615	* Asserts that the current thread is NOT the emulation thread.
616	*/
617	#define VM_ASSERT_OTHER_THREAD(pVM) \
618	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
619
620
621	/** @def VM_ASSERT_STATE_RETURN
622	* Asserts a certain VM state.
623	*/
624	#define VM_ASSERT_STATE(pVM, _enmState) \
625	AssertMsg((pVM)->enmVMState == (_enmState), \
626	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
627
628	/** @def VM_ASSERT_STATE_RETURN
629	* Asserts a certain VM state and returns if it doesn't match.
630	*/
631	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
632	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
633	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
634	(rc))
635
636	/** @def VM_ASSERT_VALID_EXT_RETURN
637	* Asserts a the VM handle is valid for external access, i.e. not being
638	* destroy or terminated.
639	*/
640	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
641	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
642	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
643	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
644	&& VM_IS_EMT(pVM))), \
645	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
646	? VMGetStateName(pVM->enmVMState) : ""), \
647	(rc))
648
649	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
650	* Asserts a the VMCPU handle is valid for external access, i.e. not being
651	* destroy or terminated.
652	*/
653	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
654	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
655	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
656	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
657	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
658	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
659	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
660	(rc))
661
662
663	/** This is the VM structure.
664	*
665	* It contains (nearly?) all the VM data which have to be available in all
666	* contexts. Even if it contains all the data the idea is to use APIs not
667	* to modify all the members all around the place. Therefore we make use of
668	* unions to hide everything which isn't local to the current source module.
669	* This means we'll have to pay a little bit of attention when adding new
670	* members to structures in the unions and make sure to keep the padding sizes
671	* up to date.
672	*
673	* Run tstVMStructSize after update!
674	*/
675	typedef struct VM
676	{
677	/** The state of the VM.
678	* This field is read only to everyone except the VM and EM. */
679	VMSTATE enmVMState;
680	/** Forced action flags.
681	* See the VM_FF_* \#defines. Updated atomically.
682	*/
683	volatile uint32_t fGlobalForcedActions;
684	/** Pointer to the array of page descriptors for the VM structure allocation. */
685	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
686	/** Session handle. For use when calling SUPR0 APIs. */
687	PSUPDRVSESSION pSession;
688	/** Pointer to the ring-3 VM structure. */
689	PUVM pUVM;
690	/** Ring-3 Host Context VM Pointer. */
691	R3PTRTYPE(struct VM *) pVMR3;
692	/** Ring-0 Host Context VM Pointer. */
693	R0PTRTYPE(struct VM *) pVMR0;
694	/** Raw-mode Context VM Pointer. */
695	RCPTRTYPE(struct VM *) pVMRC;
696
697	/** The GVM VM handle. Only the GVM should modify this field. */
698	uint32_t hSelf;
699	/** Number of virtual CPUs. */
700	uint32_t cCPUs;
701
702	/** Size of the VM structure including the VMCPU array. */
703	uint32_t cbSelf;
704
705	/** Offset to the VMCPU array starting from beginning of this structure. */
706	uint32_t offVMCPU;
707
708	/** Reserved; alignment. */
709	uint32_t u32Reserved[6];
710
711	/** @name Public VMM Switcher APIs
712	* @{ */
713	/**
714	* Assembly switch entry point for returning to host context.
715	* This function will clean up the stack frame.
716	*
717	* @param eax The return code, register.
718	* @param Ctx The guest core context.
719	* @remark Assume interrupts disabled.
720	*/
721	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
722
723	/**
724	* Assembly switch entry point for returning to host context.
725	*
726	* This is an alternative entry point which we'll be using when the we have the
727	* hypervisor context and need to save that before going to the host.
728	*
729	* This is typically useful when abandoning the hypervisor because of a trap
730	* and want the trap state to be saved.
731	*
732	* @param eax The return code, register.
733	* @param ecx Pointer to the hypervisor core context, register.
734	* @remark Assume interrupts disabled.
735	*/
736	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
737
738	/**
739	* Assembly switch entry point for returning to host context.
740	*
741	* This is an alternative to the two *Ctx APIs and implies that the context has already
742	* been saved, or that it's just a brief return to HC and that the caller intends to resume
743	* whatever it is doing upon 'return' from this call.
744	*
745	* @param eax The return code, register.
746	* @remark Assume interrupts disabled.
747	*/
748	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
749	/** @} */
750
751
752	/** @name Various VM data owned by VM.
753	* @{ */
754	RTTHREAD uPadding1;
755	/** The native handle of ThreadEMT. Getting the native handle
756	* is generally faster than getting the IPRT one (except on OS/2 :-). */
757	RTNATIVETHREAD uPadding2;
758	/** @} */
759
760
761	/** @name Various items that are frequently accessed.
762	* @{ */
763	/** Raw ring-3 indicator. */
764	bool fRawR3Enabled;
765	/** Raw ring-0 indicator. */
766	bool fRawR0Enabled;
767	/** PATM enabled flag.
768	* This is placed here for performance reasons. */
769	bool fPATMEnabled;
770	/** CSAM enabled flag.
771	* This is placed here for performance reasons. */
772	bool fCSAMEnabled;
773	/** Hardware VM support is available and enabled.
774	* This is placed here for performance reasons. */
775	bool fHWACCMEnabled;
776	/** Hardware VM support is required and non-optional.
777	* This is initialized together with the rest of the VM structure. */
778	bool fHwVirtExtForced;
779	/** PARAV enabled flag. */
780	bool fPARAVEnabled;
781	/** @} */
782
783
784	/* padding to make gnuc put the StatQemuToGC where msc does. */
785	#if HC_ARCH_BITS == 32
786	uint32_t padding0;
787	#endif
788
789	/** Profiling the total time from Qemu to GC. */
790	STAMPROFILEADV StatTotalQemuToGC;
791	/** Profiling the total time from GC to Qemu. */
792	STAMPROFILEADV StatTotalGCToQemu;
793	/** Profiling the total time spent in GC. */
794	STAMPROFILEADV StatTotalInGC;
795	/** Profiling the total time spent not in Qemu. */
796	STAMPROFILEADV StatTotalInQemu;
797	/** Profiling the VMMSwitcher code for going to GC. */
798	STAMPROFILEADV StatSwitcherToGC;
799	/** Profiling the VMMSwitcher code for going to HC. */
800	STAMPROFILEADV StatSwitcherToHC;
801	STAMPROFILEADV StatSwitcherSaveRegs;
802	STAMPROFILEADV StatSwitcherSysEnter;
803	STAMPROFILEADV StatSwitcherDebug;
804	STAMPROFILEADV StatSwitcherCR0;
805	STAMPROFILEADV StatSwitcherCR4;
806	STAMPROFILEADV StatSwitcherJmpCR3;
807	STAMPROFILEADV StatSwitcherRstrRegs;
808	STAMPROFILEADV StatSwitcherLgdt;
809	STAMPROFILEADV StatSwitcherLidt;
810	STAMPROFILEADV StatSwitcherLldt;
811	STAMPROFILEADV StatSwitcherTSS;
812
813	/** Padding - the unions must be aligned on a 64 bytes boundrary and the unions
814	* must start at the same offset on both 64-bit and 32-bit hosts. */
815	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 48 : 24];
816
817	/** CPUM part. */
818	union
819	{
820	#ifdef ___CPUMInternal_h
821	struct CPUM s;
822	#endif
823	uint8_t padding[1472]; /* multiple of 64 */
824	} cpum;
825
826	/** VMM part. */
827	union
828	{
829	#ifdef ___VMMInternal_h
830	struct VMM s;
831	#endif
832	uint8_t padding[1536]; /* multiple of 64 */
833	} vmm;
834
835	/** PGM part. */
836	union
837	{
838	#ifdef ___PGMInternal_h
839	struct PGM s;
840	#endif
841	uint8_t padding[6080]; /* multiple of 64 */
842	} pgm;
843
844	/** HWACCM part. */
845	union
846	{
847	#ifdef ___HWACCMInternal_h
848	struct HWACCM s;
849	#endif
850	uint8_t padding[5376]; /* multiple of 64 */
851	} hwaccm;
852
853	/** TRPM part. */
854	union
855	{
856	#ifdef ___TRPMInternal_h
857	struct TRPM s;
858	#endif
859	uint8_t padding[5184]; /* multiple of 64 */
860	} trpm;
861
862	/** SELM part. */
863	union
864	{
865	#ifdef ___SELMInternal_h
866	struct SELM s;
867	#endif
868	uint8_t padding[576]; /* multiple of 64 */
869	} selm;
870
871	/** MM part. */
872	union
873	{
874	#ifdef ___MMInternal_h
875	struct MM s;
876	#endif
877	uint8_t padding[192]; /* multiple of 64 */
878	} mm;
879
880	/** PDM part. */
881	union
882	{
883	#ifdef ___PDMInternal_h
884	struct PDM s;
885	#endif
886	uint8_t padding[1536]; /* multiple of 64 */
887	} pdm;
888
889	/** IOM part. */
890	union
891	{
892	#ifdef ___IOMInternal_h
893	struct IOM s;
894	#endif
895	uint8_t padding[832]; /* multiple of 64 */
896	} iom;
897
898	/** PATM part. */
899	union
900	{
901	#ifdef ___PATMInternal_h
902	struct PATM s;
903	#endif
904	uint8_t padding[768]; /* multiple of 64 */
905	} patm;
906
907	/** CSAM part. */
908	union
909	{
910	#ifdef ___CSAMInternal_h
911	struct CSAM s;
912	#endif
913	uint8_t padding[1088]; /* multiple of 64 */
914	} csam;
915
916	/** EM part. */
917	union
918	{
919	#ifdef ___EMInternal_h
920	struct EM s;
921	#endif
922	uint8_t padding[256]; /* multiple of 64 */
923	} em;
924
925	/** TM part. */
926	union
927	{
928	#ifdef ___TMInternal_h
929	struct TM s;
930	#endif
931	uint8_t padding[2112]; /* multiple of 64 */
932	} tm;
933
934	/** DBGF part. */
935	union
936	{
937	#ifdef ___DBGFInternal_h
938	struct DBGF s;
939	#endif
940	uint8_t padding[2368]; /* multiple of 64 */
941	} dbgf;
942
943	/** SSM part. */
944	union
945	{
946	#ifdef ___SSMInternal_h
947	struct SSM s;
948	#endif
949	uint8_t padding[128]; /* multiple of 64 */
950	} ssm;
951
952	/** REM part. */
953	union
954	{
955	#ifdef ___REMInternal_h
956	struct REM s;
957	#endif
958
959	/** @def VM_REM_SIZE
960	* Must be multiple of 32 and coherent with REM_ENV_SIZE from REMInternal.h. */
961	# define VM_REM_SIZE 0x11100
962	uint8_t padding[VM_REM_SIZE]; /* multiple of 32 */
963	} rem;
964
965	/* ---- begin small stuff ---- */
966
967	/** VM part. */
968	union
969	{
970	#ifdef ___VMInternal_h
971	struct VMINT s;
972	#endif
973	uint8_t padding[24]; /* multiple of 8 */
974	} vm;
975
976	/** CFGM part. */
977	union
978	{
979	#ifdef ___CFGMInternal_h
980	struct CFGM s;
981	#endif
982	uint8_t padding[8]; /* multiple of 8 */
983	} cfgm;
984
985	/** PARAV part. */
986	union
987	{
988	#ifdef ___PARAVInternal_h
989	struct PARAV s;
990	#endif
991	uint8_t padding[24]; /* multiple of 8 */
992	} parav;
993
994	/** Padding for aligning the cpu array on a page boundrary. */
995	uint8_t abAlignment2[2120];
996
997	/* ---- end small stuff ---- */
998
999	/** VMCPU array for the configured number of virtual CPUs.
1000	* Must be aligned on a page boundrary for TLB hit reasons as well as
1001	* alignment of VMCPU members. */
1002	VMCPU aCpus[1];
1003	} VM;
1004
1005
1006	#ifdef IN_RC
1007	RT_C_DECLS_BEGIN
1008
1009	/** The VM structure.
1010	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1011	* of those magic globals which we should avoid using.
1012	*/
1013	extern DECLIMPORT(VM) g_VM;
1014
1015	RT_C_DECLS_END
1016	#endif
1017
1018	/** @} */
1019
1020	#endif

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