vm.h@ 32796

Last change on this file since 32796 was 32796, checked in by vboxsync, 14 years ago
GVMMR0,TM,STAM: Periodic preemption timer fixes, adjustments and statistics. (still disabled)
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1	/** @file
2	* VM - The Virtual Machine, data. (VMM)
3	*/
4
5	/*
6	* Copyright (C) 2006-2007 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vm_h
27	#define ___VBox_vm_h
28
29	#include <VBox/cdefs.h>
30	#include <VBox/types.h>
31	#include <VBox/cpum.h>
32	#include <VBox/stam.h>
33	#include <VBox/vmapi.h>
34	#include <VBox/sup.h>
35	#include <VBox/vmm.h>
36
37
38	/** @defgroup grp_vm The Virtual Machine
39	* @{
40	*/
41
42	/**
43	* The state of a Virtual CPU.
44	*
45	* The basic state indicated here is whether the CPU has been started or not. In
46	* addition, there are sub-states when started for assisting scheduling (GVMM
47	* mostly).
48	*
49	* The transision out of the STOPPED state is done by a vmR3PowerOn.
50	* The transision back to the STOPPED state is done by vmR3PowerOff.
51	*
52	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
53	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
54	*/
55	typedef enum VMCPUSTATE
56	{
57	/** The customary invalid zero. */
58	VMCPUSTATE_INVALID = 0,
59
60	/** Virtual CPU has not yet been started. */
61	VMCPUSTATE_STOPPED,
62
63	/** CPU started. */
64	VMCPUSTATE_STARTED,
65	/** Executing guest code and can be poked. */
66	VMCPUSTATE_STARTED_EXEC,
67	/** Executing guest code in the recompiler. */
68	VMCPUSTATE_STARTED_EXEC_REM,
69	/** Halted. */
70	VMCPUSTATE_STARTED_HALTED,
71
72	/** The end of valid virtual CPU states. */
73	VMCPUSTATE_END,
74
75	/** Ensure 32-bit type. */
76	VMCPUSTATE_32BIT_HACK = 0x7fffffff
77	} VMCPUSTATE;
78
79
80	/**
81	* Per virtual CPU data.
82	*/
83	typedef struct VMCPU
84	{
85	/** Per CPU forced action.
86	* See the VMCPU_FF_* \#defines. Updated atomically. */
87	uint32_t volatile fLocalForcedActions;
88	/** The CPU state. */
89	VMCPUSTATE volatile enmState;
90
91	/** Pointer to the ring-3 UVMCPU structure. */
92	PUVMCPU pUVCpu;
93	/** Ring-3 Host Context VM Pointer. */
94	PVMR3 pVMR3;
95	/** Ring-0 Host Context VM Pointer. */
96	PVMR0 pVMR0;
97	/** Alignment padding. */
98	RTR0PTR pvR0Padding;
99	/** Raw-mode Context VM Pointer. */
100	PVMRC pVMRC;
101	/** The CPU ID.
102	* This is the index into the VM::aCpu array. */
103	VMCPUID idCpu;
104	/** The native thread handle. */
105	RTNATIVETHREAD hNativeThread;
106	/** The native R0 thread handle. (different from the R3 handle!) */
107	RTNATIVETHREAD hNativeThreadR0;
108	/** Which host CPU ID is this EMT running on.
109	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
110	RTCPUID volatile idHostCpu;
111	/** State data for use by ad hoc profiling. */
112	uint32_t uAdHoc;
113	/** Profiling samples for use by ad hoc profiling. */
114	STAMPROFILEADV aStatAdHoc[8];
115
116	/** Align the next bit on a 64-byte boundary and make sure it starts at the same
117	* offset in both 64-bit and 32-bit builds.
118	*
119	* @remarks The aligments of the members that are larger than 48 bytes should be
120	* 64-byte for cache line reasons. structs containing small amounts of
121	* data could be lumped together at the end with a < 64 byte padding
122	* following it (to grow into and align the struct size).
123	* */
124	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 16+64 : 56];
125
126	/** CPUM part. */
127	union
128	{
129	#ifdef ___CPUMInternal_h
130	struct CPUMCPU s;
131	#endif
132	uint8_t padding[3456]; /* multiple of 64 */
133	} cpum;
134
135	/** HWACCM part. */
136	union
137	{
138	#ifdef ___HWACCMInternal_h
139	struct HWACCMCPU s;
140	#endif
141	uint8_t padding[5312]; /* multiple of 64 */
142	} hwaccm;
143
144	/** EM part. */
145	union
146	{
147	#ifdef ___EMInternal_h
148	struct EMCPU s;
149	#endif
150	uint8_t padding[1408]; /* multiple of 64 */
151	} em;
152
153	/** TRPM part. */
154	union
155	{
156	#ifdef ___TRPMInternal_h
157	struct TRPMCPU s;
158	#endif
159	uint8_t padding[128]; /* multiple of 64 */
160	} trpm;
161
162	/** TM part. */
163	union
164	{
165	#ifdef ___TMInternal_h
166	struct TMCPU s;
167	#endif
168	uint8_t padding[384]; /* multiple of 64 */
169	} tm;
170
171	/** VMM part. */
172	union
173	{
174	#ifdef ___VMMInternal_h
175	struct VMMCPU s;
176	#endif
177	uint8_t padding[384]; /* multiple of 64 */
178	} vmm;
179
180	/** PDM part. */
181	union
182	{
183	#ifdef ___PDMInternal_h
184	struct PDMCPU s;
185	#endif
186	uint8_t padding[128]; /* multiple of 64 */
187	} pdm;
188
189	/** IOM part. */
190	union
191	{
192	#ifdef ___IOMInternal_h
193	struct IOMCPU s;
194	#endif
195	uint8_t padding[512]; /* multiple of 64 */
196	} iom;
197
198	/** DBGF part.
199	* @todo Combine this with other tiny structures. */
200	union
201	{
202	#ifdef ___DBGFInternal_h
203	struct DBGFCPU s;
204	#endif
205	uint8_t padding[64]; /* multiple of 64 */
206	} dbgf;
207
208	/** Align the following members on page boundrary. */
209	uint8_t abAlignment2[64];
210
211	/** PGM part. */
212	union
213	{
214	#ifdef ___PGMInternal_h
215	struct PGMCPU s;
216	#endif
217	uint8_t padding[4096]; /* multiple of 4096 */
218	} pgm;
219
220	} VMCPU;
221
222
223	/** @name Operations on VMCPU::enmState
224	* @{ */
225	/** Gets the VMCPU state. */
226	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
227	/** Sets the VMCPU state. */
228	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
229	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
230	/** Cmpares and sets the VMCPU state. */
231	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
232	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
233	/** Checks the VMCPU state. */
234	#define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
235	do { \
236	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
237	AssertMsg(enmState == (enmExpectedState), \
238	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
239	enmState, enmExpectedState, (pVCpu)->idCpu)); \
240	} while (0)
241	/** Tests if the state means that the CPU is started. */
242	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
243	/** Tests if the state means that the CPU is stopped. */
244	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
245	/** @} */
246
247
248	/** The name of the Guest Context VMM Core module. */
249	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
250	/** The name of the Ring 0 Context VMM Core module. */
251	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
252
253	/** VM Forced Action Flags.
254	*
255	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
256	* action mask of a VM.
257	*
258	* @{
259	*/
260	/** The virtual sync clock has been stopped, go to TM until it has been
261	* restarted... */
262	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
263	/** PDM Queues are pending. */
264	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
265	/** The bit number for VM_FF_PDM_QUEUES. */
266	#define VM_FF_PDM_QUEUES_BIT 3
267	/** PDM DMA transfers are pending. */
268	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
269	/** The bit number for VM_FF_PDM_DMA. */
270	#define VM_FF_PDM_DMA_BIT 4
271	/** This action forces the VM to call DBGF so DBGF can service debugger
272	* requests in the emulation thread.
273	* This action flag stays asserted till DBGF clears it.*/
274	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
275	/** The bit number for VM_FF_DBGF. */
276	#define VM_FF_DBGF_BIT 8
277	/** This action forces the VM to service pending requests from other
278	* thread or requests which must be executed in another context. */
279	#define VM_FF_REQUEST RT_BIT_32(9)
280	/** Check for VM state changes and take appropriate action. */
281	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
282	/** The bit number for VM_FF_CHECK_VM_STATE. */
283	#define VM_FF_CHECK_VM_STATE_BIT 10
284	/** Reset the VM. (postponed) */
285	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
286	/** The bit number for VM_FF_RESET. */
287	#define VM_FF_RESET_BIT 11
288	/** EMT rendezvous in VMM. */
289	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
290	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
291	#define VM_FF_EMT_RENDEZVOUS_BIT 12
292
293	/** PGM needs to allocate handy pages. */
294	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
295	/** PGM is out of memory.
296	* Abandon all loops and code paths which can be resumed and get up to the EM
297	* loops. */
298	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
299	/** PGM is about to perform a lightweight pool flush
300	* Guest SMP: all EMT threads should return to ring 3
301	*/
302	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
303	/** REM needs to be informed about handler changes. */
304	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
305	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
306	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
307	/** Suspend the VM - debug only. */
308	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
309
310
311	/** This action forces the VM to check any pending interrups on the APIC. */
312	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
313	/** This action forces the VM to check any pending interrups on the PIC. */
314	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
315	/** This action forces the VM to schedule and run pending timer (TM).
316	* @remarks Don't move - PATM compatability. */
317	#define VMCPU_FF_TIMER RT_BIT_32(2)
318	/** This action forces the VM to check any pending NMIs. */
319	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
320	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
321	/** This action forces the VM to check any pending SMIs. */
322	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
323	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
324	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
325	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
326	/** This action forces the VM to service pending requests from other
327	* thread or requests which must be executed in another context. */
328	#define VMCPU_FF_REQUEST RT_BIT_32(9)
329	/** This action forces the VM to resync the page tables before going
330	* back to execute guest code. (GLOBAL FLUSH) */
331	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
332	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
333	* (NON-GLOBAL FLUSH) */
334	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
335	/** Check for pending TLB shootdown actions. */
336	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
337	/** Check for pending TLB flush action. */
338	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
339	/** The bit number for VMCPU_FF_TLB_FLUSH. */
340	#define VMCPU_FF_TLB_FLUSH_BIT 19
341	/** Check the interupt and trap gates */
342	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
343	/** Check Guest's TSS ring 0 stack */
344	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
345	/** Check Guest's GDT table */
346	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
347	/** Check Guest's LDT table */
348	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
349	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
350	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
351	/** CSAM needs to scan the page that's being executed */
352	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
353	/** CSAM needs to do some homework. */
354	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
355	/** Force return to Ring-3. */
356	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
357
358	/** Externally VM forced actions. Used to quit the idle/wait loop. */
359	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
360	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
361	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
362
363	/** Externally forced VM actions. Used to quit the idle/wait loop. */
364	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
365	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
366	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
367	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \| VMCPU_FF_TIMER)
368
369	/** High priority VM pre-execution actions. */
370	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
371	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
372	/** High priority VMCPU pre-execution actions. */
373	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_PGM_SYNC_CR3 \
374	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
375	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
376
377	/** High priority VM pre raw-mode execution mask. */
378	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
379	/** High priority VMCPU pre raw-mode execution mask. */
380	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
381	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
382
383	/** High priority post-execution actions. */
384	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
385	/** High priority post-execution actions. */
386	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
387
388	/** Normal priority VM post-execution actions. */
389	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
390	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
391	/** Normal priority VMCPU post-execution actions. */
392	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
393
394	/** Normal priority VM actions. */
395	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
396	/** Normal priority VMCPU actions. */
397	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
398
399	/** Flags to clear before resuming guest execution. */
400	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
401
402	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
403	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
404	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
405	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER)
406
407	/** All the forced VM flags. */
408	#define VM_FF_ALL_MASK (~0U)
409	/** All the forced VMCPU flags. */
410	#define VMCPU_FF_ALL_MASK (~0U)
411
412	/** All the forced VM flags. */
413	#define VM_FF_ALL_BUT_RAW_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
414	/** All the forced VMCPU flags. */
415	#define VMCPU_FF_ALL_BUT_RAW_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT))
416
417	/** @} */
418
419	/** @def VM_FF_SET
420	* Sets a force action flag.
421	*
422	* @param pVM VM Handle.
423	* @param fFlag The flag to set.
424	*/
425	#if 1
426	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
427	#else
428	# define VM_FF_SET(pVM, fFlag) \
429	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
430	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
431	} while (0)
432	#endif
433
434	/** @def VMCPU_FF_SET
435	* Sets a force action flag for the given VCPU.
436	*
437	* @param pVCpu VMCPU Handle.
438	* @param fFlag The flag to set.
439	*/
440	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
441
442	/** @def VM_FF_CLEAR
443	* Clears a force action flag.
444	*
445	* @param pVM VM Handle.
446	* @param fFlag The flag to clear.
447	*/
448	#if 1
449	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
450	#else
451	# define VM_FF_CLEAR(pVM, fFlag) \
452	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
453	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
454	} while (0)
455	#endif
456
457	/** @def VMCPU_FF_CLEAR
458	* Clears a force action flag for the given VCPU.
459	*
460	* @param pVCpu VMCPU Handle.
461	* @param fFlag The flag to clear.
462	*/
463	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
464
465	/** @def VM_FF_ISSET
466	* Checks if a force action flag is set.
467	*
468	* @param pVM VM Handle.
469	* @param fFlag The flag to check.
470	*/
471	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
472
473	/** @def VMCPU_FF_ISSET
474	* Checks if a force action flag is set for the given VCPU.
475	*
476	* @param pVCpu VMCPU Handle.
477	* @param fFlag The flag to check.
478	*/
479	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
480
481	/** @def VM_FF_ISPENDING
482	* Checks if one or more force action in the specified set is pending.
483	*
484	* @param pVM VM Handle.
485	* @param fFlags The flags to check for.
486	*/
487	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
488
489	/** @def VM_FF_TESTANDCLEAR
490	* Checks if one (!) force action in the specified set is pending and clears it atomically
491	*
492	* @returns true if the bit was set.
493	* @returns false if the bit was clear.
494	* @param pVM VM Handle.
495	* @param iBit Bit position to check and clear
496	*/
497	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
498
499	/** @def VMCPU_FF_TESTANDCLEAR
500	* Checks if one (!) force action in the specified set is pending and clears it atomically
501	*
502	* @returns true if the bit was set.
503	* @returns false if the bit was clear.
504	* @param pVCpu VMCPU Handle.
505	* @param iBit Bit position to check and clear
506	*/
507	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
508
509	/** @def VMCPU_FF_ISPENDING
510	* Checks if one or more force action in the specified set is pending for the given VCPU.
511	*
512	* @param pVCpu VMCPU Handle.
513	* @param fFlags The flags to check for.
514	*/
515	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
516
517	/** @def VM_FF_ISPENDING
518	* Checks if one or more force action in the specified set is pending while one
519	* or more other ones are not.
520	*
521	* @param pVM VM Handle.
522	* @param fFlags The flags to check for.
523	* @param fExcpt The flags that should not be set.
524	*/
525	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
526
527	/** @def VMCPU_FF_IS_PENDING_EXCEPT
528	* Checks if one or more force action in the specified set is pending for the given
529	* VCPU while one or more other ones are not.
530	*
531	* @param pVCpu VMCPU Handle.
532	* @param fFlags The flags to check for.
533	* @param fExcpt The flags that should not be set.
534	*/
535	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
536
537	/** @def VM_IS_EMT
538	* Checks if the current thread is the emulation thread (EMT).
539	*
540	* @remark The ring-0 variation will need attention if we expand the ring-0
541	* code to let threads other than EMT mess around with the VM.
542	*/
543	#ifdef IN_RC
544	# define VM_IS_EMT(pVM) true
545	#else
546	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
547	#endif
548
549	/** @def VMCPU_IS_EMT
550	* Checks if the current thread is the emulation thread (EMT) for the specified
551	* virtual CPU.
552	*/
553	#ifdef IN_RC
554	# define VMCPU_IS_EMT(pVCpu) true
555	#else
556	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
557	#endif
558
559	/** @def VM_ASSERT_EMT
560	* Asserts that the current thread IS the emulation thread (EMT).
561	*/
562	#ifdef IN_RC
563	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
564	#elif defined(IN_RING0)
565	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
566	#else
567	# define VM_ASSERT_EMT(pVM) \
568	AssertMsg(VM_IS_EMT(pVM), \
569	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
570	#endif
571
572	/** @def VMCPU_ASSERT_EMT
573	* Asserts that the current thread IS the emulation thread (EMT) of the
574	* specified virtual CPU.
575	*/
576	#ifdef IN_RC
577	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
578	#elif defined(IN_RING0)
579	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
580	#else
581	# define VMCPU_ASSERT_EMT(pVCpu) \
582	AssertMsg(VMCPU_IS_EMT(pVCpu), \
583	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
584	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
585	#endif
586
587	/** @def VM_ASSERT_EMT_RETURN
588	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
589	*/
590	#ifdef IN_RC
591	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
592	#elif defined(IN_RING0)
593	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
594	#else
595	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
596	AssertMsgReturn(VM_IS_EMT(pVM), \
597	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
598	(rc))
599	#endif
600
601	/** @def VMCPU_ASSERT_EMT_RETURN
602	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
603	*/
604	#ifdef IN_RC
605	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
606	#elif defined(IN_RING0)
607	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
608	#else
609	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
610	AssertMsg(VMCPU_IS_EMT(pVCpu), \
611	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
612	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
613	(rc))
614	#endif
615
616	/** @def VM_ASSERT_EMT0
617	* Asserts that the current thread IS emulation thread \#0 (EMT0).
618	*/
619	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
620
621	/** @def VM_ASSERT_EMT0_RETURN
622	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
623	* it isn't.
624	*/
625	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
626
627
628	/**
629	* Asserts that the current thread is NOT the emulation thread.
630	*/
631	#define VM_ASSERT_OTHER_THREAD(pVM) \
632	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
633
634
635	/** @def VM_ASSERT_STATE_RETURN
636	* Asserts a certain VM state.
637	*/
638	#define VM_ASSERT_STATE(pVM, _enmState) \
639	AssertMsg((pVM)->enmVMState == (_enmState), \
640	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
641
642	/** @def VM_ASSERT_STATE_RETURN
643	* Asserts a certain VM state and returns if it doesn't match.
644	*/
645	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
646	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
647	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
648	(rc))
649
650	/** @def VM_ASSERT_VALID_EXT_RETURN
651	* Asserts a the VM handle is valid for external access, i.e. not being
652	* destroy or terminated.
653	*/
654	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
655	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
656	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
657	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
658	&& VM_IS_EMT(pVM))), \
659	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
660	? VMGetStateName(pVM->enmVMState) : ""), \
661	(rc))
662
663	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
664	* Asserts a the VMCPU handle is valid for external access, i.e. not being
665	* destroy or terminated.
666	*/
667	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
668	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
669	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
670	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
671	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
672	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
673	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
674	(rc))
675
676
677	/** This is the VM structure.
678	*
679	* It contains (nearly?) all the VM data which have to be available in all
680	* contexts. Even if it contains all the data the idea is to use APIs not
681	* to modify all the members all around the place. Therefore we make use of
682	* unions to hide everything which isn't local to the current source module.
683	* This means we'll have to pay a little bit of attention when adding new
684	* members to structures in the unions and make sure to keep the padding sizes
685	* up to date.
686	*
687	* Run tstVMStructSize after update!
688	*/
689	typedef struct VM
690	{
691	/** The state of the VM.
692	* This field is read only to everyone except the VM and EM. */
693	VMSTATE volatile enmVMState;
694	/** Forced action flags.
695	* See the VM_FF_* \#defines. Updated atomically.
696	*/
697	volatile uint32_t fGlobalForcedActions;
698	/** Pointer to the array of page descriptors for the VM structure allocation. */
699	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
700	/** Session handle. For use when calling SUPR0 APIs. */
701	PSUPDRVSESSION pSession;
702	/** Pointer to the ring-3 VM structure. */
703	PUVM pUVM;
704	/** Ring-3 Host Context VM Pointer. */
705	R3PTRTYPE(struct VM *) pVMR3;
706	/** Ring-0 Host Context VM Pointer. */
707	R0PTRTYPE(struct VM *) pVMR0;
708	/** Raw-mode Context VM Pointer. */
709	RCPTRTYPE(struct VM *) pVMRC;
710
711	/** The GVM VM handle. Only the GVM should modify this field. */
712	uint32_t hSelf;
713	/** Number of virtual CPUs. */
714	uint32_t cCpus;
715	/** CPU priority (1-100) */
716	uint32_t uCpuPriority;
717
718	/** Size of the VM structure including the VMCPU array. */
719	uint32_t cbSelf;
720
721	/** Offset to the VMCPU array starting from beginning of this structure. */
722	uint32_t offVMCPU;
723
724	/** Reserved; alignment. */
725	uint32_t u32Reserved[5];
726
727	/** @name Public VMM Switcher APIs
728	* @{ */
729	/**
730	* Assembly switch entry point for returning to host context.
731	* This function will clean up the stack frame.
732	*
733	* @param eax The return code, register.
734	* @param Ctx The guest core context.
735	* @remark Assume interrupts disabled.
736	*/
737	RTRCPTR pfnVMMGCGuestToHostAsmGuestCtx/(int32_t eax, CPUMCTXCORE Ctx)/;
738
739	/**
740	* Assembly switch entry point for returning to host context.
741	*
742	* This is an alternative entry point which we'll be using when the we have the
743	* hypervisor context and need to save that before going to the host.
744	*
745	* This is typically useful when abandoning the hypervisor because of a trap
746	* and want the trap state to be saved.
747	*
748	* @param eax The return code, register.
749	* @param ecx Pointer to the hypervisor core context, register.
750	* @remark Assume interrupts disabled.
751	*/
752	RTRCPTR pfnVMMGCGuestToHostAsmHyperCtx/(int32_t eax, PCPUMCTXCORE ecx)/;
753
754	/**
755	* Assembly switch entry point for returning to host context.
756	*
757	* This is an alternative to the two *Ctx APIs and implies that the context has already
758	* been saved, or that it's just a brief return to HC and that the caller intends to resume
759	* whatever it is doing upon 'return' from this call.
760	*
761	* @param eax The return code, register.
762	* @remark Assume interrupts disabled.
763	*/
764	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
765	/** @} */
766
767
768	/** @name Various VM data owned by VM.
769	* @{ */
770	RTTHREAD uPadding1;
771	/** The native handle of ThreadEMT. Getting the native handle
772	* is generally faster than getting the IPRT one (except on OS/2 :-). */
773	RTNATIVETHREAD uPadding2;
774	/** @} */
775
776
777	/** @name Various items that are frequently accessed.
778	* @{ */
779	/** Raw ring-3 indicator. */
780	bool fRawR3Enabled;
781	/** Raw ring-0 indicator. */
782	bool fRawR0Enabled;
783	/** PATM enabled flag.
784	* This is placed here for performance reasons. */
785	bool fPATMEnabled;
786	/** CSAM enabled flag.
787	* This is placed here for performance reasons. */
788	bool fCSAMEnabled;
789	/** Hardware VM support is available and enabled.
790	* This is placed here for performance reasons. */
791	bool fHWACCMEnabled;
792	/** Hardware VM support is required and non-optional.
793	* This is initialized together with the rest of the VM structure. */
794	bool fHwVirtExtForced;
795	/** Set when this VM is the master FT node. */
796	bool fFaultTolerantMaster;
797	/** Large page enabled flag. */
798	bool fUseLargePages;
799	/** @} */
800
801
802	/* padding to make gnuc put the StatQemuToGC where msc does. */
803	#if HC_ARCH_BITS == 32
804	uint32_t padding0;
805	#endif
806
807	/** Profiling the total time from Qemu to GC. */
808	STAMPROFILEADV StatTotalQemuToGC;
809	/** Profiling the total time from GC to Qemu. */
810	STAMPROFILEADV StatTotalGCToQemu;
811	/** Profiling the total time spent in GC. */
812	STAMPROFILEADV StatTotalInGC;
813	/** Profiling the total time spent not in Qemu. */
814	STAMPROFILEADV StatTotalInQemu;
815	/** Profiling the VMMSwitcher code for going to GC. */
816	STAMPROFILEADV StatSwitcherToGC;
817	/** Profiling the VMMSwitcher code for going to HC. */
818	STAMPROFILEADV StatSwitcherToHC;
819	STAMPROFILEADV StatSwitcherSaveRegs;
820	STAMPROFILEADV StatSwitcherSysEnter;
821	STAMPROFILEADV StatSwitcherDebug;
822	STAMPROFILEADV StatSwitcherCR0;
823	STAMPROFILEADV StatSwitcherCR4;
824	STAMPROFILEADV StatSwitcherJmpCR3;
825	STAMPROFILEADV StatSwitcherRstrRegs;
826	STAMPROFILEADV StatSwitcherLgdt;
827	STAMPROFILEADV StatSwitcherLidt;
828	STAMPROFILEADV StatSwitcherLldt;
829	STAMPROFILEADV StatSwitcherTSS;
830
831	/** Padding - the unions must be aligned on a 64 bytes boundrary and the unions
832	* must start at the same offset on both 64-bit and 32-bit hosts. */
833	uint8_t abAlignment1[HC_ARCH_BITS == 32 ? 48 : 24];
834
835	/** CPUM part. */
836	union
837	{
838	#ifdef ___CPUMInternal_h
839	struct CPUM s;
840	#endif
841	uint8_t padding[1472]; /* multiple of 64 */
842	} cpum;
843
844	/** VMM part. */
845	union
846	{
847	#ifdef ___VMMInternal_h
848	struct VMM s;
849	#endif
850	uint8_t padding[1536]; /* multiple of 64 */
851	} vmm;
852
853	/** PGM part. */
854	union
855	{
856	#ifdef ___PGMInternal_h
857	struct PGM s;
858	#endif
859	uint8_t padding[40962+6080]; / multiple of 64 */
860	} pgm;
861
862	/** HWACCM part. */
863	union
864	{
865	#ifdef ___HWACCMInternal_h
866	struct HWACCM s;
867	#endif
868	uint8_t padding[5376]; /* multiple of 64 */
869	} hwaccm;
870
871	/** TRPM part. */
872	union
873	{
874	#ifdef ___TRPMInternal_h
875	struct TRPM s;
876	#endif
877	uint8_t padding[5184]; /* multiple of 64 */
878	} trpm;
879
880	/** SELM part. */
881	union
882	{
883	#ifdef ___SELMInternal_h
884	struct SELM s;
885	#endif
886	uint8_t padding[576]; /* multiple of 64 */
887	} selm;
888
889	/** MM part. */
890	union
891	{
892	#ifdef ___MMInternal_h
893	struct MM s;
894	#endif
895	uint8_t padding[192]; /* multiple of 64 */
896	} mm;
897
898	/** PDM part. */
899	union
900	{
901	#ifdef ___PDMInternal_h
902	struct PDM s;
903	#endif
904	uint8_t padding[1600]; /* multiple of 64 */
905	} pdm;
906
907	/** IOM part. */
908	union
909	{
910	#ifdef ___IOMInternal_h
911	struct IOM s;
912	#endif
913	uint8_t padding[832]; /* multiple of 64 */
914	} iom;
915
916	/** PATM part. */
917	union
918	{
919	#ifdef ___PATMInternal_h
920	struct PATM s;
921	#endif
922	uint8_t padding[768]; /* multiple of 64 */
923	} patm;
924
925	/** CSAM part. */
926	union
927	{
928	#ifdef ___CSAMInternal_h
929	struct CSAM s;
930	#endif
931	uint8_t padding[1088]; /* multiple of 64 */
932	} csam;
933
934	/** EM part. */
935	union
936	{
937	#ifdef ___EMInternal_h
938	struct EM s;
939	#endif
940	uint8_t padding[256]; /* multiple of 64 */
941	} em;
942
943	/** TM part. */
944	union
945	{
946	#ifdef ___TMInternal_h
947	struct TM s;
948	#endif
949	uint8_t padding[2176]; /* multiple of 64 */
950	} tm;
951
952	/** DBGF part. */
953	union
954	{
955	#ifdef ___DBGFInternal_h
956	struct DBGF s;
957	#endif
958	uint8_t padding[2368]; /* multiple of 64 */
959	} dbgf;
960
961	/** SSM part. */
962	union
963	{
964	#ifdef ___SSMInternal_h
965	struct SSM s;
966	#endif
967	uint8_t padding[128]; /* multiple of 64 */
968	} ssm;
969
970	/** FTM part. */
971	union
972	{
973	#ifdef ___FTMInternal_h
974	struct FTM s;
975	#endif
976	uint8_t padding[512]; /* multiple of 64 */
977	} ftm;
978
979	/** REM part. */
980	union
981	{
982	#ifdef ___REMInternal_h
983	struct REM s;
984	#endif
985	uint8_t padding[0x11100]; /* multiple of 64 */
986	} rem;
987
988	/* ---- begin small stuff ---- */
989
990	/** VM part. */
991	union
992	{
993	#ifdef ___VMInternal_h
994	struct VMINT s;
995	#endif
996	uint8_t padding[24]; /* multiple of 8 */
997	} vm;
998
999	/** CFGM part. */
1000	union
1001	{
1002	#ifdef ___CFGMInternal_h
1003	struct CFGM s;
1004	#endif
1005	uint8_t padding[8]; /* multiple of 8 */
1006	} cfgm;
1007
1008	/** Padding for aligning the cpu array on a page boundrary. */
1009	uint8_t abAlignment2[1502];
1010
1011	/* ---- end small stuff ---- */
1012
1013	/** VMCPU array for the configured number of virtual CPUs.
1014	* Must be aligned on a page boundrary for TLB hit reasons as well as
1015	* alignment of VMCPU members. */
1016	VMCPU aCpus[1];
1017	} VM;
1018
1019
1020	#ifdef IN_RC
1021	RT_C_DECLS_BEGIN
1022
1023	/** The VM structure.
1024	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1025	* of those magic globals which we should avoid using.
1026	*/
1027	extern DECLIMPORT(VM) g_VM;
1028
1029	RT_C_DECLS_END
1030	#endif
1031
1032	/** @} */
1033
1034	#endif

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