1 | ;; @file
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2 | ; CPUM - CPU Monitor, Assembly header file.
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3 | ;
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4 |
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5 | ;
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6 | ; Copyright (C) 2006-2019 Oracle Corporation
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7 | ;
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8 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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9 | ; available from http://www.virtualbox.org. This file is free software;
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10 | ; you can redistribute it and/or modify it under the terms of the GNU
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11 | ; General Public License (GPL) as published by the Free Software
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12 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | ;
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16 | ; The contents of this file may alternatively be used under the terms
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17 | ; of the Common Development and Distribution License Version 1.0
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18 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | ; VirtualBox OSE distribution, in which case the provisions of the
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20 | ; CDDL are applicable instead of those of the GPL.
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21 | ;
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22 | ; You may elect to license modified versions of this file under the
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23 | ; terms and conditions of either the GPL or the CDDL or both.
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24 | ;
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25 |
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26 | %ifndef ___VBox_vmm_cpum_mac__
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27 | %define ___VBox_vmm_cpum_mac__
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28 |
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29 | %include "iprt/asmdefs.mac"
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30 |
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31 |
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32 | ;;
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33 | ; The volatile XSAVE components when VBOX_WITH_KERNEL_USING_XMM is active.
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34 | ; @note ASSUMED to be at the most 32-bit in width at the moment.
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35 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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36 | %define CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS (XSAVE_C_SSE | XSAVE_C_YMM | XSAVE_C_ZMM_HI256 | XSAVE_C_ZMM_16HI)
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37 | %endif
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38 |
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39 | ;;
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40 | ; CPUID leaf.
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41 | ; @remarks This structure is used by the patch manager and can only be extended
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42 | ; by adding to the end of it.
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43 | struc CPUMCPUIDLEAF
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44 | .uLeaf resd 1
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45 | .uSubLeaf resd 1
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46 | .fSubLeafMask resd 1
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47 | .uEax resd 1
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48 | .uEbx resd 1
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49 | .uEcx resd 1
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50 | .uEdx resd 1
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51 | .fFlags resd 1
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52 | endstruc
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53 | %define CPUMCPUIDLEAF_F_INTEL_TOPOLOGY_SUBLEAVES RT_BIT_32(0)
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54 | %define CPUMCPUIDLEAF_F_CONTAINS_APIC_ID RT_BIT_32(1)
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55 | %define CPUMCPUIDLEAF_F_CONTAINS_OSXSAVE RT_BIT_32(2)
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56 | %define CPUMCPUIDLEAF_F_CONTAINS_APIC RT_BIT_32(3)
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57 |
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58 |
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59 | ;;
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60 | ; For the default CPUID leaf value.
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61 | ; @remarks This is used by the patch manager and cannot be modified in any way.
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62 | struc CPUMCPUID
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63 | .uEax resd 1
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64 | .uEbx resd 1
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65 | .uEcx resd 1
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66 | .uEdx resd 1
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67 | endstruc
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68 |
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69 |
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70 | ;; @name Method used to deal with unknown CPUID leaves.
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71 | ;; @{
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72 | %define CPUMUNKNOWNCPUID_DEFAULTS 1
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73 | %define CPUMUNKNOWNCPUID_LAST_STD_LEAF 2
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74 | %define CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX 3
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75 | %define CPUMUNKNOWNCPUID_PASSTHRU 4
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76 | ;; @}
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77 |
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78 |
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79 | ;;
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80 | ; Registers frame.
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81 | ; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx
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82 | ; and other places.
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83 | struc CPUMCTXCORE
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84 | .eax resq 1
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85 | .ecx resq 1
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86 | .edx resq 1
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87 | .ebx resq 1
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88 | .esp resq 1
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89 | .ebp resq 1
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90 | .esi resq 1
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91 | .edi resq 1
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92 | .r8 resq 1
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93 | .r9 resq 1
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94 | .r10 resq 1
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95 | .r11 resq 1
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96 | .r12 resq 1
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97 | .r13 resq 1
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98 | .r14 resq 1
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99 | .r15 resq 1
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100 | .es.Sel resw 1
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101 | .es.PaddingSel resw 1
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102 | .es.ValidSel resw 1
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103 | .es.fFlags resw 1
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104 | .es.u64Base resq 1
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105 | .es.u32Limit resd 1
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106 | .es.Attr resd 1
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107 | .cs.Sel resw 1
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108 | .cs.PaddingSel resw 1
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109 | .cs.ValidSel resw 1
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110 | .cs.fFlags resw 1
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111 | .cs.u64Base resq 1
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112 | .cs.u32Limit resd 1
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113 | .cs.Attr resd 1
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114 | .ss.Sel resw 1
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115 | .ss.PaddingSel resw 1
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116 | .ss.ValidSel resw 1
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117 | .ss.fFlags resw 1
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118 | .ss.u64Base resq 1
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119 | .ss.u32Limit resd 1
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120 | .ss.Attr resd 1
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121 | .ds.Sel resw 1
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122 | .ds.PaddingSel resw 1
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123 | .ds.ValidSel resw 1
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124 | .ds.fFlags resw 1
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125 | .ds.u64Base resq 1
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126 | .ds.u32Limit resd 1
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127 | .ds.Attr resd 1
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128 | .fs.Sel resw 1
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129 | .fs.PaddingSel resw 1
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130 | .fs.ValidSel resw 1
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131 | .fs.fFlags resw 1
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132 | .fs.u64Base resq 1
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133 | .fs.u32Limit resd 1
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134 | .fs.Attr resd 1
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135 | .gs.Sel resw 1
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136 | .gs.PaddingSel resw 1
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137 | .gs.ValidSel resw 1
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138 | .gs.fFlags resw 1
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139 | .gs.u64Base resq 1
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140 | .gs.u32Limit resd 1
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141 | .gs.Attr resd 1
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142 | .eip resq 1
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143 | .eflags resq 1
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144 | endstruc
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145 |
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146 |
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147 | %define XSTATE_SIZE 8192
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148 |
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149 | ;; Note! Updates here must be reflected in CPUMInternal.mac too!
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150 | struc CPUMCTX
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151 | .eax resq 1
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152 | .ecx resq 1
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153 | .edx resq 1
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154 | .ebx resq 1
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155 | .esp resq 1
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156 | .ebp resq 1
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157 | .esi resq 1
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158 | .edi resq 1
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159 | .r8 resq 1
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160 | .r9 resq 1
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161 | .r10 resq 1
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162 | .r11 resq 1
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163 | .r12 resq 1
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164 | .r13 resq 1
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165 | .r14 resq 1
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166 | .r15 resq 1
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167 | .es.Sel resw 1
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168 | .es.PaddingSel resw 1
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169 | .es.ValidSel resw 1
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170 | .es.fFlags resw 1
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171 | .es.u64Base resq 1
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172 | .es.u32Limit resd 1
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173 | .es.Attr resd 1
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174 | .cs.Sel resw 1
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175 | .cs.PaddingSel resw 1
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176 | .cs.ValidSel resw 1
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177 | .cs.fFlags resw 1
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178 | .cs.u64Base resq 1
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179 | .cs.u32Limit resd 1
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180 | .cs.Attr resd 1
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181 | .ss.Sel resw 1
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182 | .ss.PaddingSel resw 1
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183 | .ss.ValidSel resw 1
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184 | .ss.fFlags resw 1
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185 | .ss.u64Base resq 1
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186 | .ss.u32Limit resd 1
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187 | .ss.Attr resd 1
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188 | .ds.Sel resw 1
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189 | .ds.PaddingSel resw 1
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190 | .ds.ValidSel resw 1
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191 | .ds.fFlags resw 1
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192 | .ds.u64Base resq 1
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193 | .ds.u32Limit resd 1
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194 | .ds.Attr resd 1
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195 | .fs.Sel resw 1
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196 | .fs.PaddingSel resw 1
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197 | .fs.ValidSel resw 1
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198 | .fs.fFlags resw 1
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199 | .fs.u64Base resq 1
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200 | .fs.u32Limit resd 1
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201 | .fs.Attr resd 1
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202 | .gs.Sel resw 1
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203 | .gs.PaddingSel resw 1
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204 | .gs.ValidSel resw 1
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205 | .gs.fFlags resw 1
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206 | .gs.u64Base resq 1
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207 | .gs.u32Limit resd 1
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208 | .gs.Attr resd 1
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209 | .eip resq 1
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210 | .eflags resq 1
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211 | .cr0 resq 1
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212 | .cr2 resq 1
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213 | .cr3 resq 1
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214 | .cr4 resq 1
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215 | .dr resq 8
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216 | .gdtrPadding resw 3
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217 | .gdtr resw 0
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218 | .gdtr.cbGdt resw 1
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219 | .gdtr.pGdt resq 1
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220 | .idtrPadding resw 3
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221 | .idtr resw 0
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222 | .idtr.cbIdt resw 1
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223 | .idtr.pIdt resq 1
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224 | .ldtr.Sel resw 1
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225 | .ldtr.PaddingSel resw 1
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226 | .ldtr.ValidSel resw 1
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227 | .ldtr.fFlags resw 1
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228 | .ldtr.u64Base resq 1
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229 | .ldtr.u32Limit resd 1
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230 | .ldtr.Attr resd 1
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231 | .tr.Sel resw 1
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232 | .tr.PaddingSel resw 1
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233 | .tr.ValidSel resw 1
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234 | .tr.fFlags resw 1
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235 | .tr.u64Base resq 1
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236 | .tr.u32Limit resd 1
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237 | .tr.Attr resd 1
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238 | .SysEnter.cs resb 8
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239 | .SysEnter.eip resb 8
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240 | .SysEnter.esp resb 8
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241 | .msrEFER resb 8
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242 | .msrSTAR resb 8
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243 | .msrPAT resb 8
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244 | .msrLSTAR resb 8
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245 | .msrCSTAR resb 8
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246 | .msrSFMASK resb 8
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247 | .msrKERNELGSBASE resb 8
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248 | .uMsrPadding0 resb 8
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249 | alignb 8
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250 | .aXcr resq 2
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251 | .fXStateMask resq 1
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252 | .pXStateR0 RTR0PTR_RES 1
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253 | alignb 8
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254 | .pXStateR3 RTR3PTR_RES 1
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255 | alignb 8
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256 | .pXStateRC RTRCPTR_RES 1
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257 | .aoffXState resw 64
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258 | .fWorldSwitcher resd 1
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259 | .fExtrn resq 1
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260 | alignb 8
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261 | .hwvirt.svm.uMsrHSavePa resq 1
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262 | .hwvirt.svm.GCPhysVmcb resq 1
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263 | .hwvirt.svm.pVmcbR0 RTR0PTR_RES 1
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264 | alignb 8
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265 | .hwvirt.svm.pVmcbR3 RTR3PTR_RES 1
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266 | alignb 8
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267 | .hwvirt.svm.HostState resb 184
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268 | .hwvirt.svm.uPrevPauseTick resq 1
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269 | .hwvirt.svm.cPauseFilter resw 1
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270 | .hwvirt.svm.cPauseFilterThreshold resw 1
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271 | .hwvirt.svm.fInterceptEvents resb 1
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272 | alignb 8
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273 | .hwvirt.svm.pvMsrBitmapR0 RTR0PTR_RES 1
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274 | alignb 8
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275 | .hwvirt.svm.pvMsrBitmapR3 RTR3PTR_RES 1
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276 | alignb 8
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277 | .hwvirt.svm.pvIoBitmapR0 RTR0PTR_RES 1
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278 | alignb 8
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279 | .hwvirt.svm.pvIoBitmapR3 RTR3PTR_RES 1
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280 | alignb 8
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281 | .hwvirt.svm.HCPhysVmcb RTHCPHYS_RES 1
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282 | .hwvirt.svm.au64Padding0 resq 33
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283 | .hwvirt.enmHwvirt resd 1
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284 | .hwvirt.fGif resb 1
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285 | alignb 8
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286 | .hwvirt.fLocalForcedActions resd 1
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287 | alignb 64
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288 | endstruc
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289 |
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290 | %define CPUMCTX_WSF_IBPB_EXIT RT_BIT_32(0)
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291 | %define CPUMCTX_WSF_IBPB_ENTRY RT_BIT_32(1)
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292 | %define CPUMCTX_WSF_L1D_ENTRY RT_BIT_32(2)
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293 | %define CPUMCTX_WSF_MDS_ENTRY RT_BIT_32(3)
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294 |
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295 |
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296 | %define CPUMSELREG_FLAGS_VALID 0x0001
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297 | %define CPUMSELREG_FLAGS_STALE 0x0002
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298 | %define CPUMSELREG_FLAGS_VALID_MASK 0x0003
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299 |
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300 |
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301 | ;;
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302 | ; Guest MSR state.
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303 | struc CPUMCTXMSRS
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304 | .au64 resq 64
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305 | endstruc
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306 |
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307 |
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308 | %endif
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309 |
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