VirtualBox

source: vbox/trunk/include/VBox/vmm/em.h@ 72569

Last change on this file since 72569 was 72569, checked in by vboxsync, 6 years ago

EM,IEM,NEM: Started working on optimizing adjacent exits using IEM. Keep track of frequent exits, after 256 hits do a trial run in IEM to look for adjacent exits. Proof of concept using CPUID in NEMR3/win. bugref:9044
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File size: 17.6 KB
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1/** @file
2 * EM - Execution Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_em_h
27#define ___VBox_vmm_em_h
28
29#include <VBox/types.h>
30#include <VBox/vmm/trpm.h>
31
32
33RT_C_DECLS_BEGIN
34
35/** @defgroup grp_em The Execution Monitor / Manager API
36 * @ingroup grp_vmm
37 * @{
38 */
39
40/** Enable to allow V86 code to run in raw mode. */
41#define VBOX_RAW_V86
42
43/**
44 * The Execution Manager State.
45 *
46 * @remarks This is used in the saved state!
47 */
48typedef enum EMSTATE
49{
50 /** Not yet started. */
51 EMSTATE_NONE = 1,
52 /** Raw-mode execution. */
53 EMSTATE_RAW,
54 /** Hardware accelerated raw-mode execution. */
55 EMSTATE_HM,
56 /** Executing in IEM. */
57 EMSTATE_IEM,
58 /** Recompiled mode execution. */
59 EMSTATE_REM,
60 /** Execution is halted. (waiting for interrupt) */
61 EMSTATE_HALTED,
62 /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
63 EMSTATE_WAIT_SIPI,
64 /** Execution is suspended. */
65 EMSTATE_SUSPENDED,
66 /** The VM is terminating. */
67 EMSTATE_TERMINATING,
68 /** Guest debug event from raw-mode is being processed. */
69 EMSTATE_DEBUG_GUEST_RAW,
70 /** Guest debug event from hardware accelerated mode is being processed. */
71 EMSTATE_DEBUG_GUEST_HM,
72 /** Guest debug event from interpreted execution mode is being processed. */
73 EMSTATE_DEBUG_GUEST_IEM,
74 /** Guest debug event from recompiled-mode is being processed. */
75 EMSTATE_DEBUG_GUEST_REM,
76 /** Hypervisor debug event being processed. */
77 EMSTATE_DEBUG_HYPER,
78 /** The VM has encountered a fatal error. (And everyone is panicing....) */
79 EMSTATE_GURU_MEDITATION,
80 /** Executing in IEM, falling back on REM if we cannot switch back to HM or
81 * RAW after a short while. */
82 EMSTATE_IEM_THEN_REM,
83 /** Executing in native (API) execution monitor. */
84 EMSTATE_NEM,
85 /** Guest debug event from NEM mode is being processed. */
86 EMSTATE_DEBUG_GUEST_NEM,
87 /** Just a hack to ensure that we get a 32-bit integer. */
88 EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
89} EMSTATE;
90
91
92/**
93 * EMInterpretInstructionCPU execution modes.
94 */
95typedef enum
96{
97 /** Only supervisor code (CPL=0). */
98 EMCODETYPE_SUPERVISOR,
99 /** User-level code only. */
100 EMCODETYPE_USER,
101 /** Supervisor and user-level code (use with great care!). */
102 EMCODETYPE_ALL,
103 /** Just a hack to ensure that we get a 32-bit integer. */
104 EMCODETYPE_32BIT_HACK = 0x7fffffff
105} EMCODETYPE;
106
107VMM_INT_DECL(EMSTATE) EMGetState(PVMCPU pVCpu);
108VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
109
110/** @name Callback handlers for instruction emulation functions.
111 * These are placed here because IOM wants to use them as well.
112 * @{
113 */
114typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
115typedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
116typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
117typedef FNEMULATEPARAM2 *PFNEMULATEPARAM2;
118typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
119typedef FNEMULATEPARAM3 *PFNEMULATEPARAM3;
120typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
121typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2;
122typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
123typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3;
124/** @} */
125
126
127/**
128 * Checks if raw ring-3 execute mode is enabled.
129 *
130 * @returns true if enabled.
131 * @returns false if disabled.
132 * @param pVM The cross context VM structure.
133 */
134#define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
135
136/**
137 * Checks if raw ring-0 execute mode is enabled.
138 *
139 * @returns true if enabled.
140 * @returns false if disabled.
141 * @param pVM The cross context VM structure.
142 */
143#define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
144
145#ifdef VBOX_WITH_RAW_RING1
146/**
147 * Checks if raw ring-1 execute mode is enabled.
148 *
149 * @returns true if enabled.
150 * @returns false if disabled.
151 * @param pVM The cross context VM structure.
152 */
153# define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
154#else
155# define EMIsRawRing1Enabled(pVM) false
156#endif
157
158/**
159 * Checks if execution with hardware assisted virtualization is enabled.
160 *
161 * @returns true if enabled.
162 * @returns false if disabled.
163 * @param pVM The cross context VM structure.
164 */
165#define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
166
167/**
168 * Checks if execution of supervisor code should be done in the
169 * recompiler or not.
170 *
171 * @returns true if enabled.
172 * @returns false if disabled.
173 * @param pVM The cross context VM structure.
174 */
175#define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
176
177VMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
178VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
179VMMDECL(void) EMSetHypercallInstructionsEnabled(PVMCPU pVCpu, bool fEnabled);
180VMMDECL(bool) EMAreHypercallInstructionsEnabled(PVMCPU pVCpu);
181VMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
182VMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
183VMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
184VMM_INT_DECL(bool) EMMonitorIsArmed(PVMCPU pVCpu);
185VMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
186VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPU pVCpuDst);
187VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortWrite(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue, uint32_t uValue);
188VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortRead(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue);
189
190/**
191 * Common defined exit types that EM knows what to do about.
192 *
193 * These should be used instead of the VT-x, SVM or NEM specific ones for exits
194 * worth optimizing.
195 */
196typedef enum EMEXITTYPE
197{
198 EMEXITTYPE_INVALID = 0,
199 EMEXITTYPE_IO_PORT_READ,
200 EMEXITTYPE_IO_PORT_WRITE,
201 EMEXITTYPE_IO_PORT_STR_READ,
202 EMEXITTYPE_IO_PORT_STR_WRITE,
203 EMEXITTYPE_MMIO_READ,
204 EMEXITTYPE_MMIO_WRITE,
205 EMEXITTYPE_MSR_READ,
206 EMEXITTYPE_MSR_WRITE,
207 EMEXITTYPE_CPUID,
208 EMEXITTYPE_RDTSC,
209 EMEXITTYPE_MOV_CRX,
210 EMEXITTYPE_MOV_DRX,
211
212 /** @name Raw-mode only (for now), keep at end.
213 * @{ */
214 EMEXITTYPE_INVLPG,
215 EMEXITTYPE_LLDT,
216 EMEXITTYPE_RDPMC,
217 EMEXITTYPE_CLTS,
218 EMEXITTYPE_STI,
219 EMEXITTYPE_INT,
220 EMEXITTYPE_SYSCALL,
221 EMEXITTYPE_SYSENTER,
222 EMEXITTYPE_HLT
223 /** @} */
224} EMEXITTYPE;
225AssertCompileSize(EMEXITTYPE, 4);
226
227/** @name EMEXIT_F_XXX - EM exit flags.
228 *
229 * The flags the exit type are combined to a 32-bit number using the
230 * EMEXIT_MAKE_FLAGS_AND_TYPE() macro.
231 *
232 * @{ */
233#define EMEXIT_F_TYPE_MASK UINT32_C(0x00000fff) /**< The exit type mask. */
234#define EMEXIT_F_KIND_EM UINT32_C(0x00000000) /**< EMEXITTYPE */
235#define EMEXIT_F_KIND_VMX UINT32_C(0x00001000) /**< VT-x exit codes. */
236#define EMEXIT_F_KIND_SVM UINT32_C(0x00002000) /**< SVM exit codes. */
237#define EMEXIT_F_KIND_NEM UINT32_C(0x00003000) /**< NEMEXITTYPE */
238#define EMEXIT_F_KIND_XCPT UINT32_C(0x00004000) /**< Exception numbers (raw-mode). */
239#define EMEXIT_F_KIND_MASK UINT32_C(0x00007000)
240#define EMEXIT_F_CS_EIP UINT32_C(0x00010000) /**< The PC is EIP in the low dword and CS in the high. */
241#define EMEXIT_F_UNFLATTENED_PC UINT32_C(0x00020000) /**< The PC hasn't had CS.BASE added to it. */
242/** Combines flags and exit type into EMHistoryAddExit() input. */
243#define EMEXIT_MAKE_FLAGS_AND_TYPE(a_fFlags, a_uType) ((a_fFlags) | (uint32_t)(a_uType))
244/** @} */
245
246typedef enum EMEXITACTION
247{
248 /** The record is free. */
249 EMEXITACTION_FREE_RECORD = 0,
250 /** Take normal action on the exit. */
251 EMEXITACTION_NORMAL,
252 /** Take normal action on the exit, already probed and found nothing. */
253 EMEXITACTION_NORMAL_PROBED,
254 /** Do a probe execution. */
255 EMEXITACTION_EXEC_PROBE,
256 /** Execute using EMEXITREC::cMaxInstructionsWithoutExit. */
257 EMEXITACTION_EXEC_WITH_MAX
258} EMEXITACTION;
259AssertCompileSize(EMEXITACTION, 4);
260
261/**
262 * Accumulative exit record.
263 *
264 * This could perhaps be squeezed down a bit, but there isn't too much point.
265 * We'll probably need more data as time goes by.
266 */
267typedef struct EMEXITREC
268{
269 /** The flat PC of the exit. */
270 uint64_t uFlatPC;
271 /** Flags and type, see EMEXIT_MAKE_FLAGS_AND_TYPE. */
272 uint32_t uFlagsAndType;
273 /** The action to take (EMEXITACTION). */
274 uint8_t enmAction;
275 uint8_t bUnused;
276 /** Maximum number of instructions to execute without hitting an exit. */
277 uint16_t cMaxInstructionsWithoutExit;
278 /** The exit number (EMCPU::iNextExit) at which it was last updated. */
279 uint64_t uLastExitNo;
280 /** Number of hits. */
281 uint64_t cHits;
282} EMEXITREC;
283AssertCompileSize(EMEXITREC, 32);
284/** Pointer to an accumulative exit record. */
285typedef EMEXITREC *PEMEXITREC;
286/** Pointer to a const accumulative exit record. */
287typedef EMEXITREC const *PCEMEXITREC;
288
289VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);
290#ifdef IN_RC
291VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip,
292 uint64_t uTimestamp);
293#endif
294#ifdef IN_RING0
295VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened);
296#endif
297VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);
298VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);
299VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);
300
301
302/** @name Deprecated interpretation related APIs (use IEM).
303 * @{ */
304VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
305VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
306 PDISCPUSTATE pDISState, unsigned *pcbInstr);
307VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
308VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
309VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
310 RTGCPTR pvFault, EMCODETYPE enmCodeType);
311#ifdef IN_RC
312VMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
313#endif
314VMM_INT_DECL(int) EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
315VMM_INT_DECL(int) EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
316VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
317VMM_INT_DECL(int) EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
318VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
319VMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
320VMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
321VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
322VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
323VMM_INT_DECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
324VMM_INT_DECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
325/** @} */
326
327/** @name Assembly routines
328 * @{ */
329VMMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
330VMMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
331VMMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb);
332VMMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb);
333VMMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
334VMMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
335VMMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
336VMMDECL(int) EMEmulateLockXor(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
337VMMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
338VMMDECL(int) EMEmulateLockAnd(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
339VMMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
340VMMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
341VMMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
342VMMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
343VMMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2);
344VMMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
345VMMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
346VMMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
347VMMDECL(uint32_t) EMEmulateCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
348VMMDECL(uint32_t) EMEmulateLockCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
349VMMDECL(uint32_t) EMEmulateXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
350VMMDECL(uint32_t) EMEmulateLockXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
351/** @} */
352
353/** @name REM locking routines
354 * @{ */
355VMMDECL(void) EMRemUnlock(PVM pVM);
356VMMDECL(void) EMRemLock(PVM pVM);
357VMMDECL(bool) EMRemIsLockOwner(PVM pVM);
358VMM_INT_DECL(int) EMRemTryLock(PVM pVM);
359/** @} */
360
361
362/** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
363 * @{ */
364/** Return when CS:RIP changes or some other important event happens.
365 * This means running whole REP and LOOP $ sequences for instance. */
366#define EM_ONE_INS_FLAGS_RIP_CHANGE RT_BIT_32(0)
367/** Mask of valid flags. */
368#define EM_ONE_INS_FLAGS_MASK UINT32_C(0x00000001)
369/** @} */
370
371
372#ifdef IN_RING3
373/** @defgroup grp_em_r3 The EM Host Context Ring-3 API
374 * @{
375 */
376
377/**
378 * Command argument for EMR3RawSetMode().
379 *
380 * It's possible to extend this interface to change several
381 * execution modes at once should the need arise.
382 */
383typedef enum EMEXECPOLICY
384{
385 /** The customary invalid zero entry. */
386 EMEXECPOLICY_INVALID = 0,
387 /** Whether to recompile ring-0 code or execute it in raw/hm. */
388 EMEXECPOLICY_RECOMPILE_RING0,
389 /** Whether to recompile ring-3 code or execute it in raw/hm. */
390 EMEXECPOLICY_RECOMPILE_RING3,
391 /** Whether to only use IEM for execution. */
392 EMEXECPOLICY_IEM_ALL,
393 /** End of valid value (not included). */
394 EMEXECPOLICY_END,
395 /** The customary 32-bit type blowup. */
396 EMEXECPOLICY_32BIT_HACK = 0x7fffffff
397} EMEXECPOLICY;
398VMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
399VMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
400VMMR3DECL(int) EMR3QueryMainExecutionEngine(PUVM pUVM, uint8_t *pbMainExecutionEngine);
401
402VMMR3_INT_DECL(int) EMR3Init(PVM pVM);
403VMMR3_INT_DECL(void) EMR3Relocate(PVM pVM);
404VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu);
405VMMR3_INT_DECL(void) EMR3Reset(PVM pVM);
406VMMR3_INT_DECL(int) EMR3Term(PVM pVM);
407VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
408VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
409VMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
410VMMR3_INT_DECL(int) EMR3NotifyResume(PVM pVM);
411VMMR3_INT_DECL(int) EMR3NotifySuspend(PVM pVM);
412VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
413
414/** @} */
415#endif /* IN_RING3 */
416
417/** @} */
418
419RT_C_DECLS_END
420
421#endif
422
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