1 | /** @file
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2 | * EM - Execution Monitor.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2017 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef ___VBox_vmm_em_h
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27 | #define ___VBox_vmm_em_h
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28 |
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29 | #include <VBox/types.h>
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30 | #include <VBox/vmm/trpm.h>
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31 | #include <VBox/vmm/vmapi.h>
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32 |
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33 |
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34 | RT_C_DECLS_BEGIN
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35 |
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36 | /** @defgroup grp_em The Execution Monitor / Manager API
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37 | * @ingroup grp_vmm
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38 | * @{
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39 | */
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40 |
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41 | /** Enable to allow V86 code to run in raw mode. */
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42 | #define VBOX_RAW_V86
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43 |
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44 | /**
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45 | * The Execution Manager State.
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46 | *
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47 | * @remarks This is used in the saved state!
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48 | */
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49 | typedef enum EMSTATE
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50 | {
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51 | /** Not yet started. */
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52 | EMSTATE_NONE = 1,
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53 | /** Raw-mode execution. */
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54 | EMSTATE_RAW,
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55 | /** Hardware accelerated raw-mode execution. */
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56 | EMSTATE_HM,
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57 | /** Executing in IEM. */
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58 | EMSTATE_IEM,
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59 | /** Recompiled mode execution. */
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60 | EMSTATE_REM,
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61 | /** Execution is halted. (waiting for interrupt) */
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62 | EMSTATE_HALTED,
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63 | /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
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64 | EMSTATE_WAIT_SIPI,
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65 | /** Execution is suspended. */
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66 | EMSTATE_SUSPENDED,
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67 | /** The VM is terminating. */
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68 | EMSTATE_TERMINATING,
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69 | /** Guest debug event from raw-mode is being processed. */
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70 | EMSTATE_DEBUG_GUEST_RAW,
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71 | /** Guest debug event from hardware accelerated mode is being processed. */
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72 | EMSTATE_DEBUG_GUEST_HM,
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73 | /** Guest debug event from interpreted execution mode is being processed. */
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74 | EMSTATE_DEBUG_GUEST_IEM,
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75 | /** Guest debug event from recompiled-mode is being processed. */
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76 | EMSTATE_DEBUG_GUEST_REM,
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77 | /** Hypervisor debug event being processed. */
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78 | EMSTATE_DEBUG_HYPER,
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79 | /** The VM has encountered a fatal error. (And everyone is panicing....) */
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80 | EMSTATE_GURU_MEDITATION,
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81 | /** Executing in IEM, falling back on REM if we cannot switch back to HM or
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82 | * RAW after a short while. */
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83 | EMSTATE_IEM_THEN_REM,
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84 | /** Executing in native (API) execution monitor. */
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85 | EMSTATE_NEM,
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86 | /** Guest debug event from NEM mode is being processed. */
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87 | EMSTATE_DEBUG_GUEST_NEM,
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88 | /** Just a hack to ensure that we get a 32-bit integer. */
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89 | EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
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90 | } EMSTATE;
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91 |
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92 |
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93 | /**
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94 | * EMInterpretInstructionCPU execution modes.
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95 | */
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96 | typedef enum
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97 | {
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98 | /** Only supervisor code (CPL=0). */
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99 | EMCODETYPE_SUPERVISOR,
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100 | /** User-level code only. */
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101 | EMCODETYPE_USER,
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102 | /** Supervisor and user-level code (use with great care!). */
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103 | EMCODETYPE_ALL,
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104 | /** Just a hack to ensure that we get a 32-bit integer. */
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105 | EMCODETYPE_32BIT_HACK = 0x7fffffff
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106 | } EMCODETYPE;
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107 |
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108 | VMM_INT_DECL(EMSTATE) EMGetState(PVMCPU pVCpu);
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109 | VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
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110 |
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111 | /** @name Callback handlers for instruction emulation functions.
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112 | * These are placed here because IOM wants to use them as well.
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113 | * @{
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114 | */
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115 | typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
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116 | typedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
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117 | typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
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118 | typedef FNEMULATEPARAM2 *PFNEMULATEPARAM2;
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119 | typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
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120 | typedef FNEMULATEPARAM3 *PFNEMULATEPARAM3;
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121 | typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
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122 | typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2;
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123 | typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
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124 | typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3;
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125 | /** @} */
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126 |
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127 |
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128 | /**
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129 | * Checks if raw ring-3 execute mode is enabled.
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130 | *
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131 | * @returns true if enabled.
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132 | * @returns false if disabled.
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133 | * @param pVM The cross context VM structure.
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134 | */
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135 | #define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
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136 |
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137 | /**
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138 | * Checks if raw ring-0 execute mode is enabled.
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139 | *
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140 | * @returns true if enabled.
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141 | * @returns false if disabled.
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142 | * @param pVM The cross context VM structure.
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143 | */
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144 | #define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
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145 |
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146 | #ifdef VBOX_WITH_RAW_RING1
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147 | /**
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148 | * Checks if raw ring-1 execute mode is enabled.
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149 | *
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150 | * @returns true if enabled.
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151 | * @returns false if disabled.
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152 | * @param pVM The cross context VM structure.
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153 | */
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154 | # define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
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155 | #else
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156 | # define EMIsRawRing1Enabled(pVM) false
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157 | #endif
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158 |
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159 | /**
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160 | * Checks if execution with hardware assisted virtualization is enabled.
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161 | *
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162 | * @returns true if enabled.
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163 | * @returns false if disabled.
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164 | * @param pVM The cross context VM structure.
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165 | */
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166 | #define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
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167 |
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168 | /**
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169 | * Checks if execution of supervisor code should be done in the
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170 | * recompiler or not.
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171 | *
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172 | * @returns true if enabled.
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173 | * @returns false if disabled.
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174 | * @param pVM The cross context VM structure.
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175 | */
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176 | #define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
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177 |
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178 | VMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
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179 | VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
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180 | VMMDECL(void) EMSetHypercallInstructionsEnabled(PVMCPU pVCpu, bool fEnabled);
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181 | VMMDECL(bool) EMAreHypercallInstructionsEnabled(PVMCPU pVCpu);
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182 | VMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
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183 | VMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
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184 | VMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
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185 | VMM_INT_DECL(bool) EMMonitorIsArmed(PVMCPU pVCpu);
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186 | VMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
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187 | VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPU pVCpuDst);
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188 | VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortWrite(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue, uint32_t uValue);
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189 | VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortRead(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue);
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190 |
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191 | /**
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192 | * Common defined exit types that EM knows what to do about.
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193 | *
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194 | * These should be used instead of the VT-x, SVM or NEM specific ones for exits
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195 | * worth optimizing.
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196 | */
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197 | typedef enum EMEXITTYPE
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198 | {
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199 | EMEXITTYPE_INVALID = 0,
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200 | EMEXITTYPE_IO_PORT_READ,
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201 | EMEXITTYPE_IO_PORT_WRITE,
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202 | EMEXITTYPE_IO_PORT_STR_READ,
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203 | EMEXITTYPE_IO_PORT_STR_WRITE,
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204 | EMEXITTYPE_MMIO,
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205 | EMEXITTYPE_MMIO_READ,
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206 | EMEXITTYPE_MMIO_WRITE,
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207 | EMEXITTYPE_MSR_READ,
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208 | EMEXITTYPE_MSR_WRITE,
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209 | EMEXITTYPE_CPUID,
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210 | EMEXITTYPE_RDTSC,
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211 | EMEXITTYPE_MOV_CRX,
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212 | EMEXITTYPE_MOV_DRX,
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213 |
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214 | /** @name Raw-mode only (for now), keep at end.
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215 | * @{ */
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216 | EMEXITTYPE_INVLPG,
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217 | EMEXITTYPE_LLDT,
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218 | EMEXITTYPE_RDPMC,
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219 | EMEXITTYPE_CLTS,
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220 | EMEXITTYPE_STI,
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221 | EMEXITTYPE_INT,
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222 | EMEXITTYPE_SYSCALL,
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223 | EMEXITTYPE_SYSENTER,
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224 | EMEXITTYPE_HLT
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225 | /** @} */
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226 | } EMEXITTYPE;
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227 | AssertCompileSize(EMEXITTYPE, 4);
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228 |
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229 | /** @name EMEXIT_F_XXX - EM exit flags.
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230 | *
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231 | * The flags the exit type are combined to a 32-bit number using the
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232 | * EMEXIT_MAKE_FLAGS_AND_TYPE() macro.
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233 | *
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234 | * @{ */
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235 | #define EMEXIT_F_TYPE_MASK UINT32_C(0x00000fff) /**< The exit type mask. */
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236 | #define EMEXIT_F_KIND_EM UINT32_C(0x00000000) /**< EMEXITTYPE */
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237 | #define EMEXIT_F_KIND_VMX UINT32_C(0x00001000) /**< VT-x exit codes. */
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238 | #define EMEXIT_F_KIND_SVM UINT32_C(0x00002000) /**< SVM exit codes. */
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239 | #define EMEXIT_F_KIND_NEM UINT32_C(0x00003000) /**< NEMEXITTYPE */
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240 | #define EMEXIT_F_KIND_XCPT UINT32_C(0x00004000) /**< Exception numbers (raw-mode). */
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241 | #define EMEXIT_F_KIND_MASK UINT32_C(0x00007000)
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242 | #define EMEXIT_F_CS_EIP UINT32_C(0x00010000) /**< The PC is EIP in the low dword and CS in the high. */
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243 | #define EMEXIT_F_UNFLATTENED_PC UINT32_C(0x00020000) /**< The PC hasn't had CS.BASE added to it. */
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244 | /** Preemption is currently disabled (or we're using preemption hooks). */
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245 | #define EMEXIT_F_PREEMPT_DISABLED UINT32_C(0x00040000)
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246 | /** Combines flags and exit type into EMHistoryAddExit() input. */
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247 | #define EMEXIT_MAKE_FLAGS_AND_TYPE(a_fFlags, a_uType) ((a_fFlags) | (uint32_t)(a_uType))
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248 | /** @} */
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249 |
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250 | typedef enum EMEXITACTION
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251 | {
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252 | /** The record is free. */
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253 | EMEXITACTION_FREE_RECORD = 0,
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254 | /** Take normal action on the exit. */
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255 | EMEXITACTION_NORMAL,
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256 | /** Take normal action on the exit, already probed and found nothing. */
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257 | EMEXITACTION_NORMAL_PROBED,
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258 | /** Do a probe execution. */
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259 | EMEXITACTION_EXEC_PROBE,
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260 | /** Execute using EMEXITREC::cMaxInstructionsWithoutExit. */
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261 | EMEXITACTION_EXEC_WITH_MAX
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262 | } EMEXITACTION;
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263 | AssertCompileSize(EMEXITACTION, 4);
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264 |
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265 | /**
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266 | * Accumulative exit record.
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267 | *
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268 | * This could perhaps be squeezed down a bit, but there isn't too much point.
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269 | * We'll probably need more data as time goes by.
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270 | */
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271 | typedef struct EMEXITREC
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272 | {
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273 | /** The flat PC of the exit. */
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274 | uint64_t uFlatPC;
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275 | /** Flags and type, see EMEXIT_MAKE_FLAGS_AND_TYPE. */
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276 | uint32_t uFlagsAndType;
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277 | /** The action to take (EMEXITACTION). */
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278 | uint8_t enmAction;
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279 | uint8_t bUnused;
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280 | /** Maximum number of instructions to execute without hitting an exit. */
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281 | uint16_t cMaxInstructionsWithoutExit;
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282 | /** The exit number (EMCPU::iNextExit) at which it was last updated. */
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283 | uint64_t uLastExitNo;
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284 | /** Number of hits. */
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285 | uint64_t cHits;
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286 | } EMEXITREC;
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287 | AssertCompileSize(EMEXITREC, 32);
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288 | /** Pointer to an accumulative exit record. */
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289 | typedef EMEXITREC *PEMEXITREC;
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290 | /** Pointer to a const accumulative exit record. */
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291 | typedef EMEXITREC const *PCEMEXITREC;
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292 |
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293 | VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);
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294 | #ifdef IN_RC
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295 | VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip,
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296 | uint64_t uTimestamp);
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297 | #endif
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298 | #ifdef IN_RING0
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299 | VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened);
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300 | #endif
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301 | VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);
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302 | VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);
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303 | VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);
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304 |
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305 |
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306 | /** @name Deprecated interpretation related APIs (use IEM).
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307 | * @{ */
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308 | VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
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309 | VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
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310 | PDISCPUSTATE pDISState, unsigned *pcbInstr);
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311 | VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
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312 | VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
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313 | VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
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314 | RTGCPTR pvFault, EMCODETYPE enmCodeType);
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315 | #ifdef IN_RC
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316 | VMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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317 | #endif
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318 | VMM_INT_DECL(int) EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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319 | VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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320 | VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
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321 | VMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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322 | VMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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323 | VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
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324 | VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
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325 | VMM_INT_DECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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326 | VMM_INT_DECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
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327 | /** @} */
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328 |
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329 | /** @name Assembly routines
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330 | * @{ */
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331 | VMMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
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332 | VMMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
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333 | VMMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb);
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334 | VMMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb);
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335 | VMMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
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336 | VMMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
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337 | VMMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
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338 | VMMDECL(int) EMEmulateLockXor(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
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339 | VMMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
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340 | VMMDECL(int) EMEmulateLockAnd(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
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341 | VMMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
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342 | VMMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
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343 | VMMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
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344 | VMMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
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345 | VMMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2);
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346 | VMMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
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347 | VMMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
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348 | VMMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
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349 | VMMDECL(uint32_t) EMEmulateCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
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350 | VMMDECL(uint32_t) EMEmulateLockCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
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351 | VMMDECL(uint32_t) EMEmulateXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
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352 | VMMDECL(uint32_t) EMEmulateLockXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
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353 | /** @} */
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354 |
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355 | /** @name REM locking routines
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356 | * @{ */
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357 | VMMDECL(void) EMRemUnlock(PVM pVM);
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358 | VMMDECL(void) EMRemLock(PVM pVM);
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359 | VMMDECL(bool) EMRemIsLockOwner(PVM pVM);
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360 | VMM_INT_DECL(int) EMRemTryLock(PVM pVM);
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361 | /** @} */
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362 |
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363 |
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364 | /** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
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365 | * @{ */
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366 | /** Return when CS:RIP changes or some other important event happens.
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367 | * This means running whole REP and LOOP $ sequences for instance. */
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368 | #define EM_ONE_INS_FLAGS_RIP_CHANGE RT_BIT_32(0)
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369 | /** Mask of valid flags. */
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370 | #define EM_ONE_INS_FLAGS_MASK UINT32_C(0x00000001)
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371 | /** @} */
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372 |
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373 |
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374 | #ifdef IN_RING0
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375 | /** @defgroup grp_em_r0 The EM Host Context Ring-0 API
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376 | * @{ */
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377 | VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVM pVM);
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378 | /** @} */
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379 | #endif
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380 |
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381 |
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382 | #ifdef IN_RING3
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383 | /** @defgroup grp_em_r3 The EM Host Context Ring-3 API
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384 | * @{
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385 | */
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386 |
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387 | /**
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388 | * Command argument for EMR3RawSetMode().
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389 | *
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390 | * It's possible to extend this interface to change several
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391 | * execution modes at once should the need arise.
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392 | */
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393 | typedef enum EMEXECPOLICY
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394 | {
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395 | /** The customary invalid zero entry. */
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396 | EMEXECPOLICY_INVALID = 0,
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397 | /** Whether to recompile ring-0 code or execute it in raw/hm. */
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398 | EMEXECPOLICY_RECOMPILE_RING0,
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399 | /** Whether to recompile ring-3 code or execute it in raw/hm. */
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400 | EMEXECPOLICY_RECOMPILE_RING3,
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401 | /** Whether to only use IEM for execution. */
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402 | EMEXECPOLICY_IEM_ALL,
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403 | /** End of valid value (not included). */
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404 | EMEXECPOLICY_END,
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405 | /** The customary 32-bit type blowup. */
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406 | EMEXECPOLICY_32BIT_HACK = 0x7fffffff
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407 | } EMEXECPOLICY;
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408 | VMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
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409 | VMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
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410 | VMMR3DECL(int) EMR3QueryMainExecutionEngine(PUVM pUVM, uint8_t *pbMainExecutionEngine);
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411 |
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412 | VMMR3_INT_DECL(int) EMR3Init(PVM pVM);
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413 | VMMR3_INT_DECL(int) EMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
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414 | VMMR3_INT_DECL(void) EMR3Relocate(PVM pVM);
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415 | VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu);
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416 | VMMR3_INT_DECL(void) EMR3Reset(PVM pVM);
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417 | VMMR3_INT_DECL(int) EMR3Term(PVM pVM);
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418 | VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
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419 | VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
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420 | VMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
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421 | VMMR3_INT_DECL(int) EMR3NotifyResume(PVM pVM);
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422 | VMMR3_INT_DECL(int) EMR3NotifySuspend(PVM pVM);
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423 | VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
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424 |
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425 | /** @} */
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426 | #endif /* IN_RING3 */
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427 |
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428 | /** @} */
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429 |
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430 | RT_C_DECLS_END
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431 |
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432 | #endif
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433 |
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