VirtualBox

source: vbox/trunk/include/VBox/vmm/em.h@ 72642

Last change on this file since 72642 was 72642, checked in by vboxsync, 6 years ago

EM,IEM,VMX: Working on configuring exit history optimziations. Currently enabled in ring-0 for NEM but disabled for HM. bugref:9198

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1/** @file
2 * EM - Execution Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_em_h
27#define ___VBox_vmm_em_h
28
29#include <VBox/types.h>
30#include <VBox/vmm/trpm.h>
31#include <VBox/vmm/vmapi.h>
32
33
34RT_C_DECLS_BEGIN
35
36/** @defgroup grp_em The Execution Monitor / Manager API
37 * @ingroup grp_vmm
38 * @{
39 */
40
41/** Enable to allow V86 code to run in raw mode. */
42#define VBOX_RAW_V86
43
44/**
45 * The Execution Manager State.
46 *
47 * @remarks This is used in the saved state!
48 */
49typedef enum EMSTATE
50{
51 /** Not yet started. */
52 EMSTATE_NONE = 1,
53 /** Raw-mode execution. */
54 EMSTATE_RAW,
55 /** Hardware accelerated raw-mode execution. */
56 EMSTATE_HM,
57 /** Executing in IEM. */
58 EMSTATE_IEM,
59 /** Recompiled mode execution. */
60 EMSTATE_REM,
61 /** Execution is halted. (waiting for interrupt) */
62 EMSTATE_HALTED,
63 /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
64 EMSTATE_WAIT_SIPI,
65 /** Execution is suspended. */
66 EMSTATE_SUSPENDED,
67 /** The VM is terminating. */
68 EMSTATE_TERMINATING,
69 /** Guest debug event from raw-mode is being processed. */
70 EMSTATE_DEBUG_GUEST_RAW,
71 /** Guest debug event from hardware accelerated mode is being processed. */
72 EMSTATE_DEBUG_GUEST_HM,
73 /** Guest debug event from interpreted execution mode is being processed. */
74 EMSTATE_DEBUG_GUEST_IEM,
75 /** Guest debug event from recompiled-mode is being processed. */
76 EMSTATE_DEBUG_GUEST_REM,
77 /** Hypervisor debug event being processed. */
78 EMSTATE_DEBUG_HYPER,
79 /** The VM has encountered a fatal error. (And everyone is panicing....) */
80 EMSTATE_GURU_MEDITATION,
81 /** Executing in IEM, falling back on REM if we cannot switch back to HM or
82 * RAW after a short while. */
83 EMSTATE_IEM_THEN_REM,
84 /** Executing in native (API) execution monitor. */
85 EMSTATE_NEM,
86 /** Guest debug event from NEM mode is being processed. */
87 EMSTATE_DEBUG_GUEST_NEM,
88 /** Just a hack to ensure that we get a 32-bit integer. */
89 EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
90} EMSTATE;
91
92
93/**
94 * EMInterpretInstructionCPU execution modes.
95 */
96typedef enum
97{
98 /** Only supervisor code (CPL=0). */
99 EMCODETYPE_SUPERVISOR,
100 /** User-level code only. */
101 EMCODETYPE_USER,
102 /** Supervisor and user-level code (use with great care!). */
103 EMCODETYPE_ALL,
104 /** Just a hack to ensure that we get a 32-bit integer. */
105 EMCODETYPE_32BIT_HACK = 0x7fffffff
106} EMCODETYPE;
107
108VMM_INT_DECL(EMSTATE) EMGetState(PVMCPU pVCpu);
109VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
110
111/** @name Callback handlers for instruction emulation functions.
112 * These are placed here because IOM wants to use them as well.
113 * @{
114 */
115typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
116typedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
117typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
118typedef FNEMULATEPARAM2 *PFNEMULATEPARAM2;
119typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
120typedef FNEMULATEPARAM3 *PFNEMULATEPARAM3;
121typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
122typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2;
123typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
124typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3;
125/** @} */
126
127
128/**
129 * Checks if raw ring-3 execute mode is enabled.
130 *
131 * @returns true if enabled.
132 * @returns false if disabled.
133 * @param pVM The cross context VM structure.
134 */
135#define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
136
137/**
138 * Checks if raw ring-0 execute mode is enabled.
139 *
140 * @returns true if enabled.
141 * @returns false if disabled.
142 * @param pVM The cross context VM structure.
143 */
144#define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
145
146#ifdef VBOX_WITH_RAW_RING1
147/**
148 * Checks if raw ring-1 execute mode is enabled.
149 *
150 * @returns true if enabled.
151 * @returns false if disabled.
152 * @param pVM The cross context VM structure.
153 */
154# define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
155#else
156# define EMIsRawRing1Enabled(pVM) false
157#endif
158
159/**
160 * Checks if execution with hardware assisted virtualization is enabled.
161 *
162 * @returns true if enabled.
163 * @returns false if disabled.
164 * @param pVM The cross context VM structure.
165 */
166#define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
167
168/**
169 * Checks if execution of supervisor code should be done in the
170 * recompiler or not.
171 *
172 * @returns true if enabled.
173 * @returns false if disabled.
174 * @param pVM The cross context VM structure.
175 */
176#define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
177
178VMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
179VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
180VMMDECL(void) EMSetHypercallInstructionsEnabled(PVMCPU pVCpu, bool fEnabled);
181VMMDECL(bool) EMAreHypercallInstructionsEnabled(PVMCPU pVCpu);
182VMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
183VMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
184VMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
185VMM_INT_DECL(bool) EMMonitorIsArmed(PVMCPU pVCpu);
186VMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
187VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPU pVCpuDst);
188VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortWrite(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue, uint32_t uValue);
189VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortRead(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue);
190
191/**
192 * Common defined exit types that EM knows what to do about.
193 *
194 * These should be used instead of the VT-x, SVM or NEM specific ones for exits
195 * worth optimizing.
196 */
197typedef enum EMEXITTYPE
198{
199 EMEXITTYPE_INVALID = 0,
200 EMEXITTYPE_IO_PORT_READ,
201 EMEXITTYPE_IO_PORT_WRITE,
202 EMEXITTYPE_IO_PORT_STR_READ,
203 EMEXITTYPE_IO_PORT_STR_WRITE,
204 EMEXITTYPE_MMIO,
205 EMEXITTYPE_MMIO_READ,
206 EMEXITTYPE_MMIO_WRITE,
207 EMEXITTYPE_MSR_READ,
208 EMEXITTYPE_MSR_WRITE,
209 EMEXITTYPE_CPUID,
210 EMEXITTYPE_RDTSC,
211 EMEXITTYPE_MOV_CRX,
212 EMEXITTYPE_MOV_DRX,
213
214 /** @name Raw-mode only (for now), keep at end.
215 * @{ */
216 EMEXITTYPE_INVLPG,
217 EMEXITTYPE_LLDT,
218 EMEXITTYPE_RDPMC,
219 EMEXITTYPE_CLTS,
220 EMEXITTYPE_STI,
221 EMEXITTYPE_INT,
222 EMEXITTYPE_SYSCALL,
223 EMEXITTYPE_SYSENTER,
224 EMEXITTYPE_HLT
225 /** @} */
226} EMEXITTYPE;
227AssertCompileSize(EMEXITTYPE, 4);
228
229/** @name EMEXIT_F_XXX - EM exit flags.
230 *
231 * The flags the exit type are combined to a 32-bit number using the
232 * EMEXIT_MAKE_FLAGS_AND_TYPE() macro.
233 *
234 * @{ */
235#define EMEXIT_F_TYPE_MASK UINT32_C(0x00000fff) /**< The exit type mask. */
236#define EMEXIT_F_KIND_EM UINT32_C(0x00000000) /**< EMEXITTYPE */
237#define EMEXIT_F_KIND_VMX UINT32_C(0x00001000) /**< VT-x exit codes. */
238#define EMEXIT_F_KIND_SVM UINT32_C(0x00002000) /**< SVM exit codes. */
239#define EMEXIT_F_KIND_NEM UINT32_C(0x00003000) /**< NEMEXITTYPE */
240#define EMEXIT_F_KIND_XCPT UINT32_C(0x00004000) /**< Exception numbers (raw-mode). */
241#define EMEXIT_F_KIND_MASK UINT32_C(0x00007000)
242#define EMEXIT_F_CS_EIP UINT32_C(0x00010000) /**< The PC is EIP in the low dword and CS in the high. */
243#define EMEXIT_F_UNFLATTENED_PC UINT32_C(0x00020000) /**< The PC hasn't had CS.BASE added to it. */
244/** Preemption is currently disabled (or we're using preemption hooks). */
245#define EMEXIT_F_PREEMPT_DISABLED UINT32_C(0x00040000)
246/** Combines flags and exit type into EMHistoryAddExit() input. */
247#define EMEXIT_MAKE_FLAGS_AND_TYPE(a_fFlags, a_uType) ((a_fFlags) | (uint32_t)(a_uType))
248/** @} */
249
250typedef enum EMEXITACTION
251{
252 /** The record is free. */
253 EMEXITACTION_FREE_RECORD = 0,
254 /** Take normal action on the exit. */
255 EMEXITACTION_NORMAL,
256 /** Take normal action on the exit, already probed and found nothing. */
257 EMEXITACTION_NORMAL_PROBED,
258 /** Do a probe execution. */
259 EMEXITACTION_EXEC_PROBE,
260 /** Execute using EMEXITREC::cMaxInstructionsWithoutExit. */
261 EMEXITACTION_EXEC_WITH_MAX
262} EMEXITACTION;
263AssertCompileSize(EMEXITACTION, 4);
264
265/**
266 * Accumulative exit record.
267 *
268 * This could perhaps be squeezed down a bit, but there isn't too much point.
269 * We'll probably need more data as time goes by.
270 */
271typedef struct EMEXITREC
272{
273 /** The flat PC of the exit. */
274 uint64_t uFlatPC;
275 /** Flags and type, see EMEXIT_MAKE_FLAGS_AND_TYPE. */
276 uint32_t uFlagsAndType;
277 /** The action to take (EMEXITACTION). */
278 uint8_t enmAction;
279 uint8_t bUnused;
280 /** Maximum number of instructions to execute without hitting an exit. */
281 uint16_t cMaxInstructionsWithoutExit;
282 /** The exit number (EMCPU::iNextExit) at which it was last updated. */
283 uint64_t uLastExitNo;
284 /** Number of hits. */
285 uint64_t cHits;
286} EMEXITREC;
287AssertCompileSize(EMEXITREC, 32);
288/** Pointer to an accumulative exit record. */
289typedef EMEXITREC *PEMEXITREC;
290/** Pointer to a const accumulative exit record. */
291typedef EMEXITREC const *PCEMEXITREC;
292
293VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);
294#ifdef IN_RC
295VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip,
296 uint64_t uTimestamp);
297#endif
298#ifdef IN_RING0
299VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened);
300#endif
301VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);
302VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);
303VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);
304
305
306/** @name Deprecated interpretation related APIs (use IEM).
307 * @{ */
308VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
309VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
310 PDISCPUSTATE pDISState, unsigned *pcbInstr);
311VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
312VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
313VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
314 RTGCPTR pvFault, EMCODETYPE enmCodeType);
315#ifdef IN_RC
316VMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
317#endif
318VMM_INT_DECL(int) EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
319VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
320VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
321VMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
322VMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
323VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
324VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
325VMM_INT_DECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
326VMM_INT_DECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
327/** @} */
328
329/** @name Assembly routines
330 * @{ */
331VMMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
332VMMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
333VMMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb);
334VMMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb);
335VMMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
336VMMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
337VMMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
338VMMDECL(int) EMEmulateLockXor(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
339VMMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
340VMMDECL(int) EMEmulateLockAnd(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
341VMMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
342VMMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
343VMMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
344VMMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
345VMMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2);
346VMMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
347VMMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
348VMMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
349VMMDECL(uint32_t) EMEmulateCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
350VMMDECL(uint32_t) EMEmulateLockCmpXchg8b(void *pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
351VMMDECL(uint32_t) EMEmulateXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
352VMMDECL(uint32_t) EMEmulateLockXAdd(void *pvParam1, void *pvParam2, size_t cbOp);
353/** @} */
354
355/** @name REM locking routines
356 * @{ */
357VMMDECL(void) EMRemUnlock(PVM pVM);
358VMMDECL(void) EMRemLock(PVM pVM);
359VMMDECL(bool) EMRemIsLockOwner(PVM pVM);
360VMM_INT_DECL(int) EMRemTryLock(PVM pVM);
361/** @} */
362
363
364/** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
365 * @{ */
366/** Return when CS:RIP changes or some other important event happens.
367 * This means running whole REP and LOOP $ sequences for instance. */
368#define EM_ONE_INS_FLAGS_RIP_CHANGE RT_BIT_32(0)
369/** Mask of valid flags. */
370#define EM_ONE_INS_FLAGS_MASK UINT32_C(0x00000001)
371/** @} */
372
373
374#ifdef IN_RING0
375/** @defgroup grp_em_r0 The EM Host Context Ring-0 API
376 * @{ */
377VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVM pVM);
378/** @} */
379#endif
380
381
382#ifdef IN_RING3
383/** @defgroup grp_em_r3 The EM Host Context Ring-3 API
384 * @{
385 */
386
387/**
388 * Command argument for EMR3RawSetMode().
389 *
390 * It's possible to extend this interface to change several
391 * execution modes at once should the need arise.
392 */
393typedef enum EMEXECPOLICY
394{
395 /** The customary invalid zero entry. */
396 EMEXECPOLICY_INVALID = 0,
397 /** Whether to recompile ring-0 code or execute it in raw/hm. */
398 EMEXECPOLICY_RECOMPILE_RING0,
399 /** Whether to recompile ring-3 code or execute it in raw/hm. */
400 EMEXECPOLICY_RECOMPILE_RING3,
401 /** Whether to only use IEM for execution. */
402 EMEXECPOLICY_IEM_ALL,
403 /** End of valid value (not included). */
404 EMEXECPOLICY_END,
405 /** The customary 32-bit type blowup. */
406 EMEXECPOLICY_32BIT_HACK = 0x7fffffff
407} EMEXECPOLICY;
408VMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
409VMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
410VMMR3DECL(int) EMR3QueryMainExecutionEngine(PUVM pUVM, uint8_t *pbMainExecutionEngine);
411
412VMMR3_INT_DECL(int) EMR3Init(PVM pVM);
413VMMR3_INT_DECL(int) EMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
414VMMR3_INT_DECL(void) EMR3Relocate(PVM pVM);
415VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu);
416VMMR3_INT_DECL(void) EMR3Reset(PVM pVM);
417VMMR3_INT_DECL(int) EMR3Term(PVM pVM);
418VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
419VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
420VMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
421VMMR3_INT_DECL(int) EMR3NotifyResume(PVM pVM);
422VMMR3_INT_DECL(int) EMR3NotifySuspend(PVM pVM);
423VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
424
425/** @} */
426#endif /* IN_RING3 */
427
428/** @} */
429
430RT_C_DECLS_END
431
432#endif
433
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