VirtualBox

source: vbox/trunk/include/VBox/vmm/em.h@ 75853

Last change on this file since 75853 was 75646, checked in by vboxsync, 6 years ago

VMM: HLT/MWAIT optimizations for busy guests: don't go back to ring-3 just to call GVMMR0SchedHalt(), do the first call in ring-0. This saves a reduces interrupt latency for some workloads. bugref:9172

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1/** @file
2 * EM - Execution Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_em_h
27#define ___VBox_vmm_em_h
28
29#include <VBox/types.h>
30#include <VBox/vmm/trpm.h>
31#include <VBox/vmm/vmapi.h>
32
33
34RT_C_DECLS_BEGIN
35
36/** @defgroup grp_em The Execution Monitor / Manager API
37 * @ingroup grp_vmm
38 * @{
39 */
40
41/** Enable to allow V86 code to run in raw mode. */
42#define VBOX_RAW_V86
43
44/**
45 * The Execution Manager State.
46 *
47 * @remarks This is used in the saved state!
48 */
49typedef enum EMSTATE
50{
51 /** Not yet started. */
52 EMSTATE_NONE = 1,
53 /** Raw-mode execution. */
54 EMSTATE_RAW,
55 /** Hardware accelerated raw-mode execution. */
56 EMSTATE_HM,
57 /** Executing in IEM. */
58 EMSTATE_IEM,
59 /** Recompiled mode execution. */
60 EMSTATE_REM,
61 /** Execution is halted. (waiting for interrupt) */
62 EMSTATE_HALTED,
63 /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
64 EMSTATE_WAIT_SIPI,
65 /** Execution is suspended. */
66 EMSTATE_SUSPENDED,
67 /** The VM is terminating. */
68 EMSTATE_TERMINATING,
69 /** Guest debug event from raw-mode is being processed. */
70 EMSTATE_DEBUG_GUEST_RAW,
71 /** Guest debug event from hardware accelerated mode is being processed. */
72 EMSTATE_DEBUG_GUEST_HM,
73 /** Guest debug event from interpreted execution mode is being processed. */
74 EMSTATE_DEBUG_GUEST_IEM,
75 /** Guest debug event from recompiled-mode is being processed. */
76 EMSTATE_DEBUG_GUEST_REM,
77 /** Hypervisor debug event being processed. */
78 EMSTATE_DEBUG_HYPER,
79 /** The VM has encountered a fatal error. (And everyone is panicing....) */
80 EMSTATE_GURU_MEDITATION,
81 /** Executing in IEM, falling back on REM if we cannot switch back to HM or
82 * RAW after a short while. */
83 EMSTATE_IEM_THEN_REM,
84 /** Executing in native (API) execution monitor. */
85 EMSTATE_NEM,
86 /** Guest debug event from NEM mode is being processed. */
87 EMSTATE_DEBUG_GUEST_NEM,
88 /** Just a hack to ensure that we get a 32-bit integer. */
89 EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
90} EMSTATE;
91
92
93/**
94 * EMInterpretInstructionCPU execution modes.
95 */
96typedef enum
97{
98 /** Only supervisor code (CPL=0). */
99 EMCODETYPE_SUPERVISOR,
100 /** User-level code only. */
101 EMCODETYPE_USER,
102 /** Supervisor and user-level code (use with great care!). */
103 EMCODETYPE_ALL,
104 /** Just a hack to ensure that we get a 32-bit integer. */
105 EMCODETYPE_32BIT_HACK = 0x7fffffff
106} EMCODETYPE;
107
108VMM_INT_DECL(EMSTATE) EMGetState(PVMCPU pVCpu);
109VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
110
111/** @name Callback handlers for instruction emulation functions.
112 * These are placed here because IOM wants to use them as well.
113 * @{
114 */
115typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
116typedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
117typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
118typedef FNEMULATEPARAM2 *PFNEMULATEPARAM2;
119typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
120typedef FNEMULATEPARAM3 *PFNEMULATEPARAM3;
121typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
122typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2;
123typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
124typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3;
125/** @} */
126
127
128/**
129 * Checks if raw ring-3 execute mode is enabled.
130 *
131 * @returns true if enabled.
132 * @returns false if disabled.
133 * @param pVM The cross context VM structure.
134 */
135#define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
136
137/**
138 * Checks if raw ring-0 execute mode is enabled.
139 *
140 * @returns true if enabled.
141 * @returns false if disabled.
142 * @param pVM The cross context VM structure.
143 */
144#define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
145
146#ifdef VBOX_WITH_RAW_RING1
147/**
148 * Checks if raw ring-1 execute mode is enabled.
149 *
150 * @returns true if enabled.
151 * @returns false if disabled.
152 * @param pVM The cross context VM structure.
153 */
154# define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
155#else
156# define EMIsRawRing1Enabled(pVM) false
157#endif
158
159/**
160 * Checks if execution with hardware assisted virtualization is enabled.
161 *
162 * @returns true if enabled.
163 * @returns false if disabled.
164 * @param pVM The cross context VM structure.
165 */
166#define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
167
168/**
169 * Checks if execution of supervisor code should be done in the
170 * recompiler or not.
171 *
172 * @returns true if enabled.
173 * @returns false if disabled.
174 * @param pVM The cross context VM structure.
175 */
176#define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
177
178VMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
179VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
180VMMDECL(bool) EMIsInhibitInterruptsActive(PVMCPU pVCpu);
181VMMDECL(void) EMSetHypercallInstructionsEnabled(PVMCPU pVCpu, bool fEnabled);
182VMMDECL(bool) EMAreHypercallInstructionsEnabled(PVMCPU pVCpu);
183VMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
184VMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
185VMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
186VMM_INT_DECL(void) EMMonitorWaitClear(PVMCPU pVCpu);
187VMM_INT_DECL(bool) EMMonitorIsArmed(PVMCPU pVCpu);
188VMM_INT_DECL(unsigned) EMMonitorWaitIsActive(PVMCPU pVCpu);
189VMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
190VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPU pVCpuDst);
191VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortWrite(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue, uint32_t uValue);
192VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortRead(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue);
193
194/**
195 * Common defined exit types that EM knows what to do about.
196 *
197 * These should be used instead of the VT-x, SVM or NEM specific ones for exits
198 * worth optimizing.
199 */
200typedef enum EMEXITTYPE
201{
202 EMEXITTYPE_INVALID = 0,
203 EMEXITTYPE_IO_PORT_READ,
204 EMEXITTYPE_IO_PORT_WRITE,
205 EMEXITTYPE_IO_PORT_STR_READ,
206 EMEXITTYPE_IO_PORT_STR_WRITE,
207 EMEXITTYPE_MMIO,
208 EMEXITTYPE_MMIO_READ,
209 EMEXITTYPE_MMIO_WRITE,
210 EMEXITTYPE_MSR_READ,
211 EMEXITTYPE_MSR_WRITE,
212 EMEXITTYPE_CPUID,
213 EMEXITTYPE_RDTSC,
214 EMEXITTYPE_MOV_CRX,
215 EMEXITTYPE_MOV_DRX,
216
217 /** @name Raw-mode only (for now), keep at end.
218 * @{ */
219 EMEXITTYPE_INVLPG,
220 EMEXITTYPE_LLDT,
221 EMEXITTYPE_RDPMC,
222 EMEXITTYPE_CLTS,
223 EMEXITTYPE_STI,
224 EMEXITTYPE_INT,
225 EMEXITTYPE_SYSCALL,
226 EMEXITTYPE_SYSENTER,
227 EMEXITTYPE_HLT
228 /** @} */
229} EMEXITTYPE;
230AssertCompileSize(EMEXITTYPE, 4);
231
232/** @name EMEXIT_F_XXX - EM exit flags.
233 *
234 * The flags the exit type are combined to a 32-bit number using the
235 * EMEXIT_MAKE_FT() macro.
236 *
237 * @{ */
238#define EMEXIT_F_TYPE_MASK UINT32_C(0x00000fff) /**< The exit type mask. */
239#define EMEXIT_F_KIND_EM UINT32_C(0x00000000) /**< EMEXITTYPE */
240#define EMEXIT_F_KIND_VMX UINT32_C(0x00001000) /**< VT-x exit codes. */
241#define EMEXIT_F_KIND_SVM UINT32_C(0x00002000) /**< SVM exit codes. */
242#define EMEXIT_F_KIND_NEM UINT32_C(0x00003000) /**< NEMEXITTYPE */
243#define EMEXIT_F_KIND_XCPT UINT32_C(0x00004000) /**< Exception numbers (raw-mode). */
244#define EMEXIT_F_KIND_MASK UINT32_C(0x00007000)
245#define EMEXIT_F_CS_EIP UINT32_C(0x00010000) /**< The PC is EIP in the low dword and CS in the high. */
246#define EMEXIT_F_UNFLATTENED_PC UINT32_C(0x00020000) /**< The PC hasn't had CS.BASE added to it. */
247/** HM is calling (from ring-0). Preemption is currently disabled or we're using preemption hooks. */
248#define EMEXIT_F_HM UINT32_C(0x00040000)
249/** Combines flags and exit type into EMHistoryAddExit() input. */
250#define EMEXIT_MAKE_FT(a_fFlags, a_uType) ((a_fFlags) | (uint32_t)(a_uType))
251/** @} */
252
253typedef enum EMEXITACTION
254{
255 /** The record is free. */
256 EMEXITACTION_FREE_RECORD = 0,
257 /** Take normal action on the exit. */
258 EMEXITACTION_NORMAL,
259 /** Take normal action on the exit, already probed and found nothing. */
260 EMEXITACTION_NORMAL_PROBED,
261 /** Do a probe execution. */
262 EMEXITACTION_EXEC_PROBE,
263 /** Execute using EMEXITREC::cMaxInstructionsWithoutExit. */
264 EMEXITACTION_EXEC_WITH_MAX
265} EMEXITACTION;
266AssertCompileSize(EMEXITACTION, 4);
267
268/**
269 * Accumulative exit record.
270 *
271 * This could perhaps be squeezed down a bit, but there isn't too much point.
272 * We'll probably need more data as time goes by.
273 */
274typedef struct EMEXITREC
275{
276 /** The flat PC of the exit. */
277 uint64_t uFlatPC;
278 /** Flags and type, see EMEXIT_MAKE_FT. */
279 uint32_t uFlagsAndType;
280 /** The action to take (EMEXITACTION). */
281 uint8_t enmAction;
282 uint8_t bUnused;
283 /** Maximum number of instructions to execute without hitting an exit. */
284 uint16_t cMaxInstructionsWithoutExit;
285 /** The exit number (EMCPU::iNextExit) at which it was last updated. */
286 uint64_t uLastExitNo;
287 /** Number of hits. */
288 uint64_t cHits;
289} EMEXITREC;
290AssertCompileSize(EMEXITREC, 32);
291/** Pointer to an accumulative exit record. */
292typedef EMEXITREC *PEMEXITREC;
293/** Pointer to a const accumulative exit record. */
294typedef EMEXITREC const *PCEMEXITREC;
295
296VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);
297#ifdef IN_RC
298VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip,
299 uint64_t uTimestamp);
300#endif
301#ifdef IN_RING0
302VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened);
303#endif
304VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);
305VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);
306VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);
307
308
309/** @name Deprecated interpretation related APIs (use IEM).
310 * @{ */
311VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
312VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
313 PDISCPUSTATE pDISState, unsigned *pcbInstr);
314VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
315VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
316VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
317 RTGCPTR pvFault, EMCODETYPE enmCodeType);
318#ifdef IN_RC
319VMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
320#endif
321VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
322VMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
323VMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
324VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
325VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
326/** @} */
327
328
329/** @name REM locking routines
330 * @{ */
331VMMDECL(void) EMRemUnlock(PVM pVM);
332VMMDECL(void) EMRemLock(PVM pVM);
333VMMDECL(bool) EMRemIsLockOwner(PVM pVM);
334VMM_INT_DECL(int) EMRemTryLock(PVM pVM);
335/** @} */
336
337
338/** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
339 * @{ */
340/** Return when CS:RIP changes or some other important event happens.
341 * This means running whole REP and LOOP $ sequences for instance. */
342#define EM_ONE_INS_FLAGS_RIP_CHANGE RT_BIT_32(0)
343/** Mask of valid flags. */
344#define EM_ONE_INS_FLAGS_MASK UINT32_C(0x00000001)
345/** @} */
346
347
348#ifdef IN_RING0
349/** @defgroup grp_em_r0 The EM Host Context Ring-0 API
350 * @{ */
351VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVM pVM);
352/** @} */
353#endif
354
355
356#ifdef IN_RING3
357/** @defgroup grp_em_r3 The EM Host Context Ring-3 API
358 * @{
359 */
360
361/**
362 * Command argument for EMR3RawSetMode().
363 *
364 * It's possible to extend this interface to change several
365 * execution modes at once should the need arise.
366 */
367typedef enum EMEXECPOLICY
368{
369 /** The customary invalid zero entry. */
370 EMEXECPOLICY_INVALID = 0,
371 /** Whether to recompile ring-0 code or execute it in raw/hm. */
372 EMEXECPOLICY_RECOMPILE_RING0,
373 /** Whether to recompile ring-3 code or execute it in raw/hm. */
374 EMEXECPOLICY_RECOMPILE_RING3,
375 /** Whether to only use IEM for execution. */
376 EMEXECPOLICY_IEM_ALL,
377 /** End of valid value (not included). */
378 EMEXECPOLICY_END,
379 /** The customary 32-bit type blowup. */
380 EMEXECPOLICY_32BIT_HACK = 0x7fffffff
381} EMEXECPOLICY;
382VMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
383VMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
384VMMR3DECL(int) EMR3QueryMainExecutionEngine(PUVM pUVM, uint8_t *pbMainExecutionEngine);
385
386VMMR3_INT_DECL(int) EMR3Init(PVM pVM);
387VMMR3_INT_DECL(int) EMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
388VMMR3_INT_DECL(void) EMR3Relocate(PVM pVM);
389VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu);
390VMMR3_INT_DECL(void) EMR3Reset(PVM pVM);
391VMMR3_INT_DECL(int) EMR3Term(PVM pVM);
392VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
393VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
394VMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
395VMMR3_INT_DECL(int) EMR3NotifyResume(PVM pVM);
396VMMR3_INT_DECL(int) EMR3NotifySuspend(PVM pVM);
397VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
398
399/** @} */
400#endif /* IN_RING3 */
401
402/** @} */
403
404RT_C_DECLS_END
405
406#endif
407
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