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source: vbox/trunk/include/VBox/vmm/em.h@ 76558

Last change on this file since 76558 was 76558, checked in by vboxsync, 6 years ago

include/VBox: Use VBOX_INCLUDED_ rather than _vbox_ as header guard prefix, letting scm enforce this (thereby avoiding copy&paste errors like NativeEventQueue.h).

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1/** @file
2 * EM - Execution Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_em_h
27#define VBOX_INCLUDED_vmm_em_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/types.h>
33#include <VBox/vmm/trpm.h>
34#include <VBox/vmm/vmapi.h>
35
36
37RT_C_DECLS_BEGIN
38
39/** @defgroup grp_em The Execution Monitor / Manager API
40 * @ingroup grp_vmm
41 * @{
42 */
43
44/** Enable to allow V86 code to run in raw mode. */
45#define VBOX_RAW_V86
46
47/**
48 * The Execution Manager State.
49 *
50 * @remarks This is used in the saved state!
51 */
52typedef enum EMSTATE
53{
54 /** Not yet started. */
55 EMSTATE_NONE = 1,
56 /** Raw-mode execution. */
57 EMSTATE_RAW,
58 /** Hardware accelerated raw-mode execution. */
59 EMSTATE_HM,
60 /** Executing in IEM. */
61 EMSTATE_IEM,
62 /** Recompiled mode execution. */
63 EMSTATE_REM,
64 /** Execution is halted. (waiting for interrupt) */
65 EMSTATE_HALTED,
66 /** Application processor execution is halted. (waiting for startup IPI (SIPI)) */
67 EMSTATE_WAIT_SIPI,
68 /** Execution is suspended. */
69 EMSTATE_SUSPENDED,
70 /** The VM is terminating. */
71 EMSTATE_TERMINATING,
72 /** Guest debug event from raw-mode is being processed. */
73 EMSTATE_DEBUG_GUEST_RAW,
74 /** Guest debug event from hardware accelerated mode is being processed. */
75 EMSTATE_DEBUG_GUEST_HM,
76 /** Guest debug event from interpreted execution mode is being processed. */
77 EMSTATE_DEBUG_GUEST_IEM,
78 /** Guest debug event from recompiled-mode is being processed. */
79 EMSTATE_DEBUG_GUEST_REM,
80 /** Hypervisor debug event being processed. */
81 EMSTATE_DEBUG_HYPER,
82 /** The VM has encountered a fatal error. (And everyone is panicing....) */
83 EMSTATE_GURU_MEDITATION,
84 /** Executing in IEM, falling back on REM if we cannot switch back to HM or
85 * RAW after a short while. */
86 EMSTATE_IEM_THEN_REM,
87 /** Executing in native (API) execution monitor. */
88 EMSTATE_NEM,
89 /** Guest debug event from NEM mode is being processed. */
90 EMSTATE_DEBUG_GUEST_NEM,
91 /** Just a hack to ensure that we get a 32-bit integer. */
92 EMSTATE_MAKE_32BIT_HACK = 0x7fffffff
93} EMSTATE;
94
95
96/**
97 * EMInterpretInstructionCPU execution modes.
98 */
99typedef enum
100{
101 /** Only supervisor code (CPL=0). */
102 EMCODETYPE_SUPERVISOR,
103 /** User-level code only. */
104 EMCODETYPE_USER,
105 /** Supervisor and user-level code (use with great care!). */
106 EMCODETYPE_ALL,
107 /** Just a hack to ensure that we get a 32-bit integer. */
108 EMCODETYPE_32BIT_HACK = 0x7fffffff
109} EMCODETYPE;
110
111VMM_INT_DECL(EMSTATE) EMGetState(PVMCPU pVCpu);
112VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState);
113
114/** @name Callback handlers for instruction emulation functions.
115 * These are placed here because IOM wants to use them as well.
116 * @{
117 */
118typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2UINT32(void *pvParam1, uint64_t val2);
119typedef FNEMULATEPARAM2UINT32 *PFNEMULATEPARAM2UINT32;
120typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM2(void *pvParam1, size_t val2);
121typedef FNEMULATEPARAM2 *PFNEMULATEPARAM2;
122typedef DECLCALLBACK(uint32_t) FNEMULATEPARAM3(void *pvParam1, uint64_t val2, size_t val3);
123typedef FNEMULATEPARAM3 *PFNEMULATEPARAM3;
124typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(void *pvParam1, uint64_t val2, RTGCUINTREG32 *pf);
125typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2;
126typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(void *pvParam1, uint64_t val2, size_t cb, RTGCUINTREG32 *pf);
127typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3;
128/** @} */
129
130
131/**
132 * Checks if raw ring-3 execute mode is enabled.
133 *
134 * @returns true if enabled.
135 * @returns false if disabled.
136 * @param pVM The cross context VM structure.
137 */
138#define EMIsRawRing3Enabled(pVM) (!(pVM)->fRecompileUser)
139
140/**
141 * Checks if raw ring-0 execute mode is enabled.
142 *
143 * @returns true if enabled.
144 * @returns false if disabled.
145 * @param pVM The cross context VM structure.
146 */
147#define EMIsRawRing0Enabled(pVM) (!(pVM)->fRecompileSupervisor)
148
149#ifdef VBOX_WITH_RAW_RING1
150/**
151 * Checks if raw ring-1 execute mode is enabled.
152 *
153 * @returns true if enabled.
154 * @returns false if disabled.
155 * @param pVM The cross context VM structure.
156 */
157# define EMIsRawRing1Enabled(pVM) ((pVM)->fRawRing1Enabled)
158#else
159# define EMIsRawRing1Enabled(pVM) false
160#endif
161
162/**
163 * Checks if execution with hardware assisted virtualization is enabled.
164 *
165 * @returns true if enabled.
166 * @returns false if disabled.
167 * @param pVM The cross context VM structure.
168 */
169#define EMIsHwVirtExecutionEnabled(pVM) (!(pVM)->fRecompileSupervisor && !(pVM)->fRecompileUser)
170
171/**
172 * Checks if execution of supervisor code should be done in the
173 * recompiler or not.
174 *
175 * @returns true if enabled.
176 * @returns false if disabled.
177 * @param pVM The cross context VM structure.
178 */
179#define EMIsSupervisorCodeRecompiled(pVM) ((pVM)->fRecompileSupervisor)
180
181VMMDECL(void) EMSetInhibitInterruptsPC(PVMCPU pVCpu, RTGCUINTPTR PC);
182VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVMCPU pVCpu);
183VMMDECL(bool) EMIsInhibitInterruptsActive(PVMCPU pVCpu);
184VMMDECL(void) EMSetHypercallInstructionsEnabled(PVMCPU pVCpu, bool fEnabled);
185VMMDECL(bool) EMAreHypercallInstructionsEnabled(PVMCPU pVCpu);
186VMM_INT_DECL(bool) EMShouldContinueAfterHalt(PVMCPU pVCpu, PCPUMCTX pCtx);
187VMM_INT_DECL(bool) EMMonitorWaitShouldContinue(PVMCPU pVCpu, PCPUMCTX pCtx);
188VMM_INT_DECL(int) EMMonitorWaitPrepare(PVMCPU pVCpu, uint64_t rax, uint64_t rcx, uint64_t rdx, RTGCPHYS GCPhys);
189VMM_INT_DECL(void) EMMonitorWaitClear(PVMCPU pVCpu);
190VMM_INT_DECL(bool) EMMonitorIsArmed(PVMCPU pVCpu);
191VMM_INT_DECL(unsigned) EMMonitorWaitIsActive(PVMCPU pVCpu);
192VMM_INT_DECL(int) EMMonitorWaitPerform(PVMCPU pVCpu, uint64_t rax, uint64_t rcx);
193VMM_INT_DECL(int) EMUnhaltAndWakeUp(PVM pVM, PVMCPU pVCpuDst);
194VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortWrite(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue, uint32_t uValue);
195VMMRZ_INT_DECL(VBOXSTRICTRC) EMRZSetPendingIoPortRead(PVMCPU pVCpu, RTIOPORT uPort, uint8_t cbInstr, uint8_t cbValue);
196
197/**
198 * Common defined exit types that EM knows what to do about.
199 *
200 * These should be used instead of the VT-x, SVM or NEM specific ones for exits
201 * worth optimizing.
202 */
203typedef enum EMEXITTYPE
204{
205 EMEXITTYPE_INVALID = 0,
206 EMEXITTYPE_IO_PORT_READ,
207 EMEXITTYPE_IO_PORT_WRITE,
208 EMEXITTYPE_IO_PORT_STR_READ,
209 EMEXITTYPE_IO_PORT_STR_WRITE,
210 EMEXITTYPE_MMIO,
211 EMEXITTYPE_MMIO_READ,
212 EMEXITTYPE_MMIO_WRITE,
213 EMEXITTYPE_MSR_READ,
214 EMEXITTYPE_MSR_WRITE,
215 EMEXITTYPE_CPUID,
216 EMEXITTYPE_RDTSC,
217 EMEXITTYPE_MOV_CRX,
218 EMEXITTYPE_MOV_DRX,
219
220 /** @name Raw-mode only (for now), keep at end.
221 * @{ */
222 EMEXITTYPE_INVLPG,
223 EMEXITTYPE_LLDT,
224 EMEXITTYPE_RDPMC,
225 EMEXITTYPE_CLTS,
226 EMEXITTYPE_STI,
227 EMEXITTYPE_INT,
228 EMEXITTYPE_SYSCALL,
229 EMEXITTYPE_SYSENTER,
230 EMEXITTYPE_HLT
231 /** @} */
232} EMEXITTYPE;
233AssertCompileSize(EMEXITTYPE, 4);
234
235/** @name EMEXIT_F_XXX - EM exit flags.
236 *
237 * The flags the exit type are combined to a 32-bit number using the
238 * EMEXIT_MAKE_FT() macro.
239 *
240 * @{ */
241#define EMEXIT_F_TYPE_MASK UINT32_C(0x00000fff) /**< The exit type mask. */
242#define EMEXIT_F_KIND_EM UINT32_C(0x00000000) /**< EMEXITTYPE */
243#define EMEXIT_F_KIND_VMX UINT32_C(0x00001000) /**< VT-x exit codes. */
244#define EMEXIT_F_KIND_SVM UINT32_C(0x00002000) /**< SVM exit codes. */
245#define EMEXIT_F_KIND_NEM UINT32_C(0x00003000) /**< NEMEXITTYPE */
246#define EMEXIT_F_KIND_XCPT UINT32_C(0x00004000) /**< Exception numbers (raw-mode). */
247#define EMEXIT_F_KIND_MASK UINT32_C(0x00007000)
248#define EMEXIT_F_CS_EIP UINT32_C(0x00010000) /**< The PC is EIP in the low dword and CS in the high. */
249#define EMEXIT_F_UNFLATTENED_PC UINT32_C(0x00020000) /**< The PC hasn't had CS.BASE added to it. */
250/** HM is calling (from ring-0). Preemption is currently disabled or we're using preemption hooks. */
251#define EMEXIT_F_HM UINT32_C(0x00040000)
252/** Combines flags and exit type into EMHistoryAddExit() input. */
253#define EMEXIT_MAKE_FT(a_fFlags, a_uType) ((a_fFlags) | (uint32_t)(a_uType))
254/** @} */
255
256typedef enum EMEXITACTION
257{
258 /** The record is free. */
259 EMEXITACTION_FREE_RECORD = 0,
260 /** Take normal action on the exit. */
261 EMEXITACTION_NORMAL,
262 /** Take normal action on the exit, already probed and found nothing. */
263 EMEXITACTION_NORMAL_PROBED,
264 /** Do a probe execution. */
265 EMEXITACTION_EXEC_PROBE,
266 /** Execute using EMEXITREC::cMaxInstructionsWithoutExit. */
267 EMEXITACTION_EXEC_WITH_MAX
268} EMEXITACTION;
269AssertCompileSize(EMEXITACTION, 4);
270
271/**
272 * Accumulative exit record.
273 *
274 * This could perhaps be squeezed down a bit, but there isn't too much point.
275 * We'll probably need more data as time goes by.
276 */
277typedef struct EMEXITREC
278{
279 /** The flat PC of the exit. */
280 uint64_t uFlatPC;
281 /** Flags and type, see EMEXIT_MAKE_FT. */
282 uint32_t uFlagsAndType;
283 /** The action to take (EMEXITACTION). */
284 uint8_t enmAction;
285 uint8_t bUnused;
286 /** Maximum number of instructions to execute without hitting an exit. */
287 uint16_t cMaxInstructionsWithoutExit;
288 /** The exit number (EMCPU::iNextExit) at which it was last updated. */
289 uint64_t uLastExitNo;
290 /** Number of hits. */
291 uint64_t cHits;
292} EMEXITREC;
293AssertCompileSize(EMEXITREC, 32);
294/** Pointer to an accumulative exit record. */
295typedef EMEXITREC *PEMEXITREC;
296/** Pointer to a const accumulative exit record. */
297typedef EMEXITREC const *PCEMEXITREC;
298
299VMM_INT_DECL(PCEMEXITREC) EMHistoryAddExit(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC, uint64_t uTimestamp);
300#ifdef IN_RC
301VMMRC_INT_DECL(void) EMRCHistoryAddExitCsEip(PVMCPU pVCpu, uint32_t uFlagsAndType, uint16_t uCs, uint32_t uEip,
302 uint64_t uTimestamp);
303#endif
304#ifdef IN_RING0
305VMMR0_INT_DECL(void) EMR0HistoryUpdatePC(PVMCPU pVCpu, uint64_t uFlatPC, bool fFlattened);
306#endif
307VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndType(PVMCPU pVCpu, uint32_t uFlagsAndType);
308VMM_INT_DECL(PCEMEXITREC) EMHistoryUpdateFlagsAndTypeAndPC(PVMCPU pVCpu, uint32_t uFlagsAndType, uint64_t uFlatPC);
309VMM_INT_DECL(VBOXSTRICTRC) EMHistoryExec(PVMCPU pVCpu, PCEMEXITREC pExitRec, uint32_t fWillExit);
310
311
312/** @name Deprecated interpretation related APIs (use IEM).
313 * @{ */
314VMM_INT_DECL(int) EMInterpretDisasCurrent(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);
315VMM_INT_DECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
316 PDISCPUSTATE pDISState, unsigned *pcbInstr);
317VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault);
318VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionEx(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbWritten);
319VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pCoreCtx,
320 RTGCPTR pvFault, EMCODETYPE enmCodeType);
321#ifdef IN_RC
322VMM_INT_DECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
323#endif
324VMM_INT_DECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
325VMM_INT_DECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
326VMM_INT_DECL(int) EMInterpretMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
327VMM_INT_DECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
328VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
329/** @} */
330
331
332/** @name REM locking routines
333 * @{ */
334VMMDECL(void) EMRemUnlock(PVM pVM);
335VMMDECL(void) EMRemLock(PVM pVM);
336VMMDECL(bool) EMRemIsLockOwner(PVM pVM);
337VMM_INT_DECL(int) EMRemTryLock(PVM pVM);
338/** @} */
339
340
341/** @name EM_ONE_INS_FLAGS_XXX - flags for EMR3HmSingleInstruction (et al).
342 * @{ */
343/** Return when CS:RIP changes or some other important event happens.
344 * This means running whole REP and LOOP $ sequences for instance. */
345#define EM_ONE_INS_FLAGS_RIP_CHANGE RT_BIT_32(0)
346/** Mask of valid flags. */
347#define EM_ONE_INS_FLAGS_MASK UINT32_C(0x00000001)
348/** @} */
349
350
351#ifdef IN_RING0
352/** @defgroup grp_em_r0 The EM Host Context Ring-0 API
353 * @{ */
354VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVM pVM);
355/** @} */
356#endif
357
358
359#ifdef IN_RING3
360/** @defgroup grp_em_r3 The EM Host Context Ring-3 API
361 * @{
362 */
363
364/**
365 * Command argument for EMR3RawSetMode().
366 *
367 * It's possible to extend this interface to change several
368 * execution modes at once should the need arise.
369 */
370typedef enum EMEXECPOLICY
371{
372 /** The customary invalid zero entry. */
373 EMEXECPOLICY_INVALID = 0,
374 /** Whether to recompile ring-0 code or execute it in raw/hm. */
375 EMEXECPOLICY_RECOMPILE_RING0,
376 /** Whether to recompile ring-3 code or execute it in raw/hm. */
377 EMEXECPOLICY_RECOMPILE_RING3,
378 /** Whether to only use IEM for execution. */
379 EMEXECPOLICY_IEM_ALL,
380 /** End of valid value (not included). */
381 EMEXECPOLICY_END,
382 /** The customary 32-bit type blowup. */
383 EMEXECPOLICY_32BIT_HACK = 0x7fffffff
384} EMEXECPOLICY;
385VMMR3DECL(int) EMR3SetExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool fEnforce);
386VMMR3DECL(int) EMR3QueryExecutionPolicy(PUVM pUVM, EMEXECPOLICY enmPolicy, bool *pfEnforced);
387VMMR3DECL(int) EMR3QueryMainExecutionEngine(PUVM pUVM, uint8_t *pbMainExecutionEngine);
388
389VMMR3_INT_DECL(int) EMR3Init(PVM pVM);
390VMMR3_INT_DECL(int) EMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
391VMMR3_INT_DECL(void) EMR3Relocate(PVM pVM);
392VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu);
393VMMR3_INT_DECL(void) EMR3Reset(PVM pVM);
394VMMR3_INT_DECL(int) EMR3Term(PVM pVM);
395VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
396VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
397VMMR3_INT_DECL(int) EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
398VMMR3_INT_DECL(int) EMR3NotifyResume(PVM pVM);
399VMMR3_INT_DECL(int) EMR3NotifySuspend(PVM pVM);
400VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
401
402/** @} */
403#endif /* IN_RING3 */
404
405/** @} */
406
407RT_C_DECLS_END
408
409#endif
410
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