VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 45681

Last change on this file since 45681 was 45618, checked in by vboxsync, 12 years ago

Do HMR3Init first in vmR3InitRing3 so the other components can skip raw-mode bits during init.

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File size: 6.6 KB
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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <iprt/mp.h>
33
34
35/** @defgroup grp_hm The VM Hardware Manager API
36 * @{
37 */
38
39RT_C_DECLS_BEGIN
40
41/**
42 * Query HM state (enabled/disabled)
43 *
44 * @returns 0 - disabled, 1 - enabled
45 * @param a_pVM Pointer to the shared VM structure.
46 * @sa HMIsEnabledNotMacro, HMR3IsEnabled
47 * @internal
48 */
49#if defined(VBOX_STRICT) && defined(IN_RING3)
50# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
51#else
52# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
53#endif
54
55 /**
56 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
57 *
58 * @returns boolean
59 * @param a_pVCpu Pointer to the shared virtual CPU structure.
60 * @internal
61 */
62#define HMCanEmulateIoBlock(a_pVCpu) (!CPUMIsGuestInPagedProtectedMode(a_pVCpu))
63
64 /**
65 * Check if the current CPU state is valid for emulating IO blocks in the recompiler
66 *
67 * @returns boolean
68 * @param a_pCtx Pointer to the CPU context (within PVM).
69 * @internal
70 */
71#define HMCanEmulateIoBlockEx(a_pCtx) (!CPUMIsGuestInPagedProtectedModeEx(a_pCtx))
72
73VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
74VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
75VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
76VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
77
78#ifndef IN_RC
79VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
80VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
81VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
82VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
83VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
84VMM_INT_DECL(PGMMODE) HMGetShwPagingMode(PVM pVM);
85#else /* Nops in RC: */
86# define HMFlushTLB(pVCpu) do { } while (0)
87# define HMIsNestedPagingActive(pVM) false
88# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
89#endif
90
91#ifdef IN_RING0
92/** @defgroup grp_hm_r0 The VM Hardware Manager API
93 * @ingroup grp_hm
94 * @{
95 */
96VMMR0_INT_DECL(int) HMR0Init(void);
97VMMR0_INT_DECL(int) HMR0Term(void);
98VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
99VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
100VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
101VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
102VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
103
104VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
105 unsigned uPort, unsigned uAndVal, unsigned cbSize);
106VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
107 unsigned uPort, unsigned uAndVal, unsigned cbSize);
108
109/** @} */
110#endif /* IN_RING0 */
111
112
113#ifdef IN_RING3
114/** @defgroup grp_hm_r3 The VM Hardware Manager API
115 * @ingroup grp_hm
116 * @{
117 */
118VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
119VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
120VMMR3DECL(bool) HMR3IsVpidActive(PUVM pVUM);
121
122VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
123VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
124VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
125VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
126VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
127VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
128VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
129VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
130VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
131VMMR3_INT_DECL(void) HMR3NotifyScheduled(PVMCPU pVCpu);
132VMMR3_INT_DECL(void) HMR3NotifyEmulated(PVMCPU pVCpu);
133VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
134VMMR3_INT_DECL(void) HMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
135VMMR3_INT_DECL(int) HMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
136VMMR3_INT_DECL(VBOXSTRICTRC) HMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
137VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
138VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
139VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
140VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
141VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
142
143/** @} */
144#endif /* IN_RING3 */
145
146#ifdef IN_RING0
147/** @addtogroup grp_hm_r0
148 * @{
149 */
150VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
151VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
152VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu);
153VMMR0_INT_DECL(int) HMR0Leave(PVM pVM, PVMCPU pVCpu);
154VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
155
156# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
157VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
158VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
159VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
160# endif
161
162/** @} */
163#endif /* IN_RING0 */
164
165
166/** @} */
167RT_C_DECLS_END
168
169
170#endif
171
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