VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 73348

Last change on this file since 73348 was 73322, checked in by vboxsync, 7 years ago

HM,SELM: Redefined HMIsRawModeCtxNeeded as accessor for VM::fHMNeedRawModeCtx, i.e. dropping old fashioned raw-mode from it's definition. bugref:9044

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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_hm_h
27#define ___VBox_vmm_hm_h
28
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/vmm.h>
32#include <VBox/vmm/hm_svm.h>
33#include <VBox/vmm/trpm.h>
34#include <iprt/mp.h>
35
36
37/** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
38 * @ingroup grp_vmm
39 * @{
40 */
41
42RT_C_DECLS_BEGIN
43
44/**
45 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
46 *
47 * @retval true if used.
48 * @retval false if software virtualization (raw-mode) or NEM is used.
49 *
50 * @param a_pVM The cross context VM structure.
51 * @deprecated Please use VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED, or
52 * VM_IS_HM_ENABLED instead.
53 * @internal
54 */
55#if defined(VBOX_STRICT) && defined(IN_RING3)
56# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
57#else
58# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
59#endif
60
61/**
62 * Checks whether raw-mode context is required for HM purposes
63 *
64 * @retval true if required by HM for doing switching the cpu to 64-bit mode.
65 * @retval false if not required by HM.
66 *
67 * @param a_pVM The cross context VM structure.
68 * @internal
69 */
70#if HC_ARCH_BITS == 64
71# define HMIsRawModeCtxNeeded(a_pVM) (false)
72#else
73# define HMIsRawModeCtxNeeded(a_pVM) ((a_pVM)->fHMNeedRawModeCtx)
74#endif
75
76/**
77 * Checks whether we're in the special hardware virtualization context.
78 * @returns true / false.
79 * @param a_pVCpu The caller's cross context virtual CPU structure.
80 * @thread EMT
81 */
82#ifdef IN_RING0
83# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
84#else
85# define HMIsInHwVirtCtx(a_pVCpu) (false)
86#endif
87
88/**
89 * Checks whether we're in the special hardware virtualization context and we
90 * cannot perform long jump without guru meditating and possibly messing up the
91 * host and/or guest state.
92 *
93 * This is after we've turned interrupts off and such.
94 *
95 * @returns true / false.
96 * @param a_pVCpu The caller's cross context virtual CPU structure.
97 * @thread EMT
98 */
99#ifdef IN_RING0
100# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
101#else
102# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
103#endif
104
105/**
106 * 64-bit raw-mode (intermediate memory context) operations.
107 *
108 * These are special hypervisor eip values used when running 64-bit guests on
109 * 32-bit hosts. Each operation corresponds to a routine.
110 *
111 * @note Duplicated in the assembly code!
112 */
113typedef enum HM64ON32OP
114{
115 HM64ON32OP_INVALID = 0,
116 HM64ON32OP_VMXRCStartVM64,
117 HM64ON32OP_SVMRCVMRun64,
118 HM64ON32OP_HMRCSaveGuestFPU64,
119 HM64ON32OP_HMRCSaveGuestDebug64,
120 HM64ON32OP_HMRCTestSwitcher64,
121 HM64ON32OP_END,
122 HM64ON32OP_32BIT_HACK = 0x7fffffff
123} HM64ON32OP;
124
125/** @name All-context HM API.
126 * @{ */
127VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
128VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
129VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
130VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
131VMM_INT_DECL(int) HMAmdIsSubjectToErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
132VMM_INT_DECL(bool) HMSetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable);
133VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM);
134VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM);
135VMM_INT_DECL(void) HMHCPagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
136/** @} */
137
138/** @name All-context SVM helpers.
139 *
140 * These are SVM functions (based on AMD specs.) that may be used by IEM/REM and
141 * not VirtualBox functions that are used for hardware-assisted SVM. Those are
142 * declared below under the !IN_RC section.
143 * @{ */
144VMM_INT_DECL(TRPMEVENT) HMSvmEventToTrpmEventType(PCSVMEVENT pSvmEvent);
145VMM_INT_DECL(int) HMSvmGetMsrpmOffsetAndBit(uint32_t idMsr, uint16_t *pbOffMsrpm, uint8_t *puMsrpmBit);
146VMM_INT_DECL(bool) HMSvmIsIOInterceptActive(void *pvIoBitmap, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg,
147 uint8_t cAddrSizeBits, uint8_t iEffSeg, bool fRep, bool fStrIo,
148 PSVMIOIOEXITINFO pIoExitInfo);
149VMM_INT_DECL(int) HMHCSvmMaybeMovTprHypercall(PVMCPU pVCpu);
150/** @} */
151
152#ifndef IN_RC
153VMM_INT_DECL(int) HMFlushTLB(PVMCPU pVCpu);
154VMM_INT_DECL(int) HMFlushTLBOnAllVCpus(PVM pVM);
155VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
156VMM_INT_DECL(int) HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
157VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
158VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVM pVM);
159VMM_INT_DECL(bool) HMIsLongModeAllowed(PVM pVM);
160VMM_INT_DECL(bool) HMAreMsrBitmapsAvailable(PVM pVM);
161VMM_INT_DECL(bool) HMSvmIsVGifActive(PVM pVM);
162VMM_INT_DECL(uint64_t) HMSvmNstGstApplyTscOffset(PVMCPU pVCpu, uint64_t uTicks);
163# ifdef VBOX_WITH_NESTED_HWVIRT_SVM
164VMM_INT_DECL(void) HMSvmNstGstVmExitNotify(PVMCPU pVCpu, PCPUMCTX pCtx);
165# endif
166#else /* Nops in RC: */
167# define HMFlushTLB(pVCpu) do { } while (0)
168# define HMIsNestedPagingActive(pVM) false
169# define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
170# define HMIsLongModeAllowed(pVM) false
171# define HMAreMsrBitmapsAvailable(pVM) false
172# define HMFlushTLBOnAllVCpus(pVM) do { } while (0)
173# define HMSvmNstGstVmExitNotify(pVCpu, pCtx) do { } while (0)
174# define HMSvmIsVGifActive(pVM) false
175# define HMSvmNstGstApplyTscOffset(pVCpu, uTicks) (uTicks)
176#endif
177
178#ifdef IN_RING0
179/** @defgroup grp_hm_r0 The HM ring-0 Context API
180 * @{
181 */
182VMMR0_INT_DECL(int) HMR0Init(void);
183VMMR0_INT_DECL(int) HMR0Term(void);
184VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
185VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
186VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
187# ifdef VBOX_WITH_RAW_MODE
188VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
189VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
190# endif
191
192VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
193VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
194VMMR0_INT_DECL(int) HMR0Enter(PVMCPU pVCpu);
195VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu);
196VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
197VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPU VCpu);
198VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU VCpu);
199VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
200VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
201VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
202
203# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
204VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
205VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
206VMMR0_INT_DECL(int) HMR0TestSwitcher3264(PVM pVM);
207# endif
208
209/** @} */
210#endif /* IN_RING0 */
211
212
213#ifdef IN_RING3
214/** @defgroup grp_hm_r3 The HM ring-3 Context API
215 * @{
216 */
217VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
218VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
219VMMR3DECL(bool) HMR3IsVirtApicRegsEnabled(PUVM pUVM);
220VMMR3DECL(bool) HMR3IsPostedIntrsEnabled(PUVM pUVM);
221VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
222VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
223VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
224VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
225
226VMMR3_INT_DECL(bool) HMR3IsEventPending(PVMCPU pVCpu);
227VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
228VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
229VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
230VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
231VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
232VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
233VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
234VMMR3DECL(bool) HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
235VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
236VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
237VMMR3_INT_DECL(bool) HMR3IsActive(PVMCPU pVCpu);
238VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
239VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
240VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu);
241VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
242VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
243VMMR3DECL(const char *) HMR3GetVmxExitName(uint32_t uExit);
244VMMR3DECL(const char *) HMR3GetSvmExitName(uint32_t uExit);
245
246/** @} */
247#endif /* IN_RING3 */
248
249/** @} */
250RT_C_DECLS_END
251
252
253#endif
254
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