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source: vbox/trunk/include/VBox/vmm/iom.h@ 78235

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1/** @file
2 * IOM - Input / Output Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_iom_h
27#define VBOX_INCLUDED_vmm_iom_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/types.h>
33#include <VBox/dis.h>
34#include <VBox/vmm/dbgf.h>
35
36RT_C_DECLS_BEGIN
37
38
39/** @defgroup grp_iom The Input / Ouput Monitor API
40 * @ingroup grp_vmm
41 * @{
42 */
43
44/** @def IOM_NO_PDMINS_CHECKS
45 * Until all devices have been fully adjusted to PDM style, the pPdmIns
46 * parameter is not checked by IOM.
47 * @todo Check this again, now.
48 */
49#define IOM_NO_PDMINS_CHECKS
50
51/**
52 * Macro for checking if an I/O or MMIO emulation call succeeded.
53 *
54 * This macro shall only be used with the IOM APIs where it's mentioned
55 * in the return value description. And there it must be used to correctly
56 * determine if the call succeeded and things like the RIP needs updating.
57 *
58 *
59 * @returns Success indicator (true/false).
60 *
61 * @param rc The status code. This may be evaluated
62 * more than once!
63 *
64 * @remarks To avoid making assumptions about the layout of the
65 * VINF_EM_FIRST...VINF_EM_LAST range we're checking explicitly for
66 * each exact exception. However, for efficiency we ASSUME that the
67 * VINF_EM_LAST is smaller than most of the relevant status codes. We
68 * also ASSUME that the VINF_EM_RESCHEDULE_REM status code is the
69 * most frequent status code we'll enounter in this range.
70 *
71 * @todo Will have to add VINF_EM_DBG_HYPER_BREAKPOINT if the
72 * I/O port and MMIO breakpoints should trigger before
73 * the I/O is done. Currently, we don't implement these
74 * kind of breakpoints.
75 */
76#ifdef IN_RING3
77# define IOM_SUCCESS(rc) ( (rc) == VINF_SUCCESS \
78 || ( (rc) <= VINF_EM_LAST \
79 && (rc) != VINF_EM_RESCHEDULE_REM \
80 && (rc) >= VINF_EM_FIRST \
81 && (rc) != VINF_EM_RESCHEDULE_RAW \
82 && (rc) != VINF_EM_RESCHEDULE_HM \
83 ) \
84 )
85#else
86# define IOM_SUCCESS(rc) ( (rc) == VINF_SUCCESS \
87 || ( (rc) <= VINF_EM_LAST \
88 && (rc) != VINF_EM_RESCHEDULE_REM \
89 && (rc) >= VINF_EM_FIRST \
90 && (rc) != VINF_EM_RESCHEDULE_RAW \
91 && (rc) != VINF_EM_RESCHEDULE_HM \
92 ) \
93 || (rc) == VINF_IOM_R3_IOPORT_COMMIT_WRITE \
94 || (rc) == VINF_IOM_R3_MMIO_COMMIT_WRITE \
95 )
96#endif
97
98/** @name IOMMMIO_FLAGS_XXX
99 * @{ */
100/** Pass all reads thru unmodified. */
101#define IOMMMIO_FLAGS_READ_PASSTHRU UINT32_C(0x00000000)
102/** All read accesses are DWORD sized (32-bit). */
103#define IOMMMIO_FLAGS_READ_DWORD UINT32_C(0x00000001)
104/** All read accesses are DWORD (32-bit) or QWORD (64-bit) sized.
105 * Only accesses that are both QWORD sized and aligned are performed as QWORD.
106 * All other access will be done DWORD fashion (because it is way simpler). */
107#define IOMMMIO_FLAGS_READ_DWORD_QWORD UINT32_C(0x00000002)
108/** The read access mode mask. */
109#define IOMMMIO_FLAGS_READ_MODE UINT32_C(0x00000003)
110
111/** Pass all writes thru unmodified. */
112#define IOMMMIO_FLAGS_WRITE_PASSTHRU UINT32_C(0x00000000)
113/** All write accesses are DWORD (32-bit) sized and unspecified bytes are
114 * written as zero. */
115#define IOMMMIO_FLAGS_WRITE_DWORD_ZEROED UINT32_C(0x00000010)
116/** All write accesses are either DWORD (32-bit) or QWORD (64-bit) sized,
117 * missing bytes will be written as zero. Only accesses that are both QWORD
118 * sized and aligned are performed as QWORD, all other accesses will be done
119 * DWORD fashion (because it's way simpler). */
120#define IOMMMIO_FLAGS_WRITE_DWORD_QWORD_ZEROED UINT32_C(0x00000020)
121/** All write accesses are DWORD (32-bit) sized and unspecified bytes are
122 * read from the device first as DWORDs.
123 * @remarks This isn't how it happens on real hardware, but it allows
124 * simplifications of devices where reads doesn't change the device
125 * state in any way. */
126#define IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING UINT32_C(0x00000030)
127/** All write accesses are DWORD (32-bit) or QWORD (64-bit) sized and
128 * unspecified bytes are read from the device first as DWORDs. Only accesses
129 * that are both QWORD sized and aligned are performed as QWORD, all other
130 * accesses will be done DWORD fashion (because it's way simpler).
131 * @remarks This isn't how it happens on real hardware, but it allows
132 * simplifications of devices where reads doesn't change the device
133 * state in any way. */
134#define IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING UINT32_C(0x00000040)
135/** All write accesses are DWORD (32-bit) sized and aligned, attempts at other
136 * accesses are ignored.
137 * @remarks E1000, APIC */
138#define IOMMMIO_FLAGS_WRITE_ONLY_DWORD UINT32_C(0x00000050)
139/** All write accesses are DWORD (32-bit) or QWORD (64-bit) sized and aligned,
140 * attempts at other accesses are ignored.
141 * @remarks Seemingly required by AHCI (although I doubt it's _really_
142 * required as EM/REM doesn't do the right thing in ring-3 anyway,
143 * esp. not in raw-mode). */
144#define IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD UINT32_C(0x00000060)
145/** The read access mode mask. */
146#define IOMMMIO_FLAGS_WRITE_MODE UINT32_C(0x00000070)
147
148/** Whether to do a DBGSTOP on complicated reads.
149 * What this includes depends on the read mode, but generally all misaligned
150 * reads as well as word and byte reads and maybe qword reads. */
151#define IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_READ UINT32_C(0x00000100)
152/** Whether to do a DBGSTOP on complicated writes.
153 * This depends on the write mode, but generally all writes where we have to
154 * supply bytes (zero them or read them). */
155#define IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE UINT32_C(0x00000200)
156
157/** Mask of valid flags. */
158#define IOMMMIO_FLAGS_VALID_MASK UINT32_C(0x00000373)
159/** @} */
160
161/**
162 * Checks whether the write mode allows aligned QWORD accesses to be passed
163 * thru to the device handler.
164 * @param a_fFlags The MMIO handler flags.
165 */
166#define IOMMMIO_DOES_WRITE_MODE_ALLOW_QWORD(a_fFlags) \
167 ( ((a_fFlags) & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_DWORD_QWORD_ZEROED \
168 || ((a_fFlags) & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING \
169 || ((a_fFlags) & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD )
170
171
172/**
173 * Port I/O Handler for IN operations.
174 *
175 * @returns VINF_SUCCESS or VINF_EM_*.
176 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
177 *
178 * @param pDevIns The device instance.
179 * @param pvUser User argument.
180 * @param uPort Port number used for the IN operation.
181 * @param pu32 Where to store the result. This is always a 32-bit
182 * variable regardless of what @a cb might say.
183 * @param cb Number of bytes read.
184 * @remarks Caller enters the device critical section.
185 */
186typedef DECLCALLBACK(int) FNIOMIOPORTIN(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb);
187/** Pointer to a FNIOMIOPORTIN(). */
188typedef FNIOMIOPORTIN *PFNIOMIOPORTIN;
189
190/**
191 * Port I/O Handler for string IN operations.
192 *
193 * @returns VINF_SUCCESS or VINF_EM_*.
194 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
195 *
196 * @param pDevIns The device instance.
197 * @param pvUser User argument.
198 * @param uPort Port number used for the IN operation.
199 * @param pbDst Pointer to the destination buffer.
200 * @param pcTransfers Pointer to the number of transfer units to read, on
201 * return remaining transfer units.
202 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
203 * @remarks Caller enters the device critical section.
204 */
205typedef DECLCALLBACK(int) FNIOMIOPORTINSTRING(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint8_t *pbDst,
206 uint32_t *pcTransfers, unsigned cb);
207/** Pointer to a FNIOMIOPORTINSTRING(). */
208typedef FNIOMIOPORTINSTRING *PFNIOMIOPORTINSTRING;
209
210/**
211 * Port I/O Handler for OUT operations.
212 *
213 * @returns VINF_SUCCESS or VINF_EM_*.
214 *
215 * @param pDevIns The device instance.
216 * @param pvUser User argument.
217 * @param uPort Port number used for the OUT operation.
218 * @param u32 The value to output.
219 * @param cb The value size in bytes.
220 * @remarks Caller enters the device critical section.
221 */
222typedef DECLCALLBACK(int) FNIOMIOPORTOUT(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb);
223/** Pointer to a FNIOMIOPORTOUT(). */
224typedef FNIOMIOPORTOUT *PFNIOMIOPORTOUT;
225
226/**
227 * Port I/O Handler for string OUT operations.
228 *
229 * @returns VINF_SUCCESS or VINF_EM_*.
230 *
231 * @param pDevIns The device instance.
232 * @param pvUser User argument.
233 * @param uPort Port number used for the OUT operation.
234 * @param pbSrc Pointer to the source buffer.
235 * @param pcTransfers Pointer to the number of transfer units to write, on
236 * return remaining transfer units.
237 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
238 * @remarks Caller enters the device critical section.
239 */
240typedef DECLCALLBACK(int) FNIOMIOPORTOUTSTRING(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, const uint8_t *pbSrc,
241 uint32_t *pcTransfers, unsigned cb);
242/** Pointer to a FNIOMIOPORTOUTSTRING(). */
243typedef FNIOMIOPORTOUTSTRING *PFNIOMIOPORTOUTSTRING;
244
245
246/**
247 * Memory mapped I/O Handler for read operations.
248 *
249 * @returns VBox status code.
250 *
251 * @param pDevIns The device instance.
252 * @param pvUser User argument.
253 * @param GCPhysAddr Physical address (in GC) where the read starts.
254 * @param pv Where to store the result.
255 * @param cb Number of bytes read.
256 * @remarks Caller enters the device critical section.
257 */
258typedef DECLCALLBACK(int) FNIOMMMIOREAD(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
259/** Pointer to a FNIOMMMIOREAD(). */
260typedef FNIOMMMIOREAD *PFNIOMMMIOREAD;
261
262/**
263 * Memory mapped I/O Handler for write operations.
264 *
265 * @returns VBox status code.
266 *
267 * @param pDevIns The device instance.
268 * @param pvUser User argument.
269 * @param GCPhysAddr Physical address (in GC) where the read starts.
270 * @param pv Where to fetch the result.
271 * @param cb Number of bytes to write.
272 * @remarks Caller enters the device critical section.
273 */
274typedef DECLCALLBACK(int) FNIOMMMIOWRITE(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb);
275/** Pointer to a FNIOMMMIOWRITE(). */
276typedef FNIOMMMIOWRITE *PFNIOMMMIOWRITE;
277
278/**
279 * Memory mapped I/O Handler for memset operations, actually for REP STOS* instructions handling.
280 *
281 * @returns VBox status code.
282 *
283 * @param pDevIns The device instance.
284 * @param pvUser User argument.
285 * @param GCPhysAddr Physical address (in GC) where the write starts.
286 * @param u32Item Byte/Word/Dword data to fill.
287 * @param cbItem Size of data in u32Item parameter, restricted to 1/2/4 bytes.
288 * @param cItems Number of iterations.
289 * @remarks Caller enters the device critical section.
290 */
291typedef DECLCALLBACK(int) FNIOMMMIOFILL(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems);
292/** Pointer to a FNIOMMMIOFILL(). */
293typedef FNIOMMMIOFILL *PFNIOMMMIOFILL;
294
295VMMDECL(VBOXSTRICTRC) IOMIOPortRead(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue);
296VMMDECL(VBOXSTRICTRC) IOMIOPortWrite(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t u32Value, size_t cbValue);
297VMM_INT_DECL(VBOXSTRICTRC) IOMIOPortReadString(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, void *pvDst,
298 uint32_t *pcTransfers, unsigned cb);
299VMM_INT_DECL(VBOXSTRICTRC) IOMIOPortWriteString(PVM pVM, PVMCPU pVCpu, RTIOPORT uPort, void const *pvSrc,
300 uint32_t *pcTransfers, unsigned cb);
301VMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, DISCPUMODE enmAddrMode, uint32_t cbTransfer);
302VMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, DISCPUMODE enmAddrMode, uint32_t cbTransfer);
303VMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue);
304VMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue);
305VMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault);
306VMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags);
307VMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags);
308VMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys);
309VMMDECL(bool) IOMIsLockWriteOwner(PVM pVM);
310
311#ifdef IN_RC
312/** @defgroup grp_iom_rc The IOM Raw-Mode Context API
313 * @{
314 */
315VMMRCDECL(VBOXSTRICTRC) IOMRCIOPortHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);
316/** @} */
317#endif /* IN_RC */
318
319
320
321#ifdef IN_RING3
322/** @defgroup grp_iom_r3 The IOM Host Context Ring-3 API
323 * @{
324 */
325VMMR3_INT_DECL(int) IOMR3Init(PVM pVM);
326VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM);
327VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
328VMMR3_INT_DECL(int) IOMR3Term(PVM pVM);
329VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
330 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
331 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStringCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStringCallback,
332 const char *pszDesc);
333VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
334 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
335 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
336 const char *pszDesc);
337VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
338 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
339 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
340 const char *pszDesc);
341VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts);
342
343VMMR3_INT_DECL(int) IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
344 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
345 R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
346 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback,
347 uint32_t fFlags, const char *pszDesc);
348VMMR3_INT_DECL(int) IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
349 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
350 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
351 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback);
352VMMR3_INT_DECL(int) IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTGCPTR pvUser,
353 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
354 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
355 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback);
356VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange);
357VMMR3_INT_DECL(int) IOMR3MmioExPreRegister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cbRange,
358 uint32_t fFlags, const char *pszDesc,
359 RTR3PTR pvUserR3,
360 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackR3,
361 R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackR3,
362 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackR3,
363 RTR0PTR pvUserR0,
364 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackR0,
365 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackR0,
366 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackR0,
367 RTRCPTR pvUserRC,
368 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackRC,
369 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackRC,
370 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackRC);
371VMMR3_INT_DECL(int) IOMR3MmioExNotifyMapped(PVM pVM, void *pvUser, RTGCPHYS GCPhys);
372VMMR3_INT_DECL(void) IOMR3MmioExNotifyUnmapped(PVM pVM, void *pvUser, RTGCPHYS GCPhys);
373VMMR3_INT_DECL(void) IOMR3MmioExNotifyDeregistered(PVM pVM, void *pvUser);
374
375VMMR3_INT_DECL(VBOXSTRICTRC) IOMR3ProcessForceFlag(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict);
376
377VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, bool fPortIo, bool fMmio);
378VMMR3_INT_DECL(void) IOMR3NotifyDebugEventChange(PVM pVM, DBGFEVENT enmEvent, bool fEnabled);
379
380/** @} */
381#endif /* IN_RING3 */
382
383
384/** @} */
385
386RT_C_DECLS_END
387
388#endif /* !VBOX_INCLUDED_vmm_iom_h */
389
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