VirtualBox

source: vbox/trunk/include/VBox/vmm/patm.h@ 44374

Last change on this file since 44374 was 44362, checked in by vboxsync, 12 years ago

PATM: Changed two Main APIs to use PUVM instead of PVM (one of them directly accessed it). Lot's of function scope cleanups.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 8.0 KB
Line 
1/** @file
2 * PATM - Dynamic Guest OS Patching Manager.
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_patm_h
27#define ___VBox_vmm_patm_h
28
29#include <VBox/types.h>
30#include <VBox/dis.h>
31
32
33RT_C_DECLS_BEGIN
34
35/** @defgroup grp_patm The Patch Manager API
36 * @{
37 */
38#define MAX_PATCHES 512
39
40/**
41 * Flags for specifying the type of patch to install with PATMR3InstallPatch
42 * @{
43 */
44#define PATMFL_CODE32 RT_BIT_64(0)
45#define PATMFL_INTHANDLER RT_BIT_64(1)
46#define PATMFL_SYSENTER RT_BIT_64(2)
47#define PATMFL_GUEST_SPECIFIC RT_BIT_64(3)
48#define PATMFL_USER_MODE RT_BIT_64(4)
49#define PATMFL_IDTHANDLER RT_BIT_64(5)
50#define PATMFL_TRAPHANDLER RT_BIT_64(6)
51#define PATMFL_DUPLICATE_FUNCTION RT_BIT_64(7)
52#define PATMFL_REPLACE_FUNCTION_CALL RT_BIT_64(8)
53#define PATMFL_TRAPHANDLER_WITH_ERRORCODE RT_BIT_64(9)
54#define PATMFL_INTHANDLER_WITH_ERRORCODE (PATMFL_TRAPHANDLER_WITH_ERRORCODE)
55#define PATMFL_MMIO_ACCESS RT_BIT_64(10)
56/* no more room -> change PATMInternal.h if more is needed!! */
57
58/*
59 * Flags above 1024 are reserved for internal use!
60 */
61/** @} */
62
63/** Enable to activate sysenter emulation in GC. */
64/* #define PATM_EMULATE_SYSENTER */
65
66/**
67 * Maximum number of cached VGA writes
68 */
69#define MAX_VGA_WRITE_CACHE 64
70
71typedef struct PATMGCSTATE
72{
73 /** Virtual Flags register (IF + more later on) */
74 uint32_t uVMFlags;
75
76 /** Pending PATM actions (internal use only) */
77 uint32_t uPendingAction;
78
79 /** Records the number of times all patches are called (indicating how many exceptions we managed to avoid) */
80 uint32_t uPatchCalls;
81 /** Scratchpad dword */
82 uint32_t uScratch;
83 /** Debugging info */
84 uint32_t uIretEFlags, uIretCS, uIretEIP;
85
86 /** PATM stack pointer */
87 uint32_t Psp;
88
89 /** PATM interrupt flag */
90 uint32_t fPIF;
91 /** PATM inhibit irq address (used by sti) */
92 RTRCPTR GCPtrInhibitInterrupts;
93
94 /** Scratch room for call patch */
95 RTRCPTR GCCallPatchTargetAddr;
96 RTRCPTR GCCallReturnAddr;
97
98 /** Temporary storage for guest registers. */
99 struct
100 {
101 uint32_t uEAX;
102 uint32_t uECX;
103 uint32_t uEDI;
104 uint32_t eFlags;
105 uint32_t uFlags;
106 } Restore;
107} PATMGCSTATE, *PPATMGCSTATE;
108
109typedef struct PATMTRAPREC
110{
111 /** pointer to original guest code instruction (for emulation) */
112 RTRCPTR pNewEIP;
113 /** pointer to the next guest code instruction */
114 RTRCPTR pNextInstr;
115 /** pointer to the corresponding next instruction in the patch block */
116 RTRCPTR pNextPatchInstr;
117} PATMTRAPREC, *PPATMTRAPREC;
118
119
120/**
121 * Translation state (currently patch to GC ptr)
122 */
123typedef enum
124{
125 PATMTRANS_FAILED,
126 PATMTRANS_SAFE, /**< Safe translation */
127 PATMTRANS_PATCHSTART, /**< Instruction starts a patch block */
128 PATMTRANS_OVERWRITTEN, /**< Instruction overwritten by patchjump */
129 PATMTRANS_INHIBITIRQ /**< Instruction must be executed due to instruction fusing */
130} PATMTRANSSTATE;
131
132
133/**
134 * Query PATM state (enabled/disabled)
135 *
136 * @returns 0 - disabled, 1 - enabled
137 * @param pVM The VM to operate on.
138 * @internal
139 */
140#define PATMIsEnabled(a_pVM) ((a_pVM)->fPATMEnabled)
141
142VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR pAddr);
143
144VMM_INT_DECL(void) PATMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore);
145VMM_INT_DECL(void) PATMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rawRC);
146VMM_INT_DECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTXCORE pCtxCore);
147VMM_INT_DECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t efl);
148VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM);
149VMM_INT_DECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
150VMM_INT_DECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
151
152VMM_INT_DECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
153VMM_INT_DECL(bool) PATMAreInterruptsEnabled(PVM pVM);
154VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore);
155#ifdef PATM_EMULATE_SYSENTER
156VMM_INT_DECL(int) PATMSysCall(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);
157#endif
158
159#ifdef IN_RC
160/** @defgroup grp_patm_rc The Patch Manager RC API
161 * @ingroup grp_patm
162 * @{
163 */
164
165VMMRC_INT_DECL(int) PATMRCHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
166VMMRC_INT_DECL(int) PATMRCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
167VMMRC_INT_DECL(int) PATMRCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
168
169/** @} */
170
171#endif
172
173#ifdef IN_RING3
174/** @defgroup grp_patm_r3 The Patch Manager API
175 * @ingroup grp_patm
176 * @{
177 */
178
179VMMR3DECL(int) PATMR3AllowPatching(PUVM pUVM, bool fAllowPatching);
180VMMR3DECL(bool) PATMR3IsEnabled(PUVM pUVM);
181
182VMMR3_INT_DECL(int) PATMR3Init(PVM pVM);
183VMMR3_INT_DECL(int) PATMR3InitFinalize(PVM pVM);
184VMMR3_INT_DECL(void) PATMR3Relocate(PVM pVM);
185VMMR3_INT_DECL(int) PATMR3Term(PVM pVM);
186VMMR3_INT_DECL(int) PATMR3Reset(PVM pVM);
187
188VMMR3_INT_DECL(void *) PATMR3QueryPatchMemHC(PVM pVM, uint32_t *pcb);
189VMMR3_INT_DECL(RTRCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb);
190VMMR3_INT_DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
191VMMR3_INT_DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
192VMMR3_INT_DECL(bool) PATMR3IsPatchHCAddr(PVM pVM, void *pAddrHC);
193VMMR3_INT_DECL(void *) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
194VMMR3_INT_DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM);
195VMMR3_INT_DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
196VMMR3_INT_DECL(int) PATMR3HandleMonitoredPage(PVM pVM);
197VMMR3_INT_DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
198VMMR3_INT_DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr);
199VMMR3_INT_DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
200VMMR3_INT_DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
201VMMR3_INT_DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx);
202VMMR3_INT_DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
203VMMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
204VMMR3_INT_DECL(int) PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *pbDst, size_t cbToRead, size_t *pcbRead);
205VMMR3_INT_DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
206VMMR3_INT_DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
207VMMR3_INT_DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
208VMMR3_INT_DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
209VMMR3_INT_DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
210
211/** @} */
212#endif
213
214
215/** @} */
216RT_C_DECLS_END
217
218
219#endif
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