VirtualBox

source: vbox/trunk/include/VBox/vmm/patm.h@ 55000

Last change on this file since 55000 was 55000, checked in by vboxsync, 10 years ago

CPUMCTXCORE elimination.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 8.4 KB
Line 
1/** @file
2 * PATM - Dynamic Guest OS Patching Manager.
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_patm_h
27#define ___VBox_vmm_patm_h
28
29#include <VBox/types.h>
30#include <VBox/dis.h>
31
32#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING)
33
34RT_C_DECLS_BEGIN
35
36/** @defgroup grp_patm The Patch Manager API
37 * @{
38 */
39#define MAX_PATCHES 512
40
41/**
42 * Flags for specifying the type of patch to install with PATMR3InstallPatch
43 * @{
44 */
45#define PATMFL_CODE32 RT_BIT_64(0)
46#define PATMFL_INTHANDLER RT_BIT_64(1)
47#define PATMFL_SYSENTER RT_BIT_64(2)
48#define PATMFL_GUEST_SPECIFIC RT_BIT_64(3)
49#define PATMFL_USER_MODE RT_BIT_64(4)
50#define PATMFL_IDTHANDLER RT_BIT_64(5)
51#define PATMFL_TRAPHANDLER RT_BIT_64(6)
52#define PATMFL_DUPLICATE_FUNCTION RT_BIT_64(7)
53#define PATMFL_REPLACE_FUNCTION_CALL RT_BIT_64(8)
54#define PATMFL_TRAPHANDLER_WITH_ERRORCODE RT_BIT_64(9)
55#define PATMFL_INTHANDLER_WITH_ERRORCODE (PATMFL_TRAPHANDLER_WITH_ERRORCODE)
56#define PATMFL_MMIO_ACCESS RT_BIT_64(10)
57/* no more room -> change PATMInternal.h if more is needed!! */
58
59/*
60 * Flags above 1024 are reserved for internal use!
61 */
62/** @} */
63
64/** Enable to activate sysenter emulation in GC. */
65/* #define PATM_EMULATE_SYSENTER */
66
67/**
68 * Maximum number of cached VGA writes
69 */
70#define MAX_VGA_WRITE_CACHE 64
71
72typedef struct PATMGCSTATE
73{
74 /** Virtual Flags register (IF + more later on) */
75 uint32_t uVMFlags;
76
77 /** Pending PATM actions (internal use only) */
78 uint32_t uPendingAction;
79
80 /** Records the number of times all patches are called (indicating how many exceptions we managed to avoid) */
81 uint32_t uPatchCalls;
82 /** Scratchpad dword */
83 uint32_t uScratch;
84 /** Debugging info */
85 uint32_t uIretEFlags, uIretCS, uIretEIP;
86
87 /** PATM stack pointer */
88 uint32_t Psp;
89
90 /** PATM interrupt flag */
91 uint32_t fPIF;
92 /** PATM inhibit irq address (used by sti) */
93 RTRCPTR GCPtrInhibitInterrupts;
94
95 /** Scratch room for call patch */
96 RTRCPTR GCCallPatchTargetAddr;
97 RTRCPTR GCCallReturnAddr;
98
99 /** Temporary storage for guest registers. */
100 struct
101 {
102 uint32_t uEAX;
103 uint32_t uECX;
104 uint32_t uEDI;
105 uint32_t eFlags;
106 uint32_t uFlags;
107 } Restore;
108} PATMGCSTATE, *PPATMGCSTATE;
109
110typedef struct PATMTRAPREC
111{
112 /** pointer to original guest code instruction (for emulation) */
113 RTRCPTR pNewEIP;
114 /** pointer to the next guest code instruction */
115 RTRCPTR pNextInstr;
116 /** pointer to the corresponding next instruction in the patch block */
117 RTRCPTR pNextPatchInstr;
118} PATMTRAPREC, *PPATMTRAPREC;
119
120
121/**
122 * Translation state (currently patch to GC ptr)
123 */
124typedef enum
125{
126 PATMTRANS_FAILED,
127 PATMTRANS_SAFE, /**< Safe translation */
128 PATMTRANS_PATCHSTART, /**< Instruction starts a patch block */
129 PATMTRANS_OVERWRITTEN, /**< Instruction overwritten by patchjump */
130 PATMTRANS_INHIBITIRQ /**< Instruction must be executed due to instruction fusing */
131} PATMTRANSSTATE;
132
133
134/**
135 * Query PATM state (enabled/disabled)
136 *
137 * @returns 0 - disabled, 1 - enabled
138 * @param pVM The VM to operate on.
139 * @internal
140 */
141#define PATMIsEnabled(a_pVM) ((a_pVM)->fPATMEnabled)
142
143VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR uGCAddr);
144VMMDECL(bool) PATMIsPatchGCAddrExclHelpers(PVM pVM, RTRCUINTPTR uGCAddr);
145VMM_INT_DECL(int) PATMReadPatchCode(PVM pVM, RTGCPTR GCPtrPatchCode, void *pvDst, size_t cbToRead, size_t *pcbRead);
146
147VMM_INT_DECL(void) PATMRawEnter(PVM pVM, PCPUMCTX pCtx);
148VMM_INT_DECL(void) PATMRawLeave(PVM pVM, PCPUMCTX pCtx, int rawRC);
149VMM_INT_DECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTX pCtx);
150VMM_INT_DECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTX pCtx, uint32_t efl);
151VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMGetGCState(PVM pVM);
152VMM_INT_DECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
153VMM_INT_DECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
154
155VMM_INT_DECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
156VMM_INT_DECL(bool) PATMAreInterruptsEnabled(PVM pVM);
157VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore);
158#ifdef PATM_EMULATE_SYSENTER
159VMM_INT_DECL(int) PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu);
160#endif
161
162#ifdef IN_RC
163/** @defgroup grp_patm_rc The Patch Manager Raw-mode Context API
164 * @{
165 */
166
167VMMRC_INT_DECL(int) PATMRCHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
168VMMRC_INT_DECL(int) PATMRCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
169VMMRC_INT_DECL(int) PATMRCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
170
171/** @} */
172
173#endif
174
175#ifdef IN_RING3
176/** @defgroup grp_patm_r3 The Patch Manager Host Ring-3 Context API
177 * @{
178 */
179
180VMMR3DECL(int) PATMR3AllowPatching(PUVM pUVM, bool fAllowPatching);
181VMMR3DECL(bool) PATMR3IsEnabled(PUVM pUVM);
182
183VMMR3_INT_DECL(int) PATMR3Init(PVM pVM);
184VMMR3_INT_DECL(int) PATMR3InitFinalize(PVM pVM);
185VMMR3_INT_DECL(void) PATMR3Relocate(PVM pVM, RTRCINTPTR offDelta);
186VMMR3_INT_DECL(int) PATMR3Term(PVM pVM);
187VMMR3_INT_DECL(int) PATMR3Reset(PVM pVM);
188
189VMMR3_INT_DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
190VMMR3_INT_DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
191VMMR3_INT_DECL(void *) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
192VMMR3_INT_DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM);
193VMMR3_INT_DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
194VMMR3_INT_DECL(int) PATMR3HandleMonitoredPage(PVM pVM);
195VMMR3_INT_DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
196VMMR3_INT_DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr);
197VMMR3_INT_DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
198VMMR3_INT_DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
199VMMR3_INT_DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx);
200VMMR3_INT_DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
201VMMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
202VMMR3_INT_DECL(int) PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *pbDst, size_t cbToRead, size_t *pcbRead);
203VMMR3_INT_DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
204VMMR3_INT_DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
205VMMR3_INT_DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
206VMMR3_INT_DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
207VMMR3_INT_DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
208
209VMMR3_INT_DECL(void) PATMR3DbgPopulateAddrSpace(PVM pVM, RTDBGAS hDbgAs);
210VMMR3_INT_DECL(void) PATMR3DbgAnnotatePatchedInstruction(PVM pVM, RTRCPTR RCPtr, uint8_t cbInstr,
211 char *pszBuf, size_t cbBuf);
212
213/** @} */
214#endif
215
216
217/** @} */
218RT_C_DECLS_END
219
220#endif /* VBOX_WITH_RAW_MODE */
221
222#endif
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette