VirtualBox

source: vbox/trunk/include/VBox/vmm/patm.h@ 75507

Last change on this file since 75507 was 69107, checked in by vboxsync, 7 years ago

include/VBox/: (C) year

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 8.4 KB
Line 
1/** @file
2 * PATM - Dynamic Guest OS Patching Manager.
3 */
4
5/*
6 * Copyright (C) 2006-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_patm_h
27#define ___VBox_vmm_patm_h
28
29#include <VBox/types.h>
30#include <VBox/dis.h>
31
32#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING)
33
34RT_C_DECLS_BEGIN
35
36/** @defgroup grp_patm The Patch Manager API
37 * @ingroup grp_vmm
38 * @{
39 */
40#define MAX_PATCHES 512
41
42/**
43 * Flags for specifying the type of patch to install with PATMR3InstallPatch
44 * @{
45 */
46#define PATMFL_CODE32 RT_BIT_64(0)
47#define PATMFL_INTHANDLER RT_BIT_64(1)
48#define PATMFL_SYSENTER RT_BIT_64(2)
49#define PATMFL_GUEST_SPECIFIC RT_BIT_64(3)
50#define PATMFL_USER_MODE RT_BIT_64(4)
51#define PATMFL_IDTHANDLER RT_BIT_64(5)
52#define PATMFL_TRAPHANDLER RT_BIT_64(6)
53#define PATMFL_DUPLICATE_FUNCTION RT_BIT_64(7)
54#define PATMFL_REPLACE_FUNCTION_CALL RT_BIT_64(8)
55#define PATMFL_TRAPHANDLER_WITH_ERRORCODE RT_BIT_64(9)
56#define PATMFL_INTHANDLER_WITH_ERRORCODE (PATMFL_TRAPHANDLER_WITH_ERRORCODE)
57#define PATMFL_MMIO_ACCESS RT_BIT_64(10)
58/* no more room -> change PATMInternal.h if more is needed!! */
59
60/*
61 * Flags above 1024 are reserved for internal use!
62 */
63/** @} */
64
65/** Enable to activate sysenter emulation in GC. */
66/* #define PATM_EMULATE_SYSENTER */
67
68/**
69 * Maximum number of cached VGA writes
70 */
71#define MAX_VGA_WRITE_CACHE 64
72
73typedef struct PATMGCSTATE
74{
75 /** Virtual Flags register (IF + more later on) */
76 uint32_t uVMFlags;
77
78 /** Pending PATM actions (internal use only) */
79 uint32_t uPendingAction;
80
81 /** Records the number of times all patches are called (indicating how many exceptions we managed to avoid) */
82 uint32_t uPatchCalls;
83 /** Scratchpad dword */
84 uint32_t uScratch;
85 /** Debugging info */
86 uint32_t uIretEFlags, uIretCS, uIretEIP;
87
88 /** PATM stack pointer */
89 uint32_t Psp;
90
91 /** PATM interrupt flag */
92 uint32_t fPIF;
93 /** PATM inhibit irq address (used by sti) */
94 RTRCPTR GCPtrInhibitInterrupts;
95
96 /** Scratch room for call patch */
97 RTRCPTR GCCallPatchTargetAddr;
98 RTRCPTR GCCallReturnAddr;
99
100 /** Temporary storage for guest registers. */
101 struct
102 {
103 uint32_t uEAX;
104 uint32_t uECX;
105 uint32_t uEDI;
106 uint32_t eFlags;
107 uint32_t uFlags;
108 } Restore;
109} PATMGCSTATE, *PPATMGCSTATE;
110
111typedef struct PATMTRAPREC
112{
113 /** pointer to original guest code instruction (for emulation) */
114 RTRCPTR pNewEIP;
115 /** pointer to the next guest code instruction */
116 RTRCPTR pNextInstr;
117 /** pointer to the corresponding next instruction in the patch block */
118 RTRCPTR pNextPatchInstr;
119} PATMTRAPREC, *PPATMTRAPREC;
120
121
122/**
123 * Translation state (currently patch to GC ptr)
124 */
125typedef enum
126{
127 PATMTRANS_FAILED,
128 PATMTRANS_SAFE, /**< Safe translation */
129 PATMTRANS_PATCHSTART, /**< Instruction starts a patch block */
130 PATMTRANS_OVERWRITTEN, /**< Instruction overwritten by patchjump */
131 PATMTRANS_INHIBITIRQ /**< Instruction must be executed due to instruction fusing */
132} PATMTRANSSTATE;
133
134
135/**
136 * Query PATM state (enabled/disabled)
137 *
138 * @returns 0 - disabled, 1 - enabled
139 * @param a_pVM The VM to operate on.
140 * @internal
141 */
142#define PATMIsEnabled(a_pVM) ((a_pVM)->fPATMEnabled)
143
144VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR uGCAddr);
145VMMDECL(bool) PATMIsPatchGCAddrExclHelpers(PVM pVM, RTRCUINTPTR uGCAddr);
146VMM_INT_DECL(int) PATMReadPatchCode(PVM pVM, RTGCPTR GCPtrPatchCode, void *pvDst, size_t cbToRead, size_t *pcbRead);
147
148VMM_INT_DECL(void) PATMRawEnter(PVM pVM, PCPUMCTX pCtx);
149VMM_INT_DECL(void) PATMRawLeave(PVM pVM, PCPUMCTX pCtx, int rawRC);
150VMM_INT_DECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTX pCtx);
151VMM_INT_DECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTX pCtx, uint32_t efl);
152VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMGetGCState(PVM pVM);
153VMM_INT_DECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
154VMM_INT_DECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
155
156VMM_INT_DECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
157VMM_INT_DECL(bool) PATMAreInterruptsEnabled(PVM pVM);
158VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx);
159#ifdef PATM_EMULATE_SYSENTER
160VMM_INT_DECL(int) PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu);
161#endif
162
163#ifdef IN_RC
164/** @defgroup grp_patm_rc The Patch Manager Raw-mode Context API
165 * @{
166 */
167
168VMMRC_INT_DECL(int) PATMRCHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
169VMMRC_INT_DECL(VBOXSTRICTRC) PATMRCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
170VMMRC_INT_DECL(int) PATMRCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
171
172/** @} */
173
174#endif
175
176#ifdef IN_RING3
177/** @defgroup grp_patm_r3 The Patch Manager Host Ring-3 Context API
178 * @{
179 */
180
181VMMR3DECL(int) PATMR3AllowPatching(PUVM pUVM, bool fAllowPatching);
182VMMR3DECL(bool) PATMR3IsEnabled(PUVM pUVM);
183
184VMMR3_INT_DECL(int) PATMR3Init(PVM pVM);
185VMMR3_INT_DECL(int) PATMR3InitFinalize(PVM pVM);
186VMMR3_INT_DECL(void) PATMR3Relocate(PVM pVM, RTRCINTPTR offDelta);
187VMMR3_INT_DECL(int) PATMR3Term(PVM pVM);
188VMMR3_INT_DECL(int) PATMR3Reset(PVM pVM);
189
190VMMR3_INT_DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
191VMMR3_INT_DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
192VMMR3_INT_DECL(void *) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
193VMMR3_INT_DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM);
194VMMR3_INT_DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
195VMMR3_INT_DECL(int) PATMR3HandleMonitoredPage(PVM pVM);
196VMMR3_INT_DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
197VMMR3_INT_DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr);
198VMMR3_INT_DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
199VMMR3_INT_DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
200VMMR3_INT_DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx);
201VMMR3_INT_DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
202VMMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
203VMMR3_INT_DECL(int) PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *pbDst, size_t cbToRead, size_t *pcbRead);
204VMMR3_INT_DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
205VMMR3_INT_DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
206VMMR3_INT_DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
207VMMR3_INT_DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
208VMMR3_INT_DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
209
210VMMR3_INT_DECL(void) PATMR3DbgPopulateAddrSpace(PVM pVM, RTDBGAS hDbgAs);
211VMMR3_INT_DECL(void) PATMR3DbgAnnotatePatchedInstruction(PVM pVM, RTRCPTR RCPtr, uint8_t cbInstr,
212 char *pszBuf, size_t cbBuf);
213
214/** @} */
215#endif
216
217
218/** @} */
219RT_C_DECLS_END
220
221#endif /* VBOX_WITH_RAW_MODE */
222
223#endif
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette