VirtualBox

source: vbox/trunk/include/VBox/vmm/patm.h@ 79342

Last change on this file since 79342 was 76585, checked in by vboxsync, 6 years ago

*: scm --fix-header-guard-endif
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File size: 8.5 KB
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1/** @file
2 * PATM - Dynamic Guest OS Patching Manager.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_patm_h
27#define VBOX_INCLUDED_vmm_patm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/types.h>
33#include <VBox/dis.h>
34
35#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING)
36
37RT_C_DECLS_BEGIN
38
39/** @defgroup grp_patm The Patch Manager API
40 * @ingroup grp_vmm
41 * @{
42 */
43#define MAX_PATCHES 512
44
45/**
46 * Flags for specifying the type of patch to install with PATMR3InstallPatch
47 * @{
48 */
49#define PATMFL_CODE32 RT_BIT_64(0)
50#define PATMFL_INTHANDLER RT_BIT_64(1)
51#define PATMFL_SYSENTER RT_BIT_64(2)
52#define PATMFL_GUEST_SPECIFIC RT_BIT_64(3)
53#define PATMFL_USER_MODE RT_BIT_64(4)
54#define PATMFL_IDTHANDLER RT_BIT_64(5)
55#define PATMFL_TRAPHANDLER RT_BIT_64(6)
56#define PATMFL_DUPLICATE_FUNCTION RT_BIT_64(7)
57#define PATMFL_REPLACE_FUNCTION_CALL RT_BIT_64(8)
58#define PATMFL_TRAPHANDLER_WITH_ERRORCODE RT_BIT_64(9)
59#define PATMFL_INTHANDLER_WITH_ERRORCODE (PATMFL_TRAPHANDLER_WITH_ERRORCODE)
60#define PATMFL_MMIO_ACCESS RT_BIT_64(10)
61/* no more room -> change PATMInternal.h if more is needed!! */
62
63/*
64 * Flags above 1024 are reserved for internal use!
65 */
66/** @} */
67
68/** Enable to activate sysenter emulation in GC. */
69/* #define PATM_EMULATE_SYSENTER */
70
71/**
72 * Maximum number of cached VGA writes
73 */
74#define MAX_VGA_WRITE_CACHE 64
75
76typedef struct PATMGCSTATE
77{
78 /** Virtual Flags register (IF + more later on) */
79 uint32_t uVMFlags;
80
81 /** Pending PATM actions (internal use only) */
82 uint32_t uPendingAction;
83
84 /** Records the number of times all patches are called (indicating how many exceptions we managed to avoid) */
85 uint32_t uPatchCalls;
86 /** Scratchpad dword */
87 uint32_t uScratch;
88 /** Debugging info */
89 uint32_t uIretEFlags, uIretCS, uIretEIP;
90
91 /** PATM stack pointer */
92 uint32_t Psp;
93
94 /** PATM interrupt flag */
95 uint32_t fPIF;
96 /** PATM inhibit irq address (used by sti) */
97 RTRCPTR GCPtrInhibitInterrupts;
98
99 /** Scratch room for call patch */
100 RTRCPTR GCCallPatchTargetAddr;
101 RTRCPTR GCCallReturnAddr;
102
103 /** Temporary storage for guest registers. */
104 struct
105 {
106 uint32_t uEAX;
107 uint32_t uECX;
108 uint32_t uEDI;
109 uint32_t eFlags;
110 uint32_t uFlags;
111 } Restore;
112} PATMGCSTATE, *PPATMGCSTATE;
113
114typedef struct PATMTRAPREC
115{
116 /** pointer to original guest code instruction (for emulation) */
117 RTRCPTR pNewEIP;
118 /** pointer to the next guest code instruction */
119 RTRCPTR pNextInstr;
120 /** pointer to the corresponding next instruction in the patch block */
121 RTRCPTR pNextPatchInstr;
122} PATMTRAPREC, *PPATMTRAPREC;
123
124
125/**
126 * Translation state (currently patch to GC ptr)
127 */
128typedef enum
129{
130 PATMTRANS_FAILED,
131 PATMTRANS_SAFE, /**< Safe translation */
132 PATMTRANS_PATCHSTART, /**< Instruction starts a patch block */
133 PATMTRANS_OVERWRITTEN, /**< Instruction overwritten by patchjump */
134 PATMTRANS_INHIBITIRQ /**< Instruction must be executed due to instruction fusing */
135} PATMTRANSSTATE;
136
137
138/**
139 * Query PATM state (enabled/disabled)
140 *
141 * @returns 0 - disabled, 1 - enabled
142 * @param a_pVM The VM to operate on.
143 * @internal
144 */
145#define PATMIsEnabled(a_pVM) ((a_pVM)->fPATMEnabled)
146
147VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR uGCAddr);
148VMMDECL(bool) PATMIsPatchGCAddrExclHelpers(PVM pVM, RTRCUINTPTR uGCAddr);
149VMM_INT_DECL(int) PATMReadPatchCode(PVM pVM, RTGCPTR GCPtrPatchCode, void *pvDst, size_t cbToRead, size_t *pcbRead);
150
151VMM_INT_DECL(void) PATMRawEnter(PVM pVM, PCPUMCTX pCtx);
152VMM_INT_DECL(void) PATMRawLeave(PVM pVM, PCPUMCTX pCtx, int rawRC);
153VMM_INT_DECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTX pCtx);
154VMM_INT_DECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTX pCtx, uint32_t efl);
155VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMGetGCState(PVM pVM);
156VMM_INT_DECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
157VMM_INT_DECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
158
159VMM_INT_DECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
160VMM_INT_DECL(bool) PATMAreInterruptsEnabled(PVM pVM);
161VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx);
162#ifdef PATM_EMULATE_SYSENTER
163VMM_INT_DECL(int) PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu);
164#endif
165
166#ifdef IN_RC
167/** @defgroup grp_patm_rc The Patch Manager Raw-mode Context API
168 * @{
169 */
170
171VMMRC_INT_DECL(int) PATMRCHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
172VMMRC_INT_DECL(VBOXSTRICTRC) PATMRCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
173VMMRC_INT_DECL(int) PATMRCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
174
175/** @} */
176
177#endif
178
179#ifdef IN_RING3
180/** @defgroup grp_patm_r3 The Patch Manager Host Ring-3 Context API
181 * @{
182 */
183
184VMMR3DECL(int) PATMR3AllowPatching(PUVM pUVM, bool fAllowPatching);
185VMMR3DECL(bool) PATMR3IsEnabled(PUVM pUVM);
186
187VMMR3_INT_DECL(int) PATMR3Init(PVM pVM);
188VMMR3_INT_DECL(int) PATMR3InitFinalize(PVM pVM);
189VMMR3_INT_DECL(void) PATMR3Relocate(PVM pVM, RTRCINTPTR offDelta);
190VMMR3_INT_DECL(int) PATMR3Term(PVM pVM);
191VMMR3_INT_DECL(int) PATMR3Reset(PVM pVM);
192
193VMMR3_INT_DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
194VMMR3_INT_DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
195VMMR3_INT_DECL(void *) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
196VMMR3_INT_DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM);
197VMMR3_INT_DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
198VMMR3_INT_DECL(int) PATMR3HandleMonitoredPage(PVM pVM);
199VMMR3_INT_DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
200VMMR3_INT_DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr);
201VMMR3_INT_DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
202VMMR3_INT_DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
203VMMR3_INT_DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx);
204VMMR3_INT_DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
205VMMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
206VMMR3_INT_DECL(int) PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *pbDst, size_t cbToRead, size_t *pcbRead);
207VMMR3_INT_DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
208VMMR3_INT_DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
209VMMR3_INT_DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
210VMMR3_INT_DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
211VMMR3_INT_DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
212
213VMMR3_INT_DECL(void) PATMR3DbgPopulateAddrSpace(PVM pVM, RTDBGAS hDbgAs);
214VMMR3_INT_DECL(void) PATMR3DbgAnnotatePatchedInstruction(PVM pVM, RTRCPTR RCPtr, uint8_t cbInstr,
215 char *pszBuf, size_t cbBuf);
216
217/** @} */
218#endif
219
220
221/** @} */
222RT_C_DECLS_END
223
224#endif /* VBOX_WITH_RAW_MODE */
225
226#endif /* !VBOX_INCLUDED_vmm_patm_h */
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